1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2001 - 2015 Intel Corporation
8 #include "e1000_osdep.h"
9 #include "e1000_regs.h"
10 #include "e1000_defines.h"
14 #define E1000_DEV_ID_82576_VF 0x10CA
15 #define E1000_DEV_ID_I350_VF 0x1520
17 #define E1000_VF_INIT_TIMEOUT 200 /* Num of retries to clear RSTI */
19 /* Additional Descriptor Control definitions */
20 #define E1000_TXDCTL_QUEUE_ENABLE 0x02000000 /* Ena specific Tx Queue */
21 #define E1000_RXDCTL_QUEUE_ENABLE 0x02000000 /* Ena specific Rx Queue */
23 /* SRRCTL bit definitions */
24 #define E1000_SRRCTL(_n) ((_n) < 4 ? (0x0280C + ((_n) * 0x100)) : \
25 (0x0C00C + ((_n) * 0x40)))
26 #define E1000_SRRCTL_BSIZEPKT_SHIFT 10 /* Shift _right_ */
27 #define E1000_SRRCTL_BSIZEHDRSIZE_MASK 0x00000F00
28 #define E1000_SRRCTL_BSIZEHDRSIZE_SHIFT 2 /* Shift _left_ */
29 #define E1000_SRRCTL_DESCTYPE_LEGACY 0x00000000
30 #define E1000_SRRCTL_DESCTYPE_ADV_ONEBUF 0x02000000
31 #define E1000_SRRCTL_DESCTYPE_HDR_SPLIT 0x04000000
32 #define E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS 0x0A000000
33 #define E1000_SRRCTL_DESCTYPE_HDR_REPLICATION 0x06000000
34 #define E1000_SRRCTL_DESCTYPE_HDR_REPLICATION_LARGE_PKT 0x08000000
35 #define E1000_SRRCTL_DESCTYPE_MASK 0x0E000000
36 #define E1000_SRRCTL_DROP_EN 0x80000000
38 #define E1000_SRRCTL_BSIZEPKT_MASK 0x0000007F
39 #define E1000_SRRCTL_BSIZEHDR_MASK 0x00003F00
41 /* Interrupt Defines */
42 #define E1000_EICR 0x01580 /* Ext. Interrupt Cause Read - R/clr */
43 #define E1000_EITR(_n) (0x01680 + ((_n) << 2))
44 #define E1000_EICS 0x01520 /* Ext. Intr Cause Set -W0 */
45 #define E1000_EIMS 0x01524 /* Ext. Intr Mask Set/Read -RW */
46 #define E1000_EIMC 0x01528 /* Ext. Intr Mask Clear -WO */
47 #define E1000_EIAC 0x0152C /* Ext. Intr Auto Clear -RW */
48 #define E1000_EIAM 0x01530 /* Ext. Intr Ack Auto Clear Mask -RW */
49 #define E1000_IVAR0 0x01700 /* Intr Vector Alloc (array) -RW */
50 #define E1000_IVAR_MISC 0x01740 /* IVAR for "other" causes -RW */
51 #define E1000_IVAR_VALID 0x80
53 /* Receive Descriptor - Advanced */
54 union e1000_adv_rx_desc {
56 u64 pkt_addr; /* Packet buffer address */
57 u64 hdr_addr; /* Header buffer address */
64 /* RSS type, Packet type */
66 /* Split Header, header buffer len */
71 u32 rss; /* RSS Hash */
73 u16 ip_id; /* IP id */
74 u16 csum; /* Packet Checksum */
79 u32 status_error; /* ext status/error */
80 u16 length; /* Packet length */
81 u16 vlan; /* VLAN tag */
86 #define E1000_RXDADV_HDRBUFLEN_MASK 0x7FE0
87 #define E1000_RXDADV_HDRBUFLEN_SHIFT 5
89 /* Transmit Descriptor - Advanced */
90 union e1000_adv_tx_desc {
92 u64 buffer_addr; /* Address of descriptor's data buf */
97 u64 rsvd; /* Reserved */
103 /* Adv Transmit Descriptor Config Masks */
104 #define E1000_ADVTXD_DTYP_CTXT 0x00200000 /* Advanced Context Descriptor */
105 #define E1000_ADVTXD_DTYP_DATA 0x00300000 /* Advanced Data Descriptor */
106 #define E1000_ADVTXD_DCMD_EOP 0x01000000 /* End of Packet */
107 #define E1000_ADVTXD_DCMD_IFCS 0x02000000 /* Insert FCS (Ethernet CRC) */
108 #define E1000_ADVTXD_DCMD_RS 0x08000000 /* Report Status */
109 #define E1000_ADVTXD_DCMD_DEXT 0x20000000 /* Descriptor extension (1=Adv) */
110 #define E1000_ADVTXD_DCMD_VLE 0x40000000 /* VLAN pkt enable */
111 #define E1000_ADVTXD_DCMD_TSE 0x80000000 /* TCP Seg enable */
112 #define E1000_ADVTXD_PAYLEN_SHIFT 14 /* Adv desc PAYLEN shift */
114 /* Context descriptors */
115 struct e1000_adv_tx_context_desc {
122 #define E1000_ADVTXD_MACLEN_SHIFT 9 /* Adv ctxt desc mac len shift */
123 #define E1000_ADVTXD_TUCMD_IPV4 0x00000400 /* IP Packet Type: 1=IPv4 */
124 #define E1000_ADVTXD_TUCMD_L4T_TCP 0x00000800 /* L4 Packet TYPE of TCP */
125 #define E1000_ADVTXD_L4LEN_SHIFT 8 /* Adv ctxt L4LEN shift */
126 #define E1000_ADVTXD_MSS_SHIFT 16 /* Adv ctxt MSS shift */
128 enum e1000_mac_type {
132 e1000_num_macs /* List is 1-based, so subtract 1 for true count. */
135 struct e1000_vf_stats {
167 #include "e1000_mbx.h"
169 struct e1000_mac_operations {
170 /* Function pointers for the MAC. */
171 s32 (*init_params)(struct e1000_hw *);
172 s32 (*check_for_link)(struct e1000_hw *);
173 void (*clear_vfta)(struct e1000_hw *);
174 s32 (*get_bus_info)(struct e1000_hw *);
175 s32 (*get_link_up_info)(struct e1000_hw *, u16 *, u16 *);
176 void (*update_mc_addr_list)(struct e1000_hw *, u8 *, u32);
177 s32 (*reset_hw)(struct e1000_hw *);
178 s32 (*init_hw)(struct e1000_hw *);
179 s32 (*setup_link)(struct e1000_hw *);
180 void (*write_vfta)(struct e1000_hw *, u32, u32);
181 int (*rar_set)(struct e1000_hw *, u8*, u32);
182 s32 (*read_mac_addr)(struct e1000_hw *);
185 struct e1000_mac_info {
186 struct e1000_mac_operations ops;
190 enum e1000_mac_type type;
195 bool get_link_status;
198 struct e1000_mbx_operations {
199 s32 (*init_params)(struct e1000_hw *hw);
200 s32 (*read)(struct e1000_hw *, u32 *, u16, u16);
201 s32 (*write)(struct e1000_hw *, u32 *, u16, u16);
202 s32 (*read_posted)(struct e1000_hw *, u32 *, u16, u16);
203 s32 (*write_posted)(struct e1000_hw *, u32 *, u16, u16);
204 s32 (*check_for_msg)(struct e1000_hw *, u16);
205 s32 (*check_for_ack)(struct e1000_hw *, u16);
206 s32 (*check_for_rst)(struct e1000_hw *, u16);
209 struct e1000_mbx_stats {
218 struct e1000_mbx_info {
219 struct e1000_mbx_operations ops;
220 struct e1000_mbx_stats stats;
226 struct e1000_dev_spec_vf {
236 unsigned long io_base;
238 struct e1000_mac_info mac;
239 struct e1000_mbx_info mbx;
242 struct e1000_dev_spec_vf vf;
246 u16 subsystem_vendor_id;
247 u16 subsystem_device_id;
253 enum e1000_promisc_type {
254 e1000_promisc_disabled = 0, /* all promisc modes disabled */
255 e1000_promisc_unicast = 1, /* unicast promiscuous enabled */
256 e1000_promisc_multicast = 2, /* multicast promiscuous enabled */
257 e1000_promisc_enabled = 3, /* both uni and multicast promisc */
258 e1000_num_promisc_types
261 /* These functions must be implemented by drivers */
262 s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value);
263 void e1000_vfta_set_vf(struct e1000_hw *, u16, bool);
264 void e1000_rlpml_set_vf(struct e1000_hw *, u16);
265 s32 e1000_promisc_set_vf(struct e1000_hw *, enum e1000_promisc_type);
266 #endif /* _E1000_VF_H_ */