2 * Copyright (c) 2012-2016 Solarflare Communications Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
16 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
18 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
19 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
20 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
21 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
22 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
23 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
24 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 * The views and conclusions contained in the software and documentation are
27 * those of the authors and should not be interpreted as representing official
28 * policies, either expressed or implied, of the FreeBSD Project.
35 #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD
38 static __checkReturn efx_rc_t
42 __in uint32_t target_evq,
44 __in uint32_t instance,
45 __in efsys_mem_t *esmp,
46 __in boolean_t disable_scatter,
47 __in uint32_t ps_bufsize)
50 uint8_t payload[MAX(MC_CMD_INIT_RXQ_EXT_IN_LEN,
51 MC_CMD_INIT_RXQ_EXT_OUT_LEN)];
52 int npages = EFX_RXQ_NBUFS(size);
54 efx_qword_t *dma_addr;
59 /* If this changes, then the payload size might need to change. */
60 EFSYS_ASSERT3U(MC_CMD_INIT_RXQ_OUT_LEN, ==, 0);
61 EFSYS_ASSERT3U(size, <=, EFX_RXQ_MAXNDESCS);
64 dma_mode = MC_CMD_INIT_RXQ_EXT_IN_PACKED_STREAM;
66 dma_mode = MC_CMD_INIT_RXQ_EXT_IN_SINGLE_PACKET;
68 (void) memset(payload, 0, sizeof (payload));
69 req.emr_cmd = MC_CMD_INIT_RXQ;
70 req.emr_in_buf = payload;
71 req.emr_in_length = MC_CMD_INIT_RXQ_EXT_IN_LEN;
72 req.emr_out_buf = payload;
73 req.emr_out_length = MC_CMD_INIT_RXQ_EXT_OUT_LEN;
75 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_SIZE, size);
76 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_TARGET_EVQ, target_evq);
77 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_LABEL, label);
78 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_INSTANCE, instance);
79 MCDI_IN_POPULATE_DWORD_8(req, INIT_RXQ_EXT_IN_FLAGS,
80 INIT_RXQ_EXT_IN_FLAG_BUFF_MODE, 0,
81 INIT_RXQ_EXT_IN_FLAG_HDR_SPLIT, 0,
82 INIT_RXQ_EXT_IN_FLAG_TIMESTAMP, 0,
83 INIT_RXQ_EXT_IN_CRC_MODE, 0,
84 INIT_RXQ_EXT_IN_FLAG_PREFIX, 1,
85 INIT_RXQ_EXT_IN_FLAG_DISABLE_SCATTER, disable_scatter,
86 INIT_RXQ_EXT_IN_DMA_MODE,
88 INIT_RXQ_EXT_IN_PACKED_STREAM_BUFF_SIZE, ps_bufsize);
89 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_OWNER_ID, 0);
90 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_PORT_ID, EVB_PORT_ID_ASSIGNED);
92 dma_addr = MCDI_IN2(req, efx_qword_t, INIT_RXQ_IN_DMA_ADDR);
93 addr = EFSYS_MEM_ADDR(esmp);
95 for (i = 0; i < npages; i++) {
96 EFX_POPULATE_QWORD_2(*dma_addr,
97 EFX_DWORD_1, (uint32_t)(addr >> 32),
98 EFX_DWORD_0, (uint32_t)(addr & 0xffffffff));
101 addr += EFX_BUF_SIZE;
104 efx_mcdi_execute(enp, &req);
106 if (req.emr_rc != 0) {
114 EFSYS_PROBE1(fail1, efx_rc_t, rc);
119 static __checkReturn efx_rc_t
122 __in uint32_t instance)
125 uint8_t payload[MAX(MC_CMD_FINI_RXQ_IN_LEN,
126 MC_CMD_FINI_RXQ_OUT_LEN)];
129 (void) memset(payload, 0, sizeof (payload));
130 req.emr_cmd = MC_CMD_FINI_RXQ;
131 req.emr_in_buf = payload;
132 req.emr_in_length = MC_CMD_FINI_RXQ_IN_LEN;
133 req.emr_out_buf = payload;
134 req.emr_out_length = MC_CMD_FINI_RXQ_OUT_LEN;
136 MCDI_IN_SET_DWORD(req, FINI_RXQ_IN_INSTANCE, instance);
138 efx_mcdi_execute_quiet(enp, &req);
140 if ((req.emr_rc != 0) && (req.emr_rc != MC_CMD_ERR_EALREADY)) {
148 EFSYS_PROBE1(fail1, efx_rc_t, rc);
153 #if EFSYS_OPT_RX_SCALE
154 static __checkReturn efx_rc_t
155 efx_mcdi_rss_context_alloc(
157 __in efx_rx_scale_support_t scale_support,
158 __in uint32_t num_queues,
159 __out uint32_t *rss_contextp)
162 uint8_t payload[MAX(MC_CMD_RSS_CONTEXT_ALLOC_IN_LEN,
163 MC_CMD_RSS_CONTEXT_ALLOC_OUT_LEN)];
164 uint32_t rss_context;
165 uint32_t context_type;
168 if (num_queues > EFX_MAXRSS) {
173 switch (scale_support) {
174 case EFX_RX_SCALE_EXCLUSIVE:
175 context_type = MC_CMD_RSS_CONTEXT_ALLOC_IN_TYPE_EXCLUSIVE;
177 case EFX_RX_SCALE_SHARED:
178 context_type = MC_CMD_RSS_CONTEXT_ALLOC_IN_TYPE_SHARED;
185 (void) memset(payload, 0, sizeof (payload));
186 req.emr_cmd = MC_CMD_RSS_CONTEXT_ALLOC;
187 req.emr_in_buf = payload;
188 req.emr_in_length = MC_CMD_RSS_CONTEXT_ALLOC_IN_LEN;
189 req.emr_out_buf = payload;
190 req.emr_out_length = MC_CMD_RSS_CONTEXT_ALLOC_OUT_LEN;
192 MCDI_IN_SET_DWORD(req, RSS_CONTEXT_ALLOC_IN_UPSTREAM_PORT_ID,
193 EVB_PORT_ID_ASSIGNED);
194 MCDI_IN_SET_DWORD(req, RSS_CONTEXT_ALLOC_IN_TYPE, context_type);
195 /* NUM_QUEUES is only used to validate indirection table offsets */
196 MCDI_IN_SET_DWORD(req, RSS_CONTEXT_ALLOC_IN_NUM_QUEUES, num_queues);
198 efx_mcdi_execute(enp, &req);
200 if (req.emr_rc != 0) {
205 if (req.emr_out_length_used < MC_CMD_RSS_CONTEXT_ALLOC_OUT_LEN) {
210 rss_context = MCDI_OUT_DWORD(req, RSS_CONTEXT_ALLOC_OUT_RSS_CONTEXT_ID);
211 if (rss_context == EF10_RSS_CONTEXT_INVALID) {
216 *rss_contextp = rss_context;
229 EFSYS_PROBE1(fail1, efx_rc_t, rc);
233 #endif /* EFSYS_OPT_RX_SCALE */
235 #if EFSYS_OPT_RX_SCALE
237 efx_mcdi_rss_context_free(
239 __in uint32_t rss_context)
242 uint8_t payload[MAX(MC_CMD_RSS_CONTEXT_FREE_IN_LEN,
243 MC_CMD_RSS_CONTEXT_FREE_OUT_LEN)];
246 if (rss_context == EF10_RSS_CONTEXT_INVALID) {
251 (void) memset(payload, 0, sizeof (payload));
252 req.emr_cmd = MC_CMD_RSS_CONTEXT_FREE;
253 req.emr_in_buf = payload;
254 req.emr_in_length = MC_CMD_RSS_CONTEXT_FREE_IN_LEN;
255 req.emr_out_buf = payload;
256 req.emr_out_length = MC_CMD_RSS_CONTEXT_FREE_OUT_LEN;
258 MCDI_IN_SET_DWORD(req, RSS_CONTEXT_FREE_IN_RSS_CONTEXT_ID, rss_context);
260 efx_mcdi_execute_quiet(enp, &req);
262 if (req.emr_rc != 0) {
272 EFSYS_PROBE1(fail1, efx_rc_t, rc);
276 #endif /* EFSYS_OPT_RX_SCALE */
278 #if EFSYS_OPT_RX_SCALE
280 efx_mcdi_rss_context_set_flags(
282 __in uint32_t rss_context,
283 __in efx_rx_hash_type_t type)
286 uint8_t payload[MAX(MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_LEN,
287 MC_CMD_RSS_CONTEXT_SET_FLAGS_OUT_LEN)];
290 if (rss_context == EF10_RSS_CONTEXT_INVALID) {
295 (void) memset(payload, 0, sizeof (payload));
296 req.emr_cmd = MC_CMD_RSS_CONTEXT_SET_FLAGS;
297 req.emr_in_buf = payload;
298 req.emr_in_length = MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_LEN;
299 req.emr_out_buf = payload;
300 req.emr_out_length = MC_CMD_RSS_CONTEXT_SET_FLAGS_OUT_LEN;
302 MCDI_IN_SET_DWORD(req, RSS_CONTEXT_SET_FLAGS_IN_RSS_CONTEXT_ID,
305 MCDI_IN_POPULATE_DWORD_4(req, RSS_CONTEXT_SET_FLAGS_IN_FLAGS,
306 RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_IPV4_EN,
307 (type & EFX_RX_HASH_IPV4) ? 1 : 0,
308 RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV4_EN,
309 (type & EFX_RX_HASH_TCPIPV4) ? 1 : 0,
310 RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_IPV6_EN,
311 (type & EFX_RX_HASH_IPV6) ? 1 : 0,
312 RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV6_EN,
313 (type & EFX_RX_HASH_TCPIPV6) ? 1 : 0);
315 efx_mcdi_execute(enp, &req);
317 if (req.emr_rc != 0) {
327 EFSYS_PROBE1(fail1, efx_rc_t, rc);
331 #endif /* EFSYS_OPT_RX_SCALE */
333 #if EFSYS_OPT_RX_SCALE
335 efx_mcdi_rss_context_set_key(
337 __in uint32_t rss_context,
338 __in_ecount(n) uint8_t *key,
342 uint8_t payload[MAX(MC_CMD_RSS_CONTEXT_SET_KEY_IN_LEN,
343 MC_CMD_RSS_CONTEXT_SET_KEY_OUT_LEN)];
346 if (rss_context == EF10_RSS_CONTEXT_INVALID) {
351 (void) memset(payload, 0, sizeof (payload));
352 req.emr_cmd = MC_CMD_RSS_CONTEXT_SET_KEY;
353 req.emr_in_buf = payload;
354 req.emr_in_length = MC_CMD_RSS_CONTEXT_SET_KEY_IN_LEN;
355 req.emr_out_buf = payload;
356 req.emr_out_length = MC_CMD_RSS_CONTEXT_SET_KEY_OUT_LEN;
358 MCDI_IN_SET_DWORD(req, RSS_CONTEXT_SET_KEY_IN_RSS_CONTEXT_ID,
361 EFSYS_ASSERT3U(n, ==, MC_CMD_RSS_CONTEXT_SET_KEY_IN_TOEPLITZ_KEY_LEN);
362 if (n != MC_CMD_RSS_CONTEXT_SET_KEY_IN_TOEPLITZ_KEY_LEN) {
367 memcpy(MCDI_IN2(req, uint8_t, RSS_CONTEXT_SET_KEY_IN_TOEPLITZ_KEY),
370 efx_mcdi_execute(enp, &req);
372 if (req.emr_rc != 0) {
384 EFSYS_PROBE1(fail1, efx_rc_t, rc);
388 #endif /* EFSYS_OPT_RX_SCALE */
390 #if EFSYS_OPT_RX_SCALE
392 efx_mcdi_rss_context_set_table(
394 __in uint32_t rss_context,
395 __in_ecount(n) unsigned int *table,
399 uint8_t payload[MAX(MC_CMD_RSS_CONTEXT_SET_TABLE_IN_LEN,
400 MC_CMD_RSS_CONTEXT_SET_TABLE_OUT_LEN)];
404 if (rss_context == EF10_RSS_CONTEXT_INVALID) {
409 (void) memset(payload, 0, sizeof (payload));
410 req.emr_cmd = MC_CMD_RSS_CONTEXT_SET_TABLE;
411 req.emr_in_buf = payload;
412 req.emr_in_length = MC_CMD_RSS_CONTEXT_SET_TABLE_IN_LEN;
413 req.emr_out_buf = payload;
414 req.emr_out_length = MC_CMD_RSS_CONTEXT_SET_TABLE_OUT_LEN;
416 MCDI_IN_SET_DWORD(req, RSS_CONTEXT_SET_TABLE_IN_RSS_CONTEXT_ID,
420 MCDI_IN2(req, uint8_t, RSS_CONTEXT_SET_TABLE_IN_INDIRECTION_TABLE);
423 i < MC_CMD_RSS_CONTEXT_SET_TABLE_IN_INDIRECTION_TABLE_LEN;
425 req_table[i] = (n > 0) ? (uint8_t)table[i % n] : 0;
428 efx_mcdi_execute(enp, &req);
430 if (req.emr_rc != 0) {
440 EFSYS_PROBE1(fail1, efx_rc_t, rc);
444 #endif /* EFSYS_OPT_RX_SCALE */
447 __checkReturn efx_rc_t
451 #if EFSYS_OPT_RX_SCALE
453 if (efx_mcdi_rss_context_alloc(enp, EFX_RX_SCALE_EXCLUSIVE, EFX_MAXRSS,
454 &enp->en_rss_context) == 0) {
456 * Allocated an exclusive RSS context, which allows both the
457 * indirection table and key to be modified.
459 enp->en_rss_support = EFX_RX_SCALE_EXCLUSIVE;
460 enp->en_hash_support = EFX_RX_HASH_AVAILABLE;
463 * Failed to allocate an exclusive RSS context. Continue
464 * operation without support for RSS. The pseudo-header in
465 * received packets will not contain a Toeplitz hash value.
467 enp->en_rss_support = EFX_RX_SCALE_UNAVAILABLE;
468 enp->en_hash_support = EFX_RX_HASH_UNAVAILABLE;
471 #endif /* EFSYS_OPT_RX_SCALE */
476 #if EFSYS_OPT_RX_SCATTER
477 __checkReturn efx_rc_t
478 ef10_rx_scatter_enable(
480 __in unsigned int buf_size)
482 _NOTE(ARGUNUSED(enp, buf_size))
485 #endif /* EFSYS_OPT_RX_SCATTER */
487 #if EFSYS_OPT_RX_SCALE
488 __checkReturn efx_rc_t
489 ef10_rx_scale_mode_set(
491 __in efx_rx_hash_alg_t alg,
492 __in efx_rx_hash_type_t type,
493 __in boolean_t insert)
497 EFSYS_ASSERT3U(alg, ==, EFX_RX_HASHALG_TOEPLITZ);
498 EFSYS_ASSERT3U(insert, ==, B_TRUE);
500 if ((alg != EFX_RX_HASHALG_TOEPLITZ) || (insert == B_FALSE)) {
505 if (enp->en_rss_support == EFX_RX_SCALE_UNAVAILABLE) {
510 if ((rc = efx_mcdi_rss_context_set_flags(enp,
511 enp->en_rss_context, type)) != 0)
521 EFSYS_PROBE1(fail1, efx_rc_t, rc);
525 #endif /* EFSYS_OPT_RX_SCALE */
527 #if EFSYS_OPT_RX_SCALE
528 __checkReturn efx_rc_t
529 ef10_rx_scale_key_set(
531 __in_ecount(n) uint8_t *key,
536 if (enp->en_rss_support == EFX_RX_SCALE_UNAVAILABLE) {
541 if ((rc = efx_mcdi_rss_context_set_key(enp,
542 enp->en_rss_context, key, n)) != 0)
550 EFSYS_PROBE1(fail1, efx_rc_t, rc);
554 #endif /* EFSYS_OPT_RX_SCALE */
556 #if EFSYS_OPT_RX_SCALE
557 __checkReturn efx_rc_t
558 ef10_rx_scale_tbl_set(
560 __in_ecount(n) unsigned int *table,
565 if (enp->en_rss_support == EFX_RX_SCALE_UNAVAILABLE) {
570 if ((rc = efx_mcdi_rss_context_set_table(enp,
571 enp->en_rss_context, table, n)) != 0)
579 EFSYS_PROBE1(fail1, efx_rc_t, rc);
583 #endif /* EFSYS_OPT_RX_SCALE */
587 * EF10 RX pseudo-header
588 * ---------------------
590 * Receive packets are prefixed by an (optional) 14 byte pseudo-header:
592 * +00: Toeplitz hash value.
593 * (32bit little-endian)
594 * +04: Outer VLAN tag. Zero if the packet did not have an outer VLAN tag.
596 * +06: Inner VLAN tag. Zero if the packet did not have an inner VLAN tag.
598 * +08: Packet Length. Zero if the RX datapath was in cut-through mode.
599 * (16bit little-endian)
600 * +10: MAC timestamp. Zero if timestamping is not enabled.
601 * (32bit little-endian)
603 * See "The RX Pseudo-header" in SF-109306-TC.
606 __checkReturn efx_rc_t
607 ef10_rx_prefix_pktlen(
609 __in uint8_t *buffer,
610 __out uint16_t *lengthp)
612 _NOTE(ARGUNUSED(enp))
615 * The RX pseudo-header contains the packet length, excluding the
616 * pseudo-header. If the hardware receive datapath was operating in
617 * cut-through mode then the length in the RX pseudo-header will be
618 * zero, and the packet length must be obtained from the DMA length
619 * reported in the RX event.
621 *lengthp = buffer[8] | (buffer[9] << 8);
625 #if EFSYS_OPT_RX_SCALE
626 __checkReturn uint32_t
629 __in efx_rx_hash_alg_t func,
630 __in uint8_t *buffer)
632 _NOTE(ARGUNUSED(enp))
635 case EFX_RX_HASHALG_TOEPLITZ:
646 #endif /* EFSYS_OPT_RX_SCALE */
651 __in_ecount(n) efsys_dma_addr_t *addrp,
654 __in unsigned int completed,
655 __in unsigned int added)
662 /* The client driver must not overfill the queue */
663 EFSYS_ASSERT3U(added - completed + n, <=,
664 EFX_RXQ_LIMIT(erp->er_mask + 1));
666 id = added & (erp->er_mask);
667 for (i = 0; i < n; i++) {
668 EFSYS_PROBE4(rx_post, unsigned int, erp->er_index,
669 unsigned int, id, efsys_dma_addr_t, addrp[i],
672 EFX_POPULATE_QWORD_3(qword,
673 ESF_DZ_RX_KER_BYTE_CNT, (uint32_t)(size),
674 ESF_DZ_RX_KER_BUF_ADDR_DW0,
675 (uint32_t)(addrp[i] & 0xffffffff),
676 ESF_DZ_RX_KER_BUF_ADDR_DW1,
677 (uint32_t)(addrp[i] >> 32));
679 offset = id * sizeof (efx_qword_t);
680 EFSYS_MEM_WRITEQ(erp->er_esmp, offset, &qword);
682 id = (id + 1) & (erp->er_mask);
689 __in unsigned int added,
690 __inout unsigned int *pushedp)
692 efx_nic_t *enp = erp->er_enp;
693 unsigned int pushed = *pushedp;
697 /* Hardware has alignment restriction for WPTR */
698 wptr = P2ALIGN(added, EF10_RX_WPTR_ALIGN);
704 /* Push the populated descriptors out */
705 wptr &= erp->er_mask;
707 EFX_POPULATE_DWORD_1(dword, ERF_DZ_RX_DESC_WPTR, wptr);
709 /* Guarantee ordering of memory (descriptors) and PIO (doorbell) */
710 EFX_DMA_SYNC_QUEUE_FOR_DEVICE(erp->er_esmp, erp->er_mask + 1,
711 wptr, pushed & erp->er_mask);
712 EFSYS_PIO_WRITE_BARRIER();
713 EFX_BAR_TBL_WRITED(enp, ER_DZ_RX_DESC_UPD_REG,
714 erp->er_index, &dword, B_FALSE);
717 #if EFSYS_OPT_RX_PACKED_STREAM
720 ef10_rx_qps_update_credits(
723 efx_nic_t *enp = erp->er_enp;
725 efx_evq_rxq_state_t *rxq_state =
726 &erp->er_eep->ee_rxq_state[erp->er_label];
728 EFSYS_ASSERT(rxq_state->eers_rx_packed_stream);
730 if (rxq_state->eers_rx_packed_stream_credits == 0)
733 EFX_POPULATE_DWORD_3(dword,
734 ERF_DZ_RX_DESC_MAGIC_DOORBELL, 1,
735 ERF_DZ_RX_DESC_MAGIC_CMD,
736 ERE_DZ_RX_DESC_MAGIC_CMD_PS_CREDITS,
737 ERF_DZ_RX_DESC_MAGIC_DATA,
738 rxq_state->eers_rx_packed_stream_credits);
739 EFX_BAR_TBL_WRITED(enp, ER_DZ_RX_DESC_UPD_REG,
740 erp->er_index, &dword, B_FALSE);
742 rxq_state->eers_rx_packed_stream_credits = 0;
745 __checkReturn uint8_t *
746 ef10_rx_qps_packet_info(
748 __in uint8_t *buffer,
749 __in uint32_t buffer_length,
750 __in uint32_t current_offset,
751 __out uint16_t *lengthp,
752 __out uint32_t *next_offsetp,
753 __out uint32_t *timestamp)
758 efx_evq_rxq_state_t *rxq_state =
759 &erp->er_eep->ee_rxq_state[erp->er_label];
761 EFSYS_ASSERT(rxq_state->eers_rx_packed_stream);
763 buffer += current_offset;
764 pkt_start = buffer + EFX_RX_PACKED_STREAM_RX_PREFIX_SIZE;
766 qwordp = (efx_qword_t *)buffer;
767 *timestamp = EFX_QWORD_FIELD(*qwordp, ES_DZ_PS_RX_PREFIX_TSTAMP);
768 *lengthp = EFX_QWORD_FIELD(*qwordp, ES_DZ_PS_RX_PREFIX_ORIG_LEN);
769 buf_len = EFX_QWORD_FIELD(*qwordp, ES_DZ_PS_RX_PREFIX_CAP_LEN);
771 buf_len = P2ROUNDUP(buf_len + EFX_RX_PACKED_STREAM_RX_PREFIX_SIZE,
772 EFX_RX_PACKED_STREAM_ALIGNMENT);
774 current_offset + buf_len + EFX_RX_PACKED_STREAM_ALIGNMENT;
776 EFSYS_ASSERT3U(*next_offsetp, <=, buffer_length);
777 EFSYS_ASSERT3U(current_offset + *lengthp, <, *next_offsetp);
779 if ((*next_offsetp ^ current_offset) &
780 EFX_RX_PACKED_STREAM_MEM_PER_CREDIT) {
781 if (rxq_state->eers_rx_packed_stream_credits <
782 EFX_RX_PACKED_STREAM_MAX_CREDITS)
783 rxq_state->eers_rx_packed_stream_credits++;
792 __checkReturn efx_rc_t
796 efx_nic_t *enp = erp->er_enp;
799 if ((rc = efx_mcdi_fini_rxq(enp, erp->er_index)) != 0)
805 EFSYS_PROBE1(fail1, efx_rc_t, rc);
815 _NOTE(ARGUNUSED(erp))
819 __checkReturn efx_rc_t
822 __in unsigned int index,
823 __in unsigned int label,
824 __in efx_rxq_type_t type,
825 __in efsys_mem_t *esmp,
831 efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
833 boolean_t disable_scatter;
834 unsigned int ps_buf_size;
836 _NOTE(ARGUNUSED(id, erp))
838 EFX_STATIC_ASSERT(EFX_EV_RX_NLABELS == (1 << ESF_DZ_RX_QLABEL_WIDTH));
839 EFSYS_ASSERT3U(label, <, EFX_EV_RX_NLABELS);
840 EFSYS_ASSERT3U(enp->en_rx_qcount + 1, <, encp->enc_rxq_limit);
842 EFX_STATIC_ASSERT(ISP2(EFX_RXQ_MAXNDESCS));
843 EFX_STATIC_ASSERT(ISP2(EFX_RXQ_MINNDESCS));
845 if (!ISP2(n) || (n < EFX_RXQ_MINNDESCS) || (n > EFX_RXQ_MAXNDESCS)) {
849 if (index >= encp->enc_rxq_limit) {
855 case EFX_RXQ_TYPE_DEFAULT:
856 case EFX_RXQ_TYPE_SCATTER:
859 #if EFSYS_OPT_RX_PACKED_STREAM
860 case EFX_RXQ_TYPE_PACKED_STREAM_1M:
861 ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_1M;
863 case EFX_RXQ_TYPE_PACKED_STREAM_512K:
864 ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_512K;
866 case EFX_RXQ_TYPE_PACKED_STREAM_256K:
867 ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_256K;
869 case EFX_RXQ_TYPE_PACKED_STREAM_128K:
870 ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_128K;
872 case EFX_RXQ_TYPE_PACKED_STREAM_64K:
873 ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_64K;
875 #endif /* EFSYS_OPT_RX_PACKED_STREAM */
881 #if EFSYS_OPT_RX_PACKED_STREAM
882 if (ps_buf_size != 0) {
883 /* Check if datapath firmware supports packed stream mode */
884 if (encp->enc_rx_packed_stream_supported == B_FALSE) {
888 /* Check if packed stream allows configurable buffer sizes */
889 if ((type != EFX_RXQ_TYPE_PACKED_STREAM_1M) &&
890 (encp->enc_rx_var_packed_stream_supported == B_FALSE)) {
895 #else /* EFSYS_OPT_RX_PACKED_STREAM */
896 EFSYS_ASSERT(ps_buf_size == 0);
897 #endif /* EFSYS_OPT_RX_PACKED_STREAM */
899 /* Scatter can only be disabled if the firmware supports doing so */
900 if (type == EFX_RXQ_TYPE_SCATTER)
901 disable_scatter = B_FALSE;
903 disable_scatter = encp->enc_rx_disable_scatter_supported;
905 if ((rc = efx_mcdi_init_rxq(enp, n, eep->ee_index, label, index,
906 esmp, disable_scatter, ps_buf_size)) != 0)
910 erp->er_label = label;
912 ef10_ev_rxlabel_init(eep, erp, label, ps_buf_size != 0);
918 #if EFSYS_OPT_RX_PACKED_STREAM
923 #endif /* EFSYS_OPT_RX_PACKED_STREAM */
929 EFSYS_PROBE1(fail1, efx_rc_t, rc);
938 efx_nic_t *enp = erp->er_enp;
939 efx_evq_t *eep = erp->er_eep;
940 unsigned int label = erp->er_label;
942 ef10_ev_rxlabel_fini(eep, label);
944 EFSYS_ASSERT(enp->en_rx_qcount != 0);
947 EFSYS_KMEM_FREE(enp->en_esip, sizeof (efx_rxq_t), erp);
954 #if EFSYS_OPT_RX_SCALE
955 if (enp->en_rss_support != EFX_RX_SCALE_UNAVAILABLE) {
956 (void) efx_mcdi_rss_context_free(enp, enp->en_rss_context);
958 enp->en_rss_context = 0;
959 enp->en_rss_support = EFX_RX_SCALE_UNAVAILABLE;
961 _NOTE(ARGUNUSED(enp))
962 #endif /* EFSYS_OPT_RX_SCALE */
965 #endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */