ena_plat_dpdk.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright (c) 2015-2020 Amazon.com, Inc. or its affiliates.
   3  * All rights reserved.
   4  */
   5
   6 #ifndef DPDK_ENA_COM_ENA_PLAT_DPDK_H_
   7 #define DPDK_ENA_COM_ENA_PLAT_DPDK_H_
   8
   9 #include <stdbool.h>
  10 #include <stdlib.h>
  11 #include <pthread.h>
  12 #include <stdint.h>
  13 #include <inttypes.h>
  14 #include <string.h>
  15 #include <errno.h>
  16
  17 #include <rte_atomic.h>
  18 #include <rte_branch_prediction.h>
  19 #include <rte_cycles.h>
  20 #include <rte_io.h>
  21 #include <rte_log.h>
  22 #include <rte_malloc.h>
  23 #include <rte_memzone.h>
  24 #include <rte_prefetch.h>
  25 #include <rte_spinlock.h>
  26
  27 #include <sys/time.h>
  28 #include <rte_memcpy.h>
  29
  30 typedef uint64_t u64;
  31 typedef uint32_t u32;
  32 typedef uint16_t u16;
  33 typedef uint8_t u8;
  34
  35 typedef struct rte_eth_dev ena_netdev;
  36 typedef uint64_t dma_addr_t;
  37
  38 #ifndef ETIME
  39 #define ETIME ETIMEDOUT
  40 #endif
  41
  42 #define ENA_PRIu64 PRIu64
  43 #define ena_atomic32_t rte_atomic32_t
  44 #define ena_mem_handle_t const struct rte_memzone *
  45
  46 #define SZ_256 (256U)
  47 #define SZ_4K (4096U)
  48
  49 #define ENA_COM_OK      0
  50 #define ENA_COM_NO_MEM  -ENOMEM
  51 #define ENA_COM_INVAL   -EINVAL
  52 #define ENA_COM_NO_SPACE        -ENOSPC
  53 #define ENA_COM_NO_DEVICE       -ENODEV
  54 #define ENA_COM_TIMER_EXPIRED   -ETIME
  55 #define ENA_COM_FAULT   -EFAULT
  56 #define ENA_COM_TRY_AGAIN       -EAGAIN
  57 #define ENA_COM_UNSUPPORTED    -EOPNOTSUPP
  58 #define ENA_COM_EIO    -EIO
  59
  60 #define ____cacheline_aligned __rte_cache_aligned
  61
  62 #define ENA_ABORT() abort()
  63
  64 #define ENA_MSLEEP(x) rte_delay_us_sleep(x * 1000)
  65 #define ENA_USLEEP(x) rte_delay_us_sleep(x)
  66 #define ENA_UDELAY(x) rte_delay_us_block(x)
  67
  68 #define ENA_TOUCH(x) ((void)(x))
  69 /* Avoid nested declaration on arm64, as it may define rte_memcpy as memcpy. */
  70 #if defined(RTE_ARCH_X86)
  71 #undef memcpy
  72 #define memcpy rte_memcpy
  73 #endif
  74 #define wmb rte_wmb
  75 #define rmb rte_rmb
  76 #define mb rte_mb
  77 #define mmiowb rte_io_wmb
  78 #define __iomem
  79
  80 #ifndef READ_ONCE
  81 #define READ_ONCE(var) (*((volatile typeof(var) *)(&(var))))
  82 #endif
  83
  84 #define READ_ONCE8(var) READ_ONCE(var)
  85 #define READ_ONCE16(var) READ_ONCE(var)
  86 #define READ_ONCE32(var) READ_ONCE(var)
  87
  88 #define US_PER_S 1000000
  89 #define ENA_GET_SYSTEM_USECS()                                                 \
  90         (rte_get_timer_cycles() * US_PER_S / rte_get_timer_hz())
  91
  92 extern int ena_logtype_com;
  93
  94 #define ENA_MAX_T(type, x, y) RTE_MAX((type)(x), (type)(y))
  95 #define ENA_MAX32(x, y) ENA_MAX_T(uint32_t, (x), (y))
  96 #define ENA_MAX16(x, y) ENA_MAX_T(uint16_t, (x), (y))
  97 #define ENA_MAX8(x, y) ENA_MAX_T(uint8_t, (x), (y))
  98 #define ENA_MIN_T(type, x, y) RTE_MIN((type)(x), (type)(y))
  99 #define ENA_MIN32(x, y) ENA_MIN_T(uint32_t, (x), (y))
 100 #define ENA_MIN16(x, y) ENA_MIN_T(uint16_t, (x), (y))
 101 #define ENA_MIN8(x, y) ENA_MIN_T(uint8_t, (x), (y))
 102
 103 #define BITS_PER_LONG_LONG (__SIZEOF_LONG_LONG__ * 8)
 104 #define U64_C(x) x ## ULL
 105 #define BIT(nr)         (1UL << (nr))
 106 #define BITS_PER_LONG   (__SIZEOF_LONG__ * 8)
 107 #define GENMASK(h, l)   (((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
 108 #define GENMASK_ULL(h, l) (((~0ULL) - (1ULL << (l)) + 1) &                     \
 109                           (~0ULL >> (BITS_PER_LONG_LONG - 1 - (h))))
 110
 111 #define ena_trc_log(dev, level, fmt, arg...)                                   \
 112         (                                                                      \
 113                 ENA_TOUCH(dev),                                                \
 114                 rte_log(RTE_LOG_ ## level, ena_logtype_com,                    \
 115                         "[ENA_COM: %s]" fmt, __func__, ##arg)                  \
 116         )
 117
 118 #define ena_trc_dbg(dev, format, arg...) ena_trc_log(dev, DEBUG, format, ##arg)
 119 #define ena_trc_info(dev, format, arg...) ena_trc_log(dev, INFO, format, ##arg)
 120 #define ena_trc_warn(dev, format, arg...)                                      \
 121         ena_trc_log(dev, WARNING, format, ##arg)
 122 #define ena_trc_err(dev, format, arg...) ena_trc_log(dev, ERR, format, ##arg)
 123
 124 #define ENA_WARN(cond, dev, format, arg...)                                    \
 125         do {                                                                   \
 126                 if (unlikely(cond)) {                                          \
 127                         ena_trc_err(dev,                                       \
 128                                 "Warn failed on %s:%s:%d:" format,             \
 129                                 __FILE__, __func__, __LINE__, ##arg);          \
 130                 }                                                              \
 131         } while (0)
 132
 133 /* Spinlock related methods */
 134 #define ena_spinlock_t rte_spinlock_t
 135 #define ENA_SPINLOCK_INIT(spinlock) rte_spinlock_init(&(spinlock))
 136 #define ENA_SPINLOCK_LOCK(spinlock, flags)                                     \
 137         ({(void)flags; rte_spinlock_lock(&(spinlock)); })
 138 #define ENA_SPINLOCK_UNLOCK(spinlock, flags)                                   \
 139         ({(void)flags; rte_spinlock_unlock(&(spinlock)); })
 140 #define ENA_SPINLOCK_DESTROY(spinlock) ((void)(spinlock))
 141
 142 typedef struct {
 143         pthread_cond_t cond;
 144         pthread_mutex_t mutex;
 145         uint8_t flag;
 146 } ena_wait_event_t;
 147
 148 #define ENA_WAIT_EVENT_INIT(waitevent)                                         \
 149         do {                                                                   \
 150                 ena_wait_event_t *_we = &(waitevent);                          \
 151                 pthread_mutex_init(&_we->mutex, NULL);                         \
 152                 pthread_cond_init(&_we->cond, NULL);                           \
 153                 _we->flag = 0;                                                 \
 154         } while (0)
 155
 156 #define ENA_WAIT_EVENT_WAIT(waitevent, timeout)                                \
 157         do {                                                                   \
 158                 ena_wait_event_t *_we = &(waitevent);                          \
 159                 typeof(timeout) _tmo = (timeout);                              \
 160                 int ret = 0;                                                   \
 161                 struct timespec wait;                                          \
 162                 struct timeval now;                                            \
 163                 unsigned long timeout_us;                                      \
 164                 gettimeofday(&now, NULL);                                      \
 165                 wait.tv_sec = now.tv_sec + _tmo / 1000000UL;                   \
 166                 timeout_us = _tmo % 1000000UL;                                 \
 167                 wait.tv_nsec = (now.tv_usec + timeout_us) * 1000UL;            \
 168                 pthread_mutex_lock(&_we->mutex);                               \
 169                 while (ret == 0 && !_we->flag) {                               \
 170                         ret = pthread_cond_timedwait(&_we->cond,               \
 171                                 &_we->mutex, &wait);                           \
 172                 }                                                              \
 173                 /* Asserts only if not working on ena_wait_event_t */          \
 174                 if (unlikely(ret != 0 && ret != ETIMEDOUT))                    \
 175                         ena_trc_err(NULL,                                      \
 176                                 "Invalid wait event. pthread ret: %d\n", ret); \
 177                 else if (unlikely(ret == ETIMEDOUT))                           \
 178                         ena_trc_err(NULL,                                      \
 179                                 "Timeout waiting for " #waitevent "\n");       \
 180                 _we->flag = 0;                                                 \
 181                 pthread_mutex_unlock(&_we->mutex);                             \
 182         } while (0)
 183 #define ENA_WAIT_EVENT_SIGNAL(waitevent)                                       \
 184         do {                                                                   \
 185                 ena_wait_event_t *_we = &(waitevent);                          \
 186                 pthread_mutex_lock(&_we->mutex);                               \
 187                 _we->flag = 1;                                                 \
 188                 pthread_cond_signal(&_we->cond);                               \
 189                 pthread_mutex_unlock(&_we->mutex);                             \
 190         } while (0)
 191 /* pthread condition doesn't need to be rearmed after usage */
 192 #define ENA_WAIT_EVENT_CLEAR(...)
 193 #define ENA_WAIT_EVENT_DESTROY(waitevent) ((void)(waitevent))
 194
 195 #define ENA_MIGHT_SLEEP()
 196
 197 #define ena_time_t uint64_t
 198 #define ENA_TIME_EXPIRE(timeout)  (timeout < rte_get_timer_cycles())
 199 #define ENA_GET_SYSTEM_TIMEOUT(timeout_us)                                     \
 200         ((timeout_us) * rte_get_timer_hz() / 1000000 + rte_get_timer_cycles())
 201
 202 /*
 203  * Each rte_memzone should have unique name.
 204  * To satisfy it, count number of allocations and add it to name.
 205  */
 206 extern rte_atomic64_t ena_alloc_cnt;
 207
 208 #define ENA_MEM_ALLOC_COHERENT_ALIGNED(                                        \
 209         dmadev, size, virt, phys, mem_handle, alignment)                       \
 210         do {                                                                   \
 211                 const struct rte_memzone *mz = NULL;                           \
 212                 ENA_TOUCH(dmadev);                                             \
 213                 if ((size) > 0) {                                              \
 214                         char z_name[RTE_MEMZONE_NAMESIZE];                     \
 215                         snprintf(z_name, sizeof(z_name),                       \
 216                                 "ena_alloc_%" PRIi64 "",                       \
 217                                 rte_atomic64_add_return(&ena_alloc_cnt, 1));   \
 218                         mz = rte_memzone_reserve_aligned(z_name, (size),       \
 219                                         SOCKET_ID_ANY, RTE_MEMZONE_IOVA_CONTIG,\
 220                                         alignment);                            \
 221                         mem_handle = mz;                                       \
 222                 }                                                              \
 223                 if (mz == NULL) {                                              \
 224                         virt = NULL;                                           \
 225                         phys = 0;                                              \
 226                 } else {                                                       \
 227                         memset(mz->addr, 0, (size));                           \
 228                         virt = mz->addr;                                       \
 229                         phys = mz->iova;                                       \
 230                 }                                                              \
 231         } while (0)
 232 #define ENA_MEM_ALLOC_COHERENT(dmadev, size, virt, phys, mem_handle)           \
 233                 ENA_MEM_ALLOC_COHERENT_ALIGNED(dmadev, size, virt, phys,       \
 234                         mem_handle, RTE_CACHE_LINE_SIZE)
 235 #define ENA_MEM_FREE_COHERENT(dmadev, size, virt, phys, mem_handle)            \
 236                 ({ ENA_TOUCH(size); ENA_TOUCH(phys); ENA_TOUCH(dmadev);        \
 237                    rte_memzone_free(mem_handle); })
 238
 239 #define ENA_MEM_ALLOC_COHERENT_NODE_ALIGNED(                                   \
 240         dmadev, size, virt, phys, mem_handle, node, dev_node, alignment)       \
 241         do {                                                                   \
 242                 const struct rte_memzone *mz = NULL;                           \
 243                 ENA_TOUCH(dmadev); ENA_TOUCH(dev_node);                        \
 244                 if ((size) > 0) {                                              \
 245                         char z_name[RTE_MEMZONE_NAMESIZE];                     \
 246                         snprintf(z_name, sizeof(z_name),                       \
 247                                 "ena_alloc_%" PRIi64 "",                       \
 248                                 rte_atomic64_add_return(&ena_alloc_cnt, 1));   \
 249                         mz = rte_memzone_reserve_aligned(z_name, (size),       \
 250                                 node, RTE_MEMZONE_IOVA_CONTIG, alignment);     \
 251                         mem_handle = mz;                                       \
 252                 }                                                              \
 253                 if (mz == NULL) {                                              \
 254                         virt = NULL;                                           \
 255                         phys = 0;                                              \
 256                 } else {                                                       \
 257                         memset(mz->addr, 0, (size));                           \
 258                         virt = mz->addr;                                       \
 259                         phys = mz->iova;                                       \
 260                 }                                                              \
 261         } while (0)
 262 #define ENA_MEM_ALLOC_COHERENT_NODE(                                           \
 263         dmadev, size, virt, phys, mem_handle, node, dev_node)                  \
 264                 ENA_MEM_ALLOC_COHERENT_NODE_ALIGNED(dmadev, size, virt, phys,  \
 265                         mem_handle, node, dev_node, RTE_CACHE_LINE_SIZE)
 266 #define ENA_MEM_ALLOC_NODE(dmadev, size, virt, node, dev_node)                 \
 267         do {                                                                   \
 268                 ENA_TOUCH(dmadev); ENA_TOUCH(dev_node);                        \
 269                 virt = rte_zmalloc_socket(NULL, size, 0, node);                \
 270         } while (0)
 271
 272 #define ENA_MEM_ALLOC(dmadev, size) rte_zmalloc(NULL, size, 1)
 273 #define ENA_MEM_FREE(dmadev, ptr, size)                                        \
 274         ({ ENA_TOUCH(dmadev); ENA_TOUCH(size); rte_free(ptr); })
 275
 276 #define ENA_DB_SYNC(mem_handle) ((void)mem_handle)
 277
 278 #define ENA_REG_WRITE32(bus, value, reg)                                       \
 279         ({ (void)(bus); rte_write32((value), (reg)); })
 280 #define ENA_REG_WRITE32_RELAXED(bus, value, reg)                               \
 281         ({ (void)(bus); rte_write32_relaxed((value), (reg)); })
 282 #define ENA_REG_READ32(bus, reg)                                               \
 283         ({ (void)(bus); rte_read32_relaxed((reg)); })
 284
 285 #define ATOMIC32_INC(i32_ptr) rte_atomic32_inc(i32_ptr)
 286 #define ATOMIC32_DEC(i32_ptr) rte_atomic32_dec(i32_ptr)
 287 #define ATOMIC32_SET(i32_ptr, val) rte_atomic32_set(i32_ptr, val)
 288 #define ATOMIC32_READ(i32_ptr) rte_atomic32_read(i32_ptr)
 289
 290 #define msleep(x) rte_delay_us(x * 1000)
 291 #define udelay(x) rte_delay_us(x)
 292
 293 #define dma_rmb() rmb()
 294
 295 #define MAX_ERRNO       4095
 296 #define IS_ERR(x) (((unsigned long)x) >= (unsigned long)-MAX_ERRNO)
 297 #define ERR_PTR(error) ((void *)(long)error)
 298 #define PTR_ERR(error) ((long)(void *)error)
 299 #define might_sleep()
 300
 301 #define prefetch(x) rte_prefetch0(x)
 302 #define prefetchw(x) rte_prefetch0_write(x)
 303
 304 #define lower_32_bits(x) ((uint32_t)(x))
 305 #define upper_32_bits(x) ((uint32_t)(((x) >> 16) >> 16))
 306
 307 #define ENA_TIME_EXPIRE(timeout)  (timeout < rte_get_timer_cycles())
 308 #define ENA_GET_SYSTEM_TIMEOUT(timeout_us)                                     \
 309         ((timeout_us) * rte_get_timer_hz() / 1000000 + rte_get_timer_cycles())
 310 #define ENA_WAIT_EVENTS_DESTROY(admin_queue) ((void)(admin_queue))
 311
 312 /* The size must be 8 byte align */
 313 #define ENA_MEMCPY_TO_DEVICE_64(dst, src, size)                                \
 314         do {                                                                   \
 315                 int count, i;                                                  \
 316                 uint64_t *to = (uint64_t *)(dst);                              \
 317                 const uint64_t *from = (const uint64_t *)(src);                \
 318                 count = (size) / 8;                                            \
 319                 for (i = 0; i < count; i++, from++, to++)                      \
 320                         rte_write64_relaxed(*from, to);                        \
 321         } while(0)
 322
 323 #define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
 324
 325 #define ENA_FFS(x) ffs(x)
 326
 327 void ena_rss_key_fill(void *key, size_t size);
 328
 329 #define ENA_RSS_FILL_KEY(key, size) ena_rss_key_fill(key, size)
 330
 331 #define ENA_INTR_INITIAL_TX_INTERVAL_USECS_PLAT 0
 332
 333 #include "ena_includes.h"
 334 #endif /* DPDK_ENA_COM_ENA_PLAT_DPDK_H_ */