4 * Copyright(c) 2010-2012 Intel Corporation. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 * version: DPDK.L.1.2.3-3
40 #include <sys/types.h>
41 #include <sys/param.h>
43 #include <sys/queue.h>
48 #include <rte_common.h>
49 #include <rte_byteorder.h>
51 #include <rte_memory.h>
52 #include <rte_memcpy.h>
53 #include <rte_memzone.h>
54 #include <rte_tailq.h>
56 #include <rte_per_lcore.h>
57 #include <rte_launch.h>
58 #include <rte_atomic.h>
59 #include <rte_cycles.h>
60 #include <rte_prefetch.h>
61 #include <rte_lcore.h>
62 #include <rte_per_lcore.h>
63 #include <rte_branch_prediction.h>
64 #include <rte_interrupts.h>
66 #include <rte_random.h>
67 #include <rte_debug.h>
68 #include <rte_ether.h>
69 #include <rte_ethdev.h>
71 #include <rte_mempool.h>
76 #include "rte_ipv4_frag.h"
79 #define RTE_LOGTYPE_L3FWD RTE_LOGTYPE_USER1
83 #define MBUF_SIZE (2048 + sizeof(struct rte_mbuf) + RTE_PKTMBUF_HEADROOM)
85 /* allow max jumbo frame 9.5 KB */
86 #define JUMBO_FRAME_MAX_SIZE 0x2600
88 #define ROUNDUP_DIV(a, b) (((a) + (b) - 1) / (b))
91 * Max number of fragments per packet expected.
93 #define MAX_PACKET_FRAG ROUNDUP_DIV(JUMBO_FRAME_MAX_SIZE, IPV4_DEFAULT_PAYLOAD)
98 * RX and TX Prefetch, Host, and Write-back threshold values should be
99 * carefully set for optimal performance. Consult the network
100 * controller's datasheet and supporting DPDK documentation for guidance
101 * on how these parameters should be set.
103 #define RX_PTHRESH 8 /**< Default values of RX prefetch threshold reg. */
104 #define RX_HTHRESH 8 /**< Default values of RX host threshold reg. */
105 #define RX_WTHRESH 4 /**< Default values of RX write-back threshold reg. */
108 * These default values are optimized for use with the Intel(R) 82599 10 GbE
109 * Controller and the DPDK ixgbe PMD. Consider using other values for other
110 * network controllers and/or network drivers.
112 #define TX_PTHRESH 36 /**< Default values of TX prefetch threshold reg. */
113 #define TX_HTHRESH 0 /**< Default values of TX host threshold reg. */
114 #define TX_WTHRESH 0 /**< Default values of TX write-back threshold reg. */
116 #define MAX_PKT_BURST 32
117 #define BURST_TX_DRAIN 200000ULL /* around 100us at 2 Ghz */
121 /* Configure how many packets ahead to prefetch, when reading packets */
122 #define PREFETCH_OFFSET 3
125 * Configurable number of RX/TX ring descriptors
127 #define RTE_TEST_RX_DESC_DEFAULT 128
128 #define RTE_TEST_TX_DESC_DEFAULT 512
129 static uint16_t nb_rxd = RTE_TEST_RX_DESC_DEFAULT;
130 static uint16_t nb_txd = RTE_TEST_TX_DESC_DEFAULT;
132 /* ethernet addresses of ports */
133 static struct ether_addr ports_eth_addr[MAX_PORTS];
134 static struct ether_addr remote_eth_addr =
135 {{0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff}};
137 /* mask of enabled ports */
138 static int enabled_port_mask = 0;
140 static int rx_queue_per_lcore = 1;
142 #define MBUF_TABLE_SIZE (2 * MAX(MAX_PKT_BURST, MAX_PACKET_FRAG))
146 struct rte_mbuf *m_table[MBUF_TABLE_SIZE];
149 #define MAX_RX_QUEUE_PER_LCORE 16
150 #define MAX_TX_QUEUE_PER_PORT 16
151 struct lcore_queue_conf {
153 uint8_t rx_queue_list[MAX_RX_QUEUE_PER_LCORE];
154 uint16_t tx_queue_id[MAX_PORTS];
155 struct mbuf_table tx_mbufs[MAX_PORTS];
157 } __rte_cache_aligned;
158 struct lcore_queue_conf lcore_queue_conf[RTE_MAX_LCORE];
160 static const struct rte_eth_conf port_conf = {
162 .max_rx_pkt_len = JUMBO_FRAME_MAX_SIZE,
164 .header_split = 0, /**< Header Split disabled */
165 .hw_ip_checksum = 0, /**< IP checksum offload disabled */
166 .hw_vlan_filter = 0, /**< VLAN filtering disabled */
167 .jumbo_frame = 1, /**< Jumbo Frame Support enabled */
168 .hw_strip_crc = 0, /**< CRC stripped by hardware */
174 static const struct rte_eth_rxconf rx_conf = {
176 .pthresh = RX_PTHRESH,
177 .hthresh = RX_HTHRESH,
178 .wthresh = RX_WTHRESH,
182 static const struct rte_eth_txconf tx_conf = {
184 .pthresh = TX_PTHRESH,
185 .hthresh = TX_HTHRESH,
186 .wthresh = TX_WTHRESH,
188 .tx_free_thresh = 0, /* Use PMD default values */
189 .tx_rs_thresh = 0, /* Use PMD default values */
192 struct rte_mempool *pool_direct = NULL, *pool_indirect = NULL;
200 struct l3fwd_route l3fwd_route_array[] = {
201 {IPv4(100,10,0,0), 16, 2},
202 {IPv4(100,20,0,0), 16, 2},
203 {IPv4(100,30,0,0), 16, 0},
204 {IPv4(100,40,0,0), 16, 0},
207 #define L3FWD_NUM_ROUTES \
208 (sizeof(l3fwd_route_array) / sizeof(l3fwd_route_array[0]))
210 #define L3FWD_LPM_MAX_RULES 1024
212 struct rte_lpm *l3fwd_lpm = NULL;
214 /* Send burst of packets on an output interface */
216 send_burst(struct lcore_queue_conf *qconf, uint16_t n, uint8_t port)
218 struct rte_mbuf **m_table;
222 queueid = qconf->tx_queue_id[port];
223 m_table = (struct rte_mbuf **)qconf->tx_mbufs[port].m_table;
225 ret = rte_eth_tx_burst(port, queueid, m_table, n);
226 if (unlikely(ret < n)) {
228 rte_pktmbuf_free(m_table[ret]);
236 l3fwd_simple_forward(struct rte_mbuf *m, uint8_t port_in)
238 struct lcore_queue_conf *qconf;
239 struct ipv4_hdr *ip_hdr;
240 uint32_t i, len, lcore_id, ip_dst;
241 uint8_t next_hop, port_out;
244 lcore_id = rte_lcore_id();
245 qconf = &lcore_queue_conf[lcore_id];
247 /* Remove the Ethernet header and trailer from the input packet */
248 rte_pktmbuf_adj(m, (uint16_t)sizeof(struct ether_hdr));
250 /* Read the lookup key (i.e. ip_dst) from the input packet */
251 ip_hdr = rte_pktmbuf_mtod(m, struct ipv4_hdr *);
252 ip_dst = rte_be_to_cpu_32(ip_hdr->dst_addr);
254 /* Find destination port */
255 if (rte_lpm_lookup(l3fwd_lpm, ip_dst, &next_hop) == 0 &&
256 (enabled_port_mask & 1 << next_hop) != 0)
261 /* Build transmission burst */
262 len = qconf->tx_mbufs[port_out].len;
264 /* if we don't need to do any fragmentation */
265 if (likely (IPV4_MTU_DEFAULT >= m->pkt.pkt_len)) {
266 qconf->tx_mbufs[port_out].m_table[len] = m;
269 len2 = rte_ipv4_fragmentation(m,
270 &qconf->tx_mbufs[port_out].m_table[len],
271 (uint16_t)(MBUF_TABLE_SIZE - len),
273 pool_direct, pool_indirect);
275 /* Free input packet */
278 /* If we fail to fragment the packet */
279 if (unlikely (len2 < 0))
283 for (i = len; i < len + len2; i ++) {
284 m = qconf->tx_mbufs[port_out].m_table[i];
285 struct ether_hdr *eth_hdr = (struct ether_hdr *)
286 rte_pktmbuf_prepend(m, (uint16_t)sizeof(struct ether_hdr));
287 if (eth_hdr == NULL) {
288 rte_panic("No headroom in mbuf.\n");
291 m->pkt.l2_len = sizeof(struct ether_hdr);
293 ether_addr_copy(&remote_eth_addr, ð_hdr->d_addr);
294 ether_addr_copy(&ports_eth_addr[port_out], ð_hdr->s_addr);
295 eth_hdr->ether_type = rte_be_to_cpu_16(ETHER_TYPE_IPv4);
300 if (likely(len < MAX_PKT_BURST)) {
301 qconf->tx_mbufs[port_out].len = (uint16_t)len;
305 /* Transmit packets */
306 send_burst(qconf, (uint16_t)len, port_out);
307 qconf->tx_mbufs[port_out].len = 0;
310 /* main processing loop */
311 static __attribute__((noreturn)) int
312 main_loop(__attribute__((unused)) void *dummy)
314 struct rte_mbuf *pkts_burst[MAX_PKT_BURST];
316 uint64_t prev_tsc = 0;
317 uint64_t diff_tsc, cur_tsc;
320 struct lcore_queue_conf *qconf;
322 lcore_id = rte_lcore_id();
323 qconf = &lcore_queue_conf[lcore_id];
325 if (qconf->n_rx_queue == 0) {
326 RTE_LOG(INFO, L3FWD, "lcore %u has nothing to do\n", lcore_id);
330 RTE_LOG(INFO, L3FWD, "entering main loop on lcore %u\n", lcore_id);
332 for (i = 0; i < qconf->n_rx_queue; i++) {
334 portid = qconf->rx_queue_list[i];
335 RTE_LOG(INFO, L3FWD, " -- lcoreid=%u portid=%d\n", lcore_id,
341 cur_tsc = rte_rdtsc();
344 * TX burst queue drain
346 diff_tsc = cur_tsc - prev_tsc;
347 if (unlikely(diff_tsc > BURST_TX_DRAIN)) {
350 * This could be optimized (use queueid instead of
351 * portid), but it is not called so often
353 for (portid = 0; portid < MAX_PORTS; portid++) {
354 if (qconf->tx_mbufs[portid].len == 0)
356 send_burst(&lcore_queue_conf[lcore_id],
357 qconf->tx_mbufs[portid].len,
359 qconf->tx_mbufs[portid].len = 0;
366 * Read packet from RX queues
368 for (i = 0; i < qconf->n_rx_queue; i++) {
370 portid = qconf->rx_queue_list[i];
371 nb_rx = rte_eth_rx_burst(portid, 0, pkts_burst,
374 /* Prefetch first packets */
375 for (j = 0; j < PREFETCH_OFFSET && j < nb_rx; j++) {
376 rte_prefetch0(rte_pktmbuf_mtod(
377 pkts_burst[j], void *));
380 /* Prefetch and forward already prefetched packets */
381 for (j = 0; j < (nb_rx - PREFETCH_OFFSET); j++) {
382 rte_prefetch0(rte_pktmbuf_mtod(pkts_burst[
383 j + PREFETCH_OFFSET], void *));
384 l3fwd_simple_forward(pkts_burst[j], portid);
387 /* Forward remaining prefetched packets */
388 for (; j < nb_rx; j++) {
389 l3fwd_simple_forward(pkts_burst[j], portid);
397 print_usage(const char *prgname)
399 printf("%s [EAL options] -- -p PORTMASK [-q NQ]\n"
400 " -p PORTMASK: hexadecimal bitmask of ports to configure\n"
401 " -q NQ: number of queue (=ports) per lcore (default is 1)\n",
406 parse_portmask(const char *portmask)
411 /* parse hexadecimal string */
412 pm = strtoul(portmask, &end, 16);
413 if ((portmask[0] == '\0') || (end == NULL) || (*end != '\0'))
423 parse_nqueue(const char *q_arg)
428 /* parse hexadecimal string */
429 n = strtoul(q_arg, &end, 10);
430 if ((q_arg[0] == '\0') || (end == NULL) || (*end != '\0'))
434 if (n >= MAX_RX_QUEUE_PER_LCORE)
440 /* Parse the argument given in the command line of the application */
442 parse_args(int argc, char **argv)
447 char *prgname = argv[0];
448 static struct option lgopts[] = {
454 while ((opt = getopt_long(argc, argvopt, "p:q:",
455 lgopts, &option_index)) != EOF) {
460 enabled_port_mask = parse_portmask(optarg);
461 if (enabled_port_mask < 0) {
462 printf("invalid portmask\n");
463 print_usage(prgname);
470 rx_queue_per_lcore = parse_nqueue(optarg);
471 if (rx_queue_per_lcore < 0) {
472 printf("invalid queue number\n");
473 print_usage(prgname);
480 print_usage(prgname);
484 print_usage(prgname);
489 if (enabled_port_mask == 0) {
490 printf("portmask not specified\n");
491 print_usage(prgname);
496 argv[optind-1] = prgname;
499 optind = 0; /* reset getopt lib */
504 print_ethaddr(const char *name, struct ether_addr *eth_addr)
506 printf("%s%02X:%02X:%02X:%02X:%02X:%02X", name,
507 eth_addr->addr_bytes[0],
508 eth_addr->addr_bytes[1],
509 eth_addr->addr_bytes[2],
510 eth_addr->addr_bytes[3],
511 eth_addr->addr_bytes[4],
512 eth_addr->addr_bytes[5]);
516 MAIN(int argc, char **argv)
518 struct lcore_queue_conf *qconf;
519 struct rte_eth_link link;
521 unsigned nb_ports, i;
522 uint16_t queueid = 0;
523 unsigned lcore_id = 0, rx_lcore_id = 0;;
524 uint32_t n_tx_queue, nb_lcores;
528 ret = rte_eal_init(argc, argv);
530 rte_exit(EXIT_FAILURE, "rte_eal_init failed");
534 /* parse application arguments (after the EAL ones) */
535 ret = parse_args(argc, argv);
537 rte_exit(EXIT_FAILURE, "Invalid arguments");
539 /* create the mbuf pools */
541 rte_mempool_create("pool_direct", NB_MBUF,
543 sizeof(struct rte_pktmbuf_pool_private),
544 rte_pktmbuf_pool_init, NULL,
545 rte_pktmbuf_init, NULL,
547 if (pool_direct == NULL)
548 rte_panic("Cannot init direct mbuf pool\n");
551 rte_mempool_create("pool_indirect", NB_MBUF,
552 sizeof(struct rte_mbuf), 32,
555 rte_pktmbuf_init, NULL,
557 if (pool_indirect == NULL)
558 rte_panic("Cannot init indirect mbuf pool\n");
561 #ifdef RTE_LIBRTE_IGB_PMD
562 if (rte_igb_pmd_init() < 0)
563 rte_panic("Cannot init igb pmd\n");
565 #ifdef RTE_LIBRTE_IXGBE_PMD
566 if (rte_ixgbe_pmd_init() < 0)
567 rte_panic("Cannot init ixgbe pmd\n");
570 if (rte_eal_pci_probe() < 0)
571 rte_panic("Cannot probe PCI\n");
573 nb_ports = rte_eth_dev_count();
574 if (nb_ports > MAX_PORTS)
575 nb_ports = MAX_PORTS;
577 nb_lcores = rte_lcore_count();
579 /* initialize all ports */
580 for (portid = 0; portid < nb_ports; portid++) {
581 /* skip ports that are not enabled */
582 if ((enabled_port_mask & (1 << portid)) == 0) {
583 printf("Skipping disabled port %d\n", portid);
587 qconf = &lcore_queue_conf[rx_lcore_id];
589 /* get the lcore_id for this port */
590 while (rte_lcore_is_enabled(rx_lcore_id) == 0 ||
591 qconf->n_rx_queue == (unsigned)rx_queue_per_lcore) {
594 qconf = &lcore_queue_conf[rx_lcore_id];
596 if (rx_lcore_id >= RTE_MAX_LCORE)
597 rte_exit(EXIT_FAILURE, "Not enough cores\n");
599 qconf->rx_queue_list[qconf->n_rx_queue] = portid;
603 printf("Initializing port %d on lcore %u... ", portid,
607 n_tx_queue = nb_lcores;
608 if (n_tx_queue > MAX_TX_QUEUE_PER_PORT)
609 n_tx_queue = MAX_TX_QUEUE_PER_PORT;
610 ret = rte_eth_dev_configure(portid, 1, (uint16_t)n_tx_queue,
613 rte_exit(EXIT_FAILURE, "Cannot configure device: "
617 rte_eth_macaddr_get(portid, &ports_eth_addr[portid]);
618 print_ethaddr(" Address:", &ports_eth_addr[portid]);
621 /* init one RX queue */
623 printf("rxq=%d ", queueid);
625 ret = rte_eth_rx_queue_setup(portid, queueid, nb_rxd,
629 rte_exit(EXIT_FAILURE, "rte_eth_tx_queue_setup: "
633 /* init one TX queue per couple (lcore,port) */
635 for (lcore_id = 0; lcore_id < RTE_MAX_LCORE; lcore_id++) {
636 if (rte_lcore_is_enabled(lcore_id) == 0)
638 printf("txq=%u,%d ", lcore_id, queueid);
640 ret = rte_eth_tx_queue_setup(portid, queueid, nb_txd,
643 rte_exit(EXIT_FAILURE, "rte_eth_tx_queue_setup: "
644 "err=%d, port=%d\n", ret, portid);
646 qconf = &lcore_queue_conf[lcore_id];
647 qconf->tx_queue_id[portid] = queueid;
652 ret = rte_eth_dev_start(portid);
654 rte_exit(EXIT_FAILURE, "rte_eth_dev_start: "
660 /* get link status */
661 rte_eth_link_get(portid, &link);
662 if (link.link_status) {
663 printf(" Link Up - speed %u Mbps - %s\n",
664 (uint32_t) link.link_speed,
665 (link.link_duplex == ETH_LINK_FULL_DUPLEX) ?
666 ("full-duplex") : ("half-duplex\n"));
668 printf(" Link Down\n");
671 /* Set port in promiscuous mode */
672 rte_eth_promiscuous_enable(portid);
675 /* create the LPM table */
676 l3fwd_lpm = rte_lpm_create("L3FWD_LPM", SOCKET0, L3FWD_LPM_MAX_RULES,
678 if (l3fwd_lpm == NULL)
679 rte_panic("Unable to create the l3fwd LPM table\n");
681 /* populate the LPM table */
682 for (i = 0; i < L3FWD_NUM_ROUTES; i++) {
683 ret = rte_lpm_add(l3fwd_lpm,
684 l3fwd_route_array[i].ip,
685 l3fwd_route_array[i].depth,
686 l3fwd_route_array[i].if_out);
689 rte_panic("Unable to add entry %u to the l3fwd "
693 printf("Adding route 0x%08x / %d (%d)\n",
694 l3fwd_route_array[i].ip,
695 l3fwd_route_array[i].depth,
696 l3fwd_route_array[i].if_out);
699 /* launch per-lcore init on every lcore */
700 rte_eal_mp_remote_launch(main_loop, NULL, CALL_MASTER);
701 RTE_LCORE_FOREACH_SLAVE(lcore_id) {
702 if (rte_eal_wait_lcore(lcore_id) < 0)