1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2019 Marvell International Ltd.
8 #include <rte_cycles.h>
9 #include <rte_ethdev.h>
10 #include <rte_eventdev.h>
11 #include <rte_event_eth_rx_adapter.h>
12 #include <rte_event_eth_tx_adapter.h>
13 #include <rte_lcore.h>
14 #include <rte_spinlock.h>
16 #include "l2fwd_common.h"
17 #include "l2fwd_event.h"
20 l2fwd_event_device_setup_generic(struct l2fwd_resources *rsrc)
22 struct l2fwd_event_resources *evt_rsrc = rsrc->evt_rsrc;
23 struct rte_event_dev_config event_d_conf = {
24 .nb_events_limit = 4096,
25 .nb_event_queue_flows = 1024,
26 .nb_event_port_dequeue_depth = 128,
27 .nb_event_port_enqueue_depth = 128
29 struct rte_event_dev_info dev_info;
30 const uint8_t event_d_id = 0; /* Always use first event device only */
31 uint32_t event_queue_cfg = 0;
32 uint16_t ethdev_count = 0;
33 uint16_t num_workers = 0;
37 RTE_ETH_FOREACH_DEV(port_id) {
38 if ((rsrc->enabled_port_mask & (1 << port_id)) == 0)
43 /* Event device configurtion */
44 rte_event_dev_info_get(event_d_id, &dev_info);
46 /* Enable implicit release */
47 if (dev_info.event_dev_cap & RTE_EVENT_DEV_CAP_IMPLICIT_RELEASE_DISABLE)
48 evt_rsrc->disable_implicit_release = 0;
50 if (dev_info.event_dev_cap & RTE_EVENT_DEV_CAP_QUEUE_ALL_TYPES)
51 event_queue_cfg |= RTE_EVENT_QUEUE_CFG_ALL_TYPES;
53 /* One queue for each ethdev port + one Tx adapter Single link queue. */
54 event_d_conf.nb_event_queues = ethdev_count + 1;
55 if (dev_info.max_event_queues < event_d_conf.nb_event_queues)
56 event_d_conf.nb_event_queues = dev_info.max_event_queues;
58 if (dev_info.max_num_events < event_d_conf.nb_events_limit)
59 event_d_conf.nb_events_limit = dev_info.max_num_events;
61 if (dev_info.max_event_queue_flows < event_d_conf.nb_event_queue_flows)
62 event_d_conf.nb_event_queue_flows =
63 dev_info.max_event_queue_flows;
65 if (dev_info.max_event_port_dequeue_depth <
66 event_d_conf.nb_event_port_dequeue_depth)
67 event_d_conf.nb_event_port_dequeue_depth =
68 dev_info.max_event_port_dequeue_depth;
70 if (dev_info.max_event_port_enqueue_depth <
71 event_d_conf.nb_event_port_enqueue_depth)
72 event_d_conf.nb_event_port_enqueue_depth =
73 dev_info.max_event_port_enqueue_depth;
75 /* Ignore Master core and service cores. */
76 num_workers = rte_lcore_count() - 1 - rte_service_lcore_count();
77 if (dev_info.max_event_ports < num_workers)
78 num_workers = dev_info.max_event_ports;
80 event_d_conf.nb_event_ports = num_workers;
81 evt_rsrc->evp.nb_ports = num_workers;
82 evt_rsrc->evq.nb_queues = event_d_conf.nb_event_queues;
84 evt_rsrc->has_burst = !!(dev_info.event_dev_cap &
85 RTE_EVENT_DEV_CAP_BURST_MODE);
87 ret = rte_event_dev_configure(event_d_id, &event_d_conf);
89 rte_panic("Error in configuring event device\n");
91 evt_rsrc->event_d_id = event_d_id;
92 return event_queue_cfg;
96 l2fwd_event_port_setup_generic(struct l2fwd_resources *rsrc)
98 struct l2fwd_event_resources *evt_rsrc = rsrc->evt_rsrc;
99 uint8_t event_d_id = evt_rsrc->event_d_id;
100 struct rte_event_port_conf event_p_conf = {
103 .new_event_threshold = 4096
105 struct rte_event_port_conf def_p_conf;
109 evt_rsrc->evp.event_p_id = (uint8_t *)malloc(sizeof(uint8_t) *
110 evt_rsrc->evp.nb_ports);
111 if (!evt_rsrc->evp.event_p_id)
112 rte_panic("No space is available\n");
114 memset(&def_p_conf, 0, sizeof(struct rte_event_port_conf));
115 rte_event_port_default_conf_get(event_d_id, 0, &def_p_conf);
117 if (def_p_conf.new_event_threshold < event_p_conf.new_event_threshold)
118 event_p_conf.new_event_threshold =
119 def_p_conf.new_event_threshold;
121 if (def_p_conf.dequeue_depth < event_p_conf.dequeue_depth)
122 event_p_conf.dequeue_depth = def_p_conf.dequeue_depth;
124 if (def_p_conf.enqueue_depth < event_p_conf.enqueue_depth)
125 event_p_conf.enqueue_depth = def_p_conf.enqueue_depth;
127 event_p_conf.disable_implicit_release =
128 evt_rsrc->disable_implicit_release;
129 evt_rsrc->deq_depth = def_p_conf.dequeue_depth;
131 for (event_p_id = 0; event_p_id < evt_rsrc->evp.nb_ports;
133 ret = rte_event_port_setup(event_d_id, event_p_id,
136 rte_panic("Error in configuring event port %d\n",
139 ret = rte_event_port_link(event_d_id, event_p_id,
140 evt_rsrc->evq.event_q_id,
142 evt_rsrc->evq.nb_queues - 1);
143 if (ret != (evt_rsrc->evq.nb_queues - 1))
144 rte_panic("Error in linking event port %d to queues\n",
146 evt_rsrc->evp.event_p_id[event_p_id] = event_p_id;
149 rte_spinlock_init(&evt_rsrc->evp.lock);
151 evt_rsrc->def_p_conf = event_p_conf;
155 l2fwd_event_queue_setup_generic(struct l2fwd_resources *rsrc,
156 uint32_t event_queue_cfg)
158 struct l2fwd_event_resources *evt_rsrc = rsrc->evt_rsrc;
159 uint8_t event_d_id = evt_rsrc->event_d_id;
160 struct rte_event_queue_conf event_q_conf = {
161 .nb_atomic_flows = 1024,
162 .nb_atomic_order_sequences = 1024,
163 .event_queue_cfg = event_queue_cfg,
164 .priority = RTE_EVENT_DEV_PRIORITY_NORMAL
166 struct rte_event_queue_conf def_q_conf;
170 event_q_conf.schedule_type = rsrc->sched_type;
171 evt_rsrc->evq.event_q_id = (uint8_t *)malloc(sizeof(uint8_t) *
172 evt_rsrc->evq.nb_queues);
173 if (!evt_rsrc->evq.event_q_id)
174 rte_panic("Memory allocation failure\n");
176 rte_event_queue_default_conf_get(event_d_id, 0, &def_q_conf);
177 if (def_q_conf.nb_atomic_flows < event_q_conf.nb_atomic_flows)
178 event_q_conf.nb_atomic_flows = def_q_conf.nb_atomic_flows;
180 for (event_q_id = 0; event_q_id < (evt_rsrc->evq.nb_queues - 1);
182 ret = rte_event_queue_setup(event_d_id, event_q_id,
185 rte_panic("Error in configuring event queue\n");
186 evt_rsrc->evq.event_q_id[event_q_id] = event_q_id;
189 event_q_conf.event_queue_cfg |= RTE_EVENT_QUEUE_CFG_SINGLE_LINK;
190 event_q_conf.priority = RTE_EVENT_DEV_PRIORITY_HIGHEST,
191 ret = rte_event_queue_setup(event_d_id, event_q_id, &event_q_conf);
193 rte_panic("Error in configuring event queue for Tx adapter\n");
194 evt_rsrc->evq.event_q_id[event_q_id] = event_q_id;
198 l2fwd_rx_tx_adapter_setup_generic(struct l2fwd_resources *rsrc)
200 struct l2fwd_event_resources *evt_rsrc = rsrc->evt_rsrc;
201 struct rte_event_eth_rx_adapter_queue_conf eth_q_conf;
202 uint8_t event_d_id = evt_rsrc->event_d_id;
203 uint8_t rx_adptr_id = 0;
204 uint8_t tx_adptr_id = 0;
205 uint8_t tx_port_id = 0;
210 memset(ð_q_conf, 0, sizeof(eth_q_conf));
211 eth_q_conf.ev.priority = RTE_EVENT_DEV_PRIORITY_NORMAL;
213 /* Rx adapter setup */
214 evt_rsrc->rx_adptr.nb_rx_adptr = 1;
215 evt_rsrc->rx_adptr.rx_adptr = (uint8_t *)malloc(sizeof(uint8_t) *
216 evt_rsrc->rx_adptr.nb_rx_adptr);
217 if (!evt_rsrc->rx_adptr.rx_adptr) {
218 free(evt_rsrc->evp.event_p_id);
219 free(evt_rsrc->evq.event_q_id);
220 rte_panic("Failed to allocate memery for Rx adapter\n");
223 ret = rte_event_eth_rx_adapter_create(rx_adptr_id, event_d_id,
224 &evt_rsrc->def_p_conf);
226 rte_panic("Failed to create rx adapter\n");
228 /* Configure user requested sched type */
229 eth_q_conf.ev.sched_type = rsrc->sched_type;
230 RTE_ETH_FOREACH_DEV(port_id) {
231 if ((rsrc->enabled_port_mask & (1 << port_id)) == 0)
233 eth_q_conf.ev.queue_id = evt_rsrc->evq.event_q_id[i];
234 ret = rte_event_eth_rx_adapter_queue_add(rx_adptr_id, port_id,
237 rte_panic("Failed to add queues to Rx adapter\n");
238 if (i < evt_rsrc->evq.nb_queues)
242 ret = rte_event_eth_rx_adapter_service_id_get(rx_adptr_id, &service_id);
243 if (ret != -ESRCH && ret != 0)
244 rte_panic("Error getting the service ID for rx adptr\n");
246 rte_service_runstate_set(service_id, 1);
247 rte_service_set_runstate_mapped_check(service_id, 0);
248 evt_rsrc->rx_adptr.service_id = service_id;
250 ret = rte_event_eth_rx_adapter_start(rx_adptr_id);
252 rte_panic("Rx adapter[%d] start Failed\n", rx_adptr_id);
254 evt_rsrc->rx_adptr.rx_adptr[0] = rx_adptr_id;
256 /* Tx adapter setup */
257 evt_rsrc->tx_adptr.nb_tx_adptr = 1;
258 evt_rsrc->tx_adptr.tx_adptr = (uint8_t *)malloc(sizeof(uint8_t) *
259 evt_rsrc->tx_adptr.nb_tx_adptr);
260 if (!evt_rsrc->tx_adptr.tx_adptr) {
261 free(evt_rsrc->rx_adptr.rx_adptr);
262 free(evt_rsrc->evp.event_p_id);
263 free(evt_rsrc->evq.event_q_id);
264 rte_panic("Failed to allocate memery for Rx adapter\n");
267 ret = rte_event_eth_tx_adapter_create(tx_adptr_id, event_d_id,
268 &evt_rsrc->def_p_conf);
270 rte_panic("Failed to create tx adapter\n");
272 RTE_ETH_FOREACH_DEV(port_id) {
273 if ((rsrc->enabled_port_mask & (1 << port_id)) == 0)
275 ret = rte_event_eth_tx_adapter_queue_add(tx_adptr_id, port_id,
278 rte_panic("Failed to add queues to Tx adapter\n");
281 ret = rte_event_eth_tx_adapter_service_id_get(tx_adptr_id, &service_id);
282 if (ret != -ESRCH && ret != 0)
283 rte_panic("Failed to get Tx adapter service ID\n");
285 rte_service_runstate_set(service_id, 1);
286 rte_service_set_runstate_mapped_check(service_id, 0);
287 evt_rsrc->tx_adptr.service_id = service_id;
289 ret = rte_event_eth_tx_adapter_event_port_get(tx_adptr_id, &tx_port_id);
291 rte_panic("Failed to get Tx adapter port id: %d\n", ret);
293 ret = rte_event_port_link(event_d_id, tx_port_id,
294 &evt_rsrc->evq.event_q_id[
295 evt_rsrc->evq.nb_queues - 1],
298 rte_panic("Unable to link Tx adapter port to Tx queue:err=%d\n",
301 ret = rte_event_eth_tx_adapter_start(tx_adptr_id);
303 rte_panic("Tx adapter[%d] start Failed\n", tx_adptr_id);
305 evt_rsrc->tx_adptr.tx_adptr[0] = tx_adptr_id;
309 l2fwd_event_set_generic_ops(struct event_setup_ops *ops)
311 ops->event_device_setup = l2fwd_event_device_setup_generic;
312 ops->event_queue_setup = l2fwd_event_queue_setup_generic;
313 ops->event_port_setup = l2fwd_event_port_setup_generic;
314 ops->adapter_setup = l2fwd_rx_tx_adapter_setup_generic;