1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(C) 2019 Marvell International Ltd.
8 #include <rte_malloc.h>
11 #include "l3fwd_event.h"
14 print_ethaddr(const char *name, const struct rte_ether_addr *eth_addr)
16 char buf[RTE_ETHER_ADDR_FMT_SIZE];
17 rte_ether_format_addr(buf, RTE_ETHER_ADDR_FMT_SIZE, eth_addr);
18 printf("%s%s", name, buf);
21 struct l3fwd_event_resources *
22 l3fwd_get_eventdev_rsrc(void)
24 static struct l3fwd_event_resources *rsrc;
29 rsrc = rte_zmalloc("l3fwd", sizeof(struct l3fwd_event_resources), 0);
31 rsrc->sched_type = RTE_SCHED_TYPE_ATOMIC;
32 rsrc->eth_rx_queues = 1;
36 rte_exit(EXIT_FAILURE, "Unable to allocate memory for eventdev cfg\n");
42 l3fwd_eth_dev_port_setup(struct rte_eth_conf *port_conf)
44 struct l3fwd_event_resources *evt_rsrc = l3fwd_get_eventdev_rsrc();
45 uint16_t nb_ports = rte_eth_dev_count_avail();
46 uint16_t nb_rxd = RTE_TEST_RX_DESC_DEFAULT;
47 uint16_t nb_txd = RTE_TEST_TX_DESC_DEFAULT;
48 unsigned int nb_lcores = rte_lcore_count();
49 struct rte_eth_conf local_port_conf;
50 struct rte_eth_dev_info dev_info;
51 struct rte_eth_txconf txconf;
52 struct rte_eth_rxconf rxconf;
58 /* initialize all ports */
59 RTE_ETH_FOREACH_DEV(port_id) {
60 local_port_conf = *port_conf;
61 /* skip ports that are not enabled */
62 if ((evt_rsrc->port_mask & (1 << port_id)) == 0) {
63 printf("\nSkipping disabled port %d\n", port_id);
68 printf("Initializing port %d ... ", port_id);
70 printf("Creating queues: nb_rxq=%d nb_txq=1...\n",
71 evt_rsrc->eth_rx_queues);
73 rte_eth_dev_info_get(port_id, &dev_info);
74 if (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
75 local_port_conf.txmode.offloads |=
76 DEV_TX_OFFLOAD_MBUF_FAST_FREE;
78 local_port_conf.rx_adv_conf.rss_conf.rss_hf &=
79 dev_info.flow_type_rss_offloads;
80 if (local_port_conf.rx_adv_conf.rss_conf.rss_hf !=
81 port_conf->rx_adv_conf.rss_conf.rss_hf) {
82 printf("Port %u modified RSS hash function "
83 "based on hardware support,"
84 "requested:%#"PRIx64" configured:%#"PRIx64"\n",
86 port_conf->rx_adv_conf.rss_conf.rss_hf,
87 local_port_conf.rx_adv_conf.rss_conf.rss_hf);
90 ret = rte_eth_dev_configure(port_id, evt_rsrc->eth_rx_queues,
93 rte_exit(EXIT_FAILURE,
94 "Cannot configure device: err=%d, port=%d\n",
97 ret = rte_eth_dev_adjust_nb_rx_tx_desc(port_id, &nb_rxd,
100 rte_exit(EXIT_FAILURE,
101 "Cannot adjust number of descriptors: err=%d, "
102 "port=%d\n", ret, port_id);
104 rte_eth_macaddr_get(port_id, &ports_eth_addr[port_id]);
105 print_ethaddr(" Address:", &ports_eth_addr[port_id]);
107 print_ethaddr("Destination:",
108 (const struct rte_ether_addr *)&dest_eth_addr[port_id]);
111 /* prepare source MAC for each port. */
112 rte_ether_addr_copy(&ports_eth_addr[port_id],
113 (struct rte_ether_addr *)(val_eth + port_id) + 1);
116 if (!evt_rsrc->per_port_pool) {
117 /* port_id = 0; this is *not* signifying the first port,
118 * rather, it signifies that port_id is ignored.
120 nb_mbuf = RTE_MAX(nb_ports * nb_rxd +
122 nb_ports * nb_lcores *
124 nb_lcores * MEMPOOL_CACHE_SIZE,
126 ret = init_mem(0, nb_mbuf);
128 nb_mbuf = RTE_MAX(nb_rxd + nb_rxd +
129 nb_lcores * MAX_PKT_BURST +
130 nb_lcores * MEMPOOL_CACHE_SIZE,
132 ret = init_mem(port_id, nb_mbuf);
134 /* init Rx queues per port */
135 rxconf = dev_info.default_rxconf;
136 rxconf.offloads = local_port_conf.rxmode.offloads;
138 for (eth_qid = 0; eth_qid < evt_rsrc->eth_rx_queues;
140 if (!evt_rsrc->per_port_pool)
141 ret = rte_eth_rx_queue_setup(port_id, eth_qid,
143 evt_rsrc->pkt_pool[0][0]);
145 ret = rte_eth_rx_queue_setup(port_id, eth_qid,
147 evt_rsrc->pkt_pool[port_id][0]);
149 rte_exit(EXIT_FAILURE,
150 "rte_eth_rx_queue_setup: err=%d, "
151 "port=%d, eth_qid: %d\n",
152 ret, port_id, eth_qid);
155 /* init one Tx queue per port */
156 txconf = dev_info.default_txconf;
157 txconf.offloads = local_port_conf.txmode.offloads;
158 ret = rte_eth_tx_queue_setup(port_id, 0, nb_txd, 0, &txconf);
160 rte_exit(EXIT_FAILURE,
161 "rte_eth_tx_queue_setup: err=%d, "
162 "port=%d\n", ret, port_id);
167 l3fwd_event_capability_setup(void)
169 struct l3fwd_event_resources *evt_rsrc = l3fwd_get_eventdev_rsrc();
174 RTE_ETH_FOREACH_DEV(i) {
175 ret = rte_event_eth_tx_adapter_caps_get(0, i, &caps);
177 rte_exit(EXIT_FAILURE,
178 "Invalid capability for Tx adptr port %d\n",
181 evt_rsrc->tx_mode_q |= !(caps &
182 RTE_EVENT_ETH_TX_ADAPTER_CAP_INTERNAL_PORT);
185 if (evt_rsrc->tx_mode_q)
186 l3fwd_event_set_generic_ops(&evt_rsrc->ops);
188 l3fwd_event_set_internal_port_ops(&evt_rsrc->ops);
192 l3fwd_get_free_event_port(struct l3fwd_event_resources *evt_rsrc)
197 rte_spinlock_lock(&evt_rsrc->evp.lock);
198 if (index >= evt_rsrc->evp.nb_ports) {
199 printf("No free event port is available\n");
203 port_id = evt_rsrc->evp.event_p_id[index];
205 rte_spinlock_unlock(&evt_rsrc->evp.lock);
211 l3fwd_event_resource_setup(struct rte_eth_conf *port_conf)
213 struct l3fwd_event_resources *evt_rsrc = l3fwd_get_eventdev_rsrc();
214 const event_loop_cb lpm_event_loop[2][2] = {
215 [0][0] = lpm_event_main_loop_tx_d,
216 [0][1] = lpm_event_main_loop_tx_d_burst,
217 [1][0] = lpm_event_main_loop_tx_q,
218 [1][1] = lpm_event_main_loop_tx_q_burst,
220 const event_loop_cb em_event_loop[2][2] = {
221 [0][0] = em_event_main_loop_tx_d,
222 [0][1] = em_event_main_loop_tx_d_burst,
223 [1][0] = em_event_main_loop_tx_q,
224 [1][1] = em_event_main_loop_tx_q_burst,
226 uint32_t event_queue_cfg;
229 if (!evt_rsrc->enabled)
232 if (!rte_event_dev_count())
233 rte_exit(EXIT_FAILURE, "No Eventdev found");
235 /* Setup eventdev capability callbacks */
236 l3fwd_event_capability_setup();
238 /* Ethernet device configuration */
239 l3fwd_eth_dev_port_setup(port_conf);
241 /* Event device configuration */
242 event_queue_cfg = evt_rsrc->ops.event_device_setup();
244 /* Event queue configuration */
245 evt_rsrc->ops.event_queue_setup(event_queue_cfg);
247 /* Event port configuration */
248 evt_rsrc->ops.event_port_setup();
250 /* Rx/Tx adapters configuration */
251 evt_rsrc->ops.adapter_setup();
253 /* Start event device */
254 ret = rte_event_dev_start(evt_rsrc->event_d_id);
256 rte_exit(EXIT_FAILURE, "Error in starting eventdev");
258 evt_rsrc->ops.lpm_event_loop = lpm_event_loop[evt_rsrc->tx_mode_q]
259 [evt_rsrc->has_burst];
261 evt_rsrc->ops.em_event_loop = em_event_loop[evt_rsrc->tx_mode_q]
262 [evt_rsrc->has_burst];