1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2014 Intel Corporation
10 #include <rte_debug.h>
11 #include <rte_ethdev.h>
12 #include <rte_mempool.h>
13 #include <rte_sched.h>
14 #include <rte_cycles.h>
15 #include <rte_string_fns.h>
16 #include <rte_cfgfile.h>
21 uint32_t app_numa_mask = 0;
22 static uint32_t app_inited_port_mask = 0;
24 int app_pipe_to_profile[MAX_SCHED_SUBPORTS][MAX_SCHED_PIPES];
26 #define MAX_NAME_LEN 32
28 struct ring_conf ring_conf = {
29 .rx_size = APP_RX_DESC_DEFAULT,
30 .ring_size = APP_RING_SIZE,
31 .tx_size = APP_TX_DESC_DEFAULT,
34 struct burst_conf burst_conf = {
35 .rx_burst = MAX_PKT_RX_BURST,
36 .ring_burst = PKT_ENQUEUE,
37 .qos_dequeue = PKT_DEQUEUE,
38 .tx_burst = MAX_PKT_TX_BURST,
41 struct ring_thresh rx_thresh = {
42 .pthresh = RX_PTHRESH,
43 .hthresh = RX_HTHRESH,
44 .wthresh = RX_WTHRESH,
47 struct ring_thresh tx_thresh = {
48 .pthresh = TX_PTHRESH,
49 .hthresh = TX_HTHRESH,
50 .wthresh = TX_WTHRESH,
54 const char *cfg_profile = NULL;
55 int mp_size = NB_MBUF;
56 struct flow_conf qos_conf[MAX_DATA_STREAMS];
58 static struct rte_eth_conf port_conf = {
60 .max_rx_pkt_len = RTE_ETHER_MAX_LEN,
64 .mq_mode = ETH_DCB_NONE,
69 app_init_port(uint16_t portid, struct rte_mempool *mp)
72 struct rte_eth_link link;
73 struct rte_eth_dev_info dev_info;
74 struct rte_eth_rxconf rx_conf;
75 struct rte_eth_txconf tx_conf;
78 struct rte_eth_conf local_port_conf = port_conf;
80 /* check if port already initialized (multistream configuration) */
81 if (app_inited_port_mask & (1u << portid))
84 rx_conf.rx_thresh.pthresh = rx_thresh.pthresh;
85 rx_conf.rx_thresh.hthresh = rx_thresh.hthresh;
86 rx_conf.rx_thresh.wthresh = rx_thresh.wthresh;
87 rx_conf.rx_free_thresh = 32;
88 rx_conf.rx_drop_en = 0;
89 rx_conf.rx_deferred_start = 0;
91 tx_conf.tx_thresh.pthresh = tx_thresh.pthresh;
92 tx_conf.tx_thresh.hthresh = tx_thresh.hthresh;
93 tx_conf.tx_thresh.wthresh = tx_thresh.wthresh;
94 tx_conf.tx_free_thresh = 0;
95 tx_conf.tx_rs_thresh = 0;
96 tx_conf.tx_deferred_start = 0;
99 RTE_LOG(INFO, APP, "Initializing port %"PRIu16"... ", portid);
101 rte_eth_dev_info_get(portid, &dev_info);
102 if (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
103 local_port_conf.txmode.offloads |=
104 DEV_TX_OFFLOAD_MBUF_FAST_FREE;
105 ret = rte_eth_dev_configure(portid, 1, 1, &local_port_conf);
107 rte_exit(EXIT_FAILURE,
108 "Cannot configure device: err=%d, port=%u\n",
111 rx_size = ring_conf.rx_size;
112 tx_size = ring_conf.tx_size;
113 ret = rte_eth_dev_adjust_nb_rx_tx_desc(portid, &rx_size, &tx_size);
115 rte_exit(EXIT_FAILURE,
116 "rte_eth_dev_adjust_nb_rx_tx_desc: err=%d,port=%u\n",
118 ring_conf.rx_size = rx_size;
119 ring_conf.tx_size = tx_size;
121 /* init one RX queue */
123 rx_conf.offloads = local_port_conf.rxmode.offloads;
124 ret = rte_eth_rx_queue_setup(portid, 0, (uint16_t)ring_conf.rx_size,
125 rte_eth_dev_socket_id(portid), &rx_conf, mp);
127 rte_exit(EXIT_FAILURE,
128 "rte_eth_tx_queue_setup: err=%d, port=%u\n",
131 /* init one TX queue */
133 tx_conf.offloads = local_port_conf.txmode.offloads;
134 ret = rte_eth_tx_queue_setup(portid, 0,
135 (uint16_t)ring_conf.tx_size, rte_eth_dev_socket_id(portid), &tx_conf);
137 rte_exit(EXIT_FAILURE,
138 "rte_eth_tx_queue_setup: err=%d, port=%u queue=%d\n",
142 ret = rte_eth_dev_start(portid);
144 rte_exit(EXIT_FAILURE,
145 "rte_pmd_port_start: err=%d, port=%u\n",
150 /* get link status */
151 rte_eth_link_get(portid, &link);
152 if (link.link_status) {
153 printf(" Link Up - speed %u Mbps - %s\n",
154 (uint32_t) link.link_speed,
155 (link.link_duplex == ETH_LINK_FULL_DUPLEX) ?
156 ("full-duplex") : ("half-duplex\n"));
158 printf(" Link Down\n");
160 rte_eth_promiscuous_enable(portid);
162 /* mark port as initialized */
163 app_inited_port_mask |= 1u << portid;
168 static struct rte_sched_subport_params subport_params[MAX_SCHED_SUBPORTS] = {
170 .tb_rate = 1250000000,
173 .tc_rate = {1250000000, 1250000000, 1250000000, 1250000000,
174 1250000000, 1250000000, 1250000000, 1250000000, 1250000000,
175 1250000000, 1250000000, 1250000000, 1250000000},
180 static struct rte_sched_pipe_params pipe_profiles[MAX_SCHED_PIPE_PROFILES] = {
185 .tc_rate = {305175, 305175, 305175, 305175, 305175, 305175,
186 305175, 305175, 305175, 305175, 305175, 305175, 305175},
188 #ifdef RTE_SCHED_SUBPORT_TC_OV
192 .wrr_weights = {1, 1, 1, 1},
196 struct rte_sched_port_params port_params = {
197 .name = "port_scheduler_0",
198 .socket = 0, /* computed */
199 .rate = 0, /* computed */
200 .mtu = 6 + 6 + 4 + 4 + 2 + 1500,
201 .frame_overhead = RTE_SCHED_FRAME_OVERHEAD_DEFAULT,
202 .n_subports_per_port = 1,
203 .n_pipes_per_subport = 4096,
204 .qsize = {64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64, 64},
205 .pipe_profiles = pipe_profiles,
206 .n_pipe_profiles = sizeof(pipe_profiles) / sizeof(struct rte_sched_pipe_params),
207 .n_max_pipe_profiles = MAX_SCHED_PIPE_PROFILES,
211 /* Traffic Class 0 Colors Green / Yellow / Red */
212 [0][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
213 [0][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
214 [0][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
216 /* Traffic Class 1 - Colors Green / Yellow / Red */
217 [1][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
218 [1][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
219 [1][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
221 /* Traffic Class 2 - Colors Green / Yellow / Red */
222 [2][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
223 [2][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
224 [2][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
226 /* Traffic Class 3 - Colors Green / Yellow / Red */
227 [3][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
228 [3][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
229 [3][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
231 /* Traffic Class 4 - Colors Green / Yellow / Red */
232 [4][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
233 [4][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
234 [4][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
236 /* Traffic Class 5 - Colors Green / Yellow / Red */
237 [5][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
238 [5][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
239 [5][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
241 /* Traffic Class 6 - Colors Green / Yellow / Red */
242 [6][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
243 [6][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
244 [6][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
246 /* Traffic Class 7 - Colors Green / Yellow / Red */
247 [7][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
248 [7][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
249 [7][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
251 /* Traffic Class 8 - Colors Green / Yellow / Red */
252 [8][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
253 [8][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
254 [8][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
256 /* Traffic Class 9 - Colors Green / Yellow / Red */
257 [9][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
258 [9][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
259 [9][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
261 /* Traffic Class 10 - Colors Green / Yellow / Red */
262 [10][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
263 [10][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
264 [10][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
266 /* Traffic Class 11 - Colors Green / Yellow / Red */
267 [11][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
268 [11][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
269 [11][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
271 /* Traffic Class 12 - Colors Green / Yellow / Red */
272 [12][0] = {.min_th = 48, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
273 [12][1] = {.min_th = 40, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
274 [12][2] = {.min_th = 32, .max_th = 64, .maxp_inv = 10, .wq_log2 = 9},
276 #endif /* RTE_SCHED_RED */
279 static struct rte_sched_port *
280 app_init_sched_port(uint32_t portid, uint32_t socketid)
282 static char port_name[32]; /* static as referenced from global port_params*/
283 struct rte_eth_link link;
284 struct rte_sched_port *port = NULL;
285 uint32_t pipe, subport;
288 rte_eth_link_get(portid, &link);
290 port_params.socket = socketid;
291 port_params.rate = (uint64_t) link.link_speed * 1000 * 1000 / 8;
292 snprintf(port_name, sizeof(port_name), "port_%d", portid);
293 port_params.name = port_name;
295 port = rte_sched_port_config(&port_params);
297 rte_exit(EXIT_FAILURE, "Unable to config sched port\n");
300 for (subport = 0; subport < port_params.n_subports_per_port; subport ++) {
301 err = rte_sched_subport_config(port, subport, &subport_params[subport]);
303 rte_exit(EXIT_FAILURE, "Unable to config sched subport %u, err=%d\n",
307 for (pipe = 0; pipe < port_params.n_pipes_per_subport; pipe++) {
308 if (app_pipe_to_profile[subport][pipe] != -1) {
309 err = rte_sched_pipe_config(port, subport, pipe,
310 app_pipe_to_profile[subport][pipe]);
312 rte_exit(EXIT_FAILURE, "Unable to config sched pipe %u "
313 "for profile %d, err=%d\n", pipe,
314 app_pipe_to_profile[subport][pipe], err);
324 app_load_cfg_profile(const char *profile)
328 struct rte_cfgfile *file = rte_cfgfile_load(profile, 0);
330 rte_exit(EXIT_FAILURE, "Cannot load configuration profile %s\n", profile);
332 cfg_load_port(file, &port_params);
333 cfg_load_subport(file, subport_params);
334 cfg_load_pipe(file, pipe_profiles);
336 rte_cfgfile_close(file);
344 char ring_name[MAX_NAME_LEN];
345 char pool_name[MAX_NAME_LEN];
347 if (rte_eth_dev_count_avail() == 0)
348 rte_exit(EXIT_FAILURE, "No Ethernet port - bye\n");
350 /* load configuration profile */
351 if (app_load_cfg_profile(cfg_profile) != 0)
352 rte_exit(EXIT_FAILURE, "Invalid configuration profile\n");
354 /* Initialize each active flow */
355 for(i = 0; i < nb_pfc; i++) {
356 uint32_t socket = rte_lcore_to_socket_id(qos_conf[i].rx_core);
357 struct rte_ring *ring;
359 snprintf(ring_name, MAX_NAME_LEN, "ring-%u-%u", i, qos_conf[i].rx_core);
360 ring = rte_ring_lookup(ring_name);
362 qos_conf[i].rx_ring = rte_ring_create(ring_name, ring_conf.ring_size,
363 socket, RING_F_SP_ENQ | RING_F_SC_DEQ);
365 qos_conf[i].rx_ring = ring;
367 snprintf(ring_name, MAX_NAME_LEN, "ring-%u-%u", i, qos_conf[i].tx_core);
368 ring = rte_ring_lookup(ring_name);
370 qos_conf[i].tx_ring = rte_ring_create(ring_name, ring_conf.ring_size,
371 socket, RING_F_SP_ENQ | RING_F_SC_DEQ);
373 qos_conf[i].tx_ring = ring;
376 /* create the mbuf pools for each RX Port */
377 snprintf(pool_name, MAX_NAME_LEN, "mbuf_pool%u", i);
378 qos_conf[i].mbuf_pool = rte_pktmbuf_pool_create(pool_name,
379 mp_size, burst_conf.rx_burst * 4, 0,
380 RTE_MBUF_DEFAULT_BUF_SIZE,
381 rte_eth_dev_socket_id(qos_conf[i].rx_port));
382 if (qos_conf[i].mbuf_pool == NULL)
383 rte_exit(EXIT_FAILURE, "Cannot init mbuf pool for socket %u\n", i);
385 app_init_port(qos_conf[i].rx_port, qos_conf[i].mbuf_pool);
386 app_init_port(qos_conf[i].tx_port, qos_conf[i].mbuf_pool);
388 qos_conf[i].sched_port = app_init_sched_port(qos_conf[i].tx_port, socket);
391 RTE_LOG(INFO, APP, "time stamp clock running at %" PRIu64 " Hz\n",
394 RTE_LOG(INFO, APP, "Ring sizes: NIC RX = %u, Mempool = %d SW queue = %u,"
395 "NIC TX = %u\n", ring_conf.rx_size, mp_size, ring_conf.ring_size,
398 RTE_LOG(INFO, APP, "Burst sizes: RX read = %hu, RX write = %hu,\n"
399 " Worker read/QoS enqueue = %hu,\n"
400 " QoS dequeue = %hu, Worker write = %hu\n",
401 burst_conf.rx_burst, burst_conf.ring_burst, burst_conf.ring_burst,
402 burst_conf.qos_dequeue, burst_conf.tx_burst);
404 RTE_LOG(INFO, APP, "NIC thresholds RX (p = %hhu, h = %hhu, w = %hhu),"
405 "TX (p = %hhu, h = %hhu, w = %hhu)\n",
406 rx_thresh.pthresh, rx_thresh.hthresh, rx_thresh.wthresh,
407 tx_thresh.pthresh, tx_thresh.hthresh, tx_thresh.wthresh);