1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2014 Intel Corporation
12 #include <rte_sched.h>
14 #define RTE_LOGTYPE_APP RTE_LOGTYPE_USER1
17 * Configurable number of RX/TX ring descriptors
19 #define APP_INTERACTIVE_DEFAULT 0
21 #define APP_RX_DESC_DEFAULT 1024
22 #define APP_TX_DESC_DEFAULT 1024
24 #define APP_RING_SIZE (8*1024)
25 #define NB_MBUF (2*1024*1024)
27 #define MAX_PKT_RX_BURST 64
28 #define PKT_ENQUEUE 64
29 #define PKT_DEQUEUE 32
30 #define MAX_PKT_TX_BURST 64
32 #define RX_PTHRESH 8 /**< Default values of RX prefetch threshold reg. */
33 #define RX_HTHRESH 8 /**< Default values of RX host threshold reg. */
34 #define RX_WTHRESH 4 /**< Default values of RX write-back threshold reg. */
36 #define TX_PTHRESH 36 /**< Default values of TX prefetch threshold reg. */
37 #define TX_HTHRESH 0 /**< Default values of TX host threshold reg. */
38 #define TX_WTHRESH 0 /**< Default values of TX write-back threshold reg. */
40 #define BURST_TX_DRAIN_US 100
43 #if (RTE_MAX_LCORE > 64)
44 #define APP_MAX_LCORE 64
46 #define APP_MAX_LCORE RTE_MAX_LCORE
50 #define MAX_DATA_STREAMS (APP_MAX_LCORE/2)
51 #define MAX_SCHED_SUBPORTS 8
52 #define MAX_SCHED_PIPES 4096
53 #define MAX_SCHED_PIPE_PROFILES 256
54 #define MAX_SCHED_SUBPORT_PROFILES 8
56 #ifndef APP_COLLECT_STAT
57 #define APP_COLLECT_STAT 1
61 #define APP_STATS_ADD(stat,val) (stat) += (val)
63 #define APP_STATS_ADD(stat,val) do {(void) (val);} while (0)
66 #define APP_QAVG_NTIMES 10
67 #define APP_QAVG_PERIOD 100
80 struct rte_mbuf **m_table;
86 struct rte_ring *rx_ring;
87 struct rte_ring *tx_ring;
88 struct rte_sched_port *sched_port;
91 struct thread_stat stat;
93 } __rte_cache_aligned;
105 struct rte_ring *rx_ring;
106 struct rte_ring *tx_ring;
107 struct rte_sched_port *sched_port;
108 struct rte_mempool *mbuf_pool;
110 struct thread_conf rx_thread;
111 struct thread_conf wt_thread;
112 struct thread_conf tx_thread;
127 uint16_t qos_dequeue;
133 uint8_t pthresh; /**< Ring prefetch threshold. */
134 uint8_t hthresh; /**< Ring host threshold. */
135 uint8_t wthresh; /**< Ring writeback threshold. */
138 extern uint8_t interactive;
139 extern uint32_t qavg_period;
140 extern uint32_t qavg_ntimes;
141 extern uint32_t nb_pfc;
142 extern const char *cfg_profile;
144 extern struct flow_conf qos_conf[];
145 extern int app_pipe_to_profile[MAX_SCHED_SUBPORTS][MAX_SCHED_PIPES];
147 extern struct ring_conf ring_conf;
148 extern struct burst_conf burst_conf;
149 extern struct ring_thresh rx_thresh;
150 extern struct ring_thresh tx_thresh;
152 extern uint32_t active_queues[RTE_SCHED_QUEUES_PER_PIPE];
153 extern uint32_t n_active_queues;
155 extern struct rte_sched_port_params port_params;
156 extern struct rte_sched_subport_params subport_params[MAX_SCHED_SUBPORTS];
158 int app_parse_args(int argc, char **argv);
162 void app_rx_thread(struct thread_conf **qconf);
163 void app_tx_thread(struct thread_conf **qconf);
164 void app_worker_thread(struct thread_conf **qconf);
165 void app_mixed_thread(struct thread_conf **qconf);
168 int subport_stat(uint16_t port_id, uint32_t subport_id);
169 int pipe_stat(uint16_t port_id, uint32_t subport_id, uint32_t pipe_id);
170 int qavg_q(uint16_t port_id, uint32_t subport_id, uint32_t pipe_id,
171 uint8_t tc, uint8_t q);
172 int qavg_tcpipe(uint16_t port_id, uint32_t subport_id, uint32_t pipe_id,
174 int qavg_pipe(uint16_t port_id, uint32_t subport_id, uint32_t pipe_id);
175 int qavg_tcsubport(uint16_t port_id, uint32_t subport_id, uint8_t tc);
176 int qavg_subport(uint16_t port_id, uint32_t subport_id);
182 #endif /* _MAIN_H_ */