1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2020 Intel Corporation
7 #include <rte_rawdev.h>
8 #include <rte_ioat_rawdev.h>
13 struct dma_for_vhost dma_bind[MAX_VHOST_DEVICE];
15 struct packet_tracker {
16 unsigned short size_track[MAX_ENQUEUED_SIZE];
17 unsigned short next_read;
18 unsigned short next_write;
19 unsigned short last_remain;
22 struct packet_tracker cb_tracker[MAX_VHOST_DEVICE];
26 open_ioat(const char *value)
28 struct dma_for_vhost *dma_info = dma_bind;
29 char *input = strndup(value, strlen(value) + 1);
32 char *start, *end, *substr;
33 int64_t vid, vring_id;
34 struct rte_ioat_rawdev_config config;
35 struct rte_rawdev_info info = { .dev_private = &config };
40 char *dma_arg[MAX_VHOST_DEVICE];
43 while (isblank(*addrs))
50 /* process DMA devices within bracket. */
52 substr = strtok(addrs, ";]");
57 args_nr = rte_strsplit(substr, strlen(substr),
58 dma_arg, MAX_VHOST_DEVICE, ',');
64 char *arg_temp = dma_arg[i];
66 sub_nr = rte_strsplit(arg_temp, strlen(arg_temp), ptrs, 2, '@');
72 start = strstr(ptrs[0], "txd");
79 vid = strtol(start, &end, 0);
85 vring_id = 0 + VIRTIO_RXQ;
86 if (rte_pci_addr_parse(ptrs[1],
87 &(dma_info + vid)->dmas[vring_id].addr) < 0) {
92 rte_pci_device_name(&(dma_info + vid)->dmas[vring_id].addr,
94 dev_id = rte_rawdev_get_dev_id(name);
95 if (dev_id == (uint16_t)(-ENODEV) ||
96 dev_id == (uint16_t)(-EINVAL)) {
101 if (rte_rawdev_info_get(dev_id, &info, sizeof(config)) < 0 ||
102 strstr(info.driver_name, "ioat") == NULL) {
107 (dma_info + vid)->dmas[vring_id].dev_id = dev_id;
108 (dma_info + vid)->dmas[vring_id].is_valid = true;
109 config.ring_size = IOAT_RING_SIZE;
110 config.hdls_disable = true;
111 if (rte_rawdev_configure(dev_id, &info, sizeof(config)) < 0) {
115 rte_rawdev_start(dev_id);
126 ioat_transfer_data_cb(int vid, uint16_t queue_id,
127 struct rte_vhost_async_desc *descs,
128 struct rte_vhost_async_status *opaque_data, uint16_t count)
131 int dev_id = dma_bind[vid].dmas[queue_id * 2 + VIRTIO_RXQ].dev_id;
132 struct rte_vhost_iov_iter *src = NULL;
133 struct rte_vhost_iov_iter *dst = NULL;
135 unsigned short mask = MAX_ENQUEUED_SIZE - 1;
136 unsigned short write = cb_tracker[dev_id].next_write;
139 for (i_desc = 0; i_desc < count; i_desc++) {
140 src = descs[i_desc].src;
141 dst = descs[i_desc].dst;
143 while (i_seg < src->nr_segs) {
145 * TODO: Assuming that the ring space of the
146 * IOAT device is large enough, so there is no
147 * error here, and the actual error handling
148 * will be added later.
150 rte_ioat_enqueue_copy(dev_id,
151 (uintptr_t)(src->iov[i_seg].iov_base)
153 (uintptr_t)(dst->iov[i_seg].iov_base)
155 src->iov[i_seg].iov_len,
161 cb_tracker[dev_id].size_track[write] = i_seg;
165 /* Opaque data is not supported */
168 /* ring the doorbell */
169 rte_ioat_perform_ops(dev_id);
170 cb_tracker[dev_id].next_write = write;
175 ioat_check_completed_copies_cb(int vid, uint16_t queue_id,
176 struct rte_vhost_async_status *opaque_data,
177 uint16_t max_packets)
181 unsigned short n_seg;
182 unsigned short read, write;
183 unsigned short nb_packet = 0;
184 unsigned short mask = MAX_ENQUEUED_SIZE - 1;
186 int dev_id = dma_bind[vid].dmas[queue_id * 2
187 + VIRTIO_RXQ].dev_id;
188 n_seg = rte_ioat_completed_ops(dev_id, 255, dump, dump);
189 n_seg += cb_tracker[dev_id].last_remain;
192 read = cb_tracker[dev_id].next_read;
193 write = cb_tracker[dev_id].next_write;
194 for (i = 0; i < max_packets; i++) {
198 if (n_seg >= cb_tracker[dev_id].size_track[read]) {
199 n_seg -= cb_tracker[dev_id].size_track[read];
206 cb_tracker[dev_id].next_read = read;
207 cb_tracker[dev_id].last_remain = n_seg;
210 /* Opaque data is not supported */
214 #endif /* RTE_RAW_IOAT */