1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2020 Intel Corporation
7 #include <rte_rawdev.h>
8 #include <rte_ioat_rawdev.h>
13 struct dma_for_vhost dma_bind[MAX_VHOST_DEVICE];
15 struct packet_tracker {
16 unsigned short size_track[MAX_ENQUEUED_SIZE];
17 unsigned short next_read;
18 unsigned short next_write;
19 unsigned short last_remain;
20 unsigned short ioat_space;
23 struct packet_tracker cb_tracker[MAX_VHOST_DEVICE];
27 open_ioat(const char *value)
29 struct dma_for_vhost *dma_info = dma_bind;
30 char *input = strndup(value, strlen(value) + 1);
33 char *start, *end, *substr;
34 int64_t vid, vring_id;
35 struct rte_ioat_rawdev_config config;
36 struct rte_rawdev_info info = { .dev_private = &config };
41 char *dma_arg[MAX_VHOST_DEVICE];
44 while (isblank(*addrs))
51 /* process DMA devices within bracket. */
53 substr = strtok(addrs, ";]");
58 args_nr = rte_strsplit(substr, strlen(substr),
59 dma_arg, MAX_VHOST_DEVICE, ',');
65 char *arg_temp = dma_arg[i];
67 sub_nr = rte_strsplit(arg_temp, strlen(arg_temp), ptrs, 2, '@');
73 start = strstr(ptrs[0], "txd");
80 vid = strtol(start, &end, 0);
86 vring_id = 0 + VIRTIO_RXQ;
87 if (rte_pci_addr_parse(ptrs[1],
88 &(dma_info + vid)->dmas[vring_id].addr) < 0) {
93 rte_pci_device_name(&(dma_info + vid)->dmas[vring_id].addr,
95 dev_id = rte_rawdev_get_dev_id(name);
96 if (dev_id == (uint16_t)(-ENODEV) ||
97 dev_id == (uint16_t)(-EINVAL)) {
102 if (rte_rawdev_info_get(dev_id, &info, sizeof(config)) < 0 ||
103 strstr(info.driver_name, "ioat") == NULL) {
108 (dma_info + vid)->dmas[vring_id].dev_id = dev_id;
109 (dma_info + vid)->dmas[vring_id].is_valid = true;
110 config.ring_size = IOAT_RING_SIZE;
111 config.hdls_disable = true;
112 if (rte_rawdev_configure(dev_id, &info, sizeof(config)) < 0) {
116 rte_rawdev_start(dev_id);
117 cb_tracker[dev_id].ioat_space = IOAT_RING_SIZE;
127 ioat_transfer_data_cb(int vid, uint16_t queue_id,
128 struct rte_vhost_async_desc *descs,
129 struct rte_vhost_async_status *opaque_data, uint16_t count)
132 int dev_id = dma_bind[vid].dmas[queue_id * 2 + VIRTIO_RXQ].dev_id;
133 struct rte_vhost_iov_iter *src = NULL;
134 struct rte_vhost_iov_iter *dst = NULL;
136 unsigned short mask = MAX_ENQUEUED_SIZE - 1;
137 unsigned short write = cb_tracker[dev_id].next_write;
140 for (i_desc = 0; i_desc < count; i_desc++) {
141 src = descs[i_desc].src;
142 dst = descs[i_desc].dst;
144 if (cb_tracker[dev_id].ioat_space < src->nr_segs)
146 while (i_seg < src->nr_segs) {
147 rte_ioat_enqueue_copy(dev_id,
148 (uintptr_t)(src->iov[i_seg].iov_base)
150 (uintptr_t)(dst->iov[i_seg].iov_base)
152 src->iov[i_seg].iov_len,
158 cb_tracker[dev_id].size_track[write] = src->nr_segs;
159 cb_tracker[dev_id].ioat_space -= src->nr_segs;
163 /* Opaque data is not supported */
166 /* ring the doorbell */
167 rte_ioat_perform_ops(dev_id);
168 cb_tracker[dev_id].next_write = write;
173 ioat_check_completed_copies_cb(int vid, uint16_t queue_id,
174 struct rte_vhost_async_status *opaque_data,
175 uint16_t max_packets)
180 unsigned short read, write;
181 unsigned short nb_packet = 0;
182 unsigned short mask = MAX_ENQUEUED_SIZE - 1;
185 int dev_id = dma_bind[vid].dmas[queue_id * 2
186 + VIRTIO_RXQ].dev_id;
187 n_seg = rte_ioat_completed_ops(dev_id, 255, dump, dump);
191 cb_tracker[dev_id].ioat_space += n_seg;
192 n_seg += cb_tracker[dev_id].last_remain;
194 read = cb_tracker[dev_id].next_read;
195 write = cb_tracker[dev_id].next_write;
196 for (i = 0; i < max_packets; i++) {
200 if (n_seg >= cb_tracker[dev_id].size_track[read]) {
201 n_seg -= cb_tracker[dev_id].size_track[read];
208 cb_tracker[dev_id].next_read = read;
209 cb_tracker[dev_id].last_remain = n_seg;
212 /* Opaque data is not supported */
216 #endif /* RTE_RAW_IOAT */