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44 #include <sys/types.h>
47 #include <rte_power.h>
48 #include <rte_spinlock.h>
50 #include "power_manager.h"
52 #define RTE_LOGTYPE_POWER_MANAGER RTE_LOGTYPE_USER1
54 #define POWER_SCALE_CORE(DIRECTION, core_num , ret) do { \
55 if (core_num >= POWER_MGR_MAX_CPUS) \
57 if (!(global_enabled_cpus & (1ULL << core_num))) \
59 rte_spinlock_lock(&global_core_freq_info[core_num].power_sl); \
60 ret = rte_power_freq_##DIRECTION(core_num); \
61 rte_spinlock_unlock(&global_core_freq_info[core_num].power_sl); \
64 #define POWER_SCALE_MASK(DIRECTION, core_mask, ret) do { \
66 for (i = 0; core_mask; core_mask &= ~(1 << i++)) { \
67 if ((core_mask >> i) & 1) { \
68 if (!(global_enabled_cpus & (1ULL << i))) \
70 rte_spinlock_lock(&global_core_freq_info[i].power_sl); \
71 if (rte_power_freq_##DIRECTION(i) != 1) \
73 rte_spinlock_unlock(&global_core_freq_info[i].power_sl); \
79 rte_spinlock_t power_sl;
80 uint32_t freqs[RTE_MAX_LCORE_FREQS];
82 } __rte_cache_aligned;
84 static struct freq_info global_core_freq_info[POWER_MGR_MAX_CPUS];
86 static uint64_t global_enabled_cpus;
88 #define SYSFS_CPU_PATH "/sys/devices/system/cpu/cpu%u/topology/core_id"
91 set_host_cpus_mask(void)
95 unsigned num_cpus = 0;
97 for (i = 0; i < POWER_MGR_MAX_CPUS; i++) {
98 snprintf(path, sizeof(path), SYSFS_CPU_PATH, i);
99 if (access(path, F_OK) == 0) {
100 global_enabled_cpus |= 1ULL << i;
109 power_manager_init(void)
111 unsigned int i, num_cpus, num_freqs;
115 num_cpus = set_host_cpus_mask();
117 RTE_LOG(ERR, POWER_MANAGER, "Unable to detected host CPUs, please "
118 "ensure that sufficient privileges exist to inspect sysfs\n");
121 rte_power_set_env(PM_ENV_ACPI_CPUFREQ);
122 cpu_mask = global_enabled_cpus;
123 for (i = 0; cpu_mask; cpu_mask &= ~(1 << i++)) {
124 if (rte_power_init(i) < 0)
125 RTE_LOG(ERR, POWER_MANAGER,
126 "Unable to initialize power manager "
128 num_freqs = rte_power_freqs(i, global_core_freq_info[i].freqs,
129 RTE_MAX_LCORE_FREQS);
130 if (num_freqs == 0) {
131 RTE_LOG(ERR, POWER_MANAGER,
132 "Unable to get frequency list for core %u\n",
134 global_enabled_cpus &= ~(1 << i);
138 global_core_freq_info[i].num_freqs = num_freqs;
139 rte_spinlock_init(&global_core_freq_info[i].power_sl);
141 RTE_LOG(INFO, POWER_MANAGER, "Detected %u host CPUs , enabled core mask:"
142 " 0x%"PRIx64"\n", num_cpus, global_enabled_cpus);
148 power_manager_get_current_frequency(unsigned core_num)
150 uint32_t freq, index;
152 if (core_num >= POWER_MGR_MAX_CPUS) {
153 RTE_LOG(ERR, POWER_MANAGER, "Core(%u) is out of range 0...%d\n",
154 core_num, POWER_MGR_MAX_CPUS-1);
157 if (!(global_enabled_cpus & (1ULL << core_num)))
160 rte_spinlock_lock(&global_core_freq_info[core_num].power_sl);
161 index = rte_power_get_freq(core_num);
162 rte_spinlock_unlock(&global_core_freq_info[core_num].power_sl);
163 if (index >= POWER_MGR_MAX_CPUS)
166 freq = global_core_freq_info[core_num].freqs[index];
172 power_manager_exit(void)
177 for (i = 0; global_enabled_cpus; global_enabled_cpus &= ~(1 << i++)) {
178 if (rte_power_exit(i) < 0) {
179 RTE_LOG(ERR, POWER_MANAGER, "Unable to shutdown power manager "
184 global_enabled_cpus = 0;
189 power_manager_scale_mask_up(uint64_t core_mask)
193 POWER_SCALE_MASK(up, core_mask, ret);
198 power_manager_scale_mask_down(uint64_t core_mask)
202 POWER_SCALE_MASK(down, core_mask, ret);
207 power_manager_scale_mask_min(uint64_t core_mask)
211 POWER_SCALE_MASK(min, core_mask, ret);
216 power_manager_scale_mask_max(uint64_t core_mask)
220 POWER_SCALE_MASK(max, core_mask, ret);
225 power_manager_enable_turbo_mask(uint64_t core_mask)
229 POWER_SCALE_MASK(enable_turbo, core_mask, ret);
234 power_manager_disable_turbo_mask(uint64_t core_mask)
238 POWER_SCALE_MASK(disable_turbo, core_mask, ret);
243 power_manager_scale_core_up(unsigned core_num)
247 POWER_SCALE_CORE(up, core_num, ret);
252 power_manager_scale_core_down(unsigned core_num)
256 POWER_SCALE_CORE(down, core_num, ret);
261 power_manager_scale_core_min(unsigned core_num)
265 POWER_SCALE_CORE(min, core_num, ret);
270 power_manager_scale_core_max(unsigned core_num)
274 POWER_SCALE_CORE(max, core_num, ret);
279 power_manager_enable_turbo_core(unsigned int core_num)
283 POWER_SCALE_CORE(enable_turbo, core_num, ret);
288 power_manager_disable_turbo_core(unsigned int core_num)
292 POWER_SCALE_CORE(disable_turbo, core_num, ret);
297 power_manager_scale_core_med(unsigned int core_num)
301 if (core_num >= POWER_MGR_MAX_CPUS)
303 if (!(global_enabled_cpus & (1ULL << core_num)))
305 rte_spinlock_lock(&global_core_freq_info[core_num].power_sl);
306 ret = rte_power_set_freq(core_num,
307 global_core_freq_info[core_num].num_freqs / 2);
308 rte_spinlock_unlock(&global_core_freq_info[core_num].power_sl);