1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2014 Intel Corporation
15 #include <sys/types.h>
18 #include <rte_power.h>
19 #include <rte_spinlock.h>
21 #include "power_manager.h"
23 #define RTE_LOGTYPE_POWER_MANAGER RTE_LOGTYPE_USER1
25 #define POWER_SCALE_CORE(DIRECTION, core_num , ret) do { \
26 if (core_num >= POWER_MGR_MAX_CPUS) \
28 if (!(global_enabled_cpus & (1ULL << core_num))) \
30 rte_spinlock_lock(&global_core_freq_info[core_num].power_sl); \
31 ret = rte_power_freq_##DIRECTION(core_num); \
32 rte_spinlock_unlock(&global_core_freq_info[core_num].power_sl); \
35 #define POWER_SCALE_MASK(DIRECTION, core_mask, ret) do { \
37 for (i = 0; core_mask; core_mask &= ~(1 << i++)) { \
38 if ((core_mask >> i) & 1) { \
39 if (!(global_enabled_cpus & (1ULL << i))) \
41 rte_spinlock_lock(&global_core_freq_info[i].power_sl); \
42 if (rte_power_freq_##DIRECTION(i) != 1) \
44 rte_spinlock_unlock(&global_core_freq_info[i].power_sl); \
50 rte_spinlock_t power_sl;
51 uint32_t freqs[RTE_MAX_LCORE_FREQS];
53 } __rte_cache_aligned;
55 static struct freq_info global_core_freq_info[POWER_MGR_MAX_CPUS];
57 static uint64_t global_enabled_cpus;
59 #define SYSFS_CPU_PATH "/sys/devices/system/cpu/cpu%u/topology/core_id"
62 set_host_cpus_mask(void)
66 unsigned num_cpus = 0;
68 for (i = 0; i < POWER_MGR_MAX_CPUS; i++) {
69 snprintf(path, sizeof(path), SYSFS_CPU_PATH, i);
70 if (access(path, F_OK) == 0) {
71 global_enabled_cpus |= 1ULL << i;
80 power_manager_init(void)
82 unsigned int i, num_cpus, num_freqs;
86 num_cpus = set_host_cpus_mask();
88 RTE_LOG(ERR, POWER_MANAGER, "Unable to detected host CPUs, please "
89 "ensure that sufficient privileges exist to inspect sysfs\n");
92 rte_power_set_env(PM_ENV_ACPI_CPUFREQ);
93 cpu_mask = global_enabled_cpus;
94 for (i = 0; cpu_mask; cpu_mask &= ~(1 << i++)) {
95 if (rte_power_init(i) < 0)
96 RTE_LOG(ERR, POWER_MANAGER,
97 "Unable to initialize power manager "
99 num_freqs = rte_power_freqs(i, global_core_freq_info[i].freqs,
100 RTE_MAX_LCORE_FREQS);
101 if (num_freqs == 0) {
102 RTE_LOG(ERR, POWER_MANAGER,
103 "Unable to get frequency list for core %u\n",
105 global_enabled_cpus &= ~(1 << i);
109 global_core_freq_info[i].num_freqs = num_freqs;
110 rte_spinlock_init(&global_core_freq_info[i].power_sl);
112 RTE_LOG(INFO, POWER_MANAGER, "Detected %u host CPUs , enabled core mask:"
113 " 0x%"PRIx64"\n", num_cpus, global_enabled_cpus);
119 power_manager_get_current_frequency(unsigned core_num)
121 uint32_t freq, index;
123 if (core_num >= POWER_MGR_MAX_CPUS) {
124 RTE_LOG(ERR, POWER_MANAGER, "Core(%u) is out of range 0...%d\n",
125 core_num, POWER_MGR_MAX_CPUS-1);
128 if (!(global_enabled_cpus & (1ULL << core_num)))
131 rte_spinlock_lock(&global_core_freq_info[core_num].power_sl);
132 index = rte_power_get_freq(core_num);
133 rte_spinlock_unlock(&global_core_freq_info[core_num].power_sl);
134 if (index >= POWER_MGR_MAX_CPUS)
137 freq = global_core_freq_info[core_num].freqs[index];
143 power_manager_exit(void)
148 for (i = 0; global_enabled_cpus; global_enabled_cpus &= ~(1 << i++)) {
149 if (rte_power_exit(i) < 0) {
150 RTE_LOG(ERR, POWER_MANAGER, "Unable to shutdown power manager "
155 global_enabled_cpus = 0;
160 power_manager_scale_mask_up(uint64_t core_mask)
164 POWER_SCALE_MASK(up, core_mask, ret);
169 power_manager_scale_mask_down(uint64_t core_mask)
173 POWER_SCALE_MASK(down, core_mask, ret);
178 power_manager_scale_mask_min(uint64_t core_mask)
182 POWER_SCALE_MASK(min, core_mask, ret);
187 power_manager_scale_mask_max(uint64_t core_mask)
191 POWER_SCALE_MASK(max, core_mask, ret);
196 power_manager_enable_turbo_mask(uint64_t core_mask)
200 POWER_SCALE_MASK(enable_turbo, core_mask, ret);
205 power_manager_disable_turbo_mask(uint64_t core_mask)
209 POWER_SCALE_MASK(disable_turbo, core_mask, ret);
214 power_manager_scale_core_up(unsigned core_num)
218 POWER_SCALE_CORE(up, core_num, ret);
223 power_manager_scale_core_down(unsigned core_num)
227 POWER_SCALE_CORE(down, core_num, ret);
232 power_manager_scale_core_min(unsigned core_num)
236 POWER_SCALE_CORE(min, core_num, ret);
241 power_manager_scale_core_max(unsigned core_num)
245 POWER_SCALE_CORE(max, core_num, ret);
250 power_manager_enable_turbo_core(unsigned int core_num)
254 POWER_SCALE_CORE(enable_turbo, core_num, ret);
259 power_manager_disable_turbo_core(unsigned int core_num)
263 POWER_SCALE_CORE(disable_turbo, core_num, ret);
268 power_manager_scale_core_med(unsigned int core_num)
272 if (core_num >= POWER_MGR_MAX_CPUS)
274 if (!(global_enabled_cpus & (1ULL << core_num)))
276 rte_spinlock_lock(&global_core_freq_info[core_num].power_sl);
277 ret = rte_power_set_freq(core_num,
278 global_core_freq_info[core_num].num_freqs / 2);
279 rte_spinlock_unlock(&global_core_freq_info[core_num].power_sl);