1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2014 Intel Corporation
15 #include <sys/sysinfo.h>
16 #include <sys/types.h>
19 #include <rte_power.h>
20 #include <rte_spinlock.h>
22 #include "channel_manager.h"
23 #include "power_manager.h"
24 #include "oob_monitor.h"
26 #define POWER_SCALE_CORE(DIRECTION, core_num , ret) do { \
27 if (core_num >= ci.core_count) \
29 if (!(ci.cd[core_num].global_enabled_cpus)) \
31 rte_spinlock_lock(&global_core_freq_info[core_num].power_sl); \
32 ret = rte_power_freq_##DIRECTION(core_num); \
33 rte_spinlock_unlock(&global_core_freq_info[core_num].power_sl); \
37 rte_spinlock_t power_sl;
38 uint32_t freqs[RTE_MAX_LCORE_FREQS];
40 } __rte_cache_aligned;
42 static struct freq_info global_core_freq_info[RTE_MAX_LCORE];
46 #define SYSFS_CPU_PATH "/sys/devices/system/cpu/cpu%u/topology/core_id"
62 ci->core_count = get_nprocs_conf();
63 ci->branch_ratio_threshold = BRANCH_RATIO_THRESHOLD;
64 ci->cd = malloc(ci->core_count * sizeof(struct core_details));
65 memset(ci->cd, 0, ci->core_count * sizeof(struct core_details));
67 RTE_LOG(ERR, POWER_MANAGER, "Failed to allocate memory for core info.");
70 for (i = 0; i < ci->core_count; i++) {
71 ci->cd[i].global_enabled_cpus = 1;
73 printf("%d cores in system\n", ci->core_count);
78 power_manager_init(void)
80 unsigned int i, num_cpus = 0, num_freqs = 0;
83 unsigned int max_core_num;
85 rte_power_set_env(PM_ENV_NOT_SET);
89 RTE_LOG(ERR, POWER_MANAGER,
90 "Failed to get core info!\n");
94 if (ci->core_count > RTE_MAX_LCORE)
95 max_core_num = RTE_MAX_LCORE;
97 max_core_num = ci->core_count;
99 for (i = 0; i < max_core_num; i++) {
100 if (ci->cd[i].global_enabled_cpus) {
101 if (rte_power_init(i) < 0)
102 RTE_LOG(ERR, POWER_MANAGER,
103 "Unable to initialize power manager "
106 num_freqs = rte_power_freqs(i,
107 global_core_freq_info[i].freqs,
108 RTE_MAX_LCORE_FREQS);
109 if (num_freqs == 0) {
110 RTE_LOG(ERR, POWER_MANAGER,
111 "Unable to get frequency list for core %u\n",
113 ci->cd[i].oob_enabled = 0;
116 global_core_freq_info[i].num_freqs = num_freqs;
118 rte_spinlock_init(&global_core_freq_info[i].power_sl);
120 if (ci->cd[i].oob_enabled)
121 add_core_to_monitor(i);
123 RTE_LOG(INFO, POWER_MANAGER, "Managing %u cores out of %u available host cores\n",
124 num_cpus, ci->core_count);
130 power_manager_get_current_frequency(unsigned core_num)
132 uint32_t freq, index;
134 if (core_num >= RTE_MAX_LCORE) {
135 RTE_LOG(ERR, POWER_MANAGER, "Core(%u) is out of range 0...%d\n",
136 core_num, RTE_MAX_LCORE-1);
139 if (!(ci.cd[core_num].global_enabled_cpus))
142 rte_spinlock_lock(&global_core_freq_info[core_num].power_sl);
143 index = rte_power_get_freq(core_num);
144 rte_spinlock_unlock(&global_core_freq_info[core_num].power_sl);
145 if (index >= RTE_MAX_LCORE_FREQS)
148 freq = global_core_freq_info[core_num].freqs[index];
154 power_manager_exit(void)
158 struct core_info *ci;
159 unsigned int max_core_num;
161 ci = get_core_info();
163 RTE_LOG(ERR, POWER_MANAGER,
164 "Failed to get core info!\n");
168 if (ci->core_count > RTE_MAX_LCORE)
169 max_core_num = RTE_MAX_LCORE;
171 max_core_num = ci->core_count;
173 for (i = 0; i < max_core_num; i++) {
174 if (ci->cd[i].global_enabled_cpus) {
175 if (rte_power_exit(i) < 0) {
176 RTE_LOG(ERR, POWER_MANAGER, "Unable to shutdown power manager "
180 ci->cd[i].global_enabled_cpus = 0;
182 remove_core_from_monitor(i);
188 power_manager_scale_core_up(unsigned core_num)
192 POWER_SCALE_CORE(up, core_num, ret);
197 power_manager_scale_core_down(unsigned core_num)
201 POWER_SCALE_CORE(down, core_num, ret);
206 power_manager_scale_core_min(unsigned core_num)
210 POWER_SCALE_CORE(min, core_num, ret);
215 power_manager_scale_core_max(unsigned core_num)
219 POWER_SCALE_CORE(max, core_num, ret);
224 power_manager_enable_turbo_core(unsigned int core_num)
228 POWER_SCALE_CORE(enable_turbo, core_num, ret);
233 power_manager_disable_turbo_core(unsigned int core_num)
237 POWER_SCALE_CORE(disable_turbo, core_num, ret);
242 power_manager_scale_core_med(unsigned int core_num)
245 struct core_info *ci;
247 ci = get_core_info();
248 if (core_num >= RTE_MAX_LCORE)
250 if (!(ci->cd[core_num].global_enabled_cpus))
252 rte_spinlock_lock(&global_core_freq_info[core_num].power_sl);
253 ret = rte_power_set_freq(core_num,
254 global_core_freq_info[core_num].num_freqs / 2);
255 rte_spinlock_unlock(&global_core_freq_info[core_num].power_sl);