1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2014 Intel Corporation
14 #include <sys/sysinfo.h>
15 #include <sys/types.h>
18 #include <rte_power.h>
19 #include <rte_spinlock.h>
21 #include "channel_manager.h"
22 #include "power_manager.h"
23 #include "oob_monitor.h"
25 #define POWER_SCALE_CORE(DIRECTION, core_num , ret) do { \
26 if (core_num >= ci.core_count) \
28 if (!(ci.cd[core_num].global_enabled_cpus)) \
30 rte_spinlock_lock(&global_core_freq_info[core_num].power_sl); \
31 ret = rte_power_freq_##DIRECTION(core_num); \
32 rte_spinlock_unlock(&global_core_freq_info[core_num].power_sl); \
36 rte_spinlock_t power_sl;
37 uint32_t freqs[RTE_MAX_LCORE_FREQS];
39 } __rte_cache_aligned;
41 static struct freq_info global_core_freq_info[RTE_MAX_LCORE];
45 #define SYSFS_CPU_PATH "/sys/devices/system/cpu/cpu%u/topology/core_id"
61 ci->core_count = get_nprocs_conf();
62 ci->cd = malloc(ci->core_count * sizeof(struct core_details));
63 memset(ci->cd, 0, ci->core_count * sizeof(struct core_details));
65 RTE_LOG(ERR, POWER_MANAGER, "Failed to allocate memory for core info.");
68 for (i = 0; i < ci->core_count; i++) {
69 ci->cd[i].global_enabled_cpus = 1;
70 ci->cd[i].branch_ratio_threshold = BRANCH_RATIO_THRESHOLD;
72 printf("%d cores in system\n", ci->core_count);
77 power_manager_init(void)
79 unsigned int i, num_cpus = 0, num_freqs = 0;
82 unsigned int max_core_num;
84 rte_power_set_env(PM_ENV_NOT_SET);
88 RTE_LOG(ERR, POWER_MANAGER,
89 "Failed to get core info!\n");
93 if (ci->core_count > RTE_MAX_LCORE)
94 max_core_num = RTE_MAX_LCORE;
96 max_core_num = ci->core_count;
98 for (i = 0; i < max_core_num; i++) {
99 if (ci->cd[i].global_enabled_cpus) {
100 if (rte_power_init(i) < 0)
101 RTE_LOG(ERR, POWER_MANAGER,
102 "Unable to initialize power manager "
105 num_freqs = rte_power_freqs(i,
106 global_core_freq_info[i].freqs,
107 RTE_MAX_LCORE_FREQS);
108 if (num_freqs == 0) {
109 RTE_LOG(ERR, POWER_MANAGER,
110 "Unable to get frequency list for core %u\n",
112 ci->cd[i].oob_enabled = 0;
115 global_core_freq_info[i].num_freqs = num_freqs;
117 rte_spinlock_init(&global_core_freq_info[i].power_sl);
119 if (ci->cd[i].oob_enabled)
120 add_core_to_monitor(i);
122 RTE_LOG(INFO, POWER_MANAGER, "Managing %u cores out of %u available host cores\n",
123 num_cpus, ci->core_count);
129 power_manager_get_current_frequency(unsigned core_num)
131 uint32_t freq, index;
133 if (core_num >= RTE_MAX_LCORE) {
134 RTE_LOG(ERR, POWER_MANAGER, "Core(%u) is out of range 0...%d\n",
135 core_num, RTE_MAX_LCORE-1);
138 if (!(ci.cd[core_num].global_enabled_cpus))
141 rte_spinlock_lock(&global_core_freq_info[core_num].power_sl);
142 index = rte_power_get_freq(core_num);
143 rte_spinlock_unlock(&global_core_freq_info[core_num].power_sl);
144 if (index >= RTE_MAX_LCORE_FREQS)
147 freq = global_core_freq_info[core_num].freqs[index];
153 power_manager_exit(void)
157 struct core_info *ci;
158 unsigned int max_core_num;
160 ci = get_core_info();
162 RTE_LOG(ERR, POWER_MANAGER,
163 "Failed to get core info!\n");
167 if (ci->core_count > RTE_MAX_LCORE)
168 max_core_num = RTE_MAX_LCORE;
170 max_core_num = ci->core_count;
172 for (i = 0; i < max_core_num; i++) {
173 if (ci->cd[i].global_enabled_cpus) {
174 if (rte_power_exit(i) < 0) {
175 RTE_LOG(ERR, POWER_MANAGER, "Unable to shutdown power manager "
179 ci->cd[i].global_enabled_cpus = 0;
181 remove_core_from_monitor(i);
187 power_manager_scale_core_up(unsigned core_num)
191 POWER_SCALE_CORE(up, core_num, ret);
196 power_manager_scale_core_down(unsigned core_num)
200 POWER_SCALE_CORE(down, core_num, ret);
205 power_manager_scale_core_min(unsigned core_num)
209 POWER_SCALE_CORE(min, core_num, ret);
214 power_manager_scale_core_max(unsigned core_num)
218 POWER_SCALE_CORE(max, core_num, ret);
223 power_manager_enable_turbo_core(unsigned int core_num)
227 POWER_SCALE_CORE(enable_turbo, core_num, ret);
232 power_manager_disable_turbo_core(unsigned int core_num)
236 POWER_SCALE_CORE(disable_turbo, core_num, ret);
241 power_manager_scale_core_med(unsigned int core_num)
244 struct core_info *ci;
246 ci = get_core_info();
247 if (core_num >= RTE_MAX_LCORE)
249 if (!(ci->cd[core_num].global_enabled_cpus))
251 rte_spinlock_lock(&global_core_freq_info[core_num].power_sl);
252 ret = rte_power_set_freq(core_num,
253 global_core_freq_info[core_num].num_freqs / 2);
254 rte_spinlock_unlock(&global_core_freq_info[core_num].power_sl);