examples/vm_power_manager/power_manager.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2010-2014 Intel Corporation
   3  */
   4
   5 #include <stdio.h>
   6 #include <stdlib.h>
   7 #include <stdint.h>
   8 #include <inttypes.h>
   9 #include <sys/un.h>
  10 #include <fcntl.h>
  11 #include <unistd.h>
  12 #include <dirent.h>
  13 #include <errno.h>
  14
  15 #include <sys/sysinfo.h>
  16 #include <sys/types.h>
  17
  18 #include <rte_log.h>
  19 #include <rte_power.h>
  20 #include <rte_spinlock.h>
  21
  22 #include "channel_manager.h"
  23 #include "power_manager.h"
  24 #include "oob_monitor.h"
  25
  26 #define POWER_SCALE_CORE(DIRECTION, core_num , ret) do { \
  27         if (core_num >= ci.core_count) \
  28                 return -1; \
  29         if (!(ci.cd[core_num].global_enabled_cpus)) \
  30                 return -1; \
  31         rte_spinlock_lock(&global_core_freq_info[core_num].power_sl); \
  32         ret = rte_power_freq_##DIRECTION(core_num); \
  33         rte_spinlock_unlock(&global_core_freq_info[core_num].power_sl); \
  34 } while (0)
  35
  36 #define POWER_SCALE_MASK(DIRECTION, core_mask, ret) do { \
  37         int i; \
  38         for (i = 0; core_mask; core_mask &= ~(1 << i++)) { \
  39                 if ((core_mask >> i) & 1) { \
  40                         if (!(ci.cd[i].global_enabled_cpus)) \
  41                                 continue; \
  42                         rte_spinlock_lock(&global_core_freq_info[i].power_sl); \
  43                         if (rte_power_freq_##DIRECTION(i) != 1) \
  44                                 ret = -1; \
  45                         rte_spinlock_unlock(&global_core_freq_info[i].power_sl); \
  46                 } \
  47         } \
  48 } while (0)
  49
  50 struct freq_info {
  51         rte_spinlock_t power_sl;
  52         uint32_t freqs[RTE_MAX_LCORE_FREQS];
  53         unsigned num_freqs;
  54 } __rte_cache_aligned;
  55
  56 static struct freq_info global_core_freq_info[POWER_MGR_MAX_CPUS];
  57
  58 struct core_info ci;
  59
  60 #define SYSFS_CPU_PATH "/sys/devices/system/cpu/cpu%u/topology/core_id"
  61
  62 struct core_info *
  63 get_core_info(void)
  64 {
  65         return &ci;
  66 }
  67
  68 int
  69 core_info_init(void)
  70 {
  71         struct core_info *ci;
  72         int i;
  73
  74         ci = get_core_info();
  75
  76         ci->core_count = get_nprocs_conf();
  77         ci->cd = malloc(ci->core_count * sizeof(struct core_details));
  78         if (!ci->cd) {
  79                 RTE_LOG(ERR, POWER_MANAGER, "Failed to allocate memory for core info.");
  80                 return -1;
  81         }
  82         for (i = 0; i < ci->core_count; i++) {
  83                 ci->cd[i].global_enabled_cpus = 1;
  84                 ci->cd[i].oob_enabled = 0;
  85                 ci->cd[i].msr_fd = 0;
  86         }
  87         printf("%d cores in system\n", ci->core_count);
  88         return 0;
  89 }
  90
  91 int
  92 power_manager_init(void)
  93 {
  94         unsigned int i, num_cpus = 0, num_freqs = 0;
  95         int ret = 0;
  96         struct core_info *ci;
  97
  98         rte_power_set_env(PM_ENV_ACPI_CPUFREQ);
  99
 100         ci = get_core_info();
 101         if (!ci) {
 102                 RTE_LOG(ERR, POWER_MANAGER,
 103                                 "Failed to get core info!\n");
 104                 return -1;
 105         }
 106
 107         for (i = 0; i < ci->core_count; i++) {
 108                 if (ci->cd[i].global_enabled_cpus) {
 109                         if (rte_power_init(i) < 0)
 110                                 RTE_LOG(ERR, POWER_MANAGER,
 111                                                 "Unable to initialize power manager "
 112                                                 "for core %u\n", i);
 113                         num_cpus++;
 114                         num_freqs = rte_power_freqs(i,
 115                                         global_core_freq_info[i].freqs,
 116                                         RTE_MAX_LCORE_FREQS);
 117                         if (num_freqs == 0) {
 118                                 RTE_LOG(ERR, POWER_MANAGER,
 119                                         "Unable to get frequency list for core %u\n",
 120                                         i);
 121                                 ci->cd[i].oob_enabled = 0;
 122                                 ret = -1;
 123                         }
 124                         global_core_freq_info[i].num_freqs = num_freqs;
 125
 126                         rte_spinlock_init(&global_core_freq_info[i].power_sl);
 127                 }
 128                 if (ci->cd[i].oob_enabled)
 129                         add_core_to_monitor(i);
 130         }
 131         RTE_LOG(INFO, POWER_MANAGER, "Managing %u cores out of %u available host cores\n",
 132                         num_cpus, ci->core_count);
 133         return ret;
 134
 135 }
 136
 137 uint32_t
 138 power_manager_get_current_frequency(unsigned core_num)
 139 {
 140         uint32_t freq, index;
 141
 142         if (core_num >= POWER_MGR_MAX_CPUS) {
 143                 RTE_LOG(ERR, POWER_MANAGER, "Core(%u) is out of range 0...%d\n",
 144                                 core_num, POWER_MGR_MAX_CPUS-1);
 145                 return -1;
 146         }
 147         if (!(ci.cd[core_num].global_enabled_cpus))
 148                 return 0;
 149
 150         rte_spinlock_lock(&global_core_freq_info[core_num].power_sl);
 151         index = rte_power_get_freq(core_num);
 152         rte_spinlock_unlock(&global_core_freq_info[core_num].power_sl);
 153         if (index >= POWER_MGR_MAX_CPUS)
 154                 freq = 0;
 155         else
 156                 freq = global_core_freq_info[core_num].freqs[index];
 157
 158         return freq;
 159 }
 160
 161 int
 162 power_manager_exit(void)
 163 {
 164         unsigned int i;
 165         int ret = 0;
 166         struct core_info *ci;
 167
 168         ci = get_core_info();
 169         if (!ci) {
 170                 RTE_LOG(ERR, POWER_MANAGER,
 171                                 "Failed to get core info!\n");
 172                 return -1;
 173         }
 174
 175         for (i = 0; i < ci->core_count; i++) {
 176                 if (ci->cd[i].global_enabled_cpus) {
 177                         if (rte_power_exit(i) < 0) {
 178                                 RTE_LOG(ERR, POWER_MANAGER, "Unable to shutdown power manager "
 179                                                 "for core %u\n", i);
 180                                 ret = -1;
 181                         }
 182                         ci->cd[i].global_enabled_cpus = 0;
 183                 }
 184                 remove_core_from_monitor(i);
 185         }
 186         return ret;
 187 }
 188
 189 int
 190 power_manager_scale_mask_up(uint64_t core_mask)
 191 {
 192         int ret = 0;
 193
 194         POWER_SCALE_MASK(up, core_mask, ret);
 195         return ret;
 196 }
 197
 198 int
 199 power_manager_scale_mask_down(uint64_t core_mask)
 200 {
 201         int ret = 0;
 202
 203         POWER_SCALE_MASK(down, core_mask, ret);
 204         return ret;
 205 }
 206
 207 int
 208 power_manager_scale_mask_min(uint64_t core_mask)
 209 {
 210         int ret = 0;
 211
 212         POWER_SCALE_MASK(min, core_mask, ret);
 213         return ret;
 214 }
 215
 216 int
 217 power_manager_scale_mask_max(uint64_t core_mask)
 218 {
 219         int ret = 0;
 220
 221         POWER_SCALE_MASK(max, core_mask, ret);
 222         return ret;
 223 }
 224
 225 int
 226 power_manager_enable_turbo_mask(uint64_t core_mask)
 227 {
 228         int ret = 0;
 229
 230         POWER_SCALE_MASK(enable_turbo, core_mask, ret);
 231         return ret;
 232 }
 233
 234 int
 235 power_manager_disable_turbo_mask(uint64_t core_mask)
 236 {
 237         int ret = 0;
 238
 239         POWER_SCALE_MASK(disable_turbo, core_mask, ret);
 240         return ret;
 241 }
 242
 243 int
 244 power_manager_scale_core_up(unsigned core_num)
 245 {
 246         int ret = 0;
 247
 248         POWER_SCALE_CORE(up, core_num, ret);
 249         return ret;
 250 }
 251
 252 int
 253 power_manager_scale_core_down(unsigned core_num)
 254 {
 255         int ret = 0;
 256
 257         POWER_SCALE_CORE(down, core_num, ret);
 258         return ret;
 259 }
 260
 261 int
 262 power_manager_scale_core_min(unsigned core_num)
 263 {
 264         int ret = 0;
 265
 266         POWER_SCALE_CORE(min, core_num, ret);
 267         return ret;
 268 }
 269
 270 int
 271 power_manager_scale_core_max(unsigned core_num)
 272 {
 273         int ret = 0;
 274
 275         POWER_SCALE_CORE(max, core_num, ret);
 276         return ret;
 277 }
 278
 279 int
 280 power_manager_enable_turbo_core(unsigned int core_num)
 281 {
 282         int ret = 0;
 283
 284         POWER_SCALE_CORE(enable_turbo, core_num, ret);
 285         return ret;
 286 }
 287
 288 int
 289 power_manager_disable_turbo_core(unsigned int core_num)
 290 {
 291         int ret = 0;
 292
 293         POWER_SCALE_CORE(disable_turbo, core_num, ret);
 294         return ret;
 295 }
 296
 297 int
 298 power_manager_scale_core_med(unsigned int core_num)
 299 {
 300         int ret = 0;
 301         struct core_info *ci;
 302
 303         ci = get_core_info();
 304         if (core_num >= POWER_MGR_MAX_CPUS)
 305                 return -1;
 306         if (!(ci->cd[core_num].global_enabled_cpus))
 307                 return -1;
 308         rte_spinlock_lock(&global_core_freq_info[core_num].power_sl);
 309         ret = rte_power_set_freq(core_num,
 310                                 global_core_freq_info[core_num].num_freqs / 2);
 311         rte_spinlock_unlock(&global_core_freq_info[core_num].power_sl);
 312         return ret;
 313 }