1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2020 Intel Corporation
13 #include <rte_ether.h>
14 #include <ethdev_driver.h>
15 #include <rte_malloc.h>
16 #include <rte_tailq.h>
19 #include "iavf_generic_flow.h"
21 #include "iavf_rxtx.h"
23 #define IAVF_FDIR_MAX_QREGION_SIZE 128
25 #define IAVF_FDIR_IPV6_TC_OFFSET 20
26 #define IAVF_IPV6_TC_MASK (0xFF << IAVF_FDIR_IPV6_TC_OFFSET)
28 #define IAVF_GTPU_EH_DWLINK 0
29 #define IAVF_GTPU_EH_UPLINK 1
31 #define IAVF_FDIR_INSET_ETH (\
34 #define IAVF_FDIR_INSET_ETH_IPV4 (\
35 IAVF_INSET_IPV4_SRC | IAVF_INSET_IPV4_DST | \
36 IAVF_INSET_IPV4_PROTO | IAVF_INSET_IPV4_TOS | \
39 #define IAVF_FDIR_INSET_ETH_IPV4_UDP (\
40 IAVF_INSET_IPV4_SRC | IAVF_INSET_IPV4_DST | \
41 IAVF_INSET_IPV4_TOS | IAVF_INSET_IPV4_TTL | \
42 IAVF_INSET_UDP_SRC_PORT | IAVF_INSET_UDP_DST_PORT)
44 #define IAVF_FDIR_INSET_ETH_IPV4_TCP (\
45 IAVF_INSET_IPV4_SRC | IAVF_INSET_IPV4_DST | \
46 IAVF_INSET_IPV4_TOS | IAVF_INSET_IPV4_TTL | \
47 IAVF_INSET_TCP_SRC_PORT | IAVF_INSET_TCP_DST_PORT)
49 #define IAVF_FDIR_INSET_ETH_IPV4_SCTP (\
50 IAVF_INSET_IPV4_SRC | IAVF_INSET_IPV4_DST | \
51 IAVF_INSET_IPV4_TOS | IAVF_INSET_IPV4_TTL | \
52 IAVF_INSET_SCTP_SRC_PORT | IAVF_INSET_SCTP_DST_PORT)
54 #define IAVF_FDIR_INSET_ETH_IPV6 (\
55 IAVF_INSET_IPV6_SRC | IAVF_INSET_IPV6_DST | \
56 IAVF_INSET_IPV6_NEXT_HDR | IAVF_INSET_IPV6_TC | \
57 IAVF_INSET_IPV6_HOP_LIMIT)
59 #define IAVF_FDIR_INSET_ETH_IPV6_UDP (\
60 IAVF_INSET_IPV6_SRC | IAVF_INSET_IPV6_DST | \
61 IAVF_INSET_IPV6_TC | IAVF_INSET_IPV6_HOP_LIMIT | \
62 IAVF_INSET_UDP_SRC_PORT | IAVF_INSET_UDP_DST_PORT)
64 #define IAVF_FDIR_INSET_ETH_IPV6_TCP (\
65 IAVF_INSET_IPV6_SRC | IAVF_INSET_IPV6_DST | \
66 IAVF_INSET_IPV6_TC | IAVF_INSET_IPV6_HOP_LIMIT | \
67 IAVF_INSET_TCP_SRC_PORT | IAVF_INSET_TCP_DST_PORT)
69 #define IAVF_FDIR_INSET_ETH_IPV6_SCTP (\
70 IAVF_INSET_IPV6_SRC | IAVF_INSET_IPV6_DST | \
71 IAVF_INSET_IPV6_TC | IAVF_INSET_IPV6_HOP_LIMIT | \
72 IAVF_INSET_SCTP_SRC_PORT | IAVF_INSET_SCTP_DST_PORT)
74 #define IAVF_FDIR_INSET_IPV4_GTPU (\
75 IAVF_INSET_IPV4_SRC | IAVF_INSET_IPV4_DST | \
78 #define IAVF_FDIR_INSET_GTPU_IPV4 (\
79 IAVF_INSET_TUN_IPV4_SRC | IAVF_INSET_TUN_IPV4_DST | \
80 IAVF_INSET_TUN_IPV4_PROTO | IAVF_INSET_TUN_IPV4_TOS | \
81 IAVF_INSET_TUN_IPV4_TTL)
83 #define IAVF_FDIR_INSET_GTPU_IPV4_UDP (\
84 IAVF_FDIR_INSET_GTPU_IPV4 | \
85 IAVF_INSET_TUN_UDP_SRC_PORT | IAVF_INSET_TUN_UDP_DST_PORT)
87 #define IAVF_FDIR_INSET_GTPU_IPV4_TCP (\
88 IAVF_FDIR_INSET_GTPU_IPV4 | \
89 IAVF_INSET_TUN_TCP_SRC_PORT | IAVF_INSET_TUN_TCP_DST_PORT)
91 #define IAVF_FDIR_INSET_IPV4_GTPU_EH (\
92 IAVF_INSET_IPV4_SRC | IAVF_INSET_IPV4_DST | \
93 IAVF_INSET_GTPU_TEID | IAVF_INSET_GTPU_QFI)
95 #define IAVF_FDIR_INSET_IPV6_GTPU (\
96 IAVF_INSET_IPV6_SRC | IAVF_INSET_IPV6_DST | \
99 #define IAVF_FDIR_INSET_GTPU_IPV6 (\
100 IAVF_INSET_TUN_IPV6_SRC | IAVF_INSET_TUN_IPV6_DST | \
101 IAVF_INSET_TUN_IPV6_NEXT_HDR | IAVF_INSET_TUN_IPV6_TC | \
102 IAVF_INSET_TUN_IPV6_HOP_LIMIT)
104 #define IAVF_FDIR_INSET_GTPU_IPV6_UDP (\
105 IAVF_FDIR_INSET_GTPU_IPV6 | \
106 IAVF_INSET_TUN_UDP_SRC_PORT | IAVF_INSET_TUN_UDP_DST_PORT)
108 #define IAVF_FDIR_INSET_GTPU_IPV6_TCP (\
109 IAVF_FDIR_INSET_GTPU_IPV6 | \
110 IAVF_INSET_TUN_TCP_SRC_PORT | IAVF_INSET_TUN_TCP_DST_PORT)
112 #define IAVF_FDIR_INSET_IPV6_GTPU_EH (\
113 IAVF_INSET_IPV6_SRC | IAVF_INSET_IPV6_DST | \
114 IAVF_INSET_GTPU_TEID | IAVF_INSET_GTPU_QFI)
116 #define IAVF_FDIR_INSET_L2TPV3OIP (\
117 IAVF_L2TPV3OIP_SESSION_ID)
119 #define IAVF_FDIR_INSET_ESP (\
122 #define IAVF_FDIR_INSET_AH (\
125 #define IAVF_FDIR_INSET_IPV4_NATT_ESP (\
126 IAVF_INSET_IPV4_SRC | IAVF_INSET_IPV4_DST | \
129 #define IAVF_FDIR_INSET_IPV6_NATT_ESP (\
130 IAVF_INSET_IPV6_SRC | IAVF_INSET_IPV6_DST | \
133 #define IAVF_FDIR_INSET_PFCP (\
134 IAVF_INSET_PFCP_S_FIELD)
136 #define IAVF_FDIR_INSET_ECPRI (\
139 static struct iavf_pattern_match_item iavf_fdir_pattern[] = {
140 {iavf_pattern_ethertype, IAVF_FDIR_INSET_ETH, IAVF_INSET_NONE},
141 {iavf_pattern_eth_ipv4, IAVF_FDIR_INSET_ETH_IPV4, IAVF_INSET_NONE},
142 {iavf_pattern_eth_ipv4_udp, IAVF_FDIR_INSET_ETH_IPV4_UDP, IAVF_INSET_NONE},
143 {iavf_pattern_eth_ipv4_tcp, IAVF_FDIR_INSET_ETH_IPV4_TCP, IAVF_INSET_NONE},
144 {iavf_pattern_eth_ipv4_sctp, IAVF_FDIR_INSET_ETH_IPV4_SCTP, IAVF_INSET_NONE},
145 {iavf_pattern_eth_ipv6, IAVF_FDIR_INSET_ETH_IPV6, IAVF_INSET_NONE},
146 {iavf_pattern_eth_ipv6_udp, IAVF_FDIR_INSET_ETH_IPV6_UDP, IAVF_INSET_NONE},
147 {iavf_pattern_eth_ipv6_tcp, IAVF_FDIR_INSET_ETH_IPV6_TCP, IAVF_INSET_NONE},
148 {iavf_pattern_eth_ipv6_sctp, IAVF_FDIR_INSET_ETH_IPV6_SCTP, IAVF_INSET_NONE},
149 {iavf_pattern_eth_ipv4_gtpu, IAVF_FDIR_INSET_IPV4_GTPU, IAVF_INSET_NONE},
150 {iavf_pattern_eth_ipv4_gtpu_ipv4, IAVF_FDIR_INSET_GTPU_IPV4, IAVF_INSET_NONE},
151 {iavf_pattern_eth_ipv4_gtpu_ipv4_udp, IAVF_FDIR_INSET_GTPU_IPV4_UDP, IAVF_INSET_NONE},
152 {iavf_pattern_eth_ipv4_gtpu_ipv4_tcp, IAVF_FDIR_INSET_GTPU_IPV4_TCP, IAVF_INSET_NONE},
153 {iavf_pattern_eth_ipv4_gtpu_ipv6, IAVF_FDIR_INSET_GTPU_IPV6, IAVF_INSET_NONE},
154 {iavf_pattern_eth_ipv4_gtpu_ipv6_udp, IAVF_FDIR_INSET_GTPU_IPV6_UDP, IAVF_INSET_NONE},
155 {iavf_pattern_eth_ipv4_gtpu_ipv6_tcp, IAVF_FDIR_INSET_GTPU_IPV6_TCP, IAVF_INSET_NONE},
156 {iavf_pattern_eth_ipv4_gtpu_eh, IAVF_FDIR_INSET_IPV4_GTPU_EH, IAVF_INSET_NONE},
157 {iavf_pattern_eth_ipv4_gtpu_eh_ipv4, IAVF_FDIR_INSET_GTPU_IPV4, IAVF_INSET_NONE},
158 {iavf_pattern_eth_ipv4_gtpu_eh_ipv4_udp, IAVF_FDIR_INSET_GTPU_IPV4_UDP, IAVF_INSET_NONE},
159 {iavf_pattern_eth_ipv4_gtpu_eh_ipv4_tcp, IAVF_FDIR_INSET_GTPU_IPV4_TCP, IAVF_INSET_NONE},
160 {iavf_pattern_eth_ipv4_gtpu_eh_ipv6, IAVF_FDIR_INSET_GTPU_IPV6, IAVF_INSET_NONE},
161 {iavf_pattern_eth_ipv4_gtpu_eh_ipv6_udp, IAVF_FDIR_INSET_GTPU_IPV6_UDP, IAVF_INSET_NONE},
162 {iavf_pattern_eth_ipv4_gtpu_eh_ipv6_tcp, IAVF_FDIR_INSET_GTPU_IPV6_TCP, IAVF_INSET_NONE},
163 {iavf_pattern_eth_ipv6_gtpu, IAVF_FDIR_INSET_IPV6_GTPU, IAVF_INSET_NONE},
164 {iavf_pattern_eth_ipv6_gtpu_eh, IAVF_FDIR_INSET_IPV6_GTPU_EH, IAVF_INSET_NONE},
165 {iavf_pattern_eth_ipv4_l2tpv3, IAVF_FDIR_INSET_L2TPV3OIP, IAVF_INSET_NONE},
166 {iavf_pattern_eth_ipv6_l2tpv3, IAVF_FDIR_INSET_L2TPV3OIP, IAVF_INSET_NONE},
167 {iavf_pattern_eth_ipv4_esp, IAVF_FDIR_INSET_ESP, IAVF_INSET_NONE},
168 {iavf_pattern_eth_ipv6_esp, IAVF_FDIR_INSET_ESP, IAVF_INSET_NONE},
169 {iavf_pattern_eth_ipv4_ah, IAVF_FDIR_INSET_AH, IAVF_INSET_NONE},
170 {iavf_pattern_eth_ipv6_ah, IAVF_FDIR_INSET_AH, IAVF_INSET_NONE},
171 {iavf_pattern_eth_ipv4_udp_esp, IAVF_FDIR_INSET_IPV4_NATT_ESP, IAVF_INSET_NONE},
172 {iavf_pattern_eth_ipv6_udp_esp, IAVF_FDIR_INSET_IPV6_NATT_ESP, IAVF_INSET_NONE},
173 {iavf_pattern_eth_ipv4_pfcp, IAVF_FDIR_INSET_PFCP, IAVF_INSET_NONE},
174 {iavf_pattern_eth_ipv6_pfcp, IAVF_FDIR_INSET_PFCP, IAVF_INSET_NONE},
175 {iavf_pattern_eth_ecpri, IAVF_FDIR_INSET_ECPRI, IAVF_INSET_NONE},
176 {iavf_pattern_eth_ipv4_ecpri, IAVF_FDIR_INSET_ECPRI, IAVF_INSET_NONE},
179 static struct iavf_flow_parser iavf_fdir_parser;
182 iavf_fdir_init(struct iavf_adapter *ad)
184 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(ad);
185 struct iavf_flow_parser *parser;
190 if (vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_FDIR_PF)
191 parser = &iavf_fdir_parser;
195 return iavf_register_parser(parser, ad);
199 iavf_fdir_uninit(struct iavf_adapter *ad)
201 iavf_unregister_parser(&iavf_fdir_parser, ad);
205 iavf_fdir_create(struct iavf_adapter *ad,
206 struct rte_flow *flow,
208 struct rte_flow_error *error)
210 struct iavf_fdir_conf *filter = meta;
211 struct iavf_fdir_conf *rule;
214 rule = rte_zmalloc("fdir_entry", sizeof(*rule), 0);
216 rte_flow_error_set(error, ENOMEM,
217 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
218 "Failed to allocate memory for fdir rule");
222 ret = iavf_fdir_add(ad, filter);
224 rte_flow_error_set(error, -ret,
225 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
226 "Failed to add filter rule.");
230 if (filter->mark_flag == 1)
231 iavf_fdir_rx_proc_enable(ad, 1);
233 rte_memcpy(rule, filter, sizeof(*rule));
244 iavf_fdir_destroy(struct iavf_adapter *ad,
245 struct rte_flow *flow,
246 struct rte_flow_error *error)
248 struct iavf_fdir_conf *filter;
251 filter = (struct iavf_fdir_conf *)flow->rule;
253 ret = iavf_fdir_del(ad, filter);
255 rte_flow_error_set(error, -ret,
256 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
257 "Failed to delete filter rule.");
261 if (filter->mark_flag == 1)
262 iavf_fdir_rx_proc_enable(ad, 0);
271 iavf_fdir_validation(struct iavf_adapter *ad,
272 __rte_unused struct rte_flow *flow,
274 struct rte_flow_error *error)
276 struct iavf_fdir_conf *filter = meta;
279 ret = iavf_fdir_check(ad, filter);
281 rte_flow_error_set(error, -ret,
282 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
283 "Failed to validate filter rule.");
290 static struct iavf_flow_engine iavf_fdir_engine = {
291 .init = iavf_fdir_init,
292 .uninit = iavf_fdir_uninit,
293 .create = iavf_fdir_create,
294 .destroy = iavf_fdir_destroy,
295 .validation = iavf_fdir_validation,
296 .type = IAVF_FLOW_ENGINE_FDIR,
300 iavf_fdir_parse_action_qregion(struct iavf_adapter *ad,
301 struct rte_flow_error *error,
302 const struct rte_flow_action *act,
303 struct virtchnl_filter_action *filter_action)
305 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(ad);
306 const struct rte_flow_action_rss *rss = act->conf;
309 if (act->type != RTE_FLOW_ACTION_TYPE_RSS) {
310 rte_flow_error_set(error, EINVAL,
311 RTE_FLOW_ERROR_TYPE_ACTION, act,
316 if (rss->queue_num <= 1) {
317 rte_flow_error_set(error, EINVAL,
318 RTE_FLOW_ERROR_TYPE_ACTION, act,
319 "Queue region size can't be 0 or 1.");
323 /* check if queue index for queue region is continuous */
324 for (i = 0; i < rss->queue_num - 1; i++) {
325 if (rss->queue[i + 1] != rss->queue[i] + 1) {
326 rte_flow_error_set(error, EINVAL,
327 RTE_FLOW_ERROR_TYPE_ACTION, act,
328 "Discontinuous queue region");
333 if (rss->queue[rss->queue_num - 1] >= ad->eth_dev->data->nb_rx_queues) {
334 rte_flow_error_set(error, EINVAL,
335 RTE_FLOW_ERROR_TYPE_ACTION, act,
336 "Invalid queue region indexes.");
340 if (!(rte_is_power_of_2(rss->queue_num) &&
341 rss->queue_num <= IAVF_FDIR_MAX_QREGION_SIZE)) {
342 rte_flow_error_set(error, EINVAL,
343 RTE_FLOW_ERROR_TYPE_ACTION, act,
344 "The region size should be any of the following values:"
345 "1, 2, 4, 8, 16, 32, 64, 128 as long as the total number "
346 "of queues do not exceed the VSI allocation.");
350 if (rss->queue_num > vf->max_rss_qregion) {
351 rte_flow_error_set(error, EINVAL,
352 RTE_FLOW_ERROR_TYPE_ACTION, act,
353 "The region size cannot be large than the supported max RSS queue region");
357 filter_action->act_conf.queue.index = rss->queue[0];
358 filter_action->act_conf.queue.region = rte_fls_u32(rss->queue_num) - 1;
364 iavf_fdir_parse_action(struct iavf_adapter *ad,
365 const struct rte_flow_action actions[],
366 struct rte_flow_error *error,
367 struct iavf_fdir_conf *filter)
369 const struct rte_flow_action_queue *act_q;
370 const struct rte_flow_action_mark *mark_spec = NULL;
371 uint32_t dest_num = 0;
372 uint32_t mark_num = 0;
376 struct virtchnl_filter_action *filter_action;
378 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
379 switch (actions->type) {
380 case RTE_FLOW_ACTION_TYPE_VOID:
383 case RTE_FLOW_ACTION_TYPE_PASSTHRU:
386 filter_action = &filter->add_fltr.rule_cfg.action_set.actions[number];
388 filter_action->type = VIRTCHNL_ACTION_PASSTHRU;
390 filter->add_fltr.rule_cfg.action_set.count = ++number;
393 case RTE_FLOW_ACTION_TYPE_DROP:
396 filter_action = &filter->add_fltr.rule_cfg.action_set.actions[number];
398 filter_action->type = VIRTCHNL_ACTION_DROP;
400 filter->add_fltr.rule_cfg.action_set.count = ++number;
403 case RTE_FLOW_ACTION_TYPE_QUEUE:
406 act_q = actions->conf;
407 filter_action = &filter->add_fltr.rule_cfg.action_set.actions[number];
409 filter_action->type = VIRTCHNL_ACTION_QUEUE;
410 filter_action->act_conf.queue.index = act_q->index;
412 if (filter_action->act_conf.queue.index >=
413 ad->eth_dev->data->nb_rx_queues) {
414 rte_flow_error_set(error, EINVAL,
415 RTE_FLOW_ERROR_TYPE_ACTION,
416 actions, "Invalid queue for FDIR.");
420 filter->add_fltr.rule_cfg.action_set.count = ++number;
423 case RTE_FLOW_ACTION_TYPE_RSS:
426 filter_action = &filter->add_fltr.rule_cfg.action_set.actions[number];
428 filter_action->type = VIRTCHNL_ACTION_Q_REGION;
430 ret = iavf_fdir_parse_action_qregion(ad,
431 error, actions, filter_action);
435 filter->add_fltr.rule_cfg.action_set.count = ++number;
438 case RTE_FLOW_ACTION_TYPE_MARK:
441 filter->mark_flag = 1;
442 mark_spec = actions->conf;
443 filter_action = &filter->add_fltr.rule_cfg.action_set.actions[number];
445 filter_action->type = VIRTCHNL_ACTION_MARK;
446 filter_action->act_conf.mark_id = mark_spec->id;
448 filter->add_fltr.rule_cfg.action_set.count = ++number;
452 rte_flow_error_set(error, EINVAL,
453 RTE_FLOW_ERROR_TYPE_ACTION, actions,
459 if (number > VIRTCHNL_MAX_NUM_ACTIONS) {
460 rte_flow_error_set(error, EINVAL,
461 RTE_FLOW_ERROR_TYPE_ACTION, actions,
462 "Action numbers exceed the maximum value");
467 rte_flow_error_set(error, EINVAL,
468 RTE_FLOW_ERROR_TYPE_ACTION, actions,
469 "Unsupported action combination");
474 rte_flow_error_set(error, EINVAL,
475 RTE_FLOW_ERROR_TYPE_ACTION, actions,
476 "Too many mark actions");
480 if (dest_num + mark_num == 0) {
481 rte_flow_error_set(error, EINVAL,
482 RTE_FLOW_ERROR_TYPE_ACTION, actions,
487 /* Mark only is equal to mark + passthru. */
489 filter_action = &filter->add_fltr.rule_cfg.action_set.actions[number];
490 filter_action->type = VIRTCHNL_ACTION_PASSTHRU;
491 filter->add_fltr.rule_cfg.action_set.count = ++number;
498 iavf_fdir_refine_input_set(const uint64_t input_set,
499 const uint64_t input_set_mask,
500 struct iavf_fdir_conf *filter)
502 struct virtchnl_proto_hdr *hdr, *hdr_last;
503 struct rte_flow_item_ipv4 ipv4_spec;
504 struct rte_flow_item_ipv6 ipv6_spec;
508 if (input_set & ~input_set_mask)
513 last_layer = filter->add_fltr.rule_cfg.proto_hdrs.count - 1;
514 /* Last layer of TCP/UDP pattern isn't less than 2. */
517 hdr_last = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[last_layer];
518 if (hdr_last->type == VIRTCHNL_PROTO_HDR_TCP)
520 else if (hdr_last->type == VIRTCHNL_PROTO_HDR_UDP)
525 hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[last_layer - 1];
527 case VIRTCHNL_PROTO_HDR_IPV4:
528 VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, IPV4, PROT);
529 memset(&ipv4_spec, 0, sizeof(ipv4_spec));
530 ipv4_spec.hdr.next_proto_id = proto_id;
531 rte_memcpy(hdr->buffer, &ipv4_spec.hdr,
532 sizeof(ipv4_spec.hdr));
534 case VIRTCHNL_PROTO_HDR_IPV6:
535 VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, IPV6, PROT);
536 memset(&ipv6_spec, 0, sizeof(ipv6_spec));
537 ipv6_spec.hdr.proto = proto_id;
538 rte_memcpy(hdr->buffer, &ipv6_spec.hdr,
539 sizeof(ipv6_spec.hdr));
547 iavf_fdir_parse_pattern(__rte_unused struct iavf_adapter *ad,
548 const struct rte_flow_item pattern[],
549 const uint64_t input_set_mask,
550 struct rte_flow_error *error,
551 struct iavf_fdir_conf *filter)
553 const struct rte_flow_item *item = pattern;
554 enum rte_flow_item_type item_type;
555 enum rte_flow_item_type l3 = RTE_FLOW_ITEM_TYPE_END;
556 const struct rte_flow_item_eth *eth_spec, *eth_mask;
557 const struct rte_flow_item_ipv4 *ipv4_spec, *ipv4_mask;
558 const struct rte_flow_item_ipv6 *ipv6_spec, *ipv6_mask;
559 const struct rte_flow_item_udp *udp_spec, *udp_mask;
560 const struct rte_flow_item_tcp *tcp_spec, *tcp_mask;
561 const struct rte_flow_item_sctp *sctp_spec, *sctp_mask;
562 const struct rte_flow_item_gtp *gtp_spec, *gtp_mask;
563 const struct rte_flow_item_gtp_psc *gtp_psc_spec, *gtp_psc_mask;
564 const struct rte_flow_item_l2tpv3oip *l2tpv3oip_spec, *l2tpv3oip_mask;
565 const struct rte_flow_item_esp *esp_spec, *esp_mask;
566 const struct rte_flow_item_ah *ah_spec, *ah_mask;
567 const struct rte_flow_item_pfcp *pfcp_spec, *pfcp_mask;
568 const struct rte_flow_item_ecpri *ecpri_spec, *ecpri_mask;
569 struct rte_ecpri_common_hdr ecpri_common;
570 uint64_t input_set = IAVF_INSET_NONE;
572 enum rte_flow_item_type next_type;
577 struct virtchnl_proto_hdr *hdr;
579 uint8_t ipv6_addr_mask[16] = {
580 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
581 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF
584 for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
586 rte_flow_error_set(error, EINVAL,
587 RTE_FLOW_ERROR_TYPE_ITEM, item,
588 "Not support range");
591 item_type = item->type;
594 case RTE_FLOW_ITEM_TYPE_ETH:
595 eth_spec = item->spec;
596 eth_mask = item->mask;
597 next_type = (item + 1)->type;
599 hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
601 VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, ETH);
603 if (next_type == RTE_FLOW_ITEM_TYPE_END &&
604 (!eth_spec || !eth_mask)) {
605 rte_flow_error_set(error, EINVAL,
606 RTE_FLOW_ERROR_TYPE_ITEM,
607 item, "NULL eth spec/mask.");
611 if (eth_spec && eth_mask) {
612 if (!rte_is_zero_ether_addr(ð_mask->src) ||
613 !rte_is_zero_ether_addr(ð_mask->dst)) {
614 rte_flow_error_set(error, EINVAL,
615 RTE_FLOW_ERROR_TYPE_ITEM, item,
616 "Invalid MAC_addr mask.");
621 if (eth_spec && eth_mask && eth_mask->type) {
622 if (eth_mask->type != RTE_BE16(0xffff)) {
623 rte_flow_error_set(error, EINVAL,
624 RTE_FLOW_ERROR_TYPE_ITEM,
625 item, "Invalid type mask.");
629 ether_type = rte_be_to_cpu_16(eth_spec->type);
630 if (ether_type == RTE_ETHER_TYPE_IPV4 ||
631 ether_type == RTE_ETHER_TYPE_IPV6) {
632 rte_flow_error_set(error, EINVAL,
633 RTE_FLOW_ERROR_TYPE_ITEM,
635 "Unsupported ether_type.");
639 input_set |= IAVF_INSET_ETHERTYPE;
640 VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, ETH, ETHERTYPE);
642 rte_memcpy(hdr->buffer,
643 eth_spec, sizeof(struct rte_ether_hdr));
646 filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
649 case RTE_FLOW_ITEM_TYPE_IPV4:
650 l3 = RTE_FLOW_ITEM_TYPE_IPV4;
651 ipv4_spec = item->spec;
652 ipv4_mask = item->mask;
654 hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
656 VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, IPV4);
658 if (ipv4_spec && ipv4_mask) {
659 if (ipv4_mask->hdr.version_ihl ||
660 ipv4_mask->hdr.total_length ||
661 ipv4_mask->hdr.packet_id ||
662 ipv4_mask->hdr.fragment_offset ||
663 ipv4_mask->hdr.hdr_checksum) {
664 rte_flow_error_set(error, EINVAL,
665 RTE_FLOW_ERROR_TYPE_ITEM,
666 item, "Invalid IPv4 mask.");
670 if (ipv4_mask->hdr.type_of_service ==
672 input_set |= IAVF_INSET_IPV4_TOS;
673 VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, IPV4, DSCP);
675 if (ipv4_mask->hdr.next_proto_id == UINT8_MAX) {
676 input_set |= IAVF_INSET_IPV4_PROTO;
677 VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, IPV4, PROT);
679 if (ipv4_mask->hdr.time_to_live == UINT8_MAX) {
680 input_set |= IAVF_INSET_IPV4_TTL;
681 VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, IPV4, TTL);
683 if (ipv4_mask->hdr.src_addr == UINT32_MAX) {
684 input_set |= IAVF_INSET_IPV4_SRC;
685 VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, IPV4, SRC);
687 if (ipv4_mask->hdr.dst_addr == UINT32_MAX) {
688 input_set |= IAVF_INSET_IPV4_DST;
689 VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, IPV4, DST);
693 input_set &= ~IAVF_PROT_IPV4_OUTER;
694 input_set |= IAVF_PROT_IPV4_INNER;
697 rte_memcpy(hdr->buffer,
699 sizeof(ipv4_spec->hdr));
702 filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
705 case RTE_FLOW_ITEM_TYPE_IPV6:
706 l3 = RTE_FLOW_ITEM_TYPE_IPV6;
707 ipv6_spec = item->spec;
708 ipv6_mask = item->mask;
710 hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
712 VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, IPV6);
714 if (ipv6_spec && ipv6_mask) {
715 if (ipv6_mask->hdr.payload_len) {
716 rte_flow_error_set(error, EINVAL,
717 RTE_FLOW_ERROR_TYPE_ITEM,
718 item, "Invalid IPv6 mask");
722 if ((ipv6_mask->hdr.vtc_flow &
723 rte_cpu_to_be_32(IAVF_IPV6_TC_MASK))
724 == rte_cpu_to_be_32(IAVF_IPV6_TC_MASK)) {
725 input_set |= IAVF_INSET_IPV6_TC;
726 VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, IPV6, TC);
728 if (ipv6_mask->hdr.proto == UINT8_MAX) {
729 input_set |= IAVF_INSET_IPV6_NEXT_HDR;
730 VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, IPV6, PROT);
732 if (ipv6_mask->hdr.hop_limits == UINT8_MAX) {
733 input_set |= IAVF_INSET_IPV6_HOP_LIMIT;
734 VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, IPV6, HOP_LIMIT);
736 if (!memcmp(ipv6_mask->hdr.src_addr,
738 RTE_DIM(ipv6_mask->hdr.src_addr))) {
739 input_set |= IAVF_INSET_IPV6_SRC;
740 VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, IPV6, SRC);
742 if (!memcmp(ipv6_mask->hdr.dst_addr,
744 RTE_DIM(ipv6_mask->hdr.dst_addr))) {
745 input_set |= IAVF_INSET_IPV6_DST;
746 VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, IPV6, DST);
750 input_set &= ~IAVF_PROT_IPV6_OUTER;
751 input_set |= IAVF_PROT_IPV6_INNER;
754 rte_memcpy(hdr->buffer,
756 sizeof(ipv6_spec->hdr));
759 filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
762 case RTE_FLOW_ITEM_TYPE_UDP:
763 udp_spec = item->spec;
764 udp_mask = item->mask;
766 hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
768 VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, UDP);
770 if (udp_spec && udp_mask) {
771 if (udp_mask->hdr.dgram_len ||
772 udp_mask->hdr.dgram_cksum) {
773 rte_flow_error_set(error, EINVAL,
774 RTE_FLOW_ERROR_TYPE_ITEM, item,
779 if (udp_mask->hdr.src_port == UINT16_MAX) {
780 input_set |= IAVF_INSET_UDP_SRC_PORT;
781 VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, UDP, SRC_PORT);
783 if (udp_mask->hdr.dst_port == UINT16_MAX) {
784 input_set |= IAVF_INSET_UDP_DST_PORT;
785 VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, UDP, DST_PORT);
789 input_set &= ~IAVF_PROT_UDP_OUTER;
790 input_set |= IAVF_PROT_UDP_INNER;
793 if (l3 == RTE_FLOW_ITEM_TYPE_IPV4)
794 rte_memcpy(hdr->buffer,
796 sizeof(udp_spec->hdr));
797 else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6)
798 rte_memcpy(hdr->buffer,
800 sizeof(udp_spec->hdr));
803 filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
806 case RTE_FLOW_ITEM_TYPE_TCP:
807 tcp_spec = item->spec;
808 tcp_mask = item->mask;
810 hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
812 VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, TCP);
814 if (tcp_spec && tcp_mask) {
815 if (tcp_mask->hdr.sent_seq ||
816 tcp_mask->hdr.recv_ack ||
817 tcp_mask->hdr.data_off ||
818 tcp_mask->hdr.tcp_flags ||
819 tcp_mask->hdr.rx_win ||
820 tcp_mask->hdr.cksum ||
821 tcp_mask->hdr.tcp_urp) {
822 rte_flow_error_set(error, EINVAL,
823 RTE_FLOW_ERROR_TYPE_ITEM, item,
828 if (tcp_mask->hdr.src_port == UINT16_MAX) {
829 input_set |= IAVF_INSET_TCP_SRC_PORT;
830 VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, TCP, SRC_PORT);
832 if (tcp_mask->hdr.dst_port == UINT16_MAX) {
833 input_set |= IAVF_INSET_TCP_DST_PORT;
834 VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, TCP, DST_PORT);
838 input_set &= ~IAVF_PROT_TCP_OUTER;
839 input_set |= IAVF_PROT_TCP_INNER;
842 if (l3 == RTE_FLOW_ITEM_TYPE_IPV4)
843 rte_memcpy(hdr->buffer,
845 sizeof(tcp_spec->hdr));
846 else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6)
847 rte_memcpy(hdr->buffer,
849 sizeof(tcp_spec->hdr));
852 filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
855 case RTE_FLOW_ITEM_TYPE_SCTP:
856 sctp_spec = item->spec;
857 sctp_mask = item->mask;
859 hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
861 VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, SCTP);
863 if (sctp_spec && sctp_mask) {
864 if (sctp_mask->hdr.cksum) {
865 rte_flow_error_set(error, EINVAL,
866 RTE_FLOW_ERROR_TYPE_ITEM, item,
871 if (sctp_mask->hdr.src_port == UINT16_MAX) {
872 input_set |= IAVF_INSET_SCTP_SRC_PORT;
873 VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, SCTP, SRC_PORT);
875 if (sctp_mask->hdr.dst_port == UINT16_MAX) {
876 input_set |= IAVF_INSET_SCTP_DST_PORT;
877 VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, SCTP, DST_PORT);
880 if (l3 == RTE_FLOW_ITEM_TYPE_IPV4)
881 rte_memcpy(hdr->buffer,
883 sizeof(sctp_spec->hdr));
884 else if (l3 == RTE_FLOW_ITEM_TYPE_IPV6)
885 rte_memcpy(hdr->buffer,
887 sizeof(sctp_spec->hdr));
890 filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
893 case RTE_FLOW_ITEM_TYPE_GTPU:
894 gtp_spec = item->spec;
895 gtp_mask = item->mask;
897 hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
899 VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, GTPU_IP);
901 if (gtp_spec && gtp_mask) {
902 if (gtp_mask->v_pt_rsv_flags ||
903 gtp_mask->msg_type ||
905 rte_flow_error_set(error, EINVAL,
906 RTE_FLOW_ERROR_TYPE_ITEM,
907 item, "Invalid GTP mask");
911 if (gtp_mask->teid == UINT32_MAX) {
912 input_set |= IAVF_INSET_GTPU_TEID;
913 VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, GTPU_IP, TEID);
916 rte_memcpy(hdr->buffer,
917 gtp_spec, sizeof(*gtp_spec));
922 filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
925 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
926 gtp_psc_spec = item->spec;
927 gtp_psc_mask = item->mask;
929 hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
932 VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, GTPU_EH);
933 else if ((gtp_psc_mask->qfi) && !(gtp_psc_mask->pdu_type))
934 VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, GTPU_EH);
935 else if (gtp_psc_spec->pdu_type == IAVF_GTPU_EH_UPLINK)
936 VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, GTPU_EH_PDU_UP);
937 else if (gtp_psc_spec->pdu_type == IAVF_GTPU_EH_DWLINK)
938 VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, GTPU_EH_PDU_DWN);
940 if (gtp_psc_spec && gtp_psc_mask) {
941 if (gtp_psc_mask->qfi == UINT8_MAX) {
942 input_set |= IAVF_INSET_GTPU_QFI;
943 VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, GTPU_EH, QFI);
946 rte_memcpy(hdr->buffer, gtp_psc_spec,
947 sizeof(*gtp_psc_spec));
950 filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
953 case RTE_FLOW_ITEM_TYPE_L2TPV3OIP:
954 l2tpv3oip_spec = item->spec;
955 l2tpv3oip_mask = item->mask;
957 hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
959 VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, L2TPV3);
961 if (l2tpv3oip_spec && l2tpv3oip_mask) {
962 if (l2tpv3oip_mask->session_id == UINT32_MAX) {
963 input_set |= IAVF_L2TPV3OIP_SESSION_ID;
964 VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, L2TPV3, SESS_ID);
967 rte_memcpy(hdr->buffer, l2tpv3oip_spec,
968 sizeof(*l2tpv3oip_spec));
971 filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
974 case RTE_FLOW_ITEM_TYPE_ESP:
975 esp_spec = item->spec;
976 esp_mask = item->mask;
978 hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
980 VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, ESP);
982 if (esp_spec && esp_mask) {
983 if (esp_mask->hdr.spi == UINT32_MAX) {
984 input_set |= IAVF_INSET_ESP_SPI;
985 VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, ESP, SPI);
988 rte_memcpy(hdr->buffer, &esp_spec->hdr,
989 sizeof(esp_spec->hdr));
992 filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
995 case RTE_FLOW_ITEM_TYPE_AH:
996 ah_spec = item->spec;
997 ah_mask = item->mask;
999 hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
1001 VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, AH);
1003 if (ah_spec && ah_mask) {
1004 if (ah_mask->spi == UINT32_MAX) {
1005 input_set |= IAVF_INSET_AH_SPI;
1006 VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, AH, SPI);
1009 rte_memcpy(hdr->buffer, ah_spec,
1013 filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
1016 case RTE_FLOW_ITEM_TYPE_PFCP:
1017 pfcp_spec = item->spec;
1018 pfcp_mask = item->mask;
1020 hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
1022 VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, PFCP);
1024 if (pfcp_spec && pfcp_mask) {
1025 if (pfcp_mask->s_field == UINT8_MAX) {
1026 input_set |= IAVF_INSET_PFCP_S_FIELD;
1027 VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, PFCP, S_FIELD);
1030 rte_memcpy(hdr->buffer, pfcp_spec,
1031 sizeof(*pfcp_spec));
1034 filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
1037 case RTE_FLOW_ITEM_TYPE_ECPRI:
1038 ecpri_spec = item->spec;
1039 ecpri_mask = item->mask;
1041 ecpri_common.u32 = rte_be_to_cpu_32(ecpri_spec->hdr.common.u32);
1043 hdr = &filter->add_fltr.rule_cfg.proto_hdrs.proto_hdr[layer];
1045 VIRTCHNL_SET_PROTO_HDR_TYPE(hdr, ECPRI);
1047 if (ecpri_spec && ecpri_mask) {
1048 if (ecpri_common.type == RTE_ECPRI_MSG_TYPE_IQ_DATA &&
1049 ecpri_mask->hdr.type0.pc_id == UINT16_MAX) {
1050 input_set |= IAVF_ECPRI_PC_RTC_ID;
1051 VIRTCHNL_ADD_PROTO_HDR_FIELD_BIT(hdr, ECPRI,
1055 rte_memcpy(hdr->buffer, ecpri_spec,
1056 sizeof(*ecpri_spec));
1059 filter->add_fltr.rule_cfg.proto_hdrs.count = ++layer;
1062 case RTE_FLOW_ITEM_TYPE_VOID:
1066 rte_flow_error_set(error, EINVAL,
1067 RTE_FLOW_ERROR_TYPE_ITEM, item,
1068 "Invalid pattern item.");
1073 if (layer > VIRTCHNL_MAX_NUM_PROTO_HDRS) {
1074 rte_flow_error_set(error, EINVAL,
1075 RTE_FLOW_ERROR_TYPE_ITEM, item,
1076 "Protocol header layers exceed the maximum value");
1080 if (!iavf_fdir_refine_input_set(input_set, input_set_mask, filter)) {
1081 rte_flow_error_set(error, EINVAL,
1082 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, pattern,
1083 "Invalid input set");
1087 filter->input_set = input_set;
1093 iavf_fdir_parse(struct iavf_adapter *ad,
1094 struct iavf_pattern_match_item *array,
1096 const struct rte_flow_item pattern[],
1097 const struct rte_flow_action actions[],
1099 struct rte_flow_error *error)
1101 struct iavf_info *vf = IAVF_DEV_PRIVATE_TO_VF(ad);
1102 struct iavf_fdir_conf *filter = &vf->fdir.conf;
1103 struct iavf_pattern_match_item *item = NULL;
1106 memset(filter, 0, sizeof(*filter));
1108 item = iavf_search_pattern_match_item(pattern, array, array_len, error);
1112 ret = iavf_fdir_parse_pattern(ad, pattern, item->input_set_mask,
1117 ret = iavf_fdir_parse_action(ad, actions, error, filter);
1129 static struct iavf_flow_parser iavf_fdir_parser = {
1130 .engine = &iavf_fdir_engine,
1131 .array = iavf_fdir_pattern,
1132 .array_len = RTE_DIM(iavf_fdir_pattern),
1133 .parse_pattern_action = iavf_fdir_parse,
1134 .stage = IAVF_FLOW_STAGE_DISTRIBUTOR,
1137 RTE_INIT(iavf_fdir_engine_register)
1139 iavf_register_flow_engine(&iavf_fdir_engine);