1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2022 Intel Corporation
11 * AFU PMD specific definitions.
13 * @b EXPERIMENTAL: this API may change, or be removed, without prior notice
23 #define RTE_PMD_AFU_N3000_NLB 1
24 #define RTE_PMD_AFU_N3000_DMA 2
26 #define NLB_MODE_LPBK 0
27 #define NLB_MODE_READ 1
28 #define NLB_MODE_WRITE 2
29 #define NLB_MODE_TRPUT 3
35 #define NLB_VC_RANDOM 4
37 #define NLB_WRLINE_M 0
38 #define NLB_WRLINE_I 1
39 #define NLB_WRPUSH_I 2
41 #define NLB_RDLINE_S 0
42 #define NLB_RDLINE_I 1
43 #define NLB_RDLINE_MIXED 2
45 #define MIN_CACHE_LINES 1
46 #define MAX_CACHE_LINES 1024
48 #define MIN_DMA_BUF_SIZE 64
49 #define MAX_DMA_BUF_SIZE (1023 * 1024)
52 * NLB AFU configuration data structure.
54 struct rte_pmd_afu_nlb_cfg {
61 uint32_t cache_policy;
70 * DMA AFU configuration data structure.
72 struct rte_pmd_afu_dma_cfg {
73 uint32_t index; /* index of DMA controller */
74 uint32_t length; /* total length of data to DMA */
75 uint32_t offset; /* address offset of target memory */
76 uint32_t size; /* size of transfer buffer */
77 uint32_t pattern; /* data pattern to fill in test buffer */
78 uint32_t unaligned; /* use unaligned address or length in sweep test */
79 uint32_t verbose; /* enable verbose error information in test */
83 * N3000 AFU configuration data structure.
85 struct rte_pmd_afu_n3000_cfg {
86 int type; /* RTE_PMD_AFU_N3000_NLB or RTE_PMD_AFU_N3000_DMA */
88 struct rte_pmd_afu_nlb_cfg nlb_cfg;
89 struct rte_pmd_afu_dma_cfg dma_cfg;
94 * HE-LPBK & HE-MEM-LPBK AFU configuration data structure.
96 struct rte_pmd_afu_he_lpbk_cfg {
103 uint32_t trput_interleave;
108 * HE-MEM-TG AFU configuration data structure.
110 struct rte_pmd_afu_he_mem_tg_cfg {
111 uint32_t channel_mask; /* mask of traffic generator channel */
114 #define NUM_RND_SEEDS 3
117 * HE-HSSI AFU configuration data structure.
119 struct rte_pmd_afu_he_hssi_cfg {
122 uint32_t num_packets;
123 uint32_t random_length;
124 uint32_t packet_length;
125 uint32_t random_payload;
126 uint32_t rnd_seed[NUM_RND_SEEDS];
136 #endif /* RTE_PMD_AFU_H */