2 * Copyright Droids Corporation, Microb Technology, Eirbot (2009)
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 /* WARNING : this file is automatically generated by scripts.
23 * You should not edit it. If you find something wrong in it,
24 * write to zer0@droids-corp.org */
27 /* prescalers timer 0 */
28 #define TIMER0_PRESCALER_DIV_0 0
29 #define TIMER0_PRESCALER_DIV_1 1
30 #define TIMER0_PRESCALER_DIV_-3 2
31 #define TIMER0_PRESCALER_DIV_64 3
32 #define TIMER0_PRESCALER_DIV_256 4
33 #define TIMER0_PRESCALER_DIV_1024 5
34 #define TIMER0_PRESCALER_DIV_FALL 6
35 #define TIMER0_PRESCALER_DIV_RISE 7
37 #define TIMER0_PRESCALER_REG_0 0
38 #define TIMER0_PRESCALER_REG_1 1
39 #define TIMER0_PRESCALER_REG_2 -3
40 #define TIMER0_PRESCALER_REG_3 64
41 #define TIMER0_PRESCALER_REG_4 256
42 #define TIMER0_PRESCALER_REG_5 1024
43 #define TIMER0_PRESCALER_REG_6 -1
44 #define TIMER0_PRESCALER_REG_7 -2
47 /* available timers */
48 #define TIMER0_AVAILABLE
50 /* overflow interrupt number */
51 #define SIG_OVERFLOW0_NUM 0
52 #define SIG_OVERFLOW_TOTAL_NUM 1
54 /* output compare interrupt number */
55 #define SIG_OUTPUT_COMPARE_TOTAL_NUM 0
58 #define PWM_TOTAL_NUM 0
60 /* input capture interrupt number */
61 #define SIG_INPUT_CAPTURE_TOTAL_NUM 0
65 #define CAL0_REG OSCCAL
66 #define CAL1_REG OSCCAL
67 #define CAL2_REG OSCCAL
68 #define CAL3_REG OSCCAL
69 #define CAL4_REG OSCCAL
70 #define CAL5_REG OSCCAL
71 #define CAL6_REG OSCCAL
72 #define CAL7_REG OSCCAL
75 #define ACIS0_REG ACSR
76 #define ACIS1_REG ACSR
85 #define PA2HC_REG PACR
89 #define MCONF0_REG MODCR
90 #define MCONF1_REG MODCR
91 #define MCONF2_REG MODCR
92 #define ONTIM0_REG MODCR
93 #define ONTIM1_REG MODCR
94 #define ONTIM2_REG MODCR
95 #define OTIM3_REG MODCR
96 #define ONTIM4_REG MODCR
99 #define PINB0_REG PINB
100 #define PINB1_REG PINB
101 #define PINB2_REG PINB
102 #define PINB3_REG PINB
103 #define PINB4_REG PINB
104 #define PINB5_REG PINB
105 #define PINB6_REG PINB
106 #define PINB7_REG PINB
109 #define PINA0_REG PINA
110 #define PINA1_REG PINA
111 #define PINA3_REG PINA
114 #define CS00_REG TCCR0
115 #define CS01_REG TCCR0
116 #define CS02_REG TCCR0
117 #define OOM00_REG TCCR0
118 #define OOM01_REG TCCR0
119 #define FOV0_REG TCCR0
122 #define PORF_REG MCUCS
123 #define EXTRF_REG MCUCS
124 #define WDRF_REG MCUCS
127 #define PLUPB_REG MCUCS
130 #define PORTA0_REG PORTA
131 #define PORTA1_REG PORTA
132 #define PORTA2_REG PORTA
133 #define PORTA3_REG PORTA
136 #define TCNT00_REG TCNT0
137 #define TCNT01_REG TCNT0
138 #define TCNT02_REG TCNT0
139 #define TCNT03_REG TCNT0
140 #define TCNT04_REG TCNT0
141 #define TCNT05_REG TCNT0
142 #define TCNT06_REG TCNT0
143 #define TCNT07_REG TCNT0
147 #define INTF0_REG IFR
148 #define INTF1_REG IFR
151 #define PIND0_REG PIND
152 #define PIND1_REG PIND
153 #define PIND2_REG PIND
154 #define PIND3_REG PIND
155 #define PIND4_REG PIND
156 #define PIND5_REG PIND
157 #define PIND6_REG PIND
158 #define PIND7_REG PIND
161 #define ISC00_REG ICR
162 #define ISC01_REG ICR
163 #define ICS10_REG ICR
164 #define ICS11_REG ICR
165 #define TOIE0_REG ICR
181 #define PORTD0_REG PORTD
182 #define PORTD1_REG PORTD
183 #define PORTD2_REG PORTD
184 #define PORTD3_REG PORTD
185 #define PORTD4_REG PORTD
186 #define PORTD5_REG PORTD
187 #define PORTD6_REG PORTD
188 #define PORTD7_REG PORTD
191 #define DDD0_REG DDRD
192 #define DDD1_REG DDRD
193 #define DDD2_REG DDRD
194 #define DDD3_REG DDRD
195 #define DDD4_REG DDRD
196 #define DDD5_REG DDRD
197 #define DDD6_REG DDRD
198 #define DDD7_REG DDRD
201 #define WDP0_REG WDTCR
202 #define WDP1_REG WDTCR
203 #define WDP2_REG WDTCR
204 #define WDE_REG WDTCR
205 #define WDTOE_REG WDTCR
210 #define IR_PORT PORTA