1 /*******************************************************************************
3 Copyright (c) 2001-2015, Intel Corporation
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
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32 ***************************************************************************/
34 #include "ixgbe_api.h"
35 #include "ixgbe_common.h"
37 #define IXGBE_EMPTY_PARAM
39 static const u32 ixgbe_mvals_base[IXGBE_MVALS_IDX_LIMIT] = {
40 IXGBE_MVALS_INIT(IXGBE_EMPTY_PARAM)
43 static const u32 ixgbe_mvals_X540[IXGBE_MVALS_IDX_LIMIT] = {
44 IXGBE_MVALS_INIT(_X540)
47 static const u32 ixgbe_mvals_X550[IXGBE_MVALS_IDX_LIMIT] = {
48 IXGBE_MVALS_INIT(_X550)
51 static const u32 ixgbe_mvals_X550EM_x[IXGBE_MVALS_IDX_LIMIT] = {
52 IXGBE_MVALS_INIT(_X550EM_x)
56 * ixgbe_dcb_get_rtrup2tc - read rtrup2tc reg
57 * @hw: pointer to hardware structure
58 * @map: pointer to u8 arr for returning map
60 * Read the rtrup2tc HW register and resolve its content into map
62 void ixgbe_dcb_get_rtrup2tc(struct ixgbe_hw *hw, u8 *map)
64 if (hw->mac.ops.get_rtrup2tc)
65 hw->mac.ops.get_rtrup2tc(hw, map);
69 * ixgbe_init_shared_code - Initialize the shared code
70 * @hw: pointer to hardware structure
72 * This will assign function pointers and assign the MAC type and PHY code.
73 * Does not touch the hardware. This function must be called prior to any
74 * other function in the shared code. The ixgbe_hw structure should be
75 * memset to 0 prior to calling this function. The following fields in
76 * hw structure should be filled in prior to calling this function:
77 * hw_addr, back, device_id, vendor_id, subsystem_device_id,
78 * subsystem_vendor_id, and revision_id
80 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw)
84 DEBUGFUNC("ixgbe_init_shared_code");
89 ixgbe_set_mac_type(hw);
91 switch (hw->mac.type) {
92 case ixgbe_mac_82598EB:
93 status = ixgbe_init_ops_82598(hw);
95 case ixgbe_mac_82599EB:
96 status = ixgbe_init_ops_82599(hw);
99 status = ixgbe_init_ops_X540(hw);
102 status = ixgbe_init_ops_X550(hw);
104 case ixgbe_mac_X550EM_x:
105 status = ixgbe_init_ops_X550EM(hw);
107 case ixgbe_mac_82599_vf:
108 case ixgbe_mac_X540_vf:
109 case ixgbe_mac_X550_vf:
110 case ixgbe_mac_X550EM_x_vf:
111 status = ixgbe_init_ops_vf(hw);
114 status = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
117 hw->mac.max_link_up_time = IXGBE_LINK_UP_TIME;
123 * ixgbe_set_mac_type - Sets MAC type
124 * @hw: pointer to the HW structure
126 * This function sets the mac type of the adapter based on the
127 * vendor ID and device ID stored in the hw structure.
129 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw)
131 s32 ret_val = IXGBE_SUCCESS;
133 DEBUGFUNC("ixgbe_set_mac_type\n");
135 if (hw->vendor_id != IXGBE_INTEL_VENDOR_ID) {
136 ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED,
137 "Unsupported vendor id: %x", hw->vendor_id);
138 return IXGBE_ERR_DEVICE_NOT_SUPPORTED;
141 hw->mvals = ixgbe_mvals_base;
143 switch (hw->device_id) {
144 case IXGBE_DEV_ID_82598:
145 case IXGBE_DEV_ID_82598_BX:
146 case IXGBE_DEV_ID_82598AF_SINGLE_PORT:
147 case IXGBE_DEV_ID_82598AF_DUAL_PORT:
148 case IXGBE_DEV_ID_82598AT:
149 case IXGBE_DEV_ID_82598AT2:
150 case IXGBE_DEV_ID_82598EB_CX4:
151 case IXGBE_DEV_ID_82598_CX4_DUAL_PORT:
152 case IXGBE_DEV_ID_82598_DA_DUAL_PORT:
153 case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM:
154 case IXGBE_DEV_ID_82598EB_XF_LR:
155 case IXGBE_DEV_ID_82598EB_SFP_LOM:
156 hw->mac.type = ixgbe_mac_82598EB;
158 case IXGBE_DEV_ID_82599_KX4:
159 case IXGBE_DEV_ID_82599_KX4_MEZZ:
160 case IXGBE_DEV_ID_82599_XAUI_LOM:
161 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
162 case IXGBE_DEV_ID_82599_KR:
163 case IXGBE_DEV_ID_82599_SFP:
164 case IXGBE_DEV_ID_82599_BACKPLANE_FCOE:
165 case IXGBE_DEV_ID_82599_SFP_FCOE:
166 case IXGBE_DEV_ID_82599_SFP_EM:
167 case IXGBE_DEV_ID_82599_SFP_SF2:
168 case IXGBE_DEV_ID_82599_SFP_SF_QP:
169 case IXGBE_DEV_ID_82599_QSFP_SF_QP:
170 case IXGBE_DEV_ID_82599EN_SFP:
171 case IXGBE_DEV_ID_82599_CX4:
172 case IXGBE_DEV_ID_82599_LS:
173 case IXGBE_DEV_ID_82599_T3_LOM:
174 hw->mac.type = ixgbe_mac_82599EB;
176 case IXGBE_DEV_ID_82599_VF:
177 case IXGBE_DEV_ID_82599_VF_HV:
178 hw->mac.type = ixgbe_mac_82599_vf;
180 case IXGBE_DEV_ID_X540_VF:
181 case IXGBE_DEV_ID_X540_VF_HV:
182 hw->mac.type = ixgbe_mac_X540_vf;
183 hw->mvals = ixgbe_mvals_X540;
185 case IXGBE_DEV_ID_X540T:
186 case IXGBE_DEV_ID_X540T1:
187 hw->mac.type = ixgbe_mac_X540;
188 hw->mvals = ixgbe_mvals_X540;
190 case IXGBE_DEV_ID_X550T:
191 hw->mac.type = ixgbe_mac_X550;
192 hw->mvals = ixgbe_mvals_X550;
194 case IXGBE_DEV_ID_X550EM_X_KX4:
195 case IXGBE_DEV_ID_X550EM_X_KR:
196 case IXGBE_DEV_ID_X550EM_X_10G_T:
197 case IXGBE_DEV_ID_X550EM_X_1G_T:
198 case IXGBE_DEV_ID_X550EM_X_SFP:
199 hw->mac.type = ixgbe_mac_X550EM_x;
200 hw->mvals = ixgbe_mvals_X550EM_x;
202 case IXGBE_DEV_ID_X550_VF:
203 case IXGBE_DEV_ID_X550_VF_HV:
204 hw->mac.type = ixgbe_mac_X550_vf;
205 hw->mvals = ixgbe_mvals_X550;
207 case IXGBE_DEV_ID_X550EM_X_VF:
208 case IXGBE_DEV_ID_X550EM_X_VF_HV:
209 hw->mac.type = ixgbe_mac_X550EM_x_vf;
210 hw->mvals = ixgbe_mvals_X550EM_x;
213 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED;
214 ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED,
215 "Unsupported device id: %x",
220 DEBUGOUT2("ixgbe_set_mac_type found mac: %d, returns: %d\n",
221 hw->mac.type, ret_val);
226 * ixgbe_init_hw - Initialize the hardware
227 * @hw: pointer to hardware structure
229 * Initialize the hardware by resetting and then starting the hardware
231 s32 ixgbe_init_hw(struct ixgbe_hw *hw)
233 return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw),
234 IXGBE_NOT_IMPLEMENTED);
238 * ixgbe_reset_hw - Performs a hardware reset
239 * @hw: pointer to hardware structure
241 * Resets the hardware by resetting the transmit and receive units, masks and
242 * clears all interrupts, performs a PHY reset, and performs a MAC reset
244 s32 ixgbe_reset_hw(struct ixgbe_hw *hw)
246 return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw),
247 IXGBE_NOT_IMPLEMENTED);
251 * ixgbe_start_hw - Prepares hardware for Rx/Tx
252 * @hw: pointer to hardware structure
254 * Starts the hardware by filling the bus info structure and media type,
255 * clears all on chip counters, initializes receive address registers,
256 * multicast table, VLAN filter table, calls routine to setup link and
257 * flow control settings, and leaves transmit and receive units disabled
260 s32 ixgbe_start_hw(struct ixgbe_hw *hw)
262 return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw),
263 IXGBE_NOT_IMPLEMENTED);
267 * ixgbe_enable_relaxed_ordering - Enables tx relaxed ordering,
268 * which is disabled by default in ixgbe_start_hw();
270 * @hw: pointer to hardware structure
272 * Enable relaxed ordering;
274 void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw)
276 if (hw->mac.ops.enable_relaxed_ordering)
277 hw->mac.ops.enable_relaxed_ordering(hw);
281 * ixgbe_clear_hw_cntrs - Clear hardware counters
282 * @hw: pointer to hardware structure
284 * Clears all hardware statistics counters by reading them from the hardware
285 * Statistics counters are clear on read.
287 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw)
289 return ixgbe_call_func(hw, hw->mac.ops.clear_hw_cntrs, (hw),
290 IXGBE_NOT_IMPLEMENTED);
294 * ixgbe_get_media_type - Get media type
295 * @hw: pointer to hardware structure
297 * Returns the media type (fiber, copper, backplane)
299 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw)
301 return ixgbe_call_func(hw, hw->mac.ops.get_media_type, (hw),
302 ixgbe_media_type_unknown);
306 * ixgbe_get_mac_addr - Get MAC address
307 * @hw: pointer to hardware structure
308 * @mac_addr: Adapter MAC address
310 * Reads the adapter's MAC address from the first Receive Address Register
311 * (RAR0) A reset of the adapter must have been performed prior to calling
312 * this function in order for the MAC address to have been loaded from the
315 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr)
317 return ixgbe_call_func(hw, hw->mac.ops.get_mac_addr,
318 (hw, mac_addr), IXGBE_NOT_IMPLEMENTED);
322 * ixgbe_get_san_mac_addr - Get SAN MAC address
323 * @hw: pointer to hardware structure
324 * @san_mac_addr: SAN MAC address
326 * Reads the SAN MAC address from the EEPROM, if it's available. This is
327 * per-port, so set_lan_id() must be called before reading the addresses.
329 s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
331 return ixgbe_call_func(hw, hw->mac.ops.get_san_mac_addr,
332 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
336 * ixgbe_set_san_mac_addr - Write a SAN MAC address
337 * @hw: pointer to hardware structure
338 * @san_mac_addr: SAN MAC address
340 * Writes A SAN MAC address to the EEPROM.
342 s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr)
344 return ixgbe_call_func(hw, hw->mac.ops.set_san_mac_addr,
345 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED);
349 * ixgbe_get_device_caps - Get additional device capabilities
350 * @hw: pointer to hardware structure
351 * @device_caps: the EEPROM word for device capabilities
353 * Reads the extra device capabilities from the EEPROM
355 s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps)
357 return ixgbe_call_func(hw, hw->mac.ops.get_device_caps,
358 (hw, device_caps), IXGBE_NOT_IMPLEMENTED);
362 * ixgbe_get_wwn_prefix - Get alternative WWNN/WWPN prefix from the EEPROM
363 * @hw: pointer to hardware structure
364 * @wwnn_prefix: the alternative WWNN prefix
365 * @wwpn_prefix: the alternative WWPN prefix
367 * This function will read the EEPROM from the alternative SAN MAC address
368 * block to check the support for the alternative WWNN/WWPN prefix support.
370 s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix,
373 return ixgbe_call_func(hw, hw->mac.ops.get_wwn_prefix,
374 (hw, wwnn_prefix, wwpn_prefix),
375 IXGBE_NOT_IMPLEMENTED);
379 * ixgbe_get_fcoe_boot_status - Get FCOE boot status from EEPROM
380 * @hw: pointer to hardware structure
381 * @bs: the fcoe boot status
383 * This function will read the FCOE boot status from the iSCSI FCOE block
385 s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs)
387 return ixgbe_call_func(hw, hw->mac.ops.get_fcoe_boot_status,
389 IXGBE_NOT_IMPLEMENTED);
393 * ixgbe_get_bus_info - Set PCI bus info
394 * @hw: pointer to hardware structure
396 * Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure
398 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw)
400 return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw),
401 IXGBE_NOT_IMPLEMENTED);
405 * ixgbe_get_num_of_tx_queues - Get Tx queues
406 * @hw: pointer to hardware structure
408 * Returns the number of transmit queues for the given adapter.
410 u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw)
412 return hw->mac.max_tx_queues;
416 * ixgbe_get_num_of_rx_queues - Get Rx queues
417 * @hw: pointer to hardware structure
419 * Returns the number of receive queues for the given adapter.
421 u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw)
423 return hw->mac.max_rx_queues;
427 * ixgbe_stop_adapter - Disable Rx/Tx units
428 * @hw: pointer to hardware structure
430 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
431 * disables transmit and receive units. The adapter_stopped flag is used by
432 * the shared code and drivers to determine if the adapter is in a stopped
433 * state and should not touch the hardware.
435 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw)
437 return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw),
438 IXGBE_NOT_IMPLEMENTED);
442 * ixgbe_read_pba_string - Reads part number string from EEPROM
443 * @hw: pointer to hardware structure
444 * @pba_num: stores the part number string from the EEPROM
445 * @pba_num_size: part number string buffer length
447 * Reads the part number string from the EEPROM.
449 s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size)
451 return ixgbe_read_pba_string_generic(hw, pba_num, pba_num_size);
455 * ixgbe_read_pba_num - Reads part number from EEPROM
456 * @hw: pointer to hardware structure
457 * @pba_num: stores the part number from the EEPROM
459 * Reads the part number from the EEPROM.
461 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num)
463 return ixgbe_read_pba_num_generic(hw, pba_num);
467 * ixgbe_identify_phy - Get PHY type
468 * @hw: pointer to hardware structure
470 * Determines the physical layer module found on the current adapter.
472 s32 ixgbe_identify_phy(struct ixgbe_hw *hw)
474 s32 status = IXGBE_SUCCESS;
476 if (hw->phy.type == ixgbe_phy_unknown) {
477 status = ixgbe_call_func(hw, hw->phy.ops.identify, (hw),
478 IXGBE_NOT_IMPLEMENTED);
485 * ixgbe_reset_phy - Perform a PHY reset
486 * @hw: pointer to hardware structure
488 s32 ixgbe_reset_phy(struct ixgbe_hw *hw)
490 s32 status = IXGBE_SUCCESS;
492 if (hw->phy.type == ixgbe_phy_unknown) {
493 if (ixgbe_identify_phy(hw) != IXGBE_SUCCESS)
494 status = IXGBE_ERR_PHY;
497 if (status == IXGBE_SUCCESS) {
498 status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw),
499 IXGBE_NOT_IMPLEMENTED);
505 * ixgbe_get_phy_firmware_version -
506 * @hw: pointer to hardware structure
507 * @firmware_version: pointer to firmware version
509 s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, u16 *firmware_version)
511 s32 status = IXGBE_SUCCESS;
513 status = ixgbe_call_func(hw, hw->phy.ops.get_firmware_version,
514 (hw, firmware_version),
515 IXGBE_NOT_IMPLEMENTED);
520 * ixgbe_read_phy_reg - Read PHY register
521 * @hw: pointer to hardware structure
522 * @reg_addr: 32 bit address of PHY register to read
523 * @phy_data: Pointer to read data from PHY register
525 * Reads a value from a specified PHY register
527 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
531 ixgbe_identify_phy(hw);
533 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr,
534 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
538 * ixgbe_write_phy_reg - Write PHY register
539 * @hw: pointer to hardware structure
540 * @reg_addr: 32 bit PHY register to write
541 * @phy_data: Data to write to the PHY register
543 * Writes a value to specified PHY register
545 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
549 ixgbe_identify_phy(hw);
551 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr,
552 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
556 * ixgbe_setup_phy_link - Restart PHY autoneg
557 * @hw: pointer to hardware structure
559 * Restart autonegotiation and PHY and waits for completion.
561 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw)
563 return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw),
564 IXGBE_NOT_IMPLEMENTED);
568 * ixgbe_setup_internal_phy - Configure integrated PHY
569 * @hw: pointer to hardware structure
571 * Reconfigure the integrated PHY in order to enable talk to the external PHY.
572 * Returns success if not implemented, since nothing needs to be done in this
575 s32 ixgbe_setup_internal_phy(struct ixgbe_hw *hw)
577 return ixgbe_call_func(hw, hw->phy.ops.setup_internal_link, (hw),
582 * ixgbe_check_phy_link - Determine link and speed status
583 * @hw: pointer to hardware structure
585 * Reads a PHY register to determine if link is up and the current speed for
588 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
591 return ixgbe_call_func(hw, hw->phy.ops.check_link, (hw, speed,
592 link_up), IXGBE_NOT_IMPLEMENTED);
596 * ixgbe_setup_phy_link_speed - Set auto advertise
597 * @hw: pointer to hardware structure
598 * @speed: new link speed
600 * Sets the auto advertised capabilities
602 s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed,
603 bool autoneg_wait_to_complete)
605 return ixgbe_call_func(hw, hw->phy.ops.setup_link_speed, (hw, speed,
606 autoneg_wait_to_complete),
607 IXGBE_NOT_IMPLEMENTED);
611 * ixgbe_set_phy_power - Control the phy power state
612 * @hw: pointer to hardware structure
613 * @on: true for on, false for off
615 s32 ixgbe_set_phy_power(struct ixgbe_hw *hw, bool on)
617 return ixgbe_call_func(hw, hw->phy.ops.set_phy_power, (hw, on),
618 IXGBE_NOT_IMPLEMENTED);
622 * ixgbe_check_link - Get link and speed status
623 * @hw: pointer to hardware structure
625 * Reads the links register to determine if link is up and the current speed
627 s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
628 bool *link_up, bool link_up_wait_to_complete)
630 return ixgbe_call_func(hw, hw->mac.ops.check_link, (hw, speed,
631 link_up, link_up_wait_to_complete),
632 IXGBE_NOT_IMPLEMENTED);
636 * ixgbe_disable_tx_laser - Disable Tx laser
637 * @hw: pointer to hardware structure
639 * If the driver needs to disable the laser on SFI optics.
641 void ixgbe_disable_tx_laser(struct ixgbe_hw *hw)
643 if (hw->mac.ops.disable_tx_laser)
644 hw->mac.ops.disable_tx_laser(hw);
648 * ixgbe_enable_tx_laser - Enable Tx laser
649 * @hw: pointer to hardware structure
651 * If the driver needs to enable the laser on SFI optics.
653 void ixgbe_enable_tx_laser(struct ixgbe_hw *hw)
655 if (hw->mac.ops.enable_tx_laser)
656 hw->mac.ops.enable_tx_laser(hw);
660 * ixgbe_flap_tx_laser - flap Tx laser to start autotry process
661 * @hw: pointer to hardware structure
663 * When the driver changes the link speeds that it can support then
664 * flap the tx laser to alert the link partner to start autotry
665 * process on its end.
667 void ixgbe_flap_tx_laser(struct ixgbe_hw *hw)
669 if (hw->mac.ops.flap_tx_laser)
670 hw->mac.ops.flap_tx_laser(hw);
674 * ixgbe_setup_link - Set link speed
675 * @hw: pointer to hardware structure
676 * @speed: new link speed
678 * Configures link settings. Restarts the link.
679 * Performs autonegotiation if needed.
681 s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
682 bool autoneg_wait_to_complete)
684 return ixgbe_call_func(hw, hw->mac.ops.setup_link, (hw, speed,
685 autoneg_wait_to_complete),
686 IXGBE_NOT_IMPLEMENTED);
690 * ixgbe_setup_mac_link - Set link speed
691 * @hw: pointer to hardware structure
692 * @speed: new link speed
694 * Configures link settings. Restarts the link.
695 * Performs autonegotiation if needed.
697 s32 ixgbe_setup_mac_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
698 bool autoneg_wait_to_complete)
700 return ixgbe_call_func(hw, hw->mac.ops.setup_mac_link, (hw, speed,
701 autoneg_wait_to_complete),
702 IXGBE_NOT_IMPLEMENTED);
706 * ixgbe_get_link_capabilities - Returns link capabilities
707 * @hw: pointer to hardware structure
709 * Determines the link capabilities of the current configuration.
711 s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
714 return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw,
715 speed, autoneg), IXGBE_NOT_IMPLEMENTED);
719 * ixgbe_led_on - Turn on LEDs
720 * @hw: pointer to hardware structure
721 * @index: led number to turn on
723 * Turns on the software controllable LEDs.
725 s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index)
727 return ixgbe_call_func(hw, hw->mac.ops.led_on, (hw, index),
728 IXGBE_NOT_IMPLEMENTED);
732 * ixgbe_led_off - Turn off LEDs
733 * @hw: pointer to hardware structure
734 * @index: led number to turn off
736 * Turns off the software controllable LEDs.
738 s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index)
740 return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index),
741 IXGBE_NOT_IMPLEMENTED);
745 * ixgbe_blink_led_start - Blink LEDs
746 * @hw: pointer to hardware structure
747 * @index: led number to blink
749 * Blink LED based on index.
751 s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index)
753 return ixgbe_call_func(hw, hw->mac.ops.blink_led_start, (hw, index),
754 IXGBE_NOT_IMPLEMENTED);
758 * ixgbe_blink_led_stop - Stop blinking LEDs
759 * @hw: pointer to hardware structure
761 * Stop blinking LED based on index.
763 s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index)
765 return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index),
766 IXGBE_NOT_IMPLEMENTED);
770 * ixgbe_init_eeprom_params - Initialize EEPROM parameters
771 * @hw: pointer to hardware structure
773 * Initializes the EEPROM parameters ixgbe_eeprom_info within the
774 * ixgbe_hw struct in order to set up EEPROM access.
776 s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw)
778 return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw),
779 IXGBE_NOT_IMPLEMENTED);
784 * ixgbe_write_eeprom - Write word to EEPROM
785 * @hw: pointer to hardware structure
786 * @offset: offset within the EEPROM to be written to
787 * @data: 16 bit word to be written to the EEPROM
789 * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not
790 * called after this function, the EEPROM will most likely contain an
793 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data)
795 return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data),
796 IXGBE_NOT_IMPLEMENTED);
800 * ixgbe_write_eeprom_buffer - Write word(s) to EEPROM
801 * @hw: pointer to hardware structure
802 * @offset: offset within the EEPROM to be written to
803 * @data: 16 bit word(s) to be written to the EEPROM
804 * @words: number of words
806 * Writes 16 bit word(s) to EEPROM. If ixgbe_eeprom_update_checksum is not
807 * called after this function, the EEPROM will most likely contain an
810 s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset, u16 words,
813 return ixgbe_call_func(hw, hw->eeprom.ops.write_buffer,
814 (hw, offset, words, data),
815 IXGBE_NOT_IMPLEMENTED);
819 * ixgbe_read_eeprom - Read word from EEPROM
820 * @hw: pointer to hardware structure
821 * @offset: offset within the EEPROM to be read
822 * @data: read 16 bit value from EEPROM
824 * Reads 16 bit value from EEPROM
826 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data)
828 return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data),
829 IXGBE_NOT_IMPLEMENTED);
833 * ixgbe_read_eeprom_buffer - Read word(s) from EEPROM
834 * @hw: pointer to hardware structure
835 * @offset: offset within the EEPROM to be read
836 * @data: read 16 bit word(s) from EEPROM
837 * @words: number of words
839 * Reads 16 bit word(s) from EEPROM
841 s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,
842 u16 words, u16 *data)
844 return ixgbe_call_func(hw, hw->eeprom.ops.read_buffer,
845 (hw, offset, words, data),
846 IXGBE_NOT_IMPLEMENTED);
850 * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum
851 * @hw: pointer to hardware structure
852 * @checksum_val: calculated checksum
854 * Performs checksum calculation and validates the EEPROM checksum
856 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val)
858 return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum,
859 (hw, checksum_val), IXGBE_NOT_IMPLEMENTED);
863 * ixgbe_eeprom_update_checksum - Updates the EEPROM checksum
864 * @hw: pointer to hardware structure
866 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw)
868 return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw),
869 IXGBE_NOT_IMPLEMENTED);
873 * ixgbe_insert_mac_addr - Find a RAR for this mac address
874 * @hw: pointer to hardware structure
875 * @addr: Address to put into receive address register
876 * @vmdq: VMDq pool to assign
878 * Puts an ethernet address into a receive address register, or
879 * finds the rar that it is aleady in; adds to the pool list
881 s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq)
883 return ixgbe_call_func(hw, hw->mac.ops.insert_mac_addr,
885 IXGBE_NOT_IMPLEMENTED);
889 * ixgbe_set_rar - Set Rx address register
890 * @hw: pointer to hardware structure
891 * @index: Receive address register to write
892 * @addr: Address to put into receive address register
894 * @enable_addr: set flag that address is active
896 * Puts an ethernet address into a receive address register.
898 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
901 return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq,
902 enable_addr), IXGBE_NOT_IMPLEMENTED);
906 * ixgbe_clear_rar - Clear Rx address register
907 * @hw: pointer to hardware structure
908 * @index: Receive address register to write
910 * Puts an ethernet address into a receive address register.
912 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index)
914 return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index),
915 IXGBE_NOT_IMPLEMENTED);
919 * ixgbe_set_vmdq - Associate a VMDq index with a receive address
920 * @hw: pointer to hardware structure
921 * @rar: receive address register index to associate with VMDq index
922 * @vmdq: VMDq set or pool index
924 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
926 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq),
927 IXGBE_NOT_IMPLEMENTED);
932 * ixgbe_set_vmdq_san_mac - Associate VMDq index 127 with a receive address
933 * @hw: pointer to hardware structure
934 * @vmdq: VMDq default pool index
936 s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq)
938 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq_san_mac,
939 (hw, vmdq), IXGBE_NOT_IMPLEMENTED);
943 * ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address
944 * @hw: pointer to hardware structure
945 * @rar: receive address register index to disassociate with VMDq index
946 * @vmdq: VMDq set or pool index
948 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq)
950 return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq),
951 IXGBE_NOT_IMPLEMENTED);
955 * ixgbe_init_rx_addrs - Initializes receive address filters.
956 * @hw: pointer to hardware structure
958 * Places the MAC address in receive address register 0 and clears the rest
959 * of the receive address registers. Clears the multicast table. Assumes
960 * the receiver is in reset when the routine is called.
962 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw)
964 return ixgbe_call_func(hw, hw->mac.ops.init_rx_addrs, (hw),
965 IXGBE_NOT_IMPLEMENTED);
969 * ixgbe_get_num_rx_addrs - Returns the number of RAR entries.
970 * @hw: pointer to hardware structure
972 u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw)
974 return hw->mac.num_rar_entries;
978 * ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses
979 * @hw: pointer to hardware structure
980 * @addr_list: the list of new multicast addresses
981 * @addr_count: number of addresses
982 * @func: iterator function to walk the multicast address list
984 * The given list replaces any existing list. Clears the secondary addrs from
985 * receive address registers. Uses unused receive address registers for the
986 * first secondary addresses, and falls back to promiscuous mode as needed.
988 s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list,
989 u32 addr_count, ixgbe_mc_addr_itr func)
991 return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw,
992 addr_list, addr_count, func),
993 IXGBE_NOT_IMPLEMENTED);
997 * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses
998 * @hw: pointer to hardware structure
999 * @mc_addr_list: the list of new multicast addresses
1000 * @mc_addr_count: number of addresses
1001 * @func: iterator function to walk the multicast address list
1003 * The given list replaces any existing list. Clears the MC addrs from receive
1004 * address registers and the multicast table. Uses unused receive address
1005 * registers for the first multicast addresses, and hashes the rest into the
1008 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
1009 u32 mc_addr_count, ixgbe_mc_addr_itr func,
1012 return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw,
1013 mc_addr_list, mc_addr_count, func, clear),
1014 IXGBE_NOT_IMPLEMENTED);
1018 * ixgbe_enable_mc - Enable multicast address in RAR
1019 * @hw: pointer to hardware structure
1021 * Enables multicast address in RAR and the use of the multicast hash table.
1023 s32 ixgbe_enable_mc(struct ixgbe_hw *hw)
1025 return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw),
1026 IXGBE_NOT_IMPLEMENTED);
1030 * ixgbe_disable_mc - Disable multicast address in RAR
1031 * @hw: pointer to hardware structure
1033 * Disables multicast address in RAR and the use of the multicast hash table.
1035 s32 ixgbe_disable_mc(struct ixgbe_hw *hw)
1037 return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw),
1038 IXGBE_NOT_IMPLEMENTED);
1042 * ixgbe_clear_vfta - Clear VLAN filter table
1043 * @hw: pointer to hardware structure
1045 * Clears the VLAN filer table, and the VMDq index associated with the filter
1047 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw)
1049 return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw),
1050 IXGBE_NOT_IMPLEMENTED);
1054 * ixgbe_set_vfta - Set VLAN filter table
1055 * @hw: pointer to hardware structure
1056 * @vlan: VLAN id to write to VLAN filter
1057 * @vind: VMDq output index that maps queue to VLAN id in VFTA
1058 * @vlan_on: boolean flag to turn on/off VLAN in VFTA
1060 * Turn on/off specified VLAN in the VLAN filter table.
1062 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on)
1064 return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind,
1065 vlan_on), IXGBE_NOT_IMPLEMENTED);
1069 * ixgbe_set_vlvf - Set VLAN Pool Filter
1070 * @hw: pointer to hardware structure
1071 * @vlan: VLAN id to write to VLAN filter
1072 * @vind: VMDq output index that maps queue to VLAN id in VFVFB
1073 * @vlan_on: boolean flag to turn on/off VLAN in VFVF
1074 * @vfta_changed: pointer to boolean flag which indicates whether VFTA
1077 * Turn on/off specified bit in VLVF table.
1079 s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on,
1082 return ixgbe_call_func(hw, hw->mac.ops.set_vlvf, (hw, vlan, vind,
1083 vlan_on, vfta_changed), IXGBE_NOT_IMPLEMENTED);
1087 * ixgbe_fc_enable - Enable flow control
1088 * @hw: pointer to hardware structure
1090 * Configures the flow control settings based on SW configuration.
1092 s32 ixgbe_fc_enable(struct ixgbe_hw *hw)
1094 return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw),
1095 IXGBE_NOT_IMPLEMENTED);
1099 * ixgbe_setup_fc - Set up flow control
1100 * @hw: pointer to hardware structure
1102 * Called at init time to set up flow control.
1104 s32 ixgbe_setup_fc(struct ixgbe_hw *hw)
1106 return ixgbe_call_func(hw, hw->mac.ops.setup_fc, (hw),
1107 IXGBE_NOT_IMPLEMENTED);
1111 * ixgbe_set_fw_drv_ver - Try to send the driver version number FW
1112 * @hw: pointer to hardware structure
1113 * @maj: driver major number to be sent to firmware
1114 * @min: driver minor number to be sent to firmware
1115 * @build: driver build number to be sent to firmware
1116 * @ver: driver version number to be sent to firmware
1118 s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build,
1121 return ixgbe_call_func(hw, hw->mac.ops.set_fw_drv_ver, (hw, maj, min,
1122 build, ver), IXGBE_NOT_IMPLEMENTED);
1127 * ixgbe_get_thermal_sensor_data - Gathers thermal sensor data
1128 * @hw: pointer to hardware structure
1130 * Updates the temperatures in mac.thermal_sensor_data
1132 s32 ixgbe_get_thermal_sensor_data(struct ixgbe_hw *hw)
1134 return ixgbe_call_func(hw, hw->mac.ops.get_thermal_sensor_data, (hw),
1135 IXGBE_NOT_IMPLEMENTED);
1139 * ixgbe_init_thermal_sensor_thresh - Inits thermal sensor thresholds
1140 * @hw: pointer to hardware structure
1142 * Inits the thermal sensor thresholds according to the NVM map
1144 s32 ixgbe_init_thermal_sensor_thresh(struct ixgbe_hw *hw)
1146 return ixgbe_call_func(hw, hw->mac.ops.init_thermal_sensor_thresh, (hw),
1147 IXGBE_NOT_IMPLEMENTED);
1151 * ixgbe_dmac_config - Configure DMA Coalescing registers.
1152 * @hw: pointer to hardware structure
1154 * Configure DMA coalescing. If enabling dmac, dmac is activated.
1155 * When disabling dmac, dmac enable dmac bit is cleared.
1157 s32 ixgbe_dmac_config(struct ixgbe_hw *hw)
1159 return ixgbe_call_func(hw, hw->mac.ops.dmac_config, (hw),
1160 IXGBE_NOT_IMPLEMENTED);
1164 * ixgbe_dmac_update_tcs - Configure DMA Coalescing registers.
1165 * @hw: pointer to hardware structure
1167 * Disables dmac, updates per TC settings, and then enable dmac.
1169 s32 ixgbe_dmac_update_tcs(struct ixgbe_hw *hw)
1171 return ixgbe_call_func(hw, hw->mac.ops.dmac_update_tcs, (hw),
1172 IXGBE_NOT_IMPLEMENTED);
1176 * ixgbe_dmac_config_tcs - Configure DMA Coalescing registers.
1177 * @hw: pointer to hardware structure
1179 * Configure DMA coalescing threshold per TC and set high priority bit for
1180 * FCOE TC. The dmac enable bit must be cleared before configuring.
1182 s32 ixgbe_dmac_config_tcs(struct ixgbe_hw *hw)
1184 return ixgbe_call_func(hw, hw->mac.ops.dmac_config_tcs, (hw),
1185 IXGBE_NOT_IMPLEMENTED);
1189 * ixgbe_setup_eee - Enable/disable EEE support
1190 * @hw: pointer to the HW structure
1191 * @enable_eee: boolean flag to enable EEE
1193 * Enable/disable EEE based on enable_ee flag.
1194 * Auto-negotiation must be started after BASE-T EEE bits in PHY register 7.3C
1198 s32 ixgbe_setup_eee(struct ixgbe_hw *hw, bool enable_eee)
1200 return ixgbe_call_func(hw, hw->mac.ops.setup_eee, (hw, enable_eee),
1201 IXGBE_NOT_IMPLEMENTED);
1205 * ixgbe_set_source_address_pruning - Enable/Disable source address pruning
1206 * @hw: pointer to hardware structure
1207 * @enbale: enable or disable source address pruning
1208 * @pool: Rx pool - Rx pool to toggle source address pruning
1210 void ixgbe_set_source_address_pruning(struct ixgbe_hw *hw, bool enable,
1213 if (hw->mac.ops.set_source_address_pruning)
1214 hw->mac.ops.set_source_address_pruning(hw, enable, pool);
1218 * ixgbe_set_ethertype_anti_spoofing - Enable/Disable Ethertype anti-spoofing
1219 * @hw: pointer to hardware structure
1220 * @enable: enable or disable switch for Ethertype anti-spoofing
1221 * @vf: Virtual Function pool - VF Pool to set for Ethertype anti-spoofing
1224 void ixgbe_set_ethertype_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf)
1226 if (hw->mac.ops.set_ethertype_anti_spoofing)
1227 hw->mac.ops.set_ethertype_anti_spoofing(hw, enable, vf);
1231 * ixgbe_read_iosf_sb_reg - Read 32 bit PHY register
1232 * @hw: pointer to hardware structure
1233 * @reg_addr: 32 bit address of PHY register to read
1234 * @device_type: type of device you want to communicate with
1235 * @phy_data: Pointer to read data from PHY register
1237 * Reads a value from a specified PHY register
1239 s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
1240 u32 device_type, u32 *phy_data)
1242 return ixgbe_call_func(hw, hw->mac.ops.read_iosf_sb_reg, (hw, reg_addr,
1243 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
1247 * ixgbe_write_iosf_sb_reg - Write 32 bit register through IOSF Sideband
1248 * @hw: pointer to hardware structure
1249 * @reg_addr: 32 bit PHY register to write
1250 * @device_type: type of device you want to communicate with
1251 * @phy_data: Data to write to the PHY register
1253 * Writes a value to specified PHY register
1255 s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
1256 u32 device_type, u32 phy_data)
1258 return ixgbe_call_func(hw, hw->mac.ops.write_iosf_sb_reg, (hw, reg_addr,
1259 device_type, phy_data), IXGBE_NOT_IMPLEMENTED);
1263 * ixgbe_disable_mdd - Disable malicious driver detection
1264 * @hw: pointer to hardware structure
1267 void ixgbe_disable_mdd(struct ixgbe_hw *hw)
1269 if (hw->mac.ops.disable_mdd)
1270 hw->mac.ops.disable_mdd(hw);
1274 * ixgbe_enable_mdd - Enable malicious driver detection
1275 * @hw: pointer to hardware structure
1278 void ixgbe_enable_mdd(struct ixgbe_hw *hw)
1280 if (hw->mac.ops.enable_mdd)
1281 hw->mac.ops.enable_mdd(hw);
1285 * ixgbe_mdd_event - Handle malicious driver detection event
1286 * @hw: pointer to hardware structure
1287 * @vf_bitmap: vf bitmap of malicious vfs
1290 void ixgbe_mdd_event(struct ixgbe_hw *hw, u32 *vf_bitmap)
1292 if (hw->mac.ops.mdd_event)
1293 hw->mac.ops.mdd_event(hw, vf_bitmap);
1297 * ixgbe_restore_mdd_vf - Restore VF that was disabled during malicious driver
1299 * @hw: pointer to hardware structure
1303 void ixgbe_restore_mdd_vf(struct ixgbe_hw *hw, u32 vf)
1305 if (hw->mac.ops.restore_mdd_vf)
1306 hw->mac.ops.restore_mdd_vf(hw, vf);
1310 * ixgbe_enter_lplu - Transition to low power states
1311 * @hw: pointer to hardware structure
1313 * Configures Low Power Link Up on transition to low power states
1314 * (from D0 to non-D0).
1316 s32 ixgbe_enter_lplu(struct ixgbe_hw *hw)
1318 return ixgbe_call_func(hw, hw->phy.ops.enter_lplu, (hw),
1319 IXGBE_NOT_IMPLEMENTED);
1323 * ixgbe_handle_lasi - Handle external Base T PHY interrupt
1324 * @hw: pointer to hardware structure
1326 * Handle external Base T PHY interrupt. If high temperature
1327 * failure alarm then return error, else if link status change
1328 * then setup internal/external PHY link
1330 * Return IXGBE_ERR_OVERTEMP if interrupt is high temperature
1331 * failure alarm, else return PHY access status.
1333 s32 ixgbe_handle_lasi(struct ixgbe_hw *hw)
1335 return ixgbe_call_func(hw, hw->phy.ops.handle_lasi, (hw),
1336 IXGBE_NOT_IMPLEMENTED);
1340 * ixgbe_read_analog_reg8 - Reads 8 bit analog register
1341 * @hw: pointer to hardware structure
1342 * @reg: analog register to read
1345 * Performs write operation to analog register specified.
1347 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val)
1349 return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg,
1350 val), IXGBE_NOT_IMPLEMENTED);
1354 * ixgbe_write_analog_reg8 - Writes 8 bit analog register
1355 * @hw: pointer to hardware structure
1356 * @reg: analog register to write
1357 * @val: value to write
1359 * Performs write operation to Atlas analog register specified.
1361 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val)
1363 return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg,
1364 val), IXGBE_NOT_IMPLEMENTED);
1368 * ixgbe_init_uta_tables - Initializes Unicast Table Arrays.
1369 * @hw: pointer to hardware structure
1371 * Initializes the Unicast Table Arrays to zero on device load. This
1372 * is part of the Rx init addr execution path.
1374 s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw)
1376 return ixgbe_call_func(hw, hw->mac.ops.init_uta_tables, (hw),
1377 IXGBE_NOT_IMPLEMENTED);
1381 * ixgbe_read_i2c_byte - Reads 8 bit word over I2C at specified device address
1382 * @hw: pointer to hardware structure
1383 * @byte_offset: byte offset to read
1384 * @dev_addr: I2C bus address to read from
1387 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1389 s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
1392 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte, (hw, byte_offset,
1393 dev_addr, data), IXGBE_NOT_IMPLEMENTED);
1397 * ixgbe_read_i2c_byte_unlocked - Reads 8 bit word via I2C from device address
1398 * @hw: pointer to hardware structure
1399 * @byte_offset: byte offset to read
1400 * @dev_addr: I2C bus address to read from
1403 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1405 s32 ixgbe_read_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
1406 u8 dev_addr, u8 *data)
1408 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte_unlocked,
1409 (hw, byte_offset, dev_addr, data),
1410 IXGBE_NOT_IMPLEMENTED);
1414 * ixgbe_read_i2c_combined - Perform I2C read combined operation
1415 * @hw: pointer to the hardware structure
1416 * @addr: I2C bus address to read from
1417 * @reg: I2C device register to read from
1418 * @val: pointer to location to receive read value
1420 * Returns an error code on error.
1422 s32 ixgbe_read_i2c_combined(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val)
1424 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_combined, (hw, addr,
1425 reg, val), IXGBE_NOT_IMPLEMENTED);
1429 * ixgbe_read_i2c_combined_unlocked - Perform I2C read combined operation
1430 * @hw: pointer to the hardware structure
1431 * @addr: I2C bus address to read from
1432 * @reg: I2C device register to read from
1433 * @val: pointer to location to receive read value
1435 * Returns an error code on error.
1437 s32 ixgbe_read_i2c_combined_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg,
1440 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_combined_unlocked,
1441 (hw, addr, reg, val),
1442 IXGBE_NOT_IMPLEMENTED);
1446 * ixgbe_write_i2c_byte - Writes 8 bit word over I2C
1447 * @hw: pointer to hardware structure
1448 * @byte_offset: byte offset to write
1449 * @dev_addr: I2C bus address to write to
1450 * @data: value to write
1452 * Performs byte write operation to SFP module's EEPROM over I2C interface
1453 * at a specified device address.
1455 s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
1458 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte, (hw, byte_offset,
1459 dev_addr, data), IXGBE_NOT_IMPLEMENTED);
1463 * ixgbe_write_i2c_byte_unlocked - Writes 8 bit word over I2C
1464 * @hw: pointer to hardware structure
1465 * @byte_offset: byte offset to write
1466 * @dev_addr: I2C bus address to write to
1467 * @data: value to write
1469 * Performs byte write operation to SFP module's EEPROM over I2C interface
1470 * at a specified device address.
1472 s32 ixgbe_write_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
1473 u8 dev_addr, u8 data)
1475 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte_unlocked,
1476 (hw, byte_offset, dev_addr, data),
1477 IXGBE_NOT_IMPLEMENTED);
1481 * ixgbe_write_i2c_combined - Perform I2C write combined operation
1482 * @hw: pointer to the hardware structure
1483 * @addr: I2C bus address to write to
1484 * @reg: I2C device register to write to
1485 * @val: value to write
1487 * Returns an error code on error.
1489 s32 ixgbe_write_i2c_combined(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val)
1491 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_combined, (hw, addr,
1492 reg, val), IXGBE_NOT_IMPLEMENTED);
1496 * ixgbe_write_i2c_combined_unlocked - Perform I2C write combined operation
1497 * @hw: pointer to the hardware structure
1498 * @addr: I2C bus address to write to
1499 * @reg: I2C device register to write to
1500 * @val: value to write
1502 * Returns an error code on error.
1504 s32 ixgbe_write_i2c_combined_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg,
1507 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_combined_unlocked,
1508 (hw, addr, reg, val), IXGBE_NOT_IMPLEMENTED);
1512 * ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface
1513 * @hw: pointer to hardware structure
1514 * @byte_offset: EEPROM byte offset to write
1515 * @eeprom_data: value to write
1517 * Performs byte write operation to SFP module's EEPROM over I2C interface.
1519 s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw,
1520 u8 byte_offset, u8 eeprom_data)
1522 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_eeprom,
1523 (hw, byte_offset, eeprom_data),
1524 IXGBE_NOT_IMPLEMENTED);
1528 * ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface
1529 * @hw: pointer to hardware structure
1530 * @byte_offset: EEPROM byte offset to read
1531 * @eeprom_data: value read
1533 * Performs byte read operation to SFP module's EEPROM over I2C interface.
1535 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data)
1537 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom,
1538 (hw, byte_offset, eeprom_data),
1539 IXGBE_NOT_IMPLEMENTED);
1543 * ixgbe_get_supported_physical_layer - Returns physical layer type
1544 * @hw: pointer to hardware structure
1546 * Determines physical layer capabilities of the current configuration.
1548 u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw)
1550 return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer,
1551 (hw), IXGBE_PHYSICAL_LAYER_UNKNOWN);
1555 * ixgbe_enable_rx_dma - Enables Rx DMA unit, dependent on device specifics
1556 * @hw: pointer to hardware structure
1557 * @regval: bitfield to write to the Rx DMA register
1559 * Enables the Rx DMA unit of the device.
1561 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval)
1563 return ixgbe_call_func(hw, hw->mac.ops.enable_rx_dma,
1564 (hw, regval), IXGBE_NOT_IMPLEMENTED);
1568 * ixgbe_disable_sec_rx_path - Stops the receive data path
1569 * @hw: pointer to hardware structure
1571 * Stops the receive data path.
1573 s32 ixgbe_disable_sec_rx_path(struct ixgbe_hw *hw)
1575 return ixgbe_call_func(hw, hw->mac.ops.disable_sec_rx_path,
1576 (hw), IXGBE_NOT_IMPLEMENTED);
1580 * ixgbe_enable_sec_rx_path - Enables the receive data path
1581 * @hw: pointer to hardware structure
1583 * Enables the receive data path.
1585 s32 ixgbe_enable_sec_rx_path(struct ixgbe_hw *hw)
1587 return ixgbe_call_func(hw, hw->mac.ops.enable_sec_rx_path,
1588 (hw), IXGBE_NOT_IMPLEMENTED);
1592 * ixgbe_acquire_swfw_semaphore - Acquire SWFW semaphore
1593 * @hw: pointer to hardware structure
1594 * @mask: Mask to specify which semaphore to acquire
1596 * Acquires the SWFW semaphore through SW_FW_SYNC register for the specified
1597 * function (CSR, PHY0, PHY1, EEPROM, Flash)
1599 s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u32 mask)
1601 return ixgbe_call_func(hw, hw->mac.ops.acquire_swfw_sync,
1602 (hw, mask), IXGBE_NOT_IMPLEMENTED);
1606 * ixgbe_release_swfw_semaphore - Release SWFW semaphore
1607 * @hw: pointer to hardware structure
1608 * @mask: Mask to specify which semaphore to release
1610 * Releases the SWFW semaphore through SW_FW_SYNC register for the specified
1611 * function (CSR, PHY0, PHY1, EEPROM, Flash)
1613 void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u32 mask)
1615 if (hw->mac.ops.release_swfw_sync)
1616 hw->mac.ops.release_swfw_sync(hw, mask);
1620 void ixgbe_disable_rx(struct ixgbe_hw *hw)
1622 if (hw->mac.ops.disable_rx)
1623 hw->mac.ops.disable_rx(hw);
1626 void ixgbe_enable_rx(struct ixgbe_hw *hw)
1628 if (hw->mac.ops.enable_rx)
1629 hw->mac.ops.enable_rx(hw);
1633 * ixgbe_set_rate_select_speed - Set module link speed
1634 * @hw: pointer to hardware structure
1635 * @speed: link speed to set
1637 * Set module link speed via the rate select.
1639 void ixgbe_set_rate_select_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed)
1641 if (hw->mac.ops.set_rate_select_speed)
1642 hw->mac.ops.set_rate_select_speed(hw, speed);