1 // SPDX-License-Identifier: GPL-2.0
2 /*******************************************************************************
4 Intel(R) Gigabit Ethernet Linux driver
5 Copyright(c) 2007-2013 Intel Corporation.
8 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
9 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
11 *******************************************************************************/
13 #include <linux/module.h>
14 #include <linux/types.h>
15 #include <linux/init.h>
16 #include <linux/vmalloc.h>
17 #include <linux/pagemap.h>
18 #include <linux/netdevice.h>
19 #include <linux/tcp.h>
21 #include <net/checksum.h>
23 #include <linux/ipv6.h>
24 #include <net/ip6_checksum.h>
28 #include <linux/mii.h>
31 #include <linux/ethtool.h>
33 #include <linux/if_vlan.h>
34 #ifdef CONFIG_PM_RUNTIME
35 #include <linux/pm_runtime.h>
36 #endif /* CONFIG_PM_RUNTIME */
38 #include <linux/if_bridge.h>
42 #include <linux/uio_driver.h>
44 #if defined(DEBUG) || defined (DEBUG_DUMP) || defined (DEBUG_ICR) || defined(DEBUG_ITR)
45 #define DRV_DEBUG "_debug"
50 #define VERSION_SUFFIX
55 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." __stringify(BUILD) VERSION_SUFFIX DRV_DEBUG DRV_HW_PERF
57 char igb_driver_name[] = "igb";
58 char igb_driver_version[] = DRV_VERSION;
59 static const char igb_driver_string[] =
60 "Intel(R) Gigabit Ethernet Network Driver";
61 static const char igb_copyright[] =
62 "Copyright (c) 2007-2013 Intel Corporation.";
64 const struct pci_device_id igb_pci_tbl[] = {
65 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
66 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
67 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
68 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER) },
69 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER) },
70 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES) },
71 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII) },
72 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS) },
73 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS) },
74 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER) },
75 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER) },
76 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER) },
77 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES) },
78 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII) },
79 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER) },
80 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER) },
81 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER) },
82 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES) },
83 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII) },
84 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL) },
85 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII) },
86 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES) },
87 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE) },
88 { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP) },
89 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576) },
90 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS) },
91 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES) },
92 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER) },
93 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES) },
94 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD) },
95 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2) },
96 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER) },
97 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER) },
98 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES) },
99 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER) },
100 /* required last entry */
104 //MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
105 static void igb_set_sriov_capability(struct igb_adapter *adapter) __attribute__((__unused__));
106 void igb_reset(struct igb_adapter *);
107 static int igb_setup_all_tx_resources(struct igb_adapter *);
108 static int igb_setup_all_rx_resources(struct igb_adapter *);
109 static void igb_free_all_tx_resources(struct igb_adapter *);
110 static void igb_free_all_rx_resources(struct igb_adapter *);
111 static void igb_setup_mrqc(struct igb_adapter *);
112 void igb_update_stats(struct igb_adapter *);
113 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
114 static void __devexit igb_remove(struct pci_dev *pdev);
115 static int igb_sw_init(struct igb_adapter *);
116 static int igb_open(struct net_device *);
117 static int igb_close(struct net_device *);
118 static void igb_configure(struct igb_adapter *);
119 static void igb_configure_tx(struct igb_adapter *);
120 static void igb_configure_rx(struct igb_adapter *);
121 static void igb_clean_all_tx_rings(struct igb_adapter *);
122 static void igb_clean_all_rx_rings(struct igb_adapter *);
123 static void igb_clean_tx_ring(struct igb_ring *);
124 static void igb_set_rx_mode(struct net_device *);
125 #ifdef HAVE_TIMER_SETUP
126 static void igb_update_phy_info(struct timer_list *);
127 static void igb_watchdog(struct timer_list *);
129 static void igb_update_phy_info(unsigned long);
130 static void igb_watchdog(unsigned long);
132 static void igb_watchdog_task(struct work_struct *);
133 static void igb_dma_err_task(struct work_struct *);
134 #ifdef HAVE_TIMER_SETUP
135 static void igb_dma_err_timer(struct timer_list *);
137 static void igb_dma_err_timer(unsigned long data);
139 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
140 static struct net_device_stats *igb_get_stats(struct net_device *);
141 static int igb_change_mtu(struct net_device *, int);
142 void igb_full_sync_mac_table(struct igb_adapter *adapter);
143 static int igb_set_mac(struct net_device *, void *);
144 static void igb_set_uta(struct igb_adapter *adapter);
145 static irqreturn_t igb_intr(int irq, void *);
146 static irqreturn_t igb_intr_msi(int irq, void *);
147 static irqreturn_t igb_msix_other(int irq, void *);
148 static irqreturn_t igb_msix_ring(int irq, void *);
150 static void igb_update_dca(struct igb_q_vector *);
151 static void igb_setup_dca(struct igb_adapter *);
153 static int igb_poll(struct napi_struct *, int);
154 static bool igb_clean_tx_irq(struct igb_q_vector *);
155 static bool igb_clean_rx_irq(struct igb_q_vector *, int);
156 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
157 static void igb_tx_timeout(struct net_device *);
158 static void igb_reset_task(struct work_struct *);
159 #ifdef HAVE_VLAN_RX_REGISTER
160 static void igb_vlan_mode(struct net_device *, struct vlan_group *);
162 #ifdef HAVE_VLAN_PROTOCOL
163 static int igb_vlan_rx_add_vid(struct net_device *,
165 static int igb_vlan_rx_kill_vid(struct net_device *,
167 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
168 #ifdef NETIF_F_HW_VLAN_CTAG_RX
169 static int igb_vlan_rx_add_vid(struct net_device *,
170 __always_unused __be16 proto, u16);
171 static int igb_vlan_rx_kill_vid(struct net_device *,
172 __always_unused __be16 proto, u16);
174 static int igb_vlan_rx_add_vid(struct net_device *, u16);
175 static int igb_vlan_rx_kill_vid(struct net_device *, u16);
178 static void igb_vlan_rx_add_vid(struct net_device *, u16);
179 static void igb_vlan_rx_kill_vid(struct net_device *, u16);
181 static void igb_restore_vlan(struct igb_adapter *);
182 void igb_rar_set(struct igb_adapter *adapter, u32 index);
183 static void igb_ping_all_vfs(struct igb_adapter *);
184 static void igb_msg_task(struct igb_adapter *);
185 static void igb_vmm_control(struct igb_adapter *);
186 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
187 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
188 static void igb_process_mdd_event(struct igb_adapter *);
190 static int igb_ndo_set_vf_mac( struct net_device *netdev, int vf, u8 *mac);
191 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
192 #ifdef HAVE_VF_VLAN_PROTO
193 int vf, u16 vlan, u8 qos, __be16 vlan_proto);
195 int vf, u16 vlan, u8 qos);
197 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
198 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
201 #ifdef HAVE_VF_MIN_MAX_TXRATE
202 static int igb_ndo_set_vf_bw(struct net_device *, int, int, int);
203 #else /* HAVE_VF_MIN_MAX_TXRATE */
204 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate);
205 #endif /* HAVE_VF_MIN_MAX_TXRATE */
206 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
207 struct ifla_vf_info *ivi);
208 static void igb_check_vf_rate_limit(struct igb_adapter *);
210 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
212 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
213 static int igb_suspend(struct device *dev);
214 static int igb_resume(struct device *dev);
215 #ifdef CONFIG_PM_RUNTIME
216 static int igb_runtime_suspend(struct device *dev);
217 static int igb_runtime_resume(struct device *dev);
218 static int igb_runtime_idle(struct device *dev);
219 #endif /* CONFIG_PM_RUNTIME */
220 static const struct dev_pm_ops igb_pm_ops = {
221 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)
222 .suspend = igb_suspend,
223 .resume = igb_resume,
224 .freeze = igb_suspend,
226 .poweroff = igb_suspend,
227 .restore = igb_resume,
228 #ifdef CONFIG_PM_RUNTIME
229 .runtime_suspend = igb_runtime_suspend,
230 .runtime_resume = igb_runtime_resume,
231 .runtime_idle = igb_runtime_idle,
233 #else /* Linux >= 2.6.34 */
234 SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
235 #ifdef CONFIG_PM_RUNTIME
236 SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
238 #endif /* CONFIG_PM_RUNTIME */
239 #endif /* Linux version */
242 static int igb_suspend(struct pci_dev *pdev, pm_message_t state);
243 static int igb_resume(struct pci_dev *pdev);
244 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
245 #endif /* CONFIG_PM */
246 #ifndef USE_REBOOT_NOTIFIER
247 static void igb_shutdown(struct pci_dev *);
249 static int igb_notify_reboot(struct notifier_block *, unsigned long, void *);
250 static struct notifier_block igb_notifier_reboot = {
251 .notifier_call = igb_notify_reboot,
257 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
258 static struct notifier_block dca_notifier = {
259 .notifier_call = igb_notify_dca,
264 #ifdef CONFIG_NET_POLL_CONTROLLER
265 /* for netdump / net console */
266 static void igb_netpoll(struct net_device *);
270 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
271 pci_channel_state_t);
272 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
273 static void igb_io_resume(struct pci_dev *);
275 static struct pci_error_handlers igb_err_handler = {
276 .error_detected = igb_io_error_detected,
277 .slot_reset = igb_io_slot_reset,
278 .resume = igb_io_resume,
282 static void igb_init_fw(struct igb_adapter *adapter);
283 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
285 static struct pci_driver igb_driver = {
286 .name = igb_driver_name,
287 .id_table = igb_pci_tbl,
289 .remove = __devexit_p(igb_remove),
291 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
292 .driver.pm = &igb_pm_ops,
294 .suspend = igb_suspend,
295 .resume = igb_resume,
296 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
297 #endif /* CONFIG_PM */
298 #ifndef USE_REBOOT_NOTIFIER
299 .shutdown = igb_shutdown,
302 .err_handler = &igb_err_handler
306 //MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
307 //MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
308 //MODULE_LICENSE("GPL");
309 //MODULE_VERSION(DRV_VERSION);
311 static void igb_vfta_set(struct igb_adapter *adapter, u32 vid, bool add)
313 struct e1000_hw *hw = &adapter->hw;
314 struct e1000_host_mng_dhcp_cookie *mng_cookie = &hw->mng_cookie;
315 u32 index = (vid >> E1000_VFTA_ENTRY_SHIFT) & E1000_VFTA_ENTRY_MASK;
316 u32 mask = 1 << (vid & E1000_VFTA_ENTRY_BIT_SHIFT_MASK);
320 * if this is the management vlan the only option is to add it in so
321 * that the management pass through will continue to work
323 if ((mng_cookie->status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
324 (vid == mng_cookie->vlan_id))
327 vfta = adapter->shadow_vfta[index];
334 e1000_write_vfta(hw, index, vfta);
335 adapter->shadow_vfta[index] = vfta;
338 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
339 //module_param(debug, int, 0);
340 //MODULE_PARM_DESC(debug, "Debug level (0=none, ..., 16=all)");
343 * igb_init_module - Driver Registration Routine
345 * igb_init_module is the first routine called when the driver is
346 * loaded. All it does is register with the PCI subsystem.
348 static int __init igb_init_module(void)
352 printk(KERN_INFO "%s - version %s\n",
353 igb_driver_string, igb_driver_version);
355 printk(KERN_INFO "%s\n", igb_copyright);
357 /* only use IGB_PROCFS if IGB_HWMON is not defined */
360 if (igb_procfs_topdir_init())
361 printk(KERN_INFO "Procfs failed to initialize topdir\n");
362 #endif /* IGB_PROCFS */
363 #endif /* IGB_HWMON */
366 dca_register_notify(&dca_notifier);
368 ret = pci_register_driver(&igb_driver);
369 #ifdef USE_REBOOT_NOTIFIER
371 register_reboot_notifier(&igb_notifier_reboot);
378 #define module_init(x) static int x(void) __attribute__((__unused__));
379 module_init(igb_init_module);
382 * igb_exit_module - Driver Exit Cleanup Routine
384 * igb_exit_module is called just before the driver is removed
387 static void __exit igb_exit_module(void)
390 dca_unregister_notify(&dca_notifier);
392 #ifdef USE_REBOOT_NOTIFIER
393 unregister_reboot_notifier(&igb_notifier_reboot);
395 pci_unregister_driver(&igb_driver);
398 /* only compile IGB_PROCFS if IGB_HWMON is not defined */
401 igb_procfs_topdir_exit();
402 #endif /* IGB_PROCFS */
403 #endif /* IGB_HWMON */
407 #define module_exit(x) static void x(void) __attribute__((__unused__));
408 module_exit(igb_exit_module);
410 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
412 * igb_cache_ring_register - Descriptor ring to register mapping
413 * @adapter: board private structure to initialize
415 * Once we know the feature-set enabled for the device, we'll cache
416 * the register offset the descriptor ring is assigned to.
418 static void igb_cache_ring_register(struct igb_adapter *adapter)
421 u32 rbase_offset = adapter->vfs_allocated_count;
423 switch (adapter->hw.mac.type) {
425 /* The queues are allocated for virtualization such that VF 0
426 * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
427 * In order to avoid collision we start at the first free queue
428 * and continue consuming queues in the same sequence
430 if ((adapter->rss_queues > 1) && adapter->vmdq_pools) {
431 for (; i < adapter->rss_queues; i++)
432 adapter->rx_ring[i]->reg_idx = rbase_offset +
442 for (; i < adapter->num_rx_queues; i++)
443 adapter->rx_ring[i]->reg_idx = rbase_offset + i;
444 for (; j < adapter->num_tx_queues; j++)
445 adapter->tx_ring[j]->reg_idx = rbase_offset + j;
450 static void igb_configure_lli(struct igb_adapter *adapter)
452 struct e1000_hw *hw = &adapter->hw;
455 /* LLI should only be enabled for MSI-X or MSI interrupts */
456 if (!adapter->msix_entries && !(adapter->flags & IGB_FLAG_HAS_MSI))
459 if (adapter->lli_port) {
460 /* use filter 0 for port */
461 port = htons((u16)adapter->lli_port);
462 E1000_WRITE_REG(hw, E1000_IMIR(0),
463 (port | E1000_IMIR_PORT_IM_EN));
464 E1000_WRITE_REG(hw, E1000_IMIREXT(0),
465 (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_BP));
468 if (adapter->flags & IGB_FLAG_LLI_PUSH) {
469 /* use filter 1 for push flag */
470 E1000_WRITE_REG(hw, E1000_IMIR(1),
471 (E1000_IMIR_PORT_BP | E1000_IMIR_PORT_IM_EN));
472 E1000_WRITE_REG(hw, E1000_IMIREXT(1),
473 (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_PSH));
476 if (adapter->lli_size) {
477 /* use filter 2 for size */
478 E1000_WRITE_REG(hw, E1000_IMIR(2),
479 (E1000_IMIR_PORT_BP | E1000_IMIR_PORT_IM_EN));
480 E1000_WRITE_REG(hw, E1000_IMIREXT(2),
481 (adapter->lli_size | E1000_IMIREXT_CTRL_BP));
487 * igb_write_ivar - configure ivar for given MSI-X vector
488 * @hw: pointer to the HW structure
489 * @msix_vector: vector number we are allocating to a given ring
490 * @index: row index of IVAR register to write within IVAR table
491 * @offset: column offset of in IVAR, should be multiple of 8
493 * This function is intended to handle the writing of the IVAR register
494 * for adapters 82576 and newer. The IVAR table consists of 2 columns,
495 * each containing an cause allocation for an Rx and Tx ring, and a
496 * variable number of rows depending on the number of queues supported.
498 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
499 int index, int offset)
501 u32 ivar = E1000_READ_REG_ARRAY(hw, E1000_IVAR0, index);
503 /* clear any bits that are currently set */
504 ivar &= ~((u32)0xFF << offset);
506 /* write vector and valid bit */
507 ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
509 E1000_WRITE_REG_ARRAY(hw, E1000_IVAR0, index, ivar);
512 #define IGB_N0_QUEUE -1
513 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
515 struct igb_adapter *adapter = q_vector->adapter;
516 struct e1000_hw *hw = &adapter->hw;
517 int rx_queue = IGB_N0_QUEUE;
518 int tx_queue = IGB_N0_QUEUE;
521 if (q_vector->rx.ring)
522 rx_queue = q_vector->rx.ring->reg_idx;
523 if (q_vector->tx.ring)
524 tx_queue = q_vector->tx.ring->reg_idx;
526 switch (hw->mac.type) {
528 /* The 82575 assigns vectors using a bitmask, which matches the
529 bitmask for the EICR/EIMS/EIMC registers. To assign one
530 or more queues to a vector, we write the appropriate bits
531 into the MSIXBM register for that vector. */
532 if (rx_queue > IGB_N0_QUEUE)
533 msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
534 if (tx_queue > IGB_N0_QUEUE)
535 msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
536 if (!adapter->msix_entries && msix_vector == 0)
537 msixbm |= E1000_EIMS_OTHER;
538 E1000_WRITE_REG_ARRAY(hw, E1000_MSIXBM(0), msix_vector, msixbm);
539 q_vector->eims_value = msixbm;
543 * 82576 uses a table that essentially consists of 2 columns
544 * with 8 rows. The ordering is column-major so we use the
545 * lower 3 bits as the row index, and the 4th bit as the
548 if (rx_queue > IGB_N0_QUEUE)
549 igb_write_ivar(hw, msix_vector,
551 (rx_queue & 0x8) << 1);
552 if (tx_queue > IGB_N0_QUEUE)
553 igb_write_ivar(hw, msix_vector,
555 ((tx_queue & 0x8) << 1) + 8);
556 q_vector->eims_value = 1 << msix_vector;
564 * On 82580 and newer adapters the scheme is similar to 82576
565 * however instead of ordering column-major we have things
566 * ordered row-major. So we traverse the table by using
567 * bit 0 as the column offset, and the remaining bits as the
570 if (rx_queue > IGB_N0_QUEUE)
571 igb_write_ivar(hw, msix_vector,
573 (rx_queue & 0x1) << 4);
574 if (tx_queue > IGB_N0_QUEUE)
575 igb_write_ivar(hw, msix_vector,
577 ((tx_queue & 0x1) << 4) + 8);
578 q_vector->eims_value = 1 << msix_vector;
585 /* add q_vector eims value to global eims_enable_mask */
586 adapter->eims_enable_mask |= q_vector->eims_value;
588 /* configure q_vector to set itr on first interrupt */
589 q_vector->set_itr = 1;
593 * igb_configure_msix - Configure MSI-X hardware
595 * igb_configure_msix sets up the hardware to properly
596 * generate MSI-X interrupts.
598 static void igb_configure_msix(struct igb_adapter *adapter)
602 struct e1000_hw *hw = &adapter->hw;
604 adapter->eims_enable_mask = 0;
606 /* set vector for other causes, i.e. link changes */
607 switch (hw->mac.type) {
609 tmp = E1000_READ_REG(hw, E1000_CTRL_EXT);
610 /* enable MSI-X PBA support*/
611 tmp |= E1000_CTRL_EXT_PBA_CLR;
613 /* Auto-Mask interrupts upon ICR read. */
614 tmp |= E1000_CTRL_EXT_EIAME;
615 tmp |= E1000_CTRL_EXT_IRCA;
617 E1000_WRITE_REG(hw, E1000_CTRL_EXT, tmp);
619 /* enable msix_other interrupt */
620 E1000_WRITE_REG_ARRAY(hw, E1000_MSIXBM(0), vector++,
622 adapter->eims_other = E1000_EIMS_OTHER;
632 /* Turn on MSI-X capability first, or our settings
633 * won't stick. And it will take days to debug. */
634 E1000_WRITE_REG(hw, E1000_GPIE, E1000_GPIE_MSIX_MODE |
635 E1000_GPIE_PBA | E1000_GPIE_EIAME |
638 /* enable msix_other interrupt */
639 adapter->eims_other = 1 << vector;
640 tmp = (vector++ | E1000_IVAR_VALID) << 8;
642 E1000_WRITE_REG(hw, E1000_IVAR_MISC, tmp);
645 /* do nothing, since nothing else supports MSI-X */
647 } /* switch (hw->mac.type) */
649 adapter->eims_enable_mask |= adapter->eims_other;
651 for (i = 0; i < adapter->num_q_vectors; i++)
652 igb_assign_vector(adapter->q_vector[i], vector++);
654 E1000_WRITE_FLUSH(hw);
658 * igb_request_msix - Initialize MSI-X interrupts
660 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
663 static int igb_request_msix(struct igb_adapter *adapter)
665 struct net_device *netdev = adapter->netdev;
666 struct e1000_hw *hw = &adapter->hw;
667 int i, err = 0, vector = 0, free_vector = 0;
669 err = request_irq(adapter->msix_entries[vector].vector,
670 &igb_msix_other, 0, netdev->name, adapter);
674 for (i = 0; i < adapter->num_q_vectors; i++) {
675 struct igb_q_vector *q_vector = adapter->q_vector[i];
679 q_vector->itr_register = hw->hw_addr + E1000_EITR(vector);
681 if (q_vector->rx.ring && q_vector->tx.ring)
682 sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
683 q_vector->rx.ring->queue_index);
684 else if (q_vector->tx.ring)
685 sprintf(q_vector->name, "%s-tx-%u", netdev->name,
686 q_vector->tx.ring->queue_index);
687 else if (q_vector->rx.ring)
688 sprintf(q_vector->name, "%s-rx-%u", netdev->name,
689 q_vector->rx.ring->queue_index);
691 sprintf(q_vector->name, "%s-unused", netdev->name);
693 err = request_irq(adapter->msix_entries[vector].vector,
694 igb_msix_ring, 0, q_vector->name,
700 igb_configure_msix(adapter);
704 /* free already assigned IRQs */
705 free_irq(adapter->msix_entries[free_vector++].vector, adapter);
708 for (i = 0; i < vector; i++) {
709 free_irq(adapter->msix_entries[free_vector++].vector,
710 adapter->q_vector[i]);
716 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
718 if (adapter->msix_entries) {
719 pci_disable_msix(adapter->pdev);
720 kfree(adapter->msix_entries);
721 adapter->msix_entries = NULL;
722 } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
723 pci_disable_msi(adapter->pdev);
728 * igb_free_q_vector - Free memory allocated for specific interrupt vector
729 * @adapter: board private structure to initialize
730 * @v_idx: Index of vector to be freed
732 * This function frees the memory allocated to the q_vector. In addition if
733 * NAPI is enabled it will delete any references to the NAPI struct prior
734 * to freeing the q_vector.
736 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
738 struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
740 if (q_vector->tx.ring)
741 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
743 if (q_vector->rx.ring)
744 adapter->tx_ring[q_vector->rx.ring->queue_index] = NULL;
746 adapter->q_vector[v_idx] = NULL;
747 netif_napi_del(&q_vector->napi);
749 __skb_queue_purge(&q_vector->lrolist.active);
755 * igb_free_q_vectors - Free memory allocated for interrupt vectors
756 * @adapter: board private structure to initialize
758 * This function frees the memory allocated to the q_vectors. In addition if
759 * NAPI is enabled it will delete any references to the NAPI struct prior
760 * to freeing the q_vector.
762 static void igb_free_q_vectors(struct igb_adapter *adapter)
764 int v_idx = adapter->num_q_vectors;
766 adapter->num_tx_queues = 0;
767 adapter->num_rx_queues = 0;
768 adapter->num_q_vectors = 0;
771 igb_free_q_vector(adapter, v_idx);
775 * igb_clear_interrupt_scheme - reset the device to a state of no interrupts
777 * This function resets the device so that it has 0 rx queues, tx queues, and
778 * MSI-X interrupts allocated.
780 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
782 igb_free_q_vectors(adapter);
783 igb_reset_interrupt_capability(adapter);
787 * igb_process_mdd_event
788 * @adapter - board private structure
790 * Identify a malicious VF, disable the VF TX/RX queues and log a message.
792 static void igb_process_mdd_event(struct igb_adapter *adapter)
794 struct e1000_hw *hw = &adapter->hw;
795 u32 lvmmc, vfte, vfre, mdfb;
798 lvmmc = E1000_READ_REG(hw, E1000_LVMMC);
799 vf_queue = lvmmc >> 29;
801 /* VF index cannot be bigger or equal to VFs allocated */
802 if (vf_queue >= adapter->vfs_allocated_count)
805 netdev_info(adapter->netdev,
806 "VF %d misbehaved. VF queues are disabled. "
807 "VM misbehavior code is 0x%x\n", vf_queue, lvmmc);
809 /* Disable VFTE and VFRE related bits */
810 vfte = E1000_READ_REG(hw, E1000_VFTE);
811 vfte &= ~(1 << vf_queue);
812 E1000_WRITE_REG(hw, E1000_VFTE, vfte);
814 vfre = E1000_READ_REG(hw, E1000_VFRE);
815 vfre &= ~(1 << vf_queue);
816 E1000_WRITE_REG(hw, E1000_VFRE, vfre);
818 /* Disable MDFB related bit. Clear on write */
819 mdfb = E1000_READ_REG(hw, E1000_MDFB);
820 mdfb |= (1 << vf_queue);
821 E1000_WRITE_REG(hw, E1000_MDFB, mdfb);
823 /* Reset the specific VF */
824 E1000_WRITE_REG(hw, E1000_VTCTRL(vf_queue), E1000_VTCTRL_RST);
829 * @adapter - board private structure
831 * Disable MDD behavior in the HW
833 static void igb_disable_mdd(struct igb_adapter *adapter)
835 struct e1000_hw *hw = &adapter->hw;
838 if ((hw->mac.type != e1000_i350) ||
839 (hw->mac.type != e1000_i354))
842 reg = E1000_READ_REG(hw, E1000_DTXCTL);
843 reg &= (~E1000_DTXCTL_MDP_EN);
844 E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
849 * @adapter - board private structure
851 * Enable the HW to detect malicious driver and sends an interrupt to
854 static void igb_enable_mdd(struct igb_adapter *adapter)
856 struct e1000_hw *hw = &adapter->hw;
859 /* Only available on i350 device */
860 if (hw->mac.type != e1000_i350)
863 reg = E1000_READ_REG(hw, E1000_DTXCTL);
864 reg |= E1000_DTXCTL_MDP_EN;
865 E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
869 * igb_reset_sriov_capability - disable SR-IOV if enabled
871 * Attempt to disable single root IO virtualization capabilites present in the
874 static void igb_reset_sriov_capability(struct igb_adapter *adapter)
876 struct pci_dev *pdev = adapter->pdev;
877 struct e1000_hw *hw = &adapter->hw;
879 /* reclaim resources allocated to VFs */
880 if (adapter->vf_data) {
881 if (!pci_vfs_assigned(pdev)) {
883 * disable iov and allow time for transactions to
886 pci_disable_sriov(pdev);
889 dev_info(pci_dev_to_dev(pdev), "IOV Disabled\n");
891 dev_info(pci_dev_to_dev(pdev), "IOV Not Disabled\n "
892 "VF(s) are assigned to guests!\n");
894 /* Disable Malicious Driver Detection */
895 igb_disable_mdd(adapter);
897 /* free vf data storage */
898 kfree(adapter->vf_data);
899 adapter->vf_data = NULL;
901 /* switch rings back to PF ownership */
902 E1000_WRITE_REG(hw, E1000_IOVCTL,
903 E1000_IOVCTL_REUSE_VFQ);
904 E1000_WRITE_FLUSH(hw);
908 adapter->vfs_allocated_count = 0;
912 * igb_set_sriov_capability - setup SR-IOV if supported
914 * Attempt to enable single root IO virtualization capabilites present in the
917 static void igb_set_sriov_capability(struct igb_adapter *adapter)
919 struct pci_dev *pdev = adapter->pdev;
923 old_vfs = pci_num_vf(pdev);
925 dev_info(pci_dev_to_dev(pdev),
926 "%d pre-allocated VFs found - override "
927 "max_vfs setting of %d\n", old_vfs,
928 adapter->vfs_allocated_count);
929 adapter->vfs_allocated_count = old_vfs;
931 /* no VFs requested, do nothing */
932 if (!adapter->vfs_allocated_count)
935 /* allocate vf data storage */
936 adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
937 sizeof(struct vf_data_storage),
940 if (adapter->vf_data) {
942 if (pci_enable_sriov(pdev,
943 adapter->vfs_allocated_count))
946 for (i = 0; i < adapter->vfs_allocated_count; i++)
947 igb_vf_configure(adapter, i);
949 switch (adapter->hw.mac.type) {
952 /* Enable VM to VM loopback by default */
953 adapter->flags |= IGB_FLAG_LOOPBACK_ENABLE;
956 /* Currently no other hardware supports loopback */
960 /* DMA Coalescing is not supported in IOV mode. */
961 if (adapter->hw.mac.type >= e1000_i350)
962 adapter->dmac = IGB_DMAC_DISABLE;
963 if (adapter->hw.mac.type < e1000_i350)
964 adapter->flags |= IGB_FLAG_DETECT_BAD_DMA;
970 kfree(adapter->vf_data);
971 adapter->vf_data = NULL;
972 adapter->vfs_allocated_count = 0;
973 dev_warn(pci_dev_to_dev(pdev),
974 "Failed to initialize SR-IOV virtualization\n");
978 * igb_set_interrupt_capability - set MSI or MSI-X if supported
980 * Attempt to configure interrupts using the best available
981 * capabilities of the hardware and kernel.
983 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
985 struct pci_dev *pdev = adapter->pdev;
990 adapter->int_mode = IGB_INT_MODE_MSI;
992 /* Number of supported queues. */
993 adapter->num_rx_queues = adapter->rss_queues;
995 if (adapter->vmdq_pools > 1)
996 adapter->num_rx_queues += adapter->vmdq_pools - 1;
999 if (adapter->vmdq_pools)
1000 adapter->num_tx_queues = adapter->vmdq_pools;
1002 adapter->num_tx_queues = adapter->num_rx_queues;
1004 adapter->num_tx_queues = max_t(u32, 1, adapter->vmdq_pools);
1007 switch (adapter->int_mode) {
1008 case IGB_INT_MODE_MSIX:
1009 /* start with one vector for every rx queue */
1010 numvecs = adapter->num_rx_queues;
1012 /* if tx handler is separate add 1 for every tx queue */
1013 if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1014 numvecs += adapter->num_tx_queues;
1016 /* store the number of vectors reserved for queues */
1017 adapter->num_q_vectors = numvecs;
1019 /* add 1 vector for link status interrupts */
1021 adapter->msix_entries = kcalloc(numvecs,
1022 sizeof(struct msix_entry),
1024 if (adapter->msix_entries) {
1025 for (i = 0; i < numvecs; i++)
1026 adapter->msix_entries[i].entry = i;
1028 #ifdef HAVE_PCI_ENABLE_MSIX
1029 err = pci_enable_msix(pdev,
1030 adapter->msix_entries, numvecs);
1032 err = pci_enable_msix_range(pdev,
1033 adapter->msix_entries,
1040 /* MSI-X failed, so fall through and try MSI */
1041 dev_warn(pci_dev_to_dev(pdev), "Failed to initialize MSI-X interrupts. "
1042 "Falling back to MSI interrupts.\n");
1043 igb_reset_interrupt_capability(adapter);
1044 case IGB_INT_MODE_MSI:
1045 if (!pci_enable_msi(pdev))
1046 adapter->flags |= IGB_FLAG_HAS_MSI;
1048 dev_warn(pci_dev_to_dev(pdev), "Failed to initialize MSI "
1049 "interrupts. Falling back to legacy "
1052 case IGB_INT_MODE_LEGACY:
1053 /* disable advanced features and set number of queues to 1 */
1054 igb_reset_sriov_capability(adapter);
1055 adapter->vmdq_pools = 0;
1056 adapter->rss_queues = 1;
1057 adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1058 adapter->num_rx_queues = 1;
1059 adapter->num_tx_queues = 1;
1060 adapter->num_q_vectors = 1;
1061 /* Don't do anything; this is system default */
1066 static void igb_add_ring(struct igb_ring *ring,
1067 struct igb_ring_container *head)
1074 * igb_alloc_q_vector - Allocate memory for a single interrupt vector
1075 * @adapter: board private structure to initialize
1076 * @v_count: q_vectors allocated on adapter, used for ring interleaving
1077 * @v_idx: index of vector in adapter struct
1078 * @txr_count: total number of Tx rings to allocate
1079 * @txr_idx: index of first Tx ring to allocate
1080 * @rxr_count: total number of Rx rings to allocate
1081 * @rxr_idx: index of first Rx ring to allocate
1083 * We allocate one q_vector. If allocation fails we return -ENOMEM.
1085 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1086 unsigned int v_count, unsigned int v_idx,
1087 unsigned int txr_count, unsigned int txr_idx,
1088 unsigned int rxr_count, unsigned int rxr_idx)
1090 struct igb_q_vector *q_vector;
1091 struct igb_ring *ring;
1092 int ring_count, size;
1094 /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1095 if (txr_count > 1 || rxr_count > 1)
1098 ring_count = txr_count + rxr_count;
1099 size = sizeof(struct igb_q_vector) +
1100 (sizeof(struct igb_ring) * ring_count);
1102 /* allocate q_vector and rings */
1103 q_vector = kzalloc(size, GFP_KERNEL);
1108 /* initialize LRO */
1109 __skb_queue_head_init(&q_vector->lrolist.active);
1112 /* initialize NAPI */
1113 netif_napi_add(adapter->netdev, &q_vector->napi,
1116 /* tie q_vector and adapter together */
1117 adapter->q_vector[v_idx] = q_vector;
1118 q_vector->adapter = adapter;
1120 /* initialize work limits */
1121 q_vector->tx.work_limit = adapter->tx_work_limit;
1123 /* initialize ITR configuration */
1124 q_vector->itr_register = adapter->hw.hw_addr + E1000_EITR(0);
1125 q_vector->itr_val = IGB_START_ITR;
1127 /* initialize pointer to rings */
1128 ring = q_vector->ring;
1130 /* initialize ITR */
1132 /* rx or rx/tx vector */
1133 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1134 q_vector->itr_val = adapter->rx_itr_setting;
1136 /* tx only vector */
1137 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1138 q_vector->itr_val = adapter->tx_itr_setting;
1142 /* assign generic ring traits */
1143 ring->dev = &adapter->pdev->dev;
1144 ring->netdev = adapter->netdev;
1146 /* configure backlink on ring */
1147 ring->q_vector = q_vector;
1149 /* update q_vector Tx values */
1150 igb_add_ring(ring, &q_vector->tx);
1152 /* For 82575, context index must be unique per ring. */
1153 if (adapter->hw.mac.type == e1000_82575)
1154 set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1156 /* apply Tx specific ring traits */
1157 ring->count = adapter->tx_ring_count;
1158 ring->queue_index = txr_idx;
1160 /* assign ring to adapter */
1161 adapter->tx_ring[txr_idx] = ring;
1163 /* push pointer to next ring */
1168 /* assign generic ring traits */
1169 ring->dev = &adapter->pdev->dev;
1170 ring->netdev = adapter->netdev;
1172 /* configure backlink on ring */
1173 ring->q_vector = q_vector;
1175 /* update q_vector Rx values */
1176 igb_add_ring(ring, &q_vector->rx);
1178 #ifndef HAVE_NDO_SET_FEATURES
1179 /* enable rx checksum */
1180 set_bit(IGB_RING_FLAG_RX_CSUM, &ring->flags);
1183 /* set flag indicating ring supports SCTP checksum offload */
1184 if (adapter->hw.mac.type >= e1000_82576)
1185 set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1187 if ((adapter->hw.mac.type == e1000_i350) ||
1188 (adapter->hw.mac.type == e1000_i354))
1189 set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1191 /* apply Rx specific ring traits */
1192 ring->count = adapter->rx_ring_count;
1193 ring->queue_index = rxr_idx;
1195 /* assign ring to adapter */
1196 adapter->rx_ring[rxr_idx] = ring;
1203 * igb_alloc_q_vectors - Allocate memory for interrupt vectors
1204 * @adapter: board private structure to initialize
1206 * We allocate one q_vector per queue interrupt. If allocation fails we
1209 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1211 int q_vectors = adapter->num_q_vectors;
1212 int rxr_remaining = adapter->num_rx_queues;
1213 int txr_remaining = adapter->num_tx_queues;
1214 int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1217 if (q_vectors >= (rxr_remaining + txr_remaining)) {
1218 for (; rxr_remaining; v_idx++) {
1219 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1225 /* update counts and index */
1231 for (; v_idx < q_vectors; v_idx++) {
1232 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1233 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1234 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1235 tqpv, txr_idx, rqpv, rxr_idx);
1240 /* update counts and index */
1241 rxr_remaining -= rqpv;
1242 txr_remaining -= tqpv;
1250 adapter->num_tx_queues = 0;
1251 adapter->num_rx_queues = 0;
1252 adapter->num_q_vectors = 0;
1255 igb_free_q_vector(adapter, v_idx);
1261 * igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1263 * This function initializes the interrupts and allocates all of the queues.
1265 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1267 struct pci_dev *pdev = adapter->pdev;
1270 igb_set_interrupt_capability(adapter, msix);
1272 err = igb_alloc_q_vectors(adapter);
1274 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for vectors\n");
1275 goto err_alloc_q_vectors;
1278 igb_cache_ring_register(adapter);
1282 err_alloc_q_vectors:
1283 igb_reset_interrupt_capability(adapter);
1288 * igb_request_irq - initialize interrupts
1290 * Attempts to configure interrupts using the best available
1291 * capabilities of the hardware and kernel.
1293 static int igb_request_irq(struct igb_adapter *adapter)
1295 struct net_device *netdev = adapter->netdev;
1296 struct pci_dev *pdev = adapter->pdev;
1299 if (adapter->msix_entries) {
1300 err = igb_request_msix(adapter);
1303 /* fall back to MSI */
1304 igb_free_all_tx_resources(adapter);
1305 igb_free_all_rx_resources(adapter);
1307 igb_clear_interrupt_scheme(adapter);
1308 igb_reset_sriov_capability(adapter);
1309 err = igb_init_interrupt_scheme(adapter, false);
1312 igb_setup_all_tx_resources(adapter);
1313 igb_setup_all_rx_resources(adapter);
1314 igb_configure(adapter);
1317 igb_assign_vector(adapter->q_vector[0], 0);
1319 if (adapter->flags & IGB_FLAG_HAS_MSI) {
1320 err = request_irq(pdev->irq, &igb_intr_msi, 0,
1321 netdev->name, adapter);
1325 /* fall back to legacy interrupts */
1326 igb_reset_interrupt_capability(adapter);
1327 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1330 err = request_irq(pdev->irq, &igb_intr, IRQF_SHARED,
1331 netdev->name, adapter);
1334 dev_err(pci_dev_to_dev(pdev), "Error %d getting interrupt\n",
1341 static void igb_free_irq(struct igb_adapter *adapter)
1343 if (adapter->msix_entries) {
1346 free_irq(adapter->msix_entries[vector++].vector, adapter);
1348 for (i = 0; i < adapter->num_q_vectors; i++)
1349 free_irq(adapter->msix_entries[vector++].vector,
1350 adapter->q_vector[i]);
1352 free_irq(adapter->pdev->irq, adapter);
1357 * igb_irq_disable - Mask off interrupt generation on the NIC
1358 * @adapter: board private structure
1360 static void igb_irq_disable(struct igb_adapter *adapter)
1362 struct e1000_hw *hw = &adapter->hw;
1365 * we need to be careful when disabling interrupts. The VFs are also
1366 * mapped into these registers and so clearing the bits can cause
1367 * issues on the VF drivers so we only need to clear what we set
1369 if (adapter->msix_entries) {
1370 u32 regval = E1000_READ_REG(hw, E1000_EIAM);
1371 E1000_WRITE_REG(hw, E1000_EIAM, regval & ~adapter->eims_enable_mask);
1372 E1000_WRITE_REG(hw, E1000_EIMC, adapter->eims_enable_mask);
1373 regval = E1000_READ_REG(hw, E1000_EIAC);
1374 E1000_WRITE_REG(hw, E1000_EIAC, regval & ~adapter->eims_enable_mask);
1377 E1000_WRITE_REG(hw, E1000_IAM, 0);
1378 E1000_WRITE_REG(hw, E1000_IMC, ~0);
1379 E1000_WRITE_FLUSH(hw);
1381 if (adapter->msix_entries) {
1384 synchronize_irq(adapter->msix_entries[vector++].vector);
1386 for (i = 0; i < adapter->num_q_vectors; i++)
1387 synchronize_irq(adapter->msix_entries[vector++].vector);
1389 synchronize_irq(adapter->pdev->irq);
1394 * igb_irq_enable - Enable default interrupt generation settings
1395 * @adapter: board private structure
1397 static void igb_irq_enable(struct igb_adapter *adapter)
1399 struct e1000_hw *hw = &adapter->hw;
1401 if (adapter->msix_entries) {
1402 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1403 u32 regval = E1000_READ_REG(hw, E1000_EIAC);
1404 E1000_WRITE_REG(hw, E1000_EIAC, regval | adapter->eims_enable_mask);
1405 regval = E1000_READ_REG(hw, E1000_EIAM);
1406 E1000_WRITE_REG(hw, E1000_EIAM, regval | adapter->eims_enable_mask);
1407 E1000_WRITE_REG(hw, E1000_EIMS, adapter->eims_enable_mask);
1408 if (adapter->vfs_allocated_count) {
1409 E1000_WRITE_REG(hw, E1000_MBVFIMR, 0xFF);
1410 ims |= E1000_IMS_VMMB;
1412 if ((adapter->hw.mac.type == e1000_i350) ||
1413 (adapter->hw.mac.type == e1000_i354))
1414 ims |= E1000_IMS_MDDET;
1416 E1000_WRITE_REG(hw, E1000_IMS, ims);
1418 E1000_WRITE_REG(hw, E1000_IMS, IMS_ENABLE_MASK |
1420 E1000_WRITE_REG(hw, E1000_IAM, IMS_ENABLE_MASK |
1425 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1427 struct e1000_hw *hw = &adapter->hw;
1428 u16 vid = adapter->hw.mng_cookie.vlan_id;
1429 u16 old_vid = adapter->mng_vlan_id;
1431 if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1432 /* add VID to filter table */
1433 igb_vfta_set(adapter, vid, TRUE);
1434 adapter->mng_vlan_id = vid;
1436 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1439 if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1441 #ifdef HAVE_VLAN_RX_REGISTER
1442 !vlan_group_get_device(adapter->vlgrp, old_vid)) {
1444 !test_bit(old_vid, adapter->active_vlans)) {
1446 /* remove VID from filter table */
1447 igb_vfta_set(adapter, old_vid, FALSE);
1452 * igb_release_hw_control - release control of the h/w to f/w
1453 * @adapter: address of board private structure
1455 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1456 * For ASF and Pass Through versions of f/w this means that the
1457 * driver is no longer loaded.
1460 static void igb_release_hw_control(struct igb_adapter *adapter)
1462 struct e1000_hw *hw = &adapter->hw;
1465 /* Let firmware take over control of h/w */
1466 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1467 E1000_WRITE_REG(hw, E1000_CTRL_EXT,
1468 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1472 * igb_get_hw_control - get control of the h/w from f/w
1473 * @adapter: address of board private structure
1475 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1476 * For ASF and Pass Through versions of f/w this means that
1477 * the driver is loaded.
1480 static void igb_get_hw_control(struct igb_adapter *adapter)
1482 struct e1000_hw *hw = &adapter->hw;
1485 /* Let firmware know the driver has taken over */
1486 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1487 E1000_WRITE_REG(hw, E1000_CTRL_EXT,
1488 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1492 * igb_configure - configure the hardware for RX and TX
1493 * @adapter: private board structure
1495 static void igb_configure(struct igb_adapter *adapter)
1497 struct net_device *netdev = adapter->netdev;
1500 igb_get_hw_control(adapter);
1501 igb_set_rx_mode(netdev);
1503 igb_restore_vlan(adapter);
1505 igb_setup_tctl(adapter);
1506 igb_setup_mrqc(adapter);
1507 igb_setup_rctl(adapter);
1509 igb_configure_tx(adapter);
1510 igb_configure_rx(adapter);
1512 e1000_rx_fifo_flush_82575(&adapter->hw);
1513 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1514 if (adapter->num_tx_queues > 1)
1515 netdev->features |= NETIF_F_MULTI_QUEUE;
1517 netdev->features &= ~NETIF_F_MULTI_QUEUE;
1520 /* call igb_desc_unused which always leaves
1521 * at least 1 descriptor unused to make sure
1522 * next_to_use != next_to_clean */
1523 for (i = 0; i < adapter->num_rx_queues; i++) {
1524 struct igb_ring *ring = adapter->rx_ring[i];
1525 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
1530 * igb_power_up_link - Power up the phy/serdes link
1531 * @adapter: address of board private structure
1533 void igb_power_up_link(struct igb_adapter *adapter)
1535 e1000_phy_hw_reset(&adapter->hw);
1537 if (adapter->hw.phy.media_type == e1000_media_type_copper)
1538 e1000_power_up_phy(&adapter->hw);
1540 e1000_power_up_fiber_serdes_link(&adapter->hw);
1544 * igb_power_down_link - Power down the phy/serdes link
1545 * @adapter: address of board private structure
1547 static void igb_power_down_link(struct igb_adapter *adapter)
1549 if (adapter->hw.phy.media_type == e1000_media_type_copper)
1550 e1000_power_down_phy(&adapter->hw);
1552 e1000_shutdown_fiber_serdes_link(&adapter->hw);
1555 /* Detect and switch function for Media Auto Sense */
1556 static void igb_check_swap_media(struct igb_adapter *adapter)
1558 struct e1000_hw *hw = &adapter->hw;
1559 u32 ctrl_ext, connsw;
1560 bool swap_now = false;
1563 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1564 connsw = E1000_READ_REG(hw, E1000_CONNSW);
1565 link = igb_has_link(adapter);
1568 /* need to live swap if current media is copper and we have fiber/serdes
1572 if ((hw->phy.media_type == e1000_media_type_copper) &&
1573 (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
1575 } else if (!(connsw & E1000_CONNSW_SERDESD)) {
1576 /* copper signal takes time to appear */
1577 if (adapter->copper_tries < 2) {
1578 adapter->copper_tries++;
1579 connsw |= E1000_CONNSW_AUTOSENSE_CONF;
1580 E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1583 adapter->copper_tries = 0;
1584 if ((connsw & E1000_CONNSW_PHYSD) &&
1585 (!(connsw & E1000_CONNSW_PHY_PDN))) {
1587 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
1588 E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1594 switch (hw->phy.media_type) {
1595 case e1000_media_type_copper:
1596 dev_info(pci_dev_to_dev(adapter->pdev),
1597 "%s:MAS: changing media to fiber/serdes\n",
1598 adapter->netdev->name);
1600 E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1601 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1602 adapter->copper_tries = 0;
1604 case e1000_media_type_internal_serdes:
1605 case e1000_media_type_fiber:
1606 dev_info(pci_dev_to_dev(adapter->pdev),
1607 "%s:MAS: changing media to copper\n",
1608 adapter->netdev->name);
1610 ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1611 adapter->flags |= IGB_FLAG_MEDIA_RESET;
1614 /* shouldn't get here during regular operation */
1615 dev_err(pci_dev_to_dev(adapter->pdev),
1616 "%s:AMS: Invalid media type found, returning\n",
1617 adapter->netdev->name);
1620 E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
1624 #ifdef HAVE_I2C_SUPPORT
1625 /* igb_get_i2c_data - Reads the I2C SDA data bit
1626 * @hw: pointer to hardware structure
1627 * @i2cctl: Current value of I2CCTL register
1629 * Returns the I2C data bit value
1631 static int igb_get_i2c_data(void *data)
1633 struct igb_adapter *adapter = data;
1634 struct e1000_hw *hw = &adapter->hw;
1635 s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1637 return (i2cctl & E1000_I2C_DATA_IN) != 0;
1640 /* igb_set_i2c_data - Sets the I2C data bit
1641 * @data: pointer to hardware structure
1642 * @state: I2C data value (0 or 1) to set
1644 * Sets the I2C data bit
1646 static void igb_set_i2c_data(void *data, int state)
1648 struct igb_adapter *adapter = data;
1649 struct e1000_hw *hw = &adapter->hw;
1650 s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1653 i2cctl |= E1000_I2C_DATA_OUT;
1655 i2cctl &= ~E1000_I2C_DATA_OUT;
1657 i2cctl &= ~E1000_I2C_DATA_OE_N;
1658 i2cctl |= E1000_I2C_CLK_OE_N;
1660 E1000_WRITE_REG(hw, E1000_I2CPARAMS, i2cctl);
1661 E1000_WRITE_FLUSH(hw);
1665 /* igb_set_i2c_clk - Sets the I2C SCL clock
1666 * @data: pointer to hardware structure
1667 * @state: state to set clock
1669 * Sets the I2C clock line to state
1671 static void igb_set_i2c_clk(void *data, int state)
1673 struct igb_adapter *adapter = data;
1674 struct e1000_hw *hw = &adapter->hw;
1675 s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1678 i2cctl |= E1000_I2C_CLK_OUT;
1679 i2cctl &= ~E1000_I2C_CLK_OE_N;
1681 i2cctl &= ~E1000_I2C_CLK_OUT;
1682 i2cctl &= ~E1000_I2C_CLK_OE_N;
1684 E1000_WRITE_REG(hw, E1000_I2CPARAMS, i2cctl);
1685 E1000_WRITE_FLUSH(hw);
1688 /* igb_get_i2c_clk - Gets the I2C SCL clock state
1689 * @data: pointer to hardware structure
1691 * Gets the I2C clock state
1693 static int igb_get_i2c_clk(void *data)
1695 struct igb_adapter *adapter = data;
1696 struct e1000_hw *hw = &adapter->hw;
1697 s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1699 return (i2cctl & E1000_I2C_CLK_IN) != 0;
1702 static const struct i2c_algo_bit_data igb_i2c_algo = {
1703 .setsda = igb_set_i2c_data,
1704 .setscl = igb_set_i2c_clk,
1705 .getsda = igb_get_i2c_data,
1706 .getscl = igb_get_i2c_clk,
1711 /* igb_init_i2c - Init I2C interface
1712 * @adapter: pointer to adapter structure
1715 static s32 igb_init_i2c(struct igb_adapter *adapter)
1717 s32 status = E1000_SUCCESS;
1719 /* I2C interface supported on i350 devices */
1720 if (adapter->hw.mac.type != e1000_i350)
1721 return E1000_SUCCESS;
1723 /* Initialize the i2c bus which is controlled by the registers.
1724 * This bus will use the i2c_algo_bit structue that implements
1725 * the protocol through toggling of the 4 bits in the register.
1727 adapter->i2c_adap.owner = THIS_MODULE;
1728 adapter->i2c_algo = igb_i2c_algo;
1729 adapter->i2c_algo.data = adapter;
1730 adapter->i2c_adap.algo_data = &adapter->i2c_algo;
1731 adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
1732 strlcpy(adapter->i2c_adap.name, "igb BB",
1733 sizeof(adapter->i2c_adap.name));
1734 status = i2c_bit_add_bus(&adapter->i2c_adap);
1738 #endif /* HAVE_I2C_SUPPORT */
1740 * igb_up - Open the interface and prepare it to handle traffic
1741 * @adapter: board private structure
1743 int igb_up(struct igb_adapter *adapter)
1745 struct e1000_hw *hw = &adapter->hw;
1748 /* hardware has been reset, we need to reload some things */
1749 igb_configure(adapter);
1751 clear_bit(__IGB_DOWN, &adapter->state);
1753 for (i = 0; i < adapter->num_q_vectors; i++)
1754 napi_enable(&(adapter->q_vector[i]->napi));
1756 if (adapter->msix_entries)
1757 igb_configure_msix(adapter);
1759 igb_assign_vector(adapter->q_vector[0], 0);
1761 igb_configure_lli(adapter);
1763 /* Clear any pending interrupts. */
1764 E1000_READ_REG(hw, E1000_ICR);
1765 igb_irq_enable(adapter);
1767 /* notify VFs that reset has been completed */
1768 if (adapter->vfs_allocated_count) {
1769 u32 reg_data = E1000_READ_REG(hw, E1000_CTRL_EXT);
1770 reg_data |= E1000_CTRL_EXT_PFRSTD;
1771 E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg_data);
1774 netif_tx_start_all_queues(adapter->netdev);
1776 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
1777 schedule_work(&adapter->dma_err_task);
1778 /* start the watchdog. */
1779 hw->mac.get_link_status = 1;
1780 schedule_work(&adapter->watchdog_task);
1782 if ((adapter->flags & IGB_FLAG_EEE) &&
1783 (!hw->dev_spec._82575.eee_disable))
1784 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
1789 void igb_down(struct igb_adapter *adapter)
1791 struct net_device *netdev = adapter->netdev;
1792 struct e1000_hw *hw = &adapter->hw;
1796 /* signal that we're down so the interrupt handler does not
1797 * reschedule our watchdog timer */
1798 set_bit(__IGB_DOWN, &adapter->state);
1800 /* disable receives in the hardware */
1801 rctl = E1000_READ_REG(hw, E1000_RCTL);
1802 E1000_WRITE_REG(hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
1803 /* flush and sleep below */
1805 netif_tx_stop_all_queues(netdev);
1807 /* disable transmits in the hardware */
1808 tctl = E1000_READ_REG(hw, E1000_TCTL);
1809 tctl &= ~E1000_TCTL_EN;
1810 E1000_WRITE_REG(hw, E1000_TCTL, tctl);
1811 /* flush both disables and wait for them to finish */
1812 E1000_WRITE_FLUSH(hw);
1813 usleep_range(10000, 20000);
1815 for (i = 0; i < adapter->num_q_vectors; i++)
1816 napi_disable(&(adapter->q_vector[i]->napi));
1818 igb_irq_disable(adapter);
1820 adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
1822 del_timer_sync(&adapter->watchdog_timer);
1823 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
1824 del_timer_sync(&adapter->dma_err_timer);
1825 del_timer_sync(&adapter->phy_info_timer);
1827 netif_carrier_off(netdev);
1829 /* record the stats before reset*/
1830 igb_update_stats(adapter);
1832 adapter->link_speed = 0;
1833 adapter->link_duplex = 0;
1836 if (!pci_channel_offline(adapter->pdev))
1841 igb_clean_all_tx_rings(adapter);
1842 igb_clean_all_rx_rings(adapter);
1844 /* since we reset the hardware DCA settings were cleared */
1845 igb_setup_dca(adapter);
1849 void igb_reinit_locked(struct igb_adapter *adapter)
1851 WARN_ON(in_interrupt());
1852 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1853 usleep_range(1000, 2000);
1856 clear_bit(__IGB_RESETTING, &adapter->state);
1860 * igb_enable_mas - Media Autosense re-enable after swap
1862 * @adapter: adapter struct
1864 static s32 igb_enable_mas(struct igb_adapter *adapter)
1866 struct e1000_hw *hw = &adapter->hw;
1868 s32 ret_val = E1000_SUCCESS;
1870 connsw = E1000_READ_REG(hw, E1000_CONNSW);
1871 if (hw->phy.media_type == e1000_media_type_copper) {
1872 /* configure for SerDes media detect */
1873 if (!(connsw & E1000_CONNSW_SERDESD)) {
1874 connsw |= E1000_CONNSW_ENRGSRC;
1875 connsw |= E1000_CONNSW_AUTOSENSE_EN;
1876 E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1877 E1000_WRITE_FLUSH(hw);
1878 } else if (connsw & E1000_CONNSW_SERDESD) {
1879 /* already SerDes, no need to enable anything */
1882 dev_info(pci_dev_to_dev(adapter->pdev),
1883 "%s:MAS: Unable to configure feature, disabling..\n",
1884 adapter->netdev->name);
1885 adapter->flags &= ~IGB_FLAG_MAS_ENABLE;
1891 void igb_reset(struct igb_adapter *adapter)
1893 struct pci_dev *pdev = adapter->pdev;
1894 struct e1000_hw *hw = &adapter->hw;
1895 struct e1000_mac_info *mac = &hw->mac;
1896 struct e1000_fc_info *fc = &hw->fc;
1897 u32 pba = 0, tx_space, min_tx_space, min_rx_space, hwm;
1899 /* Repartition Pba for greater than 9k mtu
1900 * To take effect CTRL.RST is required.
1902 switch (mac->type) {
1906 pba = E1000_READ_REG(hw, E1000_RXPBS);
1907 pba = e1000_rxpbs_adjust_82580(pba);
1910 pba = E1000_READ_REG(hw, E1000_RXPBS);
1911 pba &= E1000_RXPBS_SIZE_MASK_82576;
1917 pba = E1000_PBA_34K;
1921 if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
1922 (mac->type < e1000_82576)) {
1923 /* adjust PBA for jumbo frames */
1924 E1000_WRITE_REG(hw, E1000_PBA, pba);
1926 /* To maintain wire speed transmits, the Tx FIFO should be
1927 * large enough to accommodate two full transmit packets,
1928 * rounded up to the next 1KB and expressed in KB. Likewise,
1929 * the Rx FIFO should be large enough to accommodate at least
1930 * one full receive packet and is similarly rounded up and
1931 * expressed in KB. */
1932 pba = E1000_READ_REG(hw, E1000_PBA);
1933 /* upper 16 bits has Tx packet buffer allocation size in KB */
1934 tx_space = pba >> 16;
1935 /* lower 16 bits has Rx packet buffer allocation size in KB */
1937 /* the tx fifo also stores 16 bytes of information about the tx
1938 * but don't include ethernet FCS because hardware appends it */
1939 min_tx_space = (adapter->max_frame_size +
1940 sizeof(union e1000_adv_tx_desc) -
1942 min_tx_space = ALIGN(min_tx_space, 1024);
1943 min_tx_space >>= 10;
1944 /* software strips receive CRC, so leave room for it */
1945 min_rx_space = adapter->max_frame_size;
1946 min_rx_space = ALIGN(min_rx_space, 1024);
1947 min_rx_space >>= 10;
1949 /* If current Tx allocation is less than the min Tx FIFO size,
1950 * and the min Tx FIFO size is less than the current Rx FIFO
1951 * allocation, take space away from current Rx allocation */
1952 if (tx_space < min_tx_space &&
1953 ((min_tx_space - tx_space) < pba)) {
1954 pba = pba - (min_tx_space - tx_space);
1956 /* if short on rx space, rx wins and must trump tx
1958 if (pba < min_rx_space)
1961 E1000_WRITE_REG(hw, E1000_PBA, pba);
1964 /* flow control settings */
1965 /* The high water mark must be low enough to fit one full frame
1966 * (or the size used for early receive) above it in the Rx FIFO.
1967 * Set it to the lower of:
1968 * - 90% of the Rx FIFO size, or
1969 * - the full Rx FIFO size minus one full frame */
1970 hwm = min(((pba << 10) * 9 / 10),
1971 ((pba << 10) - 2 * adapter->max_frame_size));
1973 fc->high_water = hwm & 0xFFFFFFF0; /* 16-byte granularity */
1974 fc->low_water = fc->high_water - 16;
1975 fc->pause_time = 0xFFFF;
1977 fc->current_mode = fc->requested_mode;
1979 /* disable receive for all VFs and wait one second */
1980 if (adapter->vfs_allocated_count) {
1983 * Clear all flags except indication that the PF has set
1984 * the VF MAC addresses administratively
1986 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
1987 adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
1989 /* ping all the active vfs to let them know we are going down */
1990 igb_ping_all_vfs(adapter);
1992 /* disable transmits and receives */
1993 E1000_WRITE_REG(hw, E1000_VFRE, 0);
1994 E1000_WRITE_REG(hw, E1000_VFTE, 0);
1997 /* Allow time for pending master requests to run */
1999 E1000_WRITE_REG(hw, E1000_WUC, 0);
2001 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
2002 e1000_setup_init_funcs(hw, TRUE);
2003 igb_check_options(adapter);
2004 e1000_get_bus_info(hw);
2005 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
2007 if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
2008 if (igb_enable_mas(adapter))
2009 dev_err(pci_dev_to_dev(pdev),
2010 "Error enabling Media Auto Sense\n");
2012 if (e1000_init_hw(hw))
2013 dev_err(pci_dev_to_dev(pdev), "Hardware Error\n");
2016 * Flow control settings reset on hardware reset, so guarantee flow
2017 * control is off when forcing speed.
2019 if (!hw->mac.autoneg)
2020 e1000_force_mac_fc(hw);
2022 igb_init_dmac(adapter, pba);
2023 /* Re-initialize the thermal sensor on i350 devices. */
2024 if (mac->type == e1000_i350 && hw->bus.func == 0) {
2026 * If present, re-initialize the external thermal sensor
2030 e1000_set_i2c_bb(hw);
2031 e1000_init_thermal_sensor_thresh(hw);
2034 /*Re-establish EEE setting */
2035 if (hw->phy.media_type == e1000_media_type_copper) {
2036 switch (mac->type) {
2040 e1000_set_eee_i350(hw);
2043 e1000_set_eee_i354(hw);
2050 if (!netif_running(adapter->netdev))
2051 igb_power_down_link(adapter);
2053 igb_update_mng_vlan(adapter);
2055 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2056 E1000_WRITE_REG(hw, E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2059 #ifdef HAVE_PTP_1588_CLOCK
2060 /* Re-enable PTP, where applicable. */
2061 igb_ptp_reset(adapter);
2062 #endif /* HAVE_PTP_1588_CLOCK */
2064 e1000_get_phy_info(hw);
2069 #ifdef HAVE_NDO_SET_FEATURES
2070 static kni_netdev_features_t igb_fix_features(struct net_device *netdev,
2071 kni_netdev_features_t features)
2074 * Since there is no support for separate tx vlan accel
2075 * enabled make sure tx flag is cleared if rx is.
2077 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2078 if (!(features & NETIF_F_HW_VLAN_CTAG_RX))
2079 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2081 if (!(features & NETIF_F_HW_VLAN_RX))
2082 features &= ~NETIF_F_HW_VLAN_TX;
2085 /* If Rx checksum is disabled, then LRO should also be disabled */
2086 if (!(features & NETIF_F_RXCSUM))
2087 features &= ~NETIF_F_LRO;
2092 static int igb_set_features(struct net_device *netdev,
2093 kni_netdev_features_t features)
2095 u32 changed = netdev->features ^ features;
2097 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2098 if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2100 if (changed & NETIF_F_HW_VLAN_RX)
2102 igb_vlan_mode(netdev, features);
2108 #ifdef USE_CONST_DEV_UC_CHAR
2109 static int igb_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
2110 struct net_device *dev,
2111 const unsigned char *addr,
2112 #ifdef HAVE_NDO_FDB_ADD_VID
2117 static int igb_ndo_fdb_add(struct ndmsg *ndm,
2118 struct net_device *dev,
2119 unsigned char *addr,
2123 struct igb_adapter *adapter = netdev_priv(dev);
2124 struct e1000_hw *hw = &adapter->hw;
2127 if (!(adapter->vfs_allocated_count))
2130 /* Hardware does not support aging addresses so if a
2131 * ndm_state is given only allow permanent addresses
2133 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
2134 pr_info("%s: FDB only supports static addresses\n",
2139 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
2140 u32 rar_uc_entries = hw->mac.rar_entry_count -
2141 (adapter->vfs_allocated_count + 1);
2143 if (netdev_uc_count(dev) < rar_uc_entries)
2144 err = dev_uc_add_excl(dev, addr);
2147 } else if (is_multicast_ether_addr(addr)) {
2148 err = dev_mc_add_excl(dev, addr);
2153 /* Only return duplicate errors if NLM_F_EXCL is set */
2154 if (err == -EEXIST && !(flags & NLM_F_EXCL))
2160 #ifndef USE_DEFAULT_FDB_DEL_DUMP
2161 #ifdef USE_CONST_DEV_UC_CHAR
2162 static int igb_ndo_fdb_del(struct ndmsg *ndm,
2163 struct net_device *dev,
2164 const unsigned char *addr)
2166 static int igb_ndo_fdb_del(struct ndmsg *ndm,
2167 struct net_device *dev,
2168 unsigned char *addr)
2171 struct igb_adapter *adapter = netdev_priv(dev);
2172 int err = -EOPNOTSUPP;
2174 if (ndm->ndm_state & NUD_PERMANENT) {
2175 pr_info("%s: FDB only supports static addresses\n",
2180 if (adapter->vfs_allocated_count) {
2181 if (is_unicast_ether_addr(addr))
2182 err = dev_uc_del(dev, addr);
2183 else if (is_multicast_ether_addr(addr))
2184 err = dev_mc_del(dev, addr);
2192 static int igb_ndo_fdb_dump(struct sk_buff *skb,
2193 struct netlink_callback *cb,
2194 struct net_device *dev,
2197 struct igb_adapter *adapter = netdev_priv(dev);
2199 if (adapter->vfs_allocated_count)
2200 idx = ndo_dflt_fdb_dump(skb, cb, dev, idx);
2204 #endif /* USE_DEFAULT_FDB_DEL_DUMP */
2206 #ifdef HAVE_BRIDGE_ATTRIBS
2207 #ifdef HAVE_NDO_BRIDGE_SET_DEL_LINK_FLAGS
2208 static int igb_ndo_bridge_setlink(struct net_device *dev,
2209 struct nlmsghdr *nlh,
2212 static int igb_ndo_bridge_setlink(struct net_device *dev,
2213 struct nlmsghdr *nlh)
2214 #endif /* HAVE_NDO_BRIDGE_SET_DEL_LINK_FLAGS */
2216 struct igb_adapter *adapter = netdev_priv(dev);
2217 struct e1000_hw *hw = &adapter->hw;
2218 struct nlattr *attr, *br_spec;
2221 if (!(adapter->vfs_allocated_count))
2224 switch (adapter->hw.mac.type) {
2233 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
2235 nla_for_each_nested(attr, br_spec, rem) {
2238 if (nla_type(attr) != IFLA_BRIDGE_MODE)
2241 mode = nla_get_u16(attr);
2242 if (mode == BRIDGE_MODE_VEPA) {
2243 e1000_vmdq_set_loopback_pf(hw, 0);
2244 adapter->flags &= ~IGB_FLAG_LOOPBACK_ENABLE;
2245 } else if (mode == BRIDGE_MODE_VEB) {
2246 e1000_vmdq_set_loopback_pf(hw, 1);
2247 adapter->flags |= IGB_FLAG_LOOPBACK_ENABLE;
2251 netdev_info(adapter->netdev, "enabling bridge mode: %s\n",
2252 mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
2258 #ifdef HAVE_BRIDGE_FILTER
2259 #ifdef HAVE_NDO_BRIDGE_GETLINK_NLFLAGS
2260 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2261 struct net_device *dev, u32 filter_mask,
2264 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2265 struct net_device *dev, u32 filter_mask)
2266 #endif /* HAVE_NDO_BRIDGE_GETLINK_NLFLAGS */
2268 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2269 struct net_device *dev)
2272 struct igb_adapter *adapter = netdev_priv(dev);
2275 if (!(adapter->vfs_allocated_count))
2278 if (adapter->flags & IGB_FLAG_LOOPBACK_ENABLE)
2279 mode = BRIDGE_MODE_VEB;
2281 mode = BRIDGE_MODE_VEPA;
2283 #ifdef HAVE_NDO_DFLT_BRIDGE_ADD_MASK
2284 #ifdef HAVE_NDO_BRIDGE_GETLINK_NLFLAGS
2285 #ifdef HAVE_NDO_BRIDGE_GETLINK_FILTER_MASK_VLAN_FILL
2286 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode, 0, 0,
2287 nlflags, filter_mask, NULL);
2289 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode, 0, 0, nlflags);
2290 #endif /* HAVE_NDO_BRIDGE_GETLINK_FILTER_MASK_VLAN_FILL */
2292 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode, 0, 0);
2293 #endif /* HAVE_NDO_BRIDGE_GETLINK_NLFLAGS */
2295 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode);
2296 #endif /* HAVE_NDO_DFLT_BRIDGE_ADD_MASK */
2298 #endif /* HAVE_BRIDGE_ATTRIBS */
2299 #endif /* NTF_SELF */
2301 #endif /* HAVE_NDO_SET_FEATURES */
2302 #ifdef HAVE_NET_DEVICE_OPS
2303 static const struct net_device_ops igb_netdev_ops = {
2304 .ndo_open = igb_open,
2305 .ndo_stop = igb_close,
2306 .ndo_start_xmit = igb_xmit_frame,
2307 .ndo_get_stats = igb_get_stats,
2308 .ndo_set_rx_mode = igb_set_rx_mode,
2309 .ndo_set_mac_address = igb_set_mac,
2310 .ndo_change_mtu = igb_change_mtu,
2311 .ndo_do_ioctl = igb_ioctl,
2312 .ndo_tx_timeout = igb_tx_timeout,
2313 .ndo_validate_addr = eth_validate_addr,
2314 .ndo_vlan_rx_add_vid = igb_vlan_rx_add_vid,
2315 .ndo_vlan_rx_kill_vid = igb_vlan_rx_kill_vid,
2317 .ndo_set_vf_mac = igb_ndo_set_vf_mac,
2318 .ndo_set_vf_vlan = igb_ndo_set_vf_vlan,
2319 #ifdef HAVE_VF_MIN_MAX_TXRATE
2320 .ndo_set_vf_rate = igb_ndo_set_vf_bw,
2321 #else /* HAVE_VF_MIN_MAX_TXRATE */
2322 .ndo_set_vf_tx_rate = igb_ndo_set_vf_bw,
2323 #endif /* HAVE_VF_MIN_MAX_TXRATE */
2324 .ndo_get_vf_config = igb_ndo_get_vf_config,
2325 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
2326 .ndo_set_vf_spoofchk = igb_ndo_set_vf_spoofchk,
2327 #endif /* HAVE_VF_SPOOFCHK_CONFIGURE */
2328 #endif /* IFLA_VF_MAX */
2329 #ifdef CONFIG_NET_POLL_CONTROLLER
2330 .ndo_poll_controller = igb_netpoll,
2332 #ifdef HAVE_NDO_SET_FEATURES
2333 .ndo_fix_features = igb_fix_features,
2334 .ndo_set_features = igb_set_features,
2336 #ifdef HAVE_VLAN_RX_REGISTER
2337 .ndo_vlan_rx_register = igb_vlan_mode,
2339 #ifndef HAVE_RHEL6_NETDEV_OPS_EXT_FDB
2341 .ndo_fdb_add = igb_ndo_fdb_add,
2342 #ifndef USE_DEFAULT_FDB_DEL_DUMP
2343 .ndo_fdb_del = igb_ndo_fdb_del,
2344 .ndo_fdb_dump = igb_ndo_fdb_dump,
2346 #endif /* ! HAVE_RHEL6_NETDEV_OPS_EXT_FDB */
2347 #ifdef HAVE_BRIDGE_ATTRIBS
2348 .ndo_bridge_setlink = igb_ndo_bridge_setlink,
2349 .ndo_bridge_getlink = igb_ndo_bridge_getlink,
2350 #endif /* HAVE_BRIDGE_ATTRIBS */
2354 #ifdef CONFIG_IGB_VMDQ_NETDEV
2355 static const struct net_device_ops igb_vmdq_ops = {
2356 .ndo_open = &igb_vmdq_open,
2357 .ndo_stop = &igb_vmdq_close,
2358 .ndo_start_xmit = &igb_vmdq_xmit_frame,
2359 .ndo_get_stats = &igb_vmdq_get_stats,
2360 .ndo_set_rx_mode = &igb_vmdq_set_rx_mode,
2361 .ndo_validate_addr = eth_validate_addr,
2362 .ndo_set_mac_address = &igb_vmdq_set_mac,
2363 .ndo_change_mtu = &igb_vmdq_change_mtu,
2364 .ndo_tx_timeout = &igb_vmdq_tx_timeout,
2365 .ndo_vlan_rx_register = &igb_vmdq_vlan_rx_register,
2366 .ndo_vlan_rx_add_vid = &igb_vmdq_vlan_rx_add_vid,
2367 .ndo_vlan_rx_kill_vid = &igb_vmdq_vlan_rx_kill_vid,
2370 #endif /* CONFIG_IGB_VMDQ_NETDEV */
2371 #endif /* HAVE_NET_DEVICE_OPS */
2372 #ifdef CONFIG_IGB_VMDQ_NETDEV
2373 void igb_assign_vmdq_netdev_ops(struct net_device *vnetdev)
2375 #ifdef HAVE_NET_DEVICE_OPS
2376 vnetdev->netdev_ops = &igb_vmdq_ops;
2378 dev->open = &igb_vmdq_open;
2379 dev->stop = &igb_vmdq_close;
2380 dev->hard_start_xmit = &igb_vmdq_xmit_frame;
2381 dev->get_stats = &igb_vmdq_get_stats;
2382 #ifdef HAVE_SET_RX_MODE
2383 dev->set_rx_mode = &igb_vmdq_set_rx_mode;
2385 dev->set_multicast_list = &igb_vmdq_set_rx_mode;
2386 dev->set_mac_address = &igb_vmdq_set_mac;
2387 dev->change_mtu = &igb_vmdq_change_mtu;
2388 #ifdef HAVE_TX_TIMEOUT
2389 dev->tx_timeout = &igb_vmdq_tx_timeout;
2391 #if defined(NETIF_F_HW_VLAN_TX) || defined(NETIF_F_HW_VLAN_CTAG_TX)
2392 dev->vlan_rx_register = &igb_vmdq_vlan_rx_register;
2393 dev->vlan_rx_add_vid = &igb_vmdq_vlan_rx_add_vid;
2394 dev->vlan_rx_kill_vid = &igb_vmdq_vlan_rx_kill_vid;
2397 igb_vmdq_set_ethtool_ops(vnetdev);
2398 vnetdev->watchdog_timeo = 5 * HZ;
2402 int igb_init_vmdq_netdevs(struct igb_adapter *adapter)
2404 int pool, err = 0, base_queue;
2405 struct net_device *vnetdev;
2406 struct igb_vmdq_adapter *vmdq_adapter;
2408 for (pool = 1; pool < adapter->vmdq_pools; pool++) {
2409 int qpp = (!adapter->rss_queues ? 1 : adapter->rss_queues);
2410 base_queue = pool * qpp;
2411 vnetdev = alloc_etherdev(sizeof(struct igb_vmdq_adapter));
2416 vmdq_adapter = netdev_priv(vnetdev);
2417 vmdq_adapter->vnetdev = vnetdev;
2418 vmdq_adapter->real_adapter = adapter;
2419 vmdq_adapter->rx_ring = adapter->rx_ring[base_queue];
2420 vmdq_adapter->tx_ring = adapter->tx_ring[base_queue];
2421 igb_assign_vmdq_netdev_ops(vnetdev);
2422 snprintf(vnetdev->name, IFNAMSIZ, "%sv%d",
2423 adapter->netdev->name, pool);
2424 vnetdev->features = adapter->netdev->features;
2425 #ifdef HAVE_NETDEV_VLAN_FEATURES
2426 vnetdev->vlan_features = adapter->netdev->vlan_features;
2428 adapter->vmdq_netdev[pool-1] = vnetdev;
2429 err = register_netdev(vnetdev);
2436 int igb_remove_vmdq_netdevs(struct igb_adapter *adapter)
2440 for (pool = 1; pool < adapter->vmdq_pools; pool++) {
2441 unregister_netdev(adapter->vmdq_netdev[pool-1]);
2442 free_netdev(adapter->vmdq_netdev[pool-1]);
2443 adapter->vmdq_netdev[pool-1] = NULL;
2447 #endif /* CONFIG_IGB_VMDQ_NETDEV */
2450 * igb_set_fw_version - Configure version string for ethtool
2451 * @adapter: adapter struct
2454 static void igb_set_fw_version(struct igb_adapter *adapter)
2456 struct e1000_hw *hw = &adapter->hw;
2457 struct e1000_fw_version fw;
2459 e1000_get_fw_version(hw, &fw);
2461 switch (hw->mac.type) {
2464 if (!(e1000_get_flash_presence_i210(hw))) {
2465 snprintf(adapter->fw_version,
2466 sizeof(adapter->fw_version),
2468 fw.invm_major, fw.invm_minor, fw.invm_img_type);
2473 /* if option rom is valid, display its version too*/
2475 snprintf(adapter->fw_version,
2476 sizeof(adapter->fw_version),
2477 "%d.%d, 0x%08x, %d.%d.%d",
2478 fw.eep_major, fw.eep_minor, fw.etrack_id,
2479 fw.or_major, fw.or_build, fw.or_patch);
2482 if (fw.etrack_id != 0X0000) {
2483 snprintf(adapter->fw_version,
2484 sizeof(adapter->fw_version),
2486 fw.eep_major, fw.eep_minor, fw.etrack_id);
2488 snprintf(adapter->fw_version,
2489 sizeof(adapter->fw_version),
2491 fw.eep_major, fw.eep_minor, fw.eep_build);
2501 * igb_init_mas - init Media Autosense feature if enabled in the NVM
2503 * @adapter: adapter struct
2505 static void igb_init_mas(struct igb_adapter *adapter)
2507 struct e1000_hw *hw = &adapter->hw;
2510 e1000_read_nvm(hw, NVM_COMPAT, 1, &eeprom_data);
2511 switch (hw->bus.func) {
2513 if (eeprom_data & IGB_MAS_ENABLE_0)
2514 adapter->flags |= IGB_FLAG_MAS_ENABLE;
2517 if (eeprom_data & IGB_MAS_ENABLE_1)
2518 adapter->flags |= IGB_FLAG_MAS_ENABLE;
2521 if (eeprom_data & IGB_MAS_ENABLE_2)
2522 adapter->flags |= IGB_FLAG_MAS_ENABLE;
2525 if (eeprom_data & IGB_MAS_ENABLE_3)
2526 adapter->flags |= IGB_FLAG_MAS_ENABLE;
2529 /* Shouldn't get here */
2530 dev_err(pci_dev_to_dev(adapter->pdev),
2531 "%s:AMS: Invalid port configuration, returning\n",
2532 adapter->netdev->name);
2538 * igb_probe - Device Initialization Routine
2539 * @pdev: PCI device information struct
2540 * @ent: entry in igb_pci_tbl
2542 * Returns 0 on success, negative on failure
2544 * igb_probe initializes an adapter identified by a pci_dev structure.
2545 * The OS initialization, configuring of the adapter private structure,
2546 * and a hardware reset occur.
2548 static int __devinit igb_probe(struct pci_dev *pdev,
2549 const struct pci_device_id *ent)
2551 struct net_device *netdev;
2552 struct igb_adapter *adapter;
2553 struct e1000_hw *hw;
2554 u16 eeprom_data = 0;
2555 u8 pba_str[E1000_PBANUM_LENGTH];
2557 static int global_quad_port_a; /* global quad port a indication */
2558 int i, err, pci_using_dac;
2559 static int cards_found;
2561 err = pci_enable_device_mem(pdev);
2566 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
2568 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
2572 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
2574 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
2576 IGB_ERR("No usable DMA configuration, "
2583 #ifndef HAVE_ASPM_QUIRKS
2584 /* 82575 requires that the pci-e link partner disable the L0s state */
2585 switch (pdev->device) {
2586 case E1000_DEV_ID_82575EB_COPPER:
2587 case E1000_DEV_ID_82575EB_FIBER_SERDES:
2588 case E1000_DEV_ID_82575GB_QUAD_COPPER:
2589 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
2594 #endif /* HAVE_ASPM_QUIRKS */
2595 err = pci_request_selected_regions(pdev,
2596 pci_select_bars(pdev,
2602 pci_enable_pcie_error_reporting(pdev);
2604 pci_set_master(pdev);
2608 netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
2611 netdev = alloc_etherdev(sizeof(struct igb_adapter));
2612 #endif /* HAVE_TX_MQ */
2614 goto err_alloc_etherdev;
2616 SET_MODULE_OWNER(netdev);
2617 SET_NETDEV_DEV(netdev, &pdev->dev);
2619 pci_set_drvdata(pdev, netdev);
2620 adapter = netdev_priv(netdev);
2621 adapter->netdev = netdev;
2622 adapter->pdev = pdev;
2625 adapter->port_num = hw->bus.func;
2626 adapter->msg_enable = (1 << debug) - 1;
2629 err = pci_save_state(pdev);
2634 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
2635 pci_resource_len(pdev, 0));
2639 #ifdef HAVE_NET_DEVICE_OPS
2640 netdev->netdev_ops = &igb_netdev_ops;
2641 #else /* HAVE_NET_DEVICE_OPS */
2642 netdev->open = &igb_open;
2643 netdev->stop = &igb_close;
2644 netdev->get_stats = &igb_get_stats;
2645 #ifdef HAVE_SET_RX_MODE
2646 netdev->set_rx_mode = &igb_set_rx_mode;
2648 netdev->set_multicast_list = &igb_set_rx_mode;
2649 netdev->set_mac_address = &igb_set_mac;
2650 netdev->change_mtu = &igb_change_mtu;
2651 netdev->do_ioctl = &igb_ioctl;
2652 #ifdef HAVE_TX_TIMEOUT
2653 netdev->tx_timeout = &igb_tx_timeout;
2655 netdev->vlan_rx_register = igb_vlan_mode;
2656 netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
2657 netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
2658 #ifdef CONFIG_NET_POLL_CONTROLLER
2659 netdev->poll_controller = igb_netpoll;
2661 netdev->hard_start_xmit = &igb_xmit_frame;
2662 #endif /* HAVE_NET_DEVICE_OPS */
2663 igb_set_ethtool_ops(netdev);
2664 #ifdef HAVE_TX_TIMEOUT
2665 netdev->watchdog_timeo = 5 * HZ;
2668 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
2670 adapter->bd_number = cards_found;
2672 /* setup the private structure */
2673 err = igb_sw_init(adapter);
2677 e1000_get_bus_info(hw);
2679 hw->phy.autoneg_wait_to_complete = FALSE;
2680 hw->mac.adaptive_ifs = FALSE;
2682 /* Copper options */
2683 if (hw->phy.media_type == e1000_media_type_copper) {
2684 hw->phy.mdix = AUTO_ALL_MODES;
2685 hw->phy.disable_polarity_correction = FALSE;
2686 hw->phy.ms_type = e1000_ms_hw_default;
2689 if (e1000_check_reset_block(hw))
2690 dev_info(pci_dev_to_dev(pdev),
2691 "PHY reset is blocked due to SOL/IDER session.\n");
2694 * features is initialized to 0 in allocation, it might have bits
2695 * set by igb_sw_init so we should use an or instead of an
2698 netdev->features |= NETIF_F_SG |
2700 #ifdef NETIF_F_IPV6_CSUM
2708 #endif /* NETIF_F_TSO */
2709 #ifdef NETIF_F_RXHASH
2713 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2714 NETIF_F_HW_VLAN_CTAG_RX |
2715 NETIF_F_HW_VLAN_CTAG_TX;
2717 NETIF_F_HW_VLAN_RX |
2721 if (hw->mac.type >= e1000_82576)
2722 netdev->features |= NETIF_F_SCTP_CSUM;
2724 #ifdef HAVE_NDO_SET_FEATURES
2725 /* copy netdev features into list of user selectable features */
2726 netdev->hw_features |= netdev->features;
2729 /* give us the option of enabling LRO later */
2730 netdev->hw_features |= NETIF_F_LRO;
2735 /* this is only needed on kernels prior to 2.6.39 */
2736 netdev->features |= NETIF_F_GRO;
2740 /* set this bit last since it cannot be part of hw_features */
2741 #ifdef NETIF_F_HW_VLAN_CTAG_FILTER
2742 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
2744 netdev->features |= NETIF_F_HW_VLAN_FILTER;
2747 #ifdef HAVE_NETDEV_VLAN_FEATURES
2748 netdev->vlan_features |= NETIF_F_TSO |
2756 netdev->features |= NETIF_F_HIGHDMA;
2758 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2760 if (adapter->dmac != IGB_DMAC_DISABLE)
2761 printk("%s: DMA Coalescing is enabled..\n", netdev->name);
2764 /* before reading the NVM, reset the controller to put the device in a
2765 * known good starting state */
2768 /* make sure the NVM is good */
2769 if (e1000_validate_nvm_checksum(hw) < 0) {
2770 dev_err(pci_dev_to_dev(pdev), "The NVM Checksum Is Not"
2776 /* copy the MAC address out of the NVM */
2777 if (e1000_read_mac_addr(hw))
2778 dev_err(pci_dev_to_dev(pdev), "NVM Read Error\n");
2779 memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2780 #ifdef ETHTOOL_GPERMADDR
2781 memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
2783 if (!is_valid_ether_addr(netdev->perm_addr)) {
2785 if (!is_valid_ether_addr(netdev->dev_addr)) {
2787 dev_err(pci_dev_to_dev(pdev), "Invalid MAC Address\n");
2792 memcpy(&adapter->mac_table[0].addr, hw->mac.addr, netdev->addr_len);
2793 adapter->mac_table[0].queue = adapter->vfs_allocated_count;
2794 adapter->mac_table[0].state = (IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE);
2795 igb_rar_set(adapter, 0);
2797 /* get firmware version for ethtool -i */
2798 igb_set_fw_version(adapter);
2800 /* Check if Media Autosense is enabled */
2801 if (hw->mac.type == e1000_82580)
2802 igb_init_mas(adapter);
2803 #ifdef HAVE_TIMER_SETUP
2804 timer_setup(&adapter->watchdog_timer, &igb_watchdog, 0);
2805 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
2806 timer_setup(&adapter->dma_err_timer, &igb_dma_err_timer, 0);
2807 timer_setup(&adapter->phy_info_timer, &igb_update_phy_info, 0);
2809 setup_timer(&adapter->watchdog_timer, &igb_watchdog,
2810 (unsigned long) adapter);
2811 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
2812 setup_timer(&adapter->dma_err_timer, &igb_dma_err_timer,
2813 (unsigned long) adapter);
2814 setup_timer(&adapter->phy_info_timer, &igb_update_phy_info,
2815 (unsigned long) adapter);
2818 INIT_WORK(&adapter->reset_task, igb_reset_task);
2819 INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2820 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
2821 INIT_WORK(&adapter->dma_err_task, igb_dma_err_task);
2823 /* Initialize link properties that are user-changeable */
2824 adapter->fc_autoneg = true;
2825 hw->mac.autoneg = true;
2826 hw->phy.autoneg_advertised = 0x2f;
2828 hw->fc.requested_mode = e1000_fc_default;
2829 hw->fc.current_mode = e1000_fc_default;
2831 e1000_validate_mdi_setting(hw);
2833 /* By default, support wake on port A */
2834 if (hw->bus.func == 0)
2835 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2837 /* Check the NVM for wake support for non-port A ports */
2838 if (hw->mac.type >= e1000_82580)
2839 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2840 NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2842 else if (hw->bus.func == 1)
2843 e1000_read_nvm(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
2845 if (eeprom_data & IGB_EEPROM_APME)
2846 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2848 /* now that we have the eeprom settings, apply the special cases where
2849 * the eeprom may be wrong or the board simply won't support wake on
2850 * lan on a particular port */
2851 switch (pdev->device) {
2852 case E1000_DEV_ID_82575GB_QUAD_COPPER:
2853 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2855 case E1000_DEV_ID_82575EB_FIBER_SERDES:
2856 case E1000_DEV_ID_82576_FIBER:
2857 case E1000_DEV_ID_82576_SERDES:
2858 /* Wake events only supported on port A for dual fiber
2859 * regardless of eeprom setting */
2860 if (E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_FUNC_1)
2861 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2863 case E1000_DEV_ID_82576_QUAD_COPPER:
2864 case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
2865 /* if quad port adapter, disable WoL on all but port A */
2866 if (global_quad_port_a != 0)
2867 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2869 adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2870 /* Reset for multiple quad port adapters */
2871 if (++global_quad_port_a == 4)
2872 global_quad_port_a = 0;
2875 /* If the device can't wake, don't set software support */
2876 if (!device_can_wakeup(&adapter->pdev->dev))
2877 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2881 /* initialize the wol settings based on the eeprom settings */
2882 if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
2883 adapter->wol |= E1000_WUFC_MAG;
2885 /* Some vendors want WoL disabled by default, but still supported */
2886 if ((hw->mac.type == e1000_i350) &&
2887 (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
2888 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2892 device_set_wakeup_enable(pci_dev_to_dev(adapter->pdev),
2893 adapter->flags & IGB_FLAG_WOL_SUPPORTED);
2895 /* reset the hardware with the new settings */
2899 #ifdef HAVE_I2C_SUPPORT
2900 /* Init the I2C interface */
2901 err = igb_init_i2c(adapter);
2903 dev_err(&pdev->dev, "failed to init i2c interface\n");
2906 #endif /* HAVE_I2C_SUPPORT */
2908 /* let the f/w know that the h/w is now under the control of the
2910 igb_get_hw_control(adapter);
2912 strncpy(netdev->name, "eth%d", IFNAMSIZ);
2913 err = register_netdev(netdev);
2917 #ifdef CONFIG_IGB_VMDQ_NETDEV
2918 err = igb_init_vmdq_netdevs(adapter);
2922 /* carrier off reporting is important to ethtool even BEFORE open */
2923 netif_carrier_off(netdev);
2926 if (dca_add_requester(&pdev->dev) == E1000_SUCCESS) {
2927 adapter->flags |= IGB_FLAG_DCA_ENABLED;
2928 dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
2929 igb_setup_dca(adapter);
2933 #ifdef HAVE_PTP_1588_CLOCK
2934 /* do hw tstamp init after resetting */
2935 igb_ptp_init(adapter);
2936 #endif /* HAVE_PTP_1588_CLOCK */
2938 dev_info(pci_dev_to_dev(pdev), "Intel(R) Gigabit Ethernet Network Connection\n");
2939 /* print bus type/speed/width info */
2940 dev_info(pci_dev_to_dev(pdev), "%s: (PCIe:%s:%s) ",
2942 ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5GT/s" :
2943 (hw->bus.speed == e1000_bus_speed_5000) ? "5.0GT/s" :
2944 (hw->mac.type == e1000_i354) ? "integrated" :
2946 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
2947 (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :
2948 (hw->bus.width == e1000_bus_width_pcie_x1) ? "Width x1" :
2949 (hw->mac.type == e1000_i354) ? "integrated" :
2951 dev_info(pci_dev_to_dev(pdev), "%s: MAC: ", netdev->name);
2952 for (i = 0; i < 6; i++)
2953 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
2955 ret_val = e1000_read_pba_string(hw, pba_str, E1000_PBANUM_LENGTH);
2957 strncpy(pba_str, "Unknown", sizeof(pba_str) - 1);
2958 dev_info(pci_dev_to_dev(pdev), "%s: PBA No: %s\n", netdev->name,
2962 /* Initialize the thermal sensor on i350 devices. */
2963 if (hw->mac.type == e1000_i350) {
2964 if (hw->bus.func == 0) {
2968 * Read the NVM to determine if this i350 device
2969 * supports an external thermal sensor.
2971 e1000_read_nvm(hw, NVM_ETS_CFG, 1, &ets_word);
2972 if (ets_word != 0x0000 && ets_word != 0xFFFF)
2973 adapter->ets = true;
2975 adapter->ets = false;
2979 igb_sysfs_init(adapter);
2983 igb_procfs_init(adapter);
2984 #endif /* IGB_PROCFS */
2985 #endif /* IGB_HWMON */
2987 adapter->ets = false;
2990 if (hw->phy.media_type == e1000_media_type_copper) {
2991 switch (hw->mac.type) {
2995 /* Enable EEE for internal copper PHY devices */
2996 err = e1000_set_eee_i350(hw);
2998 (adapter->flags & IGB_FLAG_EEE))
2999 adapter->eee_advert =
3000 MDIO_EEE_100TX | MDIO_EEE_1000T;
3003 if ((E1000_READ_REG(hw, E1000_CTRL_EXT)) &
3004 (E1000_CTRL_EXT_LINK_MODE_SGMII)) {
3005 err = e1000_set_eee_i354(hw);
3007 (adapter->flags & IGB_FLAG_EEE))
3008 adapter->eee_advert =
3009 MDIO_EEE_100TX | MDIO_EEE_1000T;
3017 /* send driver version info to firmware */
3018 if (hw->mac.type >= e1000_i350)
3019 igb_init_fw(adapter);
3022 if (netdev->features & NETIF_F_LRO)
3023 dev_info(pci_dev_to_dev(pdev), "Internal LRO is enabled \n");
3025 dev_info(pci_dev_to_dev(pdev), "LRO is disabled \n");
3027 dev_info(pci_dev_to_dev(pdev),
3028 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
3029 adapter->msix_entries ? "MSI-X" :
3030 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
3031 adapter->num_rx_queues, adapter->num_tx_queues);
3035 pm_runtime_put_noidle(&pdev->dev);
3039 igb_release_hw_control(adapter);
3040 #ifdef HAVE_I2C_SUPPORT
3041 memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
3042 #endif /* HAVE_I2C_SUPPORT */
3044 if (!e1000_check_reset_block(hw))
3045 e1000_phy_hw_reset(hw);
3047 if (hw->flash_address)
3048 iounmap(hw->flash_address);
3050 igb_clear_interrupt_scheme(adapter);
3051 igb_reset_sriov_capability(adapter);
3052 iounmap(hw->hw_addr);
3054 free_netdev(netdev);
3056 pci_release_selected_regions(pdev,
3057 pci_select_bars(pdev, IORESOURCE_MEM));
3060 pci_disable_device(pdev);
3063 #ifdef HAVE_I2C_SUPPORT
3065 * igb_remove_i2c - Cleanup I2C interface
3066 * @adapter: pointer to adapter structure
3069 static void igb_remove_i2c(struct igb_adapter *adapter)
3072 /* free the adapter bus structure */
3073 i2c_del_adapter(&adapter->i2c_adap);
3075 #endif /* HAVE_I2C_SUPPORT */
3078 * igb_remove - Device Removal Routine
3079 * @pdev: PCI device information struct
3081 * igb_remove is called by the PCI subsystem to alert the driver
3082 * that it should release a PCI device. The could be caused by a
3083 * Hot-Plug event, or because the driver is going to be removed from
3086 static void __devexit igb_remove(struct pci_dev *pdev)
3088 struct net_device *netdev = pci_get_drvdata(pdev);
3089 struct igb_adapter *adapter = netdev_priv(netdev);
3090 struct e1000_hw *hw = &adapter->hw;
3092 pm_runtime_get_noresume(&pdev->dev);
3093 #ifdef HAVE_I2C_SUPPORT
3094 igb_remove_i2c(adapter);
3095 #endif /* HAVE_I2C_SUPPORT */
3096 #ifdef HAVE_PTP_1588_CLOCK
3097 igb_ptp_stop(adapter);
3098 #endif /* HAVE_PTP_1588_CLOCK */
3100 /* flush_scheduled work may reschedule our watchdog task, so
3101 * explicitly disable watchdog tasks from being rescheduled */
3102 set_bit(__IGB_DOWN, &adapter->state);
3103 del_timer_sync(&adapter->watchdog_timer);
3104 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
3105 del_timer_sync(&adapter->dma_err_timer);
3106 del_timer_sync(&adapter->phy_info_timer);
3108 flush_scheduled_work();
3111 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
3112 dev_info(pci_dev_to_dev(pdev), "DCA disabled\n");
3113 dca_remove_requester(&pdev->dev);
3114 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
3115 E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_DISABLE);
3119 /* Release control of h/w to f/w. If f/w is AMT enabled, this
3120 * would have already happened in close and is redundant. */
3121 igb_release_hw_control(adapter);
3123 unregister_netdev(netdev);
3124 #ifdef CONFIG_IGB_VMDQ_NETDEV
3125 igb_remove_vmdq_netdevs(adapter);
3128 igb_clear_interrupt_scheme(adapter);
3129 igb_reset_sriov_capability(adapter);
3131 iounmap(hw->hw_addr);
3132 if (hw->flash_address)
3133 iounmap(hw->flash_address);
3134 pci_release_selected_regions(pdev,
3135 pci_select_bars(pdev, IORESOURCE_MEM));
3138 igb_sysfs_exit(adapter);
3141 igb_procfs_exit(adapter);
3142 #endif /* IGB_PROCFS */
3143 #endif /* IGB_HWMON */
3144 kfree(adapter->mac_table);
3145 kfree(adapter->shadow_vfta);
3146 free_netdev(netdev);
3148 pci_disable_pcie_error_reporting(pdev);
3150 pci_disable_device(pdev);
3154 * igb_sw_init - Initialize general software structures (struct igb_adapter)
3155 * @adapter: board private structure to initialize
3157 * igb_sw_init initializes the Adapter private data structure.
3158 * Fields are initialized based on PCI device information and
3159 * OS network device settings (MTU size).
3161 static int igb_sw_init(struct igb_adapter *adapter)
3163 struct e1000_hw *hw = &adapter->hw;
3164 struct net_device *netdev = adapter->netdev;
3165 struct pci_dev *pdev = adapter->pdev;
3167 /* PCI config space info */
3169 hw->vendor_id = pdev->vendor;
3170 hw->device_id = pdev->device;
3171 hw->subsystem_vendor_id = pdev->subsystem_vendor;
3172 hw->subsystem_device_id = pdev->subsystem_device;
3174 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
3176 pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
3178 /* set default ring sizes */
3179 adapter->tx_ring_count = IGB_DEFAULT_TXD;
3180 adapter->rx_ring_count = IGB_DEFAULT_RXD;
3182 /* set default work limits */
3183 adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
3185 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
3188 /* Initialize the hardware-specific values */
3189 if (e1000_setup_init_funcs(hw, TRUE)) {
3190 dev_err(pci_dev_to_dev(pdev), "Hardware Initialization Failure\n");
3194 adapter->mac_table = kzalloc(sizeof(struct igb_mac_addr) *
3195 hw->mac.rar_entry_count,
3198 /* Setup and initialize a copy of the hw vlan table array */
3199 adapter->shadow_vfta = kzalloc(sizeof(u32) * E1000_VFTA_ENTRIES,
3202 /* These calls may decrease the number of queues */
3203 if (hw->mac.type < e1000_i210) {
3204 igb_set_sriov_capability(adapter);
3207 if (igb_init_interrupt_scheme(adapter, true)) {
3208 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for queues\n");
3212 /* Explicitly disable IRQ since the NIC can be in any state. */
3213 igb_irq_disable(adapter);
3215 set_bit(__IGB_DOWN, &adapter->state);
3221 * igb_open - Called when a network interface is made active
3222 * @netdev: network interface device structure
3224 * Returns 0 on success, negative value on failure
3226 * The open entry point is called when a network interface is made
3227 * active by the system (IFF_UP). At this point all resources needed
3228 * for transmit and receive operations are allocated, the interrupt
3229 * handler is registered with the OS, the watchdog timer is started,
3230 * and the stack is notified that the interface is ready.
3232 static int __igb_open(struct net_device *netdev, bool resuming)
3234 struct igb_adapter *adapter = netdev_priv(netdev);
3235 struct e1000_hw *hw = &adapter->hw;
3236 #ifdef CONFIG_PM_RUNTIME
3237 struct pci_dev *pdev = adapter->pdev;
3238 #endif /* CONFIG_PM_RUNTIME */
3242 /* disallow open during test */
3243 if (test_bit(__IGB_TESTING, &adapter->state)) {
3248 #ifdef CONFIG_PM_RUNTIME
3250 pm_runtime_get_sync(&pdev->dev);
3251 #endif /* CONFIG_PM_RUNTIME */
3253 netif_carrier_off(netdev);
3255 /* allocate transmit descriptors */
3256 err = igb_setup_all_tx_resources(adapter);
3260 /* allocate receive descriptors */
3261 err = igb_setup_all_rx_resources(adapter);
3265 igb_power_up_link(adapter);
3267 /* before we allocate an interrupt, we must be ready to handle it.
3268 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3269 * as soon as we call pci_request_irq, so we have to setup our
3270 * clean_rx handler before we do so. */
3271 igb_configure(adapter);
3273 err = igb_request_irq(adapter);
3277 /* Notify the stack of the actual queue counts. */
3278 netif_set_real_num_tx_queues(netdev,
3279 adapter->vmdq_pools ? 1 :
3280 adapter->num_tx_queues);
3282 err = netif_set_real_num_rx_queues(netdev,
3283 adapter->vmdq_pools ? 1 :
3284 adapter->num_rx_queues);
3286 goto err_set_queues;
3288 /* From here on the code is the same as igb_up() */
3289 clear_bit(__IGB_DOWN, &adapter->state);
3291 for (i = 0; i < adapter->num_q_vectors; i++)
3292 napi_enable(&(adapter->q_vector[i]->napi));
3293 igb_configure_lli(adapter);
3295 /* Clear any pending interrupts. */
3296 E1000_READ_REG(hw, E1000_ICR);
3298 igb_irq_enable(adapter);
3300 /* notify VFs that reset has been completed */
3301 if (adapter->vfs_allocated_count) {
3302 u32 reg_data = E1000_READ_REG(hw, E1000_CTRL_EXT);
3303 reg_data |= E1000_CTRL_EXT_PFRSTD;
3304 E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg_data);
3307 netif_tx_start_all_queues(netdev);
3309 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
3310 schedule_work(&adapter->dma_err_task);
3312 /* start the watchdog. */
3313 hw->mac.get_link_status = 1;
3314 schedule_work(&adapter->watchdog_task);
3316 return E1000_SUCCESS;
3319 igb_free_irq(adapter);
3321 igb_release_hw_control(adapter);
3322 igb_power_down_link(adapter);
3323 igb_free_all_rx_resources(adapter);
3325 igb_free_all_tx_resources(adapter);
3329 #ifdef CONFIG_PM_RUNTIME
3331 pm_runtime_put(&pdev->dev);
3332 #endif /* CONFIG_PM_RUNTIME */
3337 static int igb_open(struct net_device *netdev)
3339 return __igb_open(netdev, false);
3343 * igb_close - Disables a network interface
3344 * @netdev: network interface device structure
3346 * Returns 0, this is not allowed to fail
3348 * The close entry point is called when an interface is de-activated
3349 * by the OS. The hardware is still under the driver's control, but
3350 * needs to be disabled. A global MAC reset is issued to stop the
3351 * hardware, and all transmit and receive resources are freed.
3353 static int __igb_close(struct net_device *netdev, bool suspending)
3355 struct igb_adapter *adapter = netdev_priv(netdev);
3356 #ifdef CONFIG_PM_RUNTIME
3357 struct pci_dev *pdev = adapter->pdev;
3358 #endif /* CONFIG_PM_RUNTIME */
3360 WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
3362 #ifdef CONFIG_PM_RUNTIME
3364 pm_runtime_get_sync(&pdev->dev);
3365 #endif /* CONFIG_PM_RUNTIME */
3369 igb_release_hw_control(adapter);
3371 igb_free_irq(adapter);
3373 igb_free_all_tx_resources(adapter);
3374 igb_free_all_rx_resources(adapter);
3376 #ifdef CONFIG_PM_RUNTIME
3378 pm_runtime_put_sync(&pdev->dev);
3379 #endif /* CONFIG_PM_RUNTIME */
3384 static int igb_close(struct net_device *netdev)
3386 return __igb_close(netdev, false);
3390 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
3391 * @tx_ring: tx descriptor ring (for a specific queue) to setup
3393 * Return 0 on success, negative on failure
3395 int igb_setup_tx_resources(struct igb_ring *tx_ring)
3397 struct device *dev = tx_ring->dev;
3400 size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3401 tx_ring->tx_buffer_info = vzalloc(size);
3402 if (!tx_ring->tx_buffer_info)
3405 /* round up to nearest 4K */
3406 tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
3407 tx_ring->size = ALIGN(tx_ring->size, 4096);
3409 tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
3410 &tx_ring->dma, GFP_KERNEL);
3415 tx_ring->next_to_use = 0;
3416 tx_ring->next_to_clean = 0;
3421 vfree(tx_ring->tx_buffer_info);
3423 "Unable to allocate memory for the transmit descriptor ring\n");
3428 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
3429 * (Descriptors) for all queues
3430 * @adapter: board private structure
3432 * Return 0 on success, negative on failure
3434 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
3436 struct pci_dev *pdev = adapter->pdev;
3439 for (i = 0; i < adapter->num_tx_queues; i++) {
3440 err = igb_setup_tx_resources(adapter->tx_ring[i]);
3442 dev_err(pci_dev_to_dev(pdev),
3443 "Allocation for Tx Queue %u failed\n", i);
3444 for (i--; i >= 0; i--)
3445 igb_free_tx_resources(adapter->tx_ring[i]);
3454 * igb_setup_tctl - configure the transmit control registers
3455 * @adapter: Board private structure
3457 void igb_setup_tctl(struct igb_adapter *adapter)
3459 struct e1000_hw *hw = &adapter->hw;
3462 /* disable queue 0 which is enabled by default on 82575 and 82576 */
3463 E1000_WRITE_REG(hw, E1000_TXDCTL(0), 0);
3465 /* Program the Transmit Control Register */
3466 tctl = E1000_READ_REG(hw, E1000_TCTL);
3467 tctl &= ~E1000_TCTL_CT;
3468 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
3469 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
3471 e1000_config_collision_dist(hw);
3473 /* Enable transmits */
3474 tctl |= E1000_TCTL_EN;
3476 E1000_WRITE_REG(hw, E1000_TCTL, tctl);
3479 static u32 igb_tx_wthresh(struct igb_adapter *adapter)
3481 struct e1000_hw *hw = &adapter->hw;
3482 switch (hw->mac.type) {
3486 if (adapter->msix_entries)
3496 * igb_configure_tx_ring - Configure transmit ring after Reset
3497 * @adapter: board private structure
3498 * @ring: tx ring to configure
3500 * Configure a transmit ring after a reset.
3502 void igb_configure_tx_ring(struct igb_adapter *adapter,
3503 struct igb_ring *ring)
3505 struct e1000_hw *hw = &adapter->hw;
3507 u64 tdba = ring->dma;
3508 int reg_idx = ring->reg_idx;
3510 /* disable the queue */
3511 E1000_WRITE_REG(hw, E1000_TXDCTL(reg_idx), 0);
3512 E1000_WRITE_FLUSH(hw);
3515 E1000_WRITE_REG(hw, E1000_TDLEN(reg_idx),
3516 ring->count * sizeof(union e1000_adv_tx_desc));
3517 E1000_WRITE_REG(hw, E1000_TDBAL(reg_idx),
3518 tdba & 0x00000000ffffffffULL);
3519 E1000_WRITE_REG(hw, E1000_TDBAH(reg_idx), tdba >> 32);
3521 ring->tail = hw->hw_addr + E1000_TDT(reg_idx);
3522 E1000_WRITE_REG(hw, E1000_TDH(reg_idx), 0);
3523 writel(0, ring->tail);
3525 txdctl |= IGB_TX_PTHRESH;
3526 txdctl |= IGB_TX_HTHRESH << 8;
3527 txdctl |= igb_tx_wthresh(adapter) << 16;
3529 txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
3530 E1000_WRITE_REG(hw, E1000_TXDCTL(reg_idx), txdctl);
3534 * igb_configure_tx - Configure transmit Unit after Reset
3535 * @adapter: board private structure
3537 * Configure the Tx unit of the MAC after a reset.
3539 static void igb_configure_tx(struct igb_adapter *adapter)
3543 for (i = 0; i < adapter->num_tx_queues; i++)
3544 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
3548 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
3549 * @rx_ring: rx descriptor ring (for a specific queue) to setup
3551 * Returns 0 on success, negative on failure
3553 int igb_setup_rx_resources(struct igb_ring *rx_ring)
3555 struct device *dev = rx_ring->dev;
3558 size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3559 rx_ring->rx_buffer_info = vzalloc(size);
3560 if (!rx_ring->rx_buffer_info)
3563 desc_len = sizeof(union e1000_adv_rx_desc);
3565 /* Round up to nearest 4K */
3566 rx_ring->size = rx_ring->count * desc_len;
3567 rx_ring->size = ALIGN(rx_ring->size, 4096);
3569 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
3570 &rx_ring->dma, GFP_KERNEL);
3575 rx_ring->next_to_alloc = 0;
3576 rx_ring->next_to_clean = 0;
3577 rx_ring->next_to_use = 0;
3582 vfree(rx_ring->rx_buffer_info);
3583 rx_ring->rx_buffer_info = NULL;
3584 dev_err(dev, "Unable to allocate memory for the receive descriptor"
3590 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
3591 * (Descriptors) for all queues
3592 * @adapter: board private structure
3594 * Return 0 on success, negative on failure
3596 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
3598 struct pci_dev *pdev = adapter->pdev;
3601 for (i = 0; i < adapter->num_rx_queues; i++) {
3602 err = igb_setup_rx_resources(adapter->rx_ring[i]);
3604 dev_err(pci_dev_to_dev(pdev),
3605 "Allocation for Rx Queue %u failed\n", i);
3606 for (i--; i >= 0; i--)
3607 igb_free_rx_resources(adapter->rx_ring[i]);
3616 * igb_setup_mrqc - configure the multiple receive queue control registers
3617 * @adapter: Board private structure
3619 static void igb_setup_mrqc(struct igb_adapter *adapter)
3621 struct e1000_hw *hw = &adapter->hw;
3623 u32 j, num_rx_queues, shift = 0, shift2 = 0;
3624 static const u32 rsskey[10] = { 0xDA565A6D, 0xC20E5B25, 0x3D256741,
3625 0xB08FA343, 0xCB2BCAD0, 0xB4307BAE,
3626 0xA32DCB77, 0x0CF23080, 0x3BB7426A,
3629 /* Fill out hash function seeds */
3630 for (j = 0; j < 10; j++)
3631 E1000_WRITE_REG(hw, E1000_RSSRK(j), rsskey[j]);
3633 num_rx_queues = adapter->rss_queues;
3635 /* 82575 and 82576 supports 2 RSS queues for VMDq */
3636 switch (hw->mac.type) {
3638 if (adapter->vmdq_pools) {
3646 /* 82576 supports 2 RSS queues for SR-IOV */
3647 if (adapter->vfs_allocated_count || adapter->vmdq_pools) {
3657 * Populate the redirection table 4 entries at a time. To do this
3658 * we are generating the results for n and n+2 and then interleaving
3659 * those with the results with n+1 and n+3.
3661 for (j = 0; j < 32; j++) {
3662 /* first pass generates n and n+2 */
3663 u32 base = ((j * 0x00040004) + 0x00020000) * num_rx_queues;
3664 u32 reta = (base & 0x07800780) >> (7 - shift);
3666 /* second pass generates n+1 and n+3 */
3667 base += 0x00010001 * num_rx_queues;
3668 reta |= (base & 0x07800780) << (1 + shift);
3670 /* generate 2nd table for 82575 based parts */
3672 reta |= (0x01010101 * num_rx_queues) << shift2;
3674 E1000_WRITE_REG(hw, E1000_RETA(j), reta);
3678 * Disable raw packet checksumming so that RSS hash is placed in
3679 * descriptor on writeback. No need to enable TCP/UDP/IP checksum
3680 * offloads as they are enabled by default
3682 rxcsum = E1000_READ_REG(hw, E1000_RXCSUM);
3683 rxcsum |= E1000_RXCSUM_PCSD;
3685 if (adapter->hw.mac.type >= e1000_82576)
3686 /* Enable Receive Checksum Offload for SCTP */
3687 rxcsum |= E1000_RXCSUM_CRCOFL;
3689 /* Don't need to set TUOFL or IPOFL, they default to 1 */
3690 E1000_WRITE_REG(hw, E1000_RXCSUM, rxcsum);
3692 /* Generate RSS hash based on packet types, TCP/UDP
3693 * port numbers and/or IPv4/v6 src and dst addresses
3695 mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
3696 E1000_MRQC_RSS_FIELD_IPV4_TCP |
3697 E1000_MRQC_RSS_FIELD_IPV6 |
3698 E1000_MRQC_RSS_FIELD_IPV6_TCP |
3699 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
3701 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
3702 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
3703 if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
3704 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
3706 /* If VMDq is enabled then we set the appropriate mode for that, else
3707 * we default to RSS so that an RSS hash is calculated per packet even
3708 * if we are only using one queue */
3709 if (adapter->vfs_allocated_count || adapter->vmdq_pools) {
3710 if (hw->mac.type > e1000_82575) {
3711 /* Set the default pool for the PF's first queue */
3712 u32 vtctl = E1000_READ_REG(hw, E1000_VT_CTL);
3713 vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
3714 E1000_VT_CTL_DISABLE_DEF_POOL);
3715 vtctl |= adapter->vfs_allocated_count <<
3716 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
3717 E1000_WRITE_REG(hw, E1000_VT_CTL, vtctl);
3718 } else if (adapter->rss_queues > 1) {
3719 /* set default queue for pool 1 to queue 2 */
3720 E1000_WRITE_REG(hw, E1000_VT_CTL,
3721 adapter->rss_queues << 7);
3723 if (adapter->rss_queues > 1)
3724 mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_2Q;
3726 mrqc |= E1000_MRQC_ENABLE_VMDQ;
3728 mrqc |= E1000_MRQC_ENABLE_RSS_4Q;
3730 igb_vmm_control(adapter);
3732 E1000_WRITE_REG(hw, E1000_MRQC, mrqc);
3736 * igb_setup_rctl - configure the receive control registers
3737 * @adapter: Board private structure
3739 void igb_setup_rctl(struct igb_adapter *adapter)
3741 struct e1000_hw *hw = &adapter->hw;
3744 rctl = E1000_READ_REG(hw, E1000_RCTL);
3746 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3747 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
3749 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
3750 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3753 * enable stripping of CRC. It's unlikely this will break BMC
3754 * redirection as it did with e1000. Newer features require
3755 * that the HW strips the CRC.
3757 rctl |= E1000_RCTL_SECRC;
3759 /* disable store bad packets and clear size bits. */
3760 rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
3762 /* enable LPE to prevent packets larger than max_frame_size */
3763 rctl |= E1000_RCTL_LPE;
3765 /* disable queue 0 to prevent tail write w/o re-config */
3766 E1000_WRITE_REG(hw, E1000_RXDCTL(0), 0);
3768 /* Attention!!! For SR-IOV PF driver operations you must enable
3769 * queue drop for all VF and PF queues to prevent head of line blocking
3770 * if an un-trusted VF does not provide descriptors to hardware.
3772 if (adapter->vfs_allocated_count) {
3773 /* set all queue drop enable bits */
3774 E1000_WRITE_REG(hw, E1000_QDE, ALL_QUEUES);
3777 E1000_WRITE_REG(hw, E1000_RCTL, rctl);
3780 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
3783 struct e1000_hw *hw = &adapter->hw;
3786 /* if it isn't the PF check to see if VFs are enabled and
3787 * increase the size to support vlan tags */
3788 if (vfn < adapter->vfs_allocated_count &&
3789 adapter->vf_data[vfn].vlans_enabled)
3792 #ifdef CONFIG_IGB_VMDQ_NETDEV
3793 if (vfn >= adapter->vfs_allocated_count) {
3794 int queue = vfn - adapter->vfs_allocated_count;
3795 struct igb_vmdq_adapter *vadapter;
3797 vadapter = netdev_priv(adapter->vmdq_netdev[queue-1]);
3798 if (vadapter->vlgrp)
3802 vmolr = E1000_READ_REG(hw, E1000_VMOLR(vfn));
3803 vmolr &= ~E1000_VMOLR_RLPML_MASK;
3804 vmolr |= size | E1000_VMOLR_LPE;
3805 E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
3811 * igb_rlpml_set - set maximum receive packet size
3812 * @adapter: board private structure
3814 * Configure maximum receivable packet size.
3816 static void igb_rlpml_set(struct igb_adapter *adapter)
3818 u32 max_frame_size = adapter->max_frame_size;
3819 struct e1000_hw *hw = &adapter->hw;
3820 u16 pf_id = adapter->vfs_allocated_count;
3822 if (adapter->vmdq_pools && hw->mac.type != e1000_82575) {
3824 for (i = 0; i < adapter->vmdq_pools; i++)
3825 igb_set_vf_rlpml(adapter, max_frame_size, pf_id + i);
3827 * If we're in VMDQ or SR-IOV mode, then set global RLPML
3828 * to our max jumbo frame size, in case we need to enable
3829 * jumbo frames on one of the rings later.
3830 * This will not pass over-length frames into the default
3831 * queue because it's gated by the VMOLR.RLPML.
3833 max_frame_size = MAX_JUMBO_FRAME_SIZE;
3835 /* Set VF RLPML for the PF device. */
3836 if (adapter->vfs_allocated_count)
3837 igb_set_vf_rlpml(adapter, max_frame_size, pf_id);
3839 E1000_WRITE_REG(hw, E1000_RLPML, max_frame_size);
3842 static inline void igb_set_vf_vlan_strip(struct igb_adapter *adapter,
3843 int vfn, bool enable)
3845 struct e1000_hw *hw = &adapter->hw;
3849 if (hw->mac.type < e1000_82576)
3852 if (hw->mac.type == e1000_i350)
3853 reg = hw->hw_addr + E1000_DVMOLR(vfn);
3855 reg = hw->hw_addr + E1000_VMOLR(vfn);
3859 val |= E1000_VMOLR_STRVLAN;
3861 val &= ~(E1000_VMOLR_STRVLAN);
3864 static inline void igb_set_vmolr(struct igb_adapter *adapter,
3867 struct e1000_hw *hw = &adapter->hw;
3871 * This register exists only on 82576 and newer so if we are older then
3872 * we should exit and do nothing
3874 if (hw->mac.type < e1000_82576)
3877 vmolr = E1000_READ_REG(hw, E1000_VMOLR(vfn));
3880 vmolr |= E1000_VMOLR_AUPE; /* Accept untagged packets */
3882 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
3884 /* clear all bits that might not be set */
3885 vmolr &= ~E1000_VMOLR_RSSE;
3887 if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
3888 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
3890 vmolr |= E1000_VMOLR_BAM; /* Accept broadcast */
3891 vmolr |= E1000_VMOLR_LPE; /* Accept long packets */
3893 E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
3897 * igb_configure_rx_ring - Configure a receive ring after Reset
3898 * @adapter: board private structure
3899 * @ring: receive ring to be configured
3901 * Configure the Rx unit of the MAC after a reset.
3903 void igb_configure_rx_ring(struct igb_adapter *adapter,
3904 struct igb_ring *ring)
3906 struct e1000_hw *hw = &adapter->hw;
3907 u64 rdba = ring->dma;
3908 int reg_idx = ring->reg_idx;
3909 u32 srrctl = 0, rxdctl = 0;
3911 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
3913 * RLPML prevents us from receiving a frame larger than max_frame so
3914 * it is safe to just set the rx_buffer_len to max_frame without the
3915 * risk of an skb over panic.
3917 ring->rx_buffer_len = max_t(u32, adapter->max_frame_size,
3918 MAXIMUM_ETHERNET_VLAN_SIZE);
3921 /* disable the queue */
3922 E1000_WRITE_REG(hw, E1000_RXDCTL(reg_idx), 0);
3924 /* Set DMA base address registers */
3925 E1000_WRITE_REG(hw, E1000_RDBAL(reg_idx),
3926 rdba & 0x00000000ffffffffULL);
3927 E1000_WRITE_REG(hw, E1000_RDBAH(reg_idx), rdba >> 32);
3928 E1000_WRITE_REG(hw, E1000_RDLEN(reg_idx),
3929 ring->count * sizeof(union e1000_adv_rx_desc));
3931 /* initialize head and tail */
3932 ring->tail = hw->hw_addr + E1000_RDT(reg_idx);
3933 E1000_WRITE_REG(hw, E1000_RDH(reg_idx), 0);
3934 writel(0, ring->tail);
3936 /* reset next-to- use/clean to place SW in sync with hardwdare */
3937 ring->next_to_clean = 0;
3938 ring->next_to_use = 0;
3939 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
3940 ring->next_to_alloc = 0;
3943 /* set descriptor configuration */
3944 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
3945 srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
3946 srrctl |= IGB_RX_BUFSZ >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3947 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
3948 srrctl = ALIGN(ring->rx_buffer_len, 1024) >>
3949 E1000_SRRCTL_BSIZEPKT_SHIFT;
3950 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
3951 srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
3952 #ifdef HAVE_PTP_1588_CLOCK
3953 if (hw->mac.type >= e1000_82580)
3954 srrctl |= E1000_SRRCTL_TIMESTAMP;
3955 #endif /* HAVE_PTP_1588_CLOCK */
3957 * We should set the drop enable bit if:
3960 * Flow Control is disabled and number of RX queues > 1
3962 * This allows us to avoid head of line blocking for security
3963 * and performance reasons.
3965 if (adapter->vfs_allocated_count ||
3966 (adapter->num_rx_queues > 1 &&
3967 (hw->fc.requested_mode == e1000_fc_none ||
3968 hw->fc.requested_mode == e1000_fc_rx_pause)))
3969 srrctl |= E1000_SRRCTL_DROP_EN;
3971 E1000_WRITE_REG(hw, E1000_SRRCTL(reg_idx), srrctl);
3973 /* set filtering for VMDQ pools */
3974 igb_set_vmolr(adapter, reg_idx & 0x7, true);
3976 rxdctl |= IGB_RX_PTHRESH;
3977 rxdctl |= IGB_RX_HTHRESH << 8;
3978 rxdctl |= IGB_RX_WTHRESH << 16;
3980 /* enable receive descriptor fetching */
3981 rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
3982 E1000_WRITE_REG(hw, E1000_RXDCTL(reg_idx), rxdctl);
3986 * igb_configure_rx - Configure receive Unit after Reset
3987 * @adapter: board private structure
3989 * Configure the Rx unit of the MAC after a reset.
3991 static void igb_configure_rx(struct igb_adapter *adapter)
3995 /* set UTA to appropriate mode */
3996 igb_set_uta(adapter);
3998 igb_full_sync_mac_table(adapter);
3999 /* Setup the HW Rx Head and Tail Descriptor Pointers and
4000 * the Base and Length of the Rx Descriptor Ring */
4001 for (i = 0; i < adapter->num_rx_queues; i++)
4002 igb_configure_rx_ring(adapter, adapter->rx_ring[i]);
4006 * igb_free_tx_resources - Free Tx Resources per Queue
4007 * @tx_ring: Tx descriptor ring for a specific queue
4009 * Free all transmit software resources
4011 void igb_free_tx_resources(struct igb_ring *tx_ring)
4013 igb_clean_tx_ring(tx_ring);
4015 vfree(tx_ring->tx_buffer_info);
4016 tx_ring->tx_buffer_info = NULL;
4018 /* if not set, then don't free */
4022 dma_free_coherent(tx_ring->dev, tx_ring->size,
4023 tx_ring->desc, tx_ring->dma);
4025 tx_ring->desc = NULL;
4029 * igb_free_all_tx_resources - Free Tx Resources for All Queues
4030 * @adapter: board private structure
4032 * Free all transmit software resources
4034 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
4038 for (i = 0; i < adapter->num_tx_queues; i++)
4039 igb_free_tx_resources(adapter->tx_ring[i]);
4042 void igb_unmap_and_free_tx_resource(struct igb_ring *ring,
4043 struct igb_tx_buffer *tx_buffer)
4045 if (tx_buffer->skb) {
4046 dev_kfree_skb_any(tx_buffer->skb);
4047 if (dma_unmap_len(tx_buffer, len))
4048 dma_unmap_single(ring->dev,
4049 dma_unmap_addr(tx_buffer, dma),
4050 dma_unmap_len(tx_buffer, len),
4052 } else if (dma_unmap_len(tx_buffer, len)) {
4053 dma_unmap_page(ring->dev,
4054 dma_unmap_addr(tx_buffer, dma),
4055 dma_unmap_len(tx_buffer, len),
4058 tx_buffer->next_to_watch = NULL;
4059 tx_buffer->skb = NULL;
4060 dma_unmap_len_set(tx_buffer, len, 0);
4061 /* buffer_info must be completely set up in the transmit path */
4065 * igb_clean_tx_ring - Free Tx Buffers
4066 * @tx_ring: ring to be cleaned
4068 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
4070 struct igb_tx_buffer *buffer_info;
4074 if (!tx_ring->tx_buffer_info)
4076 /* Free all the Tx ring sk_buffs */
4078 for (i = 0; i < tx_ring->count; i++) {
4079 buffer_info = &tx_ring->tx_buffer_info[i];
4080 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
4083 netdev_tx_reset_queue(txring_txq(tx_ring));
4085 size = sizeof(struct igb_tx_buffer) * tx_ring->count;
4086 memset(tx_ring->tx_buffer_info, 0, size);
4088 /* Zero out the descriptor ring */
4089 memset(tx_ring->desc, 0, tx_ring->size);
4091 tx_ring->next_to_use = 0;
4092 tx_ring->next_to_clean = 0;
4096 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
4097 * @adapter: board private structure
4099 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
4103 for (i = 0; i < adapter->num_tx_queues; i++)
4104 igb_clean_tx_ring(adapter->tx_ring[i]);
4108 * igb_free_rx_resources - Free Rx Resources
4109 * @rx_ring: ring to clean the resources from
4111 * Free all receive software resources
4113 void igb_free_rx_resources(struct igb_ring *rx_ring)
4115 igb_clean_rx_ring(rx_ring);
4117 vfree(rx_ring->rx_buffer_info);
4118 rx_ring->rx_buffer_info = NULL;
4120 /* if not set, then don't free */
4124 dma_free_coherent(rx_ring->dev, rx_ring->size,
4125 rx_ring->desc, rx_ring->dma);
4127 rx_ring->desc = NULL;
4131 * igb_free_all_rx_resources - Free Rx Resources for All Queues
4132 * @adapter: board private structure
4134 * Free all receive software resources
4136 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
4140 for (i = 0; i < adapter->num_rx_queues; i++)
4141 igb_free_rx_resources(adapter->rx_ring[i]);
4145 * igb_clean_rx_ring - Free Rx Buffers per Queue
4146 * @rx_ring: ring to free buffers from
4148 void igb_clean_rx_ring(struct igb_ring *rx_ring)
4153 if (!rx_ring->rx_buffer_info)
4156 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
4158 dev_kfree_skb(rx_ring->skb);
4159 rx_ring->skb = NULL;
4162 /* Free all the Rx ring sk_buffs */
4163 for (i = 0; i < rx_ring->count; i++) {
4164 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
4165 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
4166 if (buffer_info->dma) {
4167 dma_unmap_single(rx_ring->dev,
4169 rx_ring->rx_buffer_len,
4171 buffer_info->dma = 0;
4174 if (buffer_info->skb) {
4175 dev_kfree_skb(buffer_info->skb);
4176 buffer_info->skb = NULL;
4179 if (!buffer_info->page)
4182 dma_unmap_page(rx_ring->dev,
4186 __free_page(buffer_info->page);
4188 buffer_info->page = NULL;
4192 size = sizeof(struct igb_rx_buffer) * rx_ring->count;
4193 memset(rx_ring->rx_buffer_info, 0, size);
4195 /* Zero out the descriptor ring */
4196 memset(rx_ring->desc, 0, rx_ring->size);
4198 rx_ring->next_to_alloc = 0;
4199 rx_ring->next_to_clean = 0;
4200 rx_ring->next_to_use = 0;
4204 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
4205 * @adapter: board private structure
4207 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
4211 for (i = 0; i < adapter->num_rx_queues; i++)
4212 igb_clean_rx_ring(adapter->rx_ring[i]);
4216 * igb_set_mac - Change the Ethernet Address of the NIC
4217 * @netdev: network interface device structure
4218 * @p: pointer to an address structure
4220 * Returns 0 on success, negative on failure
4222 static int igb_set_mac(struct net_device *netdev, void *p)
4224 struct igb_adapter *adapter = netdev_priv(netdev);
4225 struct e1000_hw *hw = &adapter->hw;
4226 struct sockaddr *addr = p;
4228 if (!is_valid_ether_addr(addr->sa_data))
4229 return -EADDRNOTAVAIL;
4231 igb_del_mac_filter(adapter, hw->mac.addr,
4232 adapter->vfs_allocated_count);
4233 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4234 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
4236 /* set the correct pool for the new PF MAC address in entry 0 */
4237 return igb_add_mac_filter(adapter, hw->mac.addr,
4238 adapter->vfs_allocated_count);
4242 * igb_write_mc_addr_list - write multicast addresses to MTA
4243 * @netdev: network interface device structure
4245 * Writes multicast address list to the MTA hash table.
4246 * Returns: -ENOMEM on failure
4247 * 0 on no addresses written
4248 * X on writing X addresses to MTA
4250 int igb_write_mc_addr_list(struct net_device *netdev)
4252 struct igb_adapter *adapter = netdev_priv(netdev);
4253 struct e1000_hw *hw = &adapter->hw;
4254 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4255 struct netdev_hw_addr *ha;
4257 struct dev_mc_list *ha;
4261 #ifdef CONFIG_IGB_VMDQ_NETDEV
4264 count = netdev_mc_count(netdev);
4265 #ifdef CONFIG_IGB_VMDQ_NETDEV
4266 for (vm = 1; vm < adapter->vmdq_pools; vm++) {
4267 if (!adapter->vmdq_netdev[vm])
4269 if (!netif_running(adapter->vmdq_netdev[vm]))
4271 count += netdev_mc_count(adapter->vmdq_netdev[vm]);
4276 e1000_update_mc_addr_list(hw, NULL, 0);
4279 mta_list = kzalloc(count * 6, GFP_ATOMIC);
4283 /* The shared function expects a packed array of only addresses. */
4285 netdev_for_each_mc_addr(ha, netdev)
4286 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4287 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
4289 memcpy(mta_list + (i++ * ETH_ALEN), ha->dmi_addr, ETH_ALEN);
4291 #ifdef CONFIG_IGB_VMDQ_NETDEV
4292 for (vm = 1; vm < adapter->vmdq_pools; vm++) {
4293 if (!adapter->vmdq_netdev[vm])
4295 if (!netif_running(adapter->vmdq_netdev[vm]) ||
4296 !netdev_mc_count(adapter->vmdq_netdev[vm]))
4298 netdev_for_each_mc_addr(ha, adapter->vmdq_netdev[vm])
4299 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4300 memcpy(mta_list + (i++ * ETH_ALEN),
4301 ha->addr, ETH_ALEN);
4303 memcpy(mta_list + (i++ * ETH_ALEN),
4304 ha->dmi_addr, ETH_ALEN);
4308 e1000_update_mc_addr_list(hw, mta_list, i);
4314 void igb_rar_set(struct igb_adapter *adapter, u32 index)
4316 u32 rar_low, rar_high;
4317 struct e1000_hw *hw = &adapter->hw;
4318 u8 *addr = adapter->mac_table[index].addr;
4319 /* HW expects these in little endian so we reverse the byte order
4320 * from network order (big endian) to little endian
4322 rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |
4323 ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
4324 rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
4326 /* Indicate to hardware the Address is Valid. */
4327 if (adapter->mac_table[index].state & IGB_MAC_STATE_IN_USE)
4328 rar_high |= E1000_RAH_AV;
4330 if (hw->mac.type == e1000_82575)
4331 rar_high |= E1000_RAH_POOL_1 * adapter->mac_table[index].queue;
4333 rar_high |= E1000_RAH_POOL_1 << adapter->mac_table[index].queue;
4335 E1000_WRITE_REG(hw, E1000_RAL(index), rar_low);
4336 E1000_WRITE_FLUSH(hw);
4337 E1000_WRITE_REG(hw, E1000_RAH(index), rar_high);
4338 E1000_WRITE_FLUSH(hw);
4341 void igb_full_sync_mac_table(struct igb_adapter *adapter)
4343 struct e1000_hw *hw = &adapter->hw;
4345 for (i = 0; i < hw->mac.rar_entry_count; i++) {
4346 igb_rar_set(adapter, i);
4350 void igb_sync_mac_table(struct igb_adapter *adapter)
4352 struct e1000_hw *hw = &adapter->hw;
4354 for (i = 0; i < hw->mac.rar_entry_count; i++) {
4355 if (adapter->mac_table[i].state & IGB_MAC_STATE_MODIFIED)
4356 igb_rar_set(adapter, i);
4357 adapter->mac_table[i].state &= ~(IGB_MAC_STATE_MODIFIED);
4361 int igb_available_rars(struct igb_adapter *adapter)
4363 struct e1000_hw *hw = &adapter->hw;
4366 for (i = 0; i < hw->mac.rar_entry_count; i++) {
4367 if (adapter->mac_table[i].state == 0)
4373 #ifdef HAVE_SET_RX_MODE
4375 * igb_write_uc_addr_list - write unicast addresses to RAR table
4376 * @netdev: network interface device structure
4378 * Writes unicast address list to the RAR table.
4379 * Returns: -ENOMEM on failure/insufficient address space
4380 * 0 on no addresses written
4381 * X on writing X addresses to the RAR table
4383 static int igb_write_uc_addr_list(struct net_device *netdev)
4385 struct igb_adapter *adapter = netdev_priv(netdev);
4386 unsigned int vfn = adapter->vfs_allocated_count;
4389 /* return ENOMEM indicating insufficient memory for addresses */
4390 if (netdev_uc_count(netdev) > igb_available_rars(adapter))
4392 if (!netdev_uc_empty(netdev)) {
4393 #ifdef NETDEV_HW_ADDR_T_UNICAST
4394 struct netdev_hw_addr *ha;
4396 struct dev_mc_list *ha;
4398 netdev_for_each_uc_addr(ha, netdev) {
4399 #ifdef NETDEV_HW_ADDR_T_UNICAST
4400 igb_del_mac_filter(adapter, ha->addr, vfn);
4401 igb_add_mac_filter(adapter, ha->addr, vfn);
4403 igb_del_mac_filter(adapter, ha->da_addr, vfn);
4404 igb_add_mac_filter(adapter, ha->da_addr, vfn);
4412 #endif /* HAVE_SET_RX_MODE */
4414 * igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
4415 * @netdev: network interface device structure
4417 * The set_rx_mode entry point is called whenever the unicast or multicast
4418 * address lists or the network interface flags are updated. This routine is
4419 * responsible for configuring the hardware for proper unicast, multicast,
4420 * promiscuous mode, and all-multi behavior.
4422 static void igb_set_rx_mode(struct net_device *netdev)
4424 struct igb_adapter *adapter = netdev_priv(netdev);
4425 struct e1000_hw *hw = &adapter->hw;
4426 unsigned int vfn = adapter->vfs_allocated_count;
4427 u32 rctl, vmolr = 0;
4430 /* Check for Promiscuous and All Multicast modes */
4431 rctl = E1000_READ_REG(hw, E1000_RCTL);
4433 /* clear the effected bits */
4434 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_VFE);
4436 if (netdev->flags & IFF_PROMISC) {
4437 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
4438 vmolr |= (E1000_VMOLR_ROPE | E1000_VMOLR_MPME);
4439 /* retain VLAN HW filtering if in VT mode */
4440 if (adapter->vfs_allocated_count || adapter->vmdq_pools)
4441 rctl |= E1000_RCTL_VFE;
4443 if (netdev->flags & IFF_ALLMULTI) {
4444 rctl |= E1000_RCTL_MPE;
4445 vmolr |= E1000_VMOLR_MPME;
4448 * Write addresses to the MTA, if the attempt fails
4449 * then we should just turn on promiscuous mode so
4450 * that we can at least receive multicast traffic
4452 count = igb_write_mc_addr_list(netdev);
4454 rctl |= E1000_RCTL_MPE;
4455 vmolr |= E1000_VMOLR_MPME;
4457 vmolr |= E1000_VMOLR_ROMPE;
4460 #ifdef HAVE_SET_RX_MODE
4462 * Write addresses to available RAR registers, if there is not
4463 * sufficient space to store all the addresses then enable
4464 * unicast promiscuous mode
4466 count = igb_write_uc_addr_list(netdev);
4468 rctl |= E1000_RCTL_UPE;
4469 vmolr |= E1000_VMOLR_ROPE;
4471 #endif /* HAVE_SET_RX_MODE */
4472 rctl |= E1000_RCTL_VFE;
4474 E1000_WRITE_REG(hw, E1000_RCTL, rctl);
4477 * In order to support SR-IOV and eventually VMDq it is necessary to set
4478 * the VMOLR to enable the appropriate modes. Without this workaround
4479 * we will have issues with VLAN tag stripping not being done for frames
4480 * that are only arriving because we are the default pool
4482 if (hw->mac.type < e1000_82576)
4485 vmolr |= E1000_READ_REG(hw, E1000_VMOLR(vfn)) &
4486 ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
4487 E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
4488 igb_restore_vf_multicasts(adapter);
4491 static void igb_check_wvbr(struct igb_adapter *adapter)
4493 struct e1000_hw *hw = &adapter->hw;
4496 switch (hw->mac.type) {
4499 if (!(wvbr = E1000_READ_REG(hw, E1000_WVBR)))
4506 adapter->wvbr |= wvbr;
4509 #define IGB_STAGGERED_QUEUE_OFFSET 8
4511 static void igb_spoof_check(struct igb_adapter *adapter)
4518 switch (adapter->hw.mac.type) {
4520 for (j = 0; j < adapter->vfs_allocated_count; j++) {
4521 if (adapter->wvbr & (1 << j) ||
4522 adapter->wvbr & (1 << (j + IGB_STAGGERED_QUEUE_OFFSET))) {
4523 DPRINTK(DRV, WARNING,
4524 "Spoof event(s) detected on VF %d\n", j);
4527 (1 << (j + IGB_STAGGERED_QUEUE_OFFSET)));
4532 for (j = 0; j < adapter->vfs_allocated_count; j++) {
4533 if (adapter->wvbr & (1 << j)) {
4534 DPRINTK(DRV, WARNING,
4535 "Spoof event(s) detected on VF %d\n", j);
4536 adapter->wvbr &= ~(1 << j);
4545 /* Need to wait a few seconds after link up to get diagnostic information from
4547 #ifdef HAVE_TIMER_SETUP
4548 static void igb_update_phy_info(struct timer_list *t)
4550 struct igb_adapter *adapter = from_timer(adapter, t, phy_info_timer);
4552 static void igb_update_phy_info(unsigned long data)
4554 struct igb_adapter *adapter = (struct igb_adapter *) data;
4556 e1000_get_phy_info(&adapter->hw);
4560 * igb_has_link - check shared code for link and determine up/down
4561 * @adapter: pointer to driver private info
4563 bool igb_has_link(struct igb_adapter *adapter)
4565 struct e1000_hw *hw = &adapter->hw;
4566 bool link_active = FALSE;
4568 /* get_link_status is set on LSC (link status) interrupt or
4569 * rx sequence error interrupt. get_link_status will stay
4570 * false until the e1000_check_for_link establishes link
4571 * for copper adapters ONLY
4573 switch (hw->phy.media_type) {
4574 case e1000_media_type_copper:
4575 if (!hw->mac.get_link_status)
4577 case e1000_media_type_internal_serdes:
4578 e1000_check_for_link(hw);
4579 link_active = !hw->mac.get_link_status;
4581 case e1000_media_type_unknown:
4586 if (((hw->mac.type == e1000_i210) ||
4587 (hw->mac.type == e1000_i211)) &&
4588 (hw->phy.id == I210_I_PHY_ID)) {
4589 if (!netif_carrier_ok(adapter->netdev)) {
4590 adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4591 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
4592 adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
4593 adapter->link_check_timeout = jiffies;
4601 * igb_watchdog - Timer Call-back
4602 * @data: pointer to adapter cast into an unsigned long
4604 #ifdef HAVE_TIMER_SETUP
4605 static void igb_watchdog(struct timer_list *t)
4607 struct igb_adapter *adapter = from_timer(adapter, t, watchdog_timer);
4609 static void igb_watchdog(unsigned long data)
4611 struct igb_adapter *adapter = (struct igb_adapter *)data;
4613 /* Do the rest outside of interrupt context */
4614 schedule_work(&adapter->watchdog_task);
4617 static void igb_watchdog_task(struct work_struct *work)
4619 struct igb_adapter *adapter = container_of(work,
4622 struct e1000_hw *hw = &adapter->hw;
4623 struct net_device *netdev = adapter->netdev;
4626 u32 thstat, ctrl_ext;
4629 link = igb_has_link(adapter);
4630 /* Force link down if we have fiber to swap to */
4631 if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4632 if (hw->phy.media_type == e1000_media_type_copper) {
4633 connsw = E1000_READ_REG(hw, E1000_CONNSW);
4634 if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
4639 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
4640 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
4641 adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4647 /* Perform a reset if the media type changed. */
4648 if (hw->dev_spec._82575.media_changed) {
4649 hw->dev_spec._82575.media_changed = false;
4650 adapter->flags |= IGB_FLAG_MEDIA_RESET;
4654 /* Cancel scheduled suspend requests. */
4655 pm_runtime_resume(netdev->dev.parent);
4657 if (!netif_carrier_ok(netdev)) {
4659 e1000_get_speed_and_duplex(hw,
4660 &adapter->link_speed,
4661 &adapter->link_duplex);
4663 ctrl = E1000_READ_REG(hw, E1000_CTRL);
4664 /* Links status message must follow this format */
4665 printk(KERN_INFO "igb: %s NIC Link is Up %d Mbps %s, "
4666 "Flow Control: %s\n",
4668 adapter->link_speed,
4669 adapter->link_duplex == FULL_DUPLEX ?
4670 "Full Duplex" : "Half Duplex",
4671 ((ctrl & E1000_CTRL_TFCE) &&
4672 (ctrl & E1000_CTRL_RFCE)) ? "RX/TX":
4673 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
4674 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None")));
4675 /* adjust timeout factor according to speed/duplex */
4676 adapter->tx_timeout_factor = 1;
4677 switch (adapter->link_speed) {
4679 adapter->tx_timeout_factor = 14;
4682 /* maybe add some timeout factor ? */
4688 netif_carrier_on(netdev);
4689 netif_tx_wake_all_queues(netdev);
4691 igb_ping_all_vfs(adapter);
4693 igb_check_vf_rate_limit(adapter);
4694 #endif /* IFLA_VF_MAX */
4696 /* link state has changed, schedule phy info update */
4697 if (!test_bit(__IGB_DOWN, &adapter->state))
4698 mod_timer(&adapter->phy_info_timer,
4699 round_jiffies(jiffies + 2 * HZ));
4702 if (netif_carrier_ok(netdev)) {
4703 adapter->link_speed = 0;
4704 adapter->link_duplex = 0;
4705 /* check for thermal sensor event on i350 */
4706 if (hw->mac.type == e1000_i350) {
4707 thstat = E1000_READ_REG(hw, E1000_THSTAT);
4708 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
4709 if ((hw->phy.media_type ==
4710 e1000_media_type_copper) &&
4712 E1000_CTRL_EXT_LINK_MODE_SGMII)) {
4713 if (thstat & E1000_THSTAT_PWR_DOWN) {
4714 printk(KERN_ERR "igb: %s The "
4715 "network adapter was stopped "
4716 "because it overheated.\n",
4719 if (thstat & E1000_THSTAT_LINK_THROTTLE) {
4721 "igb: %s The network "
4722 "adapter supported "
4732 /* Links status message must follow this format */
4733 printk(KERN_INFO "igb: %s NIC Link is Down\n",
4735 netif_carrier_off(netdev);
4736 netif_tx_stop_all_queues(netdev);
4738 igb_ping_all_vfs(adapter);
4740 /* link state has changed, schedule phy info update */
4741 if (!test_bit(__IGB_DOWN, &adapter->state))
4742 mod_timer(&adapter->phy_info_timer,
4743 round_jiffies(jiffies + 2 * HZ));
4744 /* link is down, time to check for alternate media */
4745 if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4746 igb_check_swap_media(adapter);
4747 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4748 schedule_work(&adapter->reset_task);
4749 /* return immediately */
4753 pm_schedule_suspend(netdev->dev.parent,
4756 /* also check for alternate media here */
4757 } else if (!netif_carrier_ok(netdev) &&
4758 (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
4759 hw->mac.ops.power_up_serdes(hw);
4760 igb_check_swap_media(adapter);
4761 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4762 schedule_work(&adapter->reset_task);
4763 /* return immediately */
4769 igb_update_stats(adapter);
4771 for (i = 0; i < adapter->num_tx_queues; i++) {
4772 struct igb_ring *tx_ring = adapter->tx_ring[i];
4773 if (!netif_carrier_ok(netdev)) {
4774 /* We've lost link, so the controller stops DMA,
4775 * but we've got queued Tx work that's never going
4776 * to get done, so reset controller to flush Tx.
4777 * (Do the reset outside of interrupt context). */
4778 if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
4779 adapter->tx_timeout_count++;
4780 schedule_work(&adapter->reset_task);
4781 /* return immediately since reset is imminent */
4786 /* Force detection of hung controller every watchdog period */
4787 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
4790 /* Cause software interrupt to ensure rx ring is cleaned */
4791 if (adapter->msix_entries) {
4793 for (i = 0; i < adapter->num_q_vectors; i++)
4794 eics |= adapter->q_vector[i]->eims_value;
4795 E1000_WRITE_REG(hw, E1000_EICS, eics);
4797 E1000_WRITE_REG(hw, E1000_ICS, E1000_ICS_RXDMT0);
4800 igb_spoof_check(adapter);
4802 /* Reset the timer */
4803 if (!test_bit(__IGB_DOWN, &adapter->state)) {
4804 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
4805 mod_timer(&adapter->watchdog_timer,
4806 round_jiffies(jiffies + HZ));
4808 mod_timer(&adapter->watchdog_timer,
4809 round_jiffies(jiffies + 2 * HZ));
4813 static void igb_dma_err_task(struct work_struct *work)
4815 struct igb_adapter *adapter = container_of(work,
4819 struct e1000_hw *hw = &adapter->hw;
4820 struct net_device *netdev = adapter->netdev;
4824 hgptc = E1000_READ_REG(hw, E1000_HGPTC);
4825 if (hgptc) /* If incrementing then no need for the check below */
4826 goto dma_timer_reset;
4828 * Check to see if a bad DMA write target from an errant or
4829 * malicious VF has caused a PCIe error. If so then we can
4830 * issue a VFLR to the offending VF(s) and then resume without
4831 * requesting a full slot reset.
4834 for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
4835 ciaa = (vf << 16) | 0x80000000;
4836 /* 32 bit read so align, we really want status at offset 6 */
4837 ciaa |= PCI_COMMAND;
4838 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4839 ciad = E1000_READ_REG(hw, E1000_CIAD);
4841 /* disable debug mode asap after reading data */
4842 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4843 /* Get the upper 16 bits which will be the PCI status reg */
4845 if (ciad & (PCI_STATUS_REC_MASTER_ABORT |
4846 PCI_STATUS_REC_TARGET_ABORT |
4847 PCI_STATUS_SIG_SYSTEM_ERROR)) {
4848 netdev_err(netdev, "VF %d suffered error\n", vf);
4850 ciaa = (vf << 16) | 0x80000000;
4852 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4853 ciad = 0x00008000; /* VFLR */
4854 E1000_WRITE_REG(hw, E1000_CIAD, ciad);
4856 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4860 /* Reset the timer */
4861 if (!test_bit(__IGB_DOWN, &adapter->state))
4862 mod_timer(&adapter->dma_err_timer,
4863 round_jiffies(jiffies + HZ / 10));
4867 * igb_dma_err_timer - Timer Call-back
4868 * @data: pointer to adapter cast into an unsigned long
4870 #ifdef HAVE_TIMER_SETUP
4871 static void igb_dma_err_timer(struct timer_list *t)
4873 struct igb_adapter *adapter = from_timer(adapter, t, dma_err_timer);
4875 static void igb_dma_err_timer(unsigned long data)
4877 struct igb_adapter *adapter = (struct igb_adapter *)data;
4879 /* Do the rest outside of interrupt context */
4880 schedule_work(&adapter->dma_err_task);
4883 enum latency_range {
4887 latency_invalid = 255
4891 * igb_update_ring_itr - update the dynamic ITR value based on packet size
4893 * Stores a new ITR value based on strictly on packet size. This
4894 * algorithm is less sophisticated than that used in igb_update_itr,
4895 * due to the difficulty of synchronizing statistics across multiple
4896 * receive rings. The divisors and thresholds used by this function
4897 * were determined based on theoretical maximum wire speed and testing
4898 * data, in order to minimize response time while increasing bulk
4900 * This functionality is controlled by the InterruptThrottleRate module
4901 * parameter (see igb_param.c)
4902 * NOTE: This function is called only when operating in a multiqueue
4903 * receive environment.
4904 * @q_vector: pointer to q_vector
4906 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
4908 int new_val = q_vector->itr_val;
4909 int avg_wire_size = 0;
4910 struct igb_adapter *adapter = q_vector->adapter;
4911 unsigned int packets;
4913 /* For non-gigabit speeds, just fix the interrupt rate at 4000
4914 * ints/sec - ITR timer value of 120 ticks.
4916 switch (adapter->link_speed) {
4919 new_val = IGB_4K_ITR;
4925 packets = q_vector->rx.total_packets;
4927 avg_wire_size = q_vector->rx.total_bytes / packets;
4929 packets = q_vector->tx.total_packets;
4931 avg_wire_size = max_t(u32, avg_wire_size,
4932 q_vector->tx.total_bytes / packets);
4934 /* if avg_wire_size isn't set no work was done */
4938 /* Add 24 bytes to size to account for CRC, preamble, and gap */
4939 avg_wire_size += 24;
4941 /* Don't starve jumbo frames */
4942 avg_wire_size = min(avg_wire_size, 3000);
4944 /* Give a little boost to mid-size frames */
4945 if ((avg_wire_size > 300) && (avg_wire_size < 1200))
4946 new_val = avg_wire_size / 3;
4948 new_val = avg_wire_size / 2;
4950 /* conservative mode (itr 3) eliminates the lowest_latency setting */
4951 if (new_val < IGB_20K_ITR &&
4952 ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4953 (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4954 new_val = IGB_20K_ITR;
4957 if (new_val != q_vector->itr_val) {
4958 q_vector->itr_val = new_val;
4959 q_vector->set_itr = 1;
4962 q_vector->rx.total_bytes = 0;
4963 q_vector->rx.total_packets = 0;
4964 q_vector->tx.total_bytes = 0;
4965 q_vector->tx.total_packets = 0;
4969 * igb_update_itr - update the dynamic ITR value based on statistics
4970 * Stores a new ITR value based on packets and byte
4971 * counts during the last interrupt. The advantage of per interrupt
4972 * computation is faster updates and more accurate ITR for the current
4973 * traffic pattern. Constants in this function were computed
4974 * based on theoretical maximum wire speed and thresholds were set based
4975 * on testing data as well as attempting to minimize response time
4976 * while increasing bulk throughput.
4977 * this functionality is controlled by the InterruptThrottleRate module
4978 * parameter (see igb_param.c)
4979 * NOTE: These calculations are only valid when operating in a single-
4980 * queue environment.
4981 * @q_vector: pointer to q_vector
4982 * @ring_container: ring info to update the itr for
4984 static void igb_update_itr(struct igb_q_vector *q_vector,
4985 struct igb_ring_container *ring_container)
4987 unsigned int packets = ring_container->total_packets;
4988 unsigned int bytes = ring_container->total_bytes;
4989 u8 itrval = ring_container->itr;
4991 /* no packets, exit with status unchanged */
4996 case lowest_latency:
4997 /* handle TSO and jumbo frames */
4998 if (bytes/packets > 8000)
4999 itrval = bulk_latency;
5000 else if ((packets < 5) && (bytes > 512))
5001 itrval = low_latency;
5003 case low_latency: /* 50 usec aka 20000 ints/s */
5004 if (bytes > 10000) {
5005 /* this if handles the TSO accounting */
5006 if (bytes/packets > 8000) {
5007 itrval = bulk_latency;
5008 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
5009 itrval = bulk_latency;
5010 } else if (packets > 35) {
5011 itrval = lowest_latency;
5013 } else if (bytes/packets > 2000) {
5014 itrval = bulk_latency;
5015 } else if (packets <= 2 && bytes < 512) {
5016 itrval = lowest_latency;
5019 case bulk_latency: /* 250 usec aka 4000 ints/s */
5020 if (bytes > 25000) {
5022 itrval = low_latency;
5023 } else if (bytes < 1500) {
5024 itrval = low_latency;
5029 /* clear work counters since we have the values we need */
5030 ring_container->total_bytes = 0;
5031 ring_container->total_packets = 0;
5033 /* write updated itr to ring container */
5034 ring_container->itr = itrval;
5037 static void igb_set_itr(struct igb_q_vector *q_vector)
5039 struct igb_adapter *adapter = q_vector->adapter;
5040 u32 new_itr = q_vector->itr_val;
5043 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
5044 switch (adapter->link_speed) {
5048 new_itr = IGB_4K_ITR;
5054 igb_update_itr(q_vector, &q_vector->tx);
5055 igb_update_itr(q_vector, &q_vector->rx);
5057 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
5059 /* conservative mode (itr 3) eliminates the lowest_latency setting */
5060 if (current_itr == lowest_latency &&
5061 ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
5062 (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
5063 current_itr = low_latency;
5065 switch (current_itr) {
5066 /* counts and packets in update_itr are dependent on these numbers */
5067 case lowest_latency:
5068 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
5071 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
5074 new_itr = IGB_4K_ITR; /* 4,000 ints/sec */
5081 if (new_itr != q_vector->itr_val) {
5082 /* this attempts to bias the interrupt rate towards Bulk
5083 * by adding intermediate steps when interrupt rate is
5085 new_itr = new_itr > q_vector->itr_val ?
5086 max((new_itr * q_vector->itr_val) /
5087 (new_itr + (q_vector->itr_val >> 2)),
5090 /* Don't write the value here; it resets the adapter's
5091 * internal timer, and causes us to delay far longer than
5092 * we should between interrupts. Instead, we write the ITR
5093 * value at the beginning of the next interrupt so the timing
5094 * ends up being correct.
5096 q_vector->itr_val = new_itr;
5097 q_vector->set_itr = 1;
5101 void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
5102 u32 type_tucmd, u32 mss_l4len_idx)
5104 struct e1000_adv_tx_context_desc *context_desc;
5105 u16 i = tx_ring->next_to_use;
5107 context_desc = IGB_TX_CTXTDESC(tx_ring, i);
5110 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
5112 /* set bits to identify this as an advanced context descriptor */
5113 type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
5115 /* For 82575, context index must be unique per ring. */
5116 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5117 mss_l4len_idx |= tx_ring->reg_idx << 4;
5119 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
5120 context_desc->seqnum_seed = 0;
5121 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
5122 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
5125 static int igb_tso(struct igb_ring *tx_ring,
5126 struct igb_tx_buffer *first,
5130 struct sk_buff *skb = first->skb;
5131 u32 vlan_macip_lens, type_tucmd;
5132 u32 mss_l4len_idx, l4len;
5134 if (skb->ip_summed != CHECKSUM_PARTIAL)
5137 if (!skb_is_gso(skb))
5138 #endif /* NETIF_F_TSO */
5142 if (skb_header_cloned(skb)) {
5143 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
5148 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5149 type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
5151 if (first->protocol == __constant_htons(ETH_P_IP)) {
5152 struct iphdr *iph = ip_hdr(skb);
5155 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
5159 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5160 first->tx_flags |= IGB_TX_FLAGS_TSO |
5164 } else if (skb_is_gso_v6(skb)) {
5165 ipv6_hdr(skb)->payload_len = 0;
5166 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
5167 &ipv6_hdr(skb)->daddr,
5169 first->tx_flags |= IGB_TX_FLAGS_TSO |
5174 /* compute header lengths */
5175 l4len = tcp_hdrlen(skb);
5176 *hdr_len = skb_transport_offset(skb) + l4len;
5178 /* update gso size and bytecount with header size */
5179 first->gso_segs = skb_shinfo(skb)->gso_segs;
5180 first->bytecount += (first->gso_segs - 1) * *hdr_len;
5183 mss_l4len_idx = l4len << E1000_ADVTXD_L4LEN_SHIFT;
5184 mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
5186 /* VLAN MACLEN IPLEN */
5187 vlan_macip_lens = skb_network_header_len(skb);
5188 vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5189 vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5191 igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
5194 #endif /* NETIF_F_TSO */
5197 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
5199 struct sk_buff *skb = first->skb;
5200 u32 vlan_macip_lens = 0;
5201 u32 mss_l4len_idx = 0;
5204 if (skb->ip_summed != CHECKSUM_PARTIAL) {
5205 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
5209 switch (first->protocol) {
5210 case __constant_htons(ETH_P_IP):
5211 vlan_macip_lens |= skb_network_header_len(skb);
5212 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5213 nexthdr = ip_hdr(skb)->protocol;
5215 #ifdef NETIF_F_IPV6_CSUM
5216 case __constant_htons(ETH_P_IPV6):
5217 vlan_macip_lens |= skb_network_header_len(skb);
5218 nexthdr = ipv6_hdr(skb)->nexthdr;
5222 if (unlikely(net_ratelimit())) {
5223 dev_warn(tx_ring->dev,
5224 "partial checksum but proto=%x!\n",
5232 type_tucmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
5233 mss_l4len_idx = tcp_hdrlen(skb) <<
5234 E1000_ADVTXD_L4LEN_SHIFT;
5238 type_tucmd |= E1000_ADVTXD_TUCMD_L4T_SCTP;
5239 mss_l4len_idx = sizeof(struct sctphdr) <<
5240 E1000_ADVTXD_L4LEN_SHIFT;
5244 mss_l4len_idx = sizeof(struct udphdr) <<
5245 E1000_ADVTXD_L4LEN_SHIFT;
5248 if (unlikely(net_ratelimit())) {
5249 dev_warn(tx_ring->dev,
5250 "partial checksum but l4 proto=%x!\n",
5256 /* update TX checksum flag */
5257 first->tx_flags |= IGB_TX_FLAGS_CSUM;
5260 vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5261 vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5263 igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
5266 #define IGB_SET_FLAG(_input, _flag, _result) \
5267 ((_flag <= _result) ? \
5268 ((u32)(_input & _flag) * (_result / _flag)) : \
5269 ((u32)(_input & _flag) / (_flag / _result)))
5271 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
5273 /* set type for advanced descriptor with frame checksum insertion */
5274 u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
5275 E1000_ADVTXD_DCMD_DEXT |
5276 E1000_ADVTXD_DCMD_IFCS;
5278 /* set HW vlan bit if vlan is present */
5279 cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
5280 (E1000_ADVTXD_DCMD_VLE));
5282 /* set segmentation bits for TSO */
5283 cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
5284 (E1000_ADVTXD_DCMD_TSE));
5286 /* set timestamp bit if present */
5287 cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
5288 (E1000_ADVTXD_MAC_TSTAMP));
5293 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
5294 union e1000_adv_tx_desc *tx_desc,
5295 u32 tx_flags, unsigned int paylen)
5297 u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
5299 /* 82575 requires a unique index per ring */
5300 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5301 olinfo_status |= tx_ring->reg_idx << 4;
5303 /* insert L4 checksum */
5304 olinfo_status |= IGB_SET_FLAG(tx_flags,
5306 (E1000_TXD_POPTS_TXSM << 8));
5308 /* insert IPv4 checksum */
5309 olinfo_status |= IGB_SET_FLAG(tx_flags,
5311 (E1000_TXD_POPTS_IXSM << 8));
5313 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
5316 static void igb_tx_map(struct igb_ring *tx_ring,
5317 struct igb_tx_buffer *first,
5320 struct sk_buff *skb = first->skb;
5321 struct igb_tx_buffer *tx_buffer;
5322 union e1000_adv_tx_desc *tx_desc;
5323 struct skb_frag_struct *frag;
5325 unsigned int data_len, size;
5326 u32 tx_flags = first->tx_flags;
5327 u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
5328 u16 i = tx_ring->next_to_use;
5330 tx_desc = IGB_TX_DESC(tx_ring, i);
5332 igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
5334 size = skb_headlen(skb);
5335 data_len = skb->data_len;
5337 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
5341 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
5342 if (dma_mapping_error(tx_ring->dev, dma))
5345 /* record length, and DMA address */
5346 dma_unmap_len_set(tx_buffer, len, size);
5347 dma_unmap_addr_set(tx_buffer, dma, dma);
5349 tx_desc->read.buffer_addr = cpu_to_le64(dma);
5351 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
5352 tx_desc->read.cmd_type_len =
5353 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
5357 if (i == tx_ring->count) {
5358 tx_desc = IGB_TX_DESC(tx_ring, 0);
5361 tx_desc->read.olinfo_status = 0;
5363 dma += IGB_MAX_DATA_PER_TXD;
5364 size -= IGB_MAX_DATA_PER_TXD;
5366 tx_desc->read.buffer_addr = cpu_to_le64(dma);
5369 if (likely(!data_len))
5372 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
5376 if (i == tx_ring->count) {
5377 tx_desc = IGB_TX_DESC(tx_ring, 0);
5380 tx_desc->read.olinfo_status = 0;
5382 size = skb_frag_size(frag);
5385 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
5386 size, DMA_TO_DEVICE);
5388 tx_buffer = &tx_ring->tx_buffer_info[i];
5391 /* write last descriptor with RS and EOP bits */
5392 cmd_type |= size | IGB_TXD_DCMD;
5393 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
5395 netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
5396 /* set the timestamp */
5397 first->time_stamp = jiffies;
5400 * Force memory writes to complete before letting h/w know there
5401 * are new descriptors to fetch. (Only applicable for weak-ordered
5402 * memory model archs, such as IA-64).
5404 * We also need this memory barrier to make certain all of the
5405 * status bits have been updated before next_to_watch is written.
5409 /* set next_to_watch value indicating a packet is present */
5410 first->next_to_watch = tx_desc;
5413 if (i == tx_ring->count)
5416 tx_ring->next_to_use = i;
5418 writel(i, tx_ring->tail);
5420 /* we need this if more than one processor can write to our tail
5421 * at a time, it syncronizes IO on IA64/Altix systems */
5427 dev_err(tx_ring->dev, "TX DMA map failed\n");
5429 /* clear dma mappings for failed tx_buffer_info map */
5431 tx_buffer = &tx_ring->tx_buffer_info[i];
5432 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer);
5433 if (tx_buffer == first)
5440 tx_ring->next_to_use = i;
5443 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5445 struct net_device *netdev = netdev_ring(tx_ring);
5447 if (netif_is_multiqueue(netdev))
5448 netif_stop_subqueue(netdev, ring_queue_index(tx_ring));
5450 netif_stop_queue(netdev);
5452 /* Herbert's original patch had:
5453 * smp_mb__after_netif_stop_queue();
5454 * but since that doesn't exist yet, just open code it. */
5457 /* We need to check again in a case another CPU has just
5458 * made room available. */
5459 if (igb_desc_unused(tx_ring) < size)
5463 if (netif_is_multiqueue(netdev))
5464 netif_wake_subqueue(netdev, ring_queue_index(tx_ring));
5466 netif_wake_queue(netdev);
5468 tx_ring->tx_stats.restart_queue++;
5473 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5475 if (igb_desc_unused(tx_ring) >= size)
5477 return __igb_maybe_stop_tx(tx_ring, size);
5480 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
5481 struct igb_ring *tx_ring)
5483 struct igb_tx_buffer *first;
5486 #if PAGE_SIZE > IGB_MAX_DATA_PER_TXD
5489 u16 count = TXD_USE_COUNT(skb_headlen(skb));
5490 __be16 protocol = vlan_get_protocol(skb);
5494 * need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
5495 * + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
5496 * + 2 desc gap to keep tail from touching head,
5497 * + 1 desc for context descriptor,
5498 * otherwise try next time
5500 #if PAGE_SIZE > IGB_MAX_DATA_PER_TXD
5501 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
5502 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
5504 count += skb_shinfo(skb)->nr_frags;
5506 if (igb_maybe_stop_tx(tx_ring, count + 3)) {
5507 /* this is a hard error */
5508 return NETDEV_TX_BUSY;
5511 /* record the location of the first descriptor for this packet */
5512 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
5514 first->bytecount = skb->len;
5515 first->gso_segs = 1;
5517 skb_tx_timestamp(skb);
5519 #ifdef HAVE_PTP_1588_CLOCK
5520 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
5521 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
5522 if (!adapter->ptp_tx_skb) {
5523 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5524 tx_flags |= IGB_TX_FLAGS_TSTAMP;
5526 adapter->ptp_tx_skb = skb_get(skb);
5527 adapter->ptp_tx_start = jiffies;
5528 if (adapter->hw.mac.type == e1000_82576)
5529 schedule_work(&adapter->ptp_tx_work);
5532 #endif /* HAVE_PTP_1588_CLOCK */
5534 if (vlan_tx_tag_present(skb)) {
5535 tx_flags |= IGB_TX_FLAGS_VLAN;
5536 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
5539 /* record initial flags and protocol */
5540 first->tx_flags = tx_flags;
5541 first->protocol = protocol;
5543 tso = igb_tso(tx_ring, first, &hdr_len);
5547 igb_tx_csum(tx_ring, first);
5549 igb_tx_map(tx_ring, first, hdr_len);
5551 #ifndef HAVE_TRANS_START_IN_QUEUE
5552 netdev_ring(tx_ring)->trans_start = jiffies;
5555 /* Make sure there is space in the ring for the next send. */
5556 igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
5558 return NETDEV_TX_OK;
5561 igb_unmap_and_free_tx_resource(tx_ring, first);
5563 return NETDEV_TX_OK;
5567 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
5568 struct sk_buff *skb)
5570 unsigned int r_idx = skb->queue_mapping;
5572 if (r_idx >= adapter->num_tx_queues)
5573 r_idx = r_idx % adapter->num_tx_queues;
5575 return adapter->tx_ring[r_idx];
5578 #define igb_tx_queue_mapping(_adapter, _skb) (_adapter)->tx_ring[0]
5581 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
5582 struct net_device *netdev)
5584 struct igb_adapter *adapter = netdev_priv(netdev);
5586 if (test_bit(__IGB_DOWN, &adapter->state)) {
5587 dev_kfree_skb_any(skb);
5588 return NETDEV_TX_OK;
5591 if (skb->len <= 0) {
5592 dev_kfree_skb_any(skb);
5593 return NETDEV_TX_OK;
5597 * The minimum packet size with TCTL.PSP set is 17 so pad the skb
5598 * in order to meet this minimum size requirement.
5600 if (skb->len < 17) {
5601 if (skb_padto(skb, 17))
5602 return NETDEV_TX_OK;
5606 return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
5610 * igb_tx_timeout - Respond to a Tx Hang
5611 * @netdev: network interface device structure
5613 static void igb_tx_timeout(struct net_device *netdev)
5615 struct igb_adapter *adapter = netdev_priv(netdev);
5616 struct e1000_hw *hw = &adapter->hw;
5618 /* Do the reset outside of interrupt context */
5619 adapter->tx_timeout_count++;
5621 if (hw->mac.type >= e1000_82580)
5622 hw->dev_spec._82575.global_device_reset = true;
5624 schedule_work(&adapter->reset_task);
5625 E1000_WRITE_REG(hw, E1000_EICS,
5626 (adapter->eims_enable_mask & ~adapter->eims_other));
5629 static void igb_reset_task(struct work_struct *work)
5631 struct igb_adapter *adapter;
5632 adapter = container_of(work, struct igb_adapter, reset_task);
5634 igb_reinit_locked(adapter);
5638 * igb_get_stats - Get System Network Statistics
5639 * @netdev: network interface device structure
5641 * Returns the address of the device statistics structure.
5642 * The statistics are updated here and also from the timer callback.
5644 static struct net_device_stats *igb_get_stats(struct net_device *netdev)
5646 struct igb_adapter *adapter = netdev_priv(netdev);
5648 if (!test_bit(__IGB_RESETTING, &adapter->state))
5649 igb_update_stats(adapter);
5651 #ifdef HAVE_NETDEV_STATS_IN_NETDEV
5652 /* only return the current stats */
5653 return &netdev->stats;
5655 /* only return the current stats */
5656 return &adapter->net_stats;
5657 #endif /* HAVE_NETDEV_STATS_IN_NETDEV */
5661 * igb_change_mtu - Change the Maximum Transfer Unit
5662 * @netdev: network interface device structure
5663 * @new_mtu: new value for maximum frame size
5665 * Returns 0 on success, negative on failure
5667 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
5669 struct igb_adapter *adapter = netdev_priv(netdev);
5670 struct e1000_hw *hw = &adapter->hw;
5671 struct pci_dev *pdev = adapter->pdev;
5672 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
5674 if ((new_mtu < 68) || (max_frame > MAX_JUMBO_FRAME_SIZE)) {
5675 dev_err(pci_dev_to_dev(pdev), "Invalid MTU setting\n");
5679 #define MAX_STD_JUMBO_FRAME_SIZE 9238
5680 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
5681 dev_err(pci_dev_to_dev(pdev), "MTU > 9216 not supported.\n");
5685 /* adjust max frame to be at least the size of a standard frame */
5686 if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
5687 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
5689 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
5690 usleep_range(1000, 2000);
5692 /* igb_down has a dependency on max_frame_size */
5693 adapter->max_frame_size = max_frame;
5695 if (netif_running(netdev))
5698 dev_info(pci_dev_to_dev(pdev), "changing MTU from %d to %d\n",
5699 netdev->mtu, new_mtu);
5700 netdev->mtu = new_mtu;
5701 hw->dev_spec._82575.mtu = new_mtu;
5703 if (netif_running(netdev))
5708 clear_bit(__IGB_RESETTING, &adapter->state);
5714 * igb_update_stats - Update the board statistics counters
5715 * @adapter: board private structure
5718 void igb_update_stats(struct igb_adapter *adapter)
5720 #ifdef HAVE_NETDEV_STATS_IN_NETDEV
5721 struct net_device_stats *net_stats = &adapter->netdev->stats;
5723 struct net_device_stats *net_stats = &adapter->net_stats;
5724 #endif /* HAVE_NETDEV_STATS_IN_NETDEV */
5725 struct e1000_hw *hw = &adapter->hw;
5727 struct pci_dev *pdev = adapter->pdev;
5734 u32 flushed = 0, coal = 0;
5735 struct igb_q_vector *q_vector;
5738 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
5741 * Prevent stats update while adapter is being reset, or if the pci
5742 * connection is down.
5744 if (adapter->link_speed == 0)
5747 if (pci_channel_offline(pdev))
5752 for (i = 0; i < adapter->num_q_vectors; i++) {
5753 q_vector = adapter->q_vector[i];
5756 flushed += q_vector->lrolist.stats.flushed;
5757 coal += q_vector->lrolist.stats.coal;
5759 adapter->lro_stats.flushed = flushed;
5760 adapter->lro_stats.coal = coal;
5765 for (i = 0; i < adapter->num_rx_queues; i++) {
5766 u32 rqdpc_tmp = E1000_READ_REG(hw, E1000_RQDPC(i)) & 0x0FFF;
5767 struct igb_ring *ring = adapter->rx_ring[i];
5768 ring->rx_stats.drops += rqdpc_tmp;
5769 net_stats->rx_fifo_errors += rqdpc_tmp;
5770 #ifdef CONFIG_IGB_VMDQ_NETDEV
5771 if (!ring->vmdq_netdev) {
5772 bytes += ring->rx_stats.bytes;
5773 packets += ring->rx_stats.packets;
5776 bytes += ring->rx_stats.bytes;
5777 packets += ring->rx_stats.packets;
5781 net_stats->rx_bytes = bytes;
5782 net_stats->rx_packets = packets;
5786 for (i = 0; i < adapter->num_tx_queues; i++) {
5787 struct igb_ring *ring = adapter->tx_ring[i];
5788 #ifdef CONFIG_IGB_VMDQ_NETDEV
5789 if (!ring->vmdq_netdev) {
5790 bytes += ring->tx_stats.bytes;
5791 packets += ring->tx_stats.packets;
5794 bytes += ring->tx_stats.bytes;
5795 packets += ring->tx_stats.packets;
5798 net_stats->tx_bytes = bytes;
5799 net_stats->tx_packets = packets;
5801 /* read stats registers */
5802 adapter->stats.crcerrs += E1000_READ_REG(hw, E1000_CRCERRS);
5803 adapter->stats.gprc += E1000_READ_REG(hw, E1000_GPRC);
5804 adapter->stats.gorc += E1000_READ_REG(hw, E1000_GORCL);
5805 E1000_READ_REG(hw, E1000_GORCH); /* clear GORCL */
5806 adapter->stats.bprc += E1000_READ_REG(hw, E1000_BPRC);
5807 adapter->stats.mprc += E1000_READ_REG(hw, E1000_MPRC);
5808 adapter->stats.roc += E1000_READ_REG(hw, E1000_ROC);
5810 adapter->stats.prc64 += E1000_READ_REG(hw, E1000_PRC64);
5811 adapter->stats.prc127 += E1000_READ_REG(hw, E1000_PRC127);
5812 adapter->stats.prc255 += E1000_READ_REG(hw, E1000_PRC255);
5813 adapter->stats.prc511 += E1000_READ_REG(hw, E1000_PRC511);
5814 adapter->stats.prc1023 += E1000_READ_REG(hw, E1000_PRC1023);
5815 adapter->stats.prc1522 += E1000_READ_REG(hw, E1000_PRC1522);
5816 adapter->stats.symerrs += E1000_READ_REG(hw, E1000_SYMERRS);
5817 adapter->stats.sec += E1000_READ_REG(hw, E1000_SEC);
5819 mpc = E1000_READ_REG(hw, E1000_MPC);
5820 adapter->stats.mpc += mpc;
5821 net_stats->rx_fifo_errors += mpc;
5822 adapter->stats.scc += E1000_READ_REG(hw, E1000_SCC);
5823 adapter->stats.ecol += E1000_READ_REG(hw, E1000_ECOL);
5824 adapter->stats.mcc += E1000_READ_REG(hw, E1000_MCC);
5825 adapter->stats.latecol += E1000_READ_REG(hw, E1000_LATECOL);
5826 adapter->stats.dc += E1000_READ_REG(hw, E1000_DC);
5827 adapter->stats.rlec += E1000_READ_REG(hw, E1000_RLEC);
5828 adapter->stats.xonrxc += E1000_READ_REG(hw, E1000_XONRXC);
5829 adapter->stats.xontxc += E1000_READ_REG(hw, E1000_XONTXC);
5830 adapter->stats.xoffrxc += E1000_READ_REG(hw, E1000_XOFFRXC);
5831 adapter->stats.xofftxc += E1000_READ_REG(hw, E1000_XOFFTXC);
5832 adapter->stats.fcruc += E1000_READ_REG(hw, E1000_FCRUC);
5833 adapter->stats.gptc += E1000_READ_REG(hw, E1000_GPTC);
5834 adapter->stats.gotc += E1000_READ_REG(hw, E1000_GOTCL);
5835 E1000_READ_REG(hw, E1000_GOTCH); /* clear GOTCL */
5836 adapter->stats.rnbc += E1000_READ_REG(hw, E1000_RNBC);
5837 adapter->stats.ruc += E1000_READ_REG(hw, E1000_RUC);
5838 adapter->stats.rfc += E1000_READ_REG(hw, E1000_RFC);
5839 adapter->stats.rjc += E1000_READ_REG(hw, E1000_RJC);
5840 adapter->stats.tor += E1000_READ_REG(hw, E1000_TORH);
5841 adapter->stats.tot += E1000_READ_REG(hw, E1000_TOTH);
5842 adapter->stats.tpr += E1000_READ_REG(hw, E1000_TPR);
5844 adapter->stats.ptc64 += E1000_READ_REG(hw, E1000_PTC64);
5845 adapter->stats.ptc127 += E1000_READ_REG(hw, E1000_PTC127);
5846 adapter->stats.ptc255 += E1000_READ_REG(hw, E1000_PTC255);
5847 adapter->stats.ptc511 += E1000_READ_REG(hw, E1000_PTC511);
5848 adapter->stats.ptc1023 += E1000_READ_REG(hw, E1000_PTC1023);
5849 adapter->stats.ptc1522 += E1000_READ_REG(hw, E1000_PTC1522);
5851 adapter->stats.mptc += E1000_READ_REG(hw, E1000_MPTC);
5852 adapter->stats.bptc += E1000_READ_REG(hw, E1000_BPTC);
5854 adapter->stats.tpt += E1000_READ_REG(hw, E1000_TPT);
5855 adapter->stats.colc += E1000_READ_REG(hw, E1000_COLC);
5857 adapter->stats.algnerrc += E1000_READ_REG(hw, E1000_ALGNERRC);
5858 /* read internal phy sepecific stats */
5859 reg = E1000_READ_REG(hw, E1000_CTRL_EXT);
5860 if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
5861 adapter->stats.rxerrc += E1000_READ_REG(hw, E1000_RXERRC);
5863 /* this stat has invalid values on i210/i211 */
5864 if ((hw->mac.type != e1000_i210) &&
5865 (hw->mac.type != e1000_i211))
5866 adapter->stats.tncrs += E1000_READ_REG(hw, E1000_TNCRS);
5868 adapter->stats.tsctc += E1000_READ_REG(hw, E1000_TSCTC);
5869 adapter->stats.tsctfc += E1000_READ_REG(hw, E1000_TSCTFC);
5871 adapter->stats.iac += E1000_READ_REG(hw, E1000_IAC);
5872 adapter->stats.icrxoc += E1000_READ_REG(hw, E1000_ICRXOC);
5873 adapter->stats.icrxptc += E1000_READ_REG(hw, E1000_ICRXPTC);
5874 adapter->stats.icrxatc += E1000_READ_REG(hw, E1000_ICRXATC);
5875 adapter->stats.ictxptc += E1000_READ_REG(hw, E1000_ICTXPTC);
5876 adapter->stats.ictxatc += E1000_READ_REG(hw, E1000_ICTXATC);
5877 adapter->stats.ictxqec += E1000_READ_REG(hw, E1000_ICTXQEC);
5878 adapter->stats.ictxqmtc += E1000_READ_REG(hw, E1000_ICTXQMTC);
5879 adapter->stats.icrxdmtc += E1000_READ_REG(hw, E1000_ICRXDMTC);
5881 /* Fill out the OS statistics structure */
5882 net_stats->multicast = adapter->stats.mprc;
5883 net_stats->collisions = adapter->stats.colc;
5887 /* RLEC on some newer hardware can be incorrect so build
5888 * our own version based on RUC and ROC */
5889 net_stats->rx_errors = adapter->stats.rxerrc +
5890 adapter->stats.crcerrs + adapter->stats.algnerrc +
5891 adapter->stats.ruc + adapter->stats.roc +
5892 adapter->stats.cexterr;
5893 net_stats->rx_length_errors = adapter->stats.ruc +
5895 net_stats->rx_crc_errors = adapter->stats.crcerrs;
5896 net_stats->rx_frame_errors = adapter->stats.algnerrc;
5897 net_stats->rx_missed_errors = adapter->stats.mpc;
5900 net_stats->tx_errors = adapter->stats.ecol +
5901 adapter->stats.latecol;
5902 net_stats->tx_aborted_errors = adapter->stats.ecol;
5903 net_stats->tx_window_errors = adapter->stats.latecol;
5904 net_stats->tx_carrier_errors = adapter->stats.tncrs;
5906 /* Tx Dropped needs to be maintained elsewhere */
5909 if (hw->phy.media_type == e1000_media_type_copper) {
5910 if ((adapter->link_speed == SPEED_1000) &&
5911 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
5912 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
5913 adapter->phy_stats.idle_errors += phy_tmp;
5917 /* Management Stats */
5918 adapter->stats.mgptc += E1000_READ_REG(hw, E1000_MGTPTC);
5919 adapter->stats.mgprc += E1000_READ_REG(hw, E1000_MGTPRC);
5920 if (hw->mac.type > e1000_82580) {
5921 adapter->stats.o2bgptc += E1000_READ_REG(hw, E1000_O2BGPTC);
5922 adapter->stats.o2bspc += E1000_READ_REG(hw, E1000_O2BSPC);
5923 adapter->stats.b2ospc += E1000_READ_REG(hw, E1000_B2OSPC);
5924 adapter->stats.b2ogprc += E1000_READ_REG(hw, E1000_B2OGPRC);
5928 static irqreturn_t igb_msix_other(int irq, void *data)
5930 struct igb_adapter *adapter = data;
5931 struct e1000_hw *hw = &adapter->hw;
5932 u32 icr = E1000_READ_REG(hw, E1000_ICR);
5933 /* reading ICR causes bit 31 of EICR to be cleared */
5935 if (icr & E1000_ICR_DRSTA)
5936 schedule_work(&adapter->reset_task);
5938 if (icr & E1000_ICR_DOUTSYNC) {
5939 /* HW is reporting DMA is out of sync */
5940 adapter->stats.doosync++;
5941 /* The DMA Out of Sync is also indication of a spoof event
5942 * in IOV mode. Check the Wrong VM Behavior register to
5943 * see if it is really a spoof event. */
5944 igb_check_wvbr(adapter);
5947 /* Check for a mailbox event */
5948 if (icr & E1000_ICR_VMMB)
5949 igb_msg_task(adapter);
5951 if (icr & E1000_ICR_LSC) {
5952 hw->mac.get_link_status = 1;
5953 /* guard against interrupt when we're going down */
5954 if (!test_bit(__IGB_DOWN, &adapter->state))
5955 mod_timer(&adapter->watchdog_timer, jiffies + 1);
5958 #ifdef HAVE_PTP_1588_CLOCK
5959 if (icr & E1000_ICR_TS) {
5960 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
5962 if (tsicr & E1000_TSICR_TXTS) {
5963 /* acknowledge the interrupt */
5964 E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
5965 /* retrieve hardware timestamp */
5966 schedule_work(&adapter->ptp_tx_work);
5969 #endif /* HAVE_PTP_1588_CLOCK */
5971 /* Check for MDD event */
5972 if (icr & E1000_ICR_MDDET)
5973 igb_process_mdd_event(adapter);
5975 E1000_WRITE_REG(hw, E1000_EIMS, adapter->eims_other);
5980 static void igb_write_itr(struct igb_q_vector *q_vector)
5982 struct igb_adapter *adapter = q_vector->adapter;
5983 u32 itr_val = q_vector->itr_val & 0x7FFC;
5985 if (!q_vector->set_itr)
5991 if (adapter->hw.mac.type == e1000_82575)
5992 itr_val |= itr_val << 16;
5994 itr_val |= E1000_EITR_CNT_IGNR;
5996 writel(itr_val, q_vector->itr_register);
5997 q_vector->set_itr = 0;
6000 static irqreturn_t igb_msix_ring(int irq, void *data)
6002 struct igb_q_vector *q_vector = data;
6004 /* Write the ITR value calculated from the previous interrupt. */
6005 igb_write_itr(q_vector);
6007 napi_schedule(&q_vector->napi);
6013 static void igb_update_tx_dca(struct igb_adapter *adapter,
6014 struct igb_ring *tx_ring,
6017 struct e1000_hw *hw = &adapter->hw;
6018 u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
6020 if (hw->mac.type != e1000_82575)
6021 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT_82576;
6024 * We can enable relaxed ordering for reads, but not writes when
6025 * DCA is enabled. This is due to a known issue in some chipsets
6026 * which will cause the DCA tag to be cleared.
6028 txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
6029 E1000_DCA_TXCTRL_DATA_RRO_EN |
6030 E1000_DCA_TXCTRL_DESC_DCA_EN;
6032 E1000_WRITE_REG(hw, E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
6035 static void igb_update_rx_dca(struct igb_adapter *adapter,
6036 struct igb_ring *rx_ring,
6039 struct e1000_hw *hw = &adapter->hw;
6040 u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
6042 if (hw->mac.type != e1000_82575)
6043 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT_82576;
6046 * We can enable relaxed ordering for reads, but not writes when
6047 * DCA is enabled. This is due to a known issue in some chipsets
6048 * which will cause the DCA tag to be cleared.
6050 rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
6051 E1000_DCA_RXCTRL_DESC_DCA_EN;
6053 E1000_WRITE_REG(hw, E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
6056 static void igb_update_dca(struct igb_q_vector *q_vector)
6058 struct igb_adapter *adapter = q_vector->adapter;
6059 int cpu = get_cpu();
6061 if (q_vector->cpu == cpu)
6064 if (q_vector->tx.ring)
6065 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
6067 if (q_vector->rx.ring)
6068 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
6070 q_vector->cpu = cpu;
6075 static void igb_setup_dca(struct igb_adapter *adapter)
6077 struct e1000_hw *hw = &adapter->hw;
6080 if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
6083 /* Always use CB2 mode, difference is masked in the CB driver. */
6084 E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
6086 for (i = 0; i < adapter->num_q_vectors; i++) {
6087 adapter->q_vector[i]->cpu = -1;
6088 igb_update_dca(adapter->q_vector[i]);
6092 static int __igb_notify_dca(struct device *dev, void *data)
6094 struct net_device *netdev = dev_get_drvdata(dev);
6095 struct igb_adapter *adapter = netdev_priv(netdev);
6096 struct pci_dev *pdev = adapter->pdev;
6097 struct e1000_hw *hw = &adapter->hw;
6098 unsigned long event = *(unsigned long *)data;
6101 case DCA_PROVIDER_ADD:
6102 /* if already enabled, don't do it again */
6103 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
6105 if (dca_add_requester(dev) == E1000_SUCCESS) {
6106 adapter->flags |= IGB_FLAG_DCA_ENABLED;
6107 dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
6108 igb_setup_dca(adapter);
6111 /* Fall Through since DCA is disabled. */
6112 case DCA_PROVIDER_REMOVE:
6113 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
6114 /* without this a class_device is left
6115 * hanging around in the sysfs model */
6116 dca_remove_requester(dev);
6117 dev_info(pci_dev_to_dev(pdev), "DCA disabled\n");
6118 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
6119 E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_DISABLE);
6124 return E1000_SUCCESS;
6127 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
6132 ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
6135 return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
6137 #endif /* IGB_DCA */
6139 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
6141 unsigned char mac_addr[ETH_ALEN];
6143 random_ether_addr(mac_addr);
6144 igb_set_vf_mac(adapter, vf, mac_addr);
6147 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
6148 /* By default spoof check is enabled for all VFs */
6149 adapter->vf_data[vf].spoofchk_enabled = true;
6156 static void igb_ping_all_vfs(struct igb_adapter *adapter)
6158 struct e1000_hw *hw = &adapter->hw;
6162 for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
6163 ping = E1000_PF_CONTROL_MSG;
6164 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
6165 ping |= E1000_VT_MSGTYPE_CTS;
6166 e1000_write_mbx(hw, &ping, 1, i);
6171 * igb_mta_set_ - Set multicast filter table address
6172 * @adapter: pointer to the adapter structure
6173 * @hash_value: determines the MTA register and bit to set
6175 * The multicast table address is a register array of 32-bit registers.
6176 * The hash_value is used to determine what register the bit is in, the
6177 * current value is read, the new bit is OR'd in and the new value is
6178 * written back into the register.
6180 void igb_mta_set(struct igb_adapter *adapter, u32 hash_value)
6182 struct e1000_hw *hw = &adapter->hw;
6183 u32 hash_bit, hash_reg, mta;
6186 * The MTA is a register array of 32-bit registers. It is
6187 * treated like an array of (32*mta_reg_count) bits. We want to
6188 * set bit BitArray[hash_value]. So we figure out what register
6189 * the bit is in, read it, OR in the new bit, then write
6190 * back the new value. The (hw->mac.mta_reg_count - 1) serves as a
6191 * mask to bits 31:5 of the hash value which gives us the
6192 * register we're modifying. The hash bit within that register
6193 * is determined by the lower 5 bits of the hash value.
6195 hash_reg = (hash_value >> 5) & (hw->mac.mta_reg_count - 1);
6196 hash_bit = hash_value & 0x1F;
6198 mta = E1000_READ_REG_ARRAY(hw, E1000_MTA, hash_reg);
6200 mta |= (1 << hash_bit);
6202 E1000_WRITE_REG_ARRAY(hw, E1000_MTA, hash_reg, mta);
6203 E1000_WRITE_FLUSH(hw);
6206 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6209 struct e1000_hw *hw = &adapter->hw;
6210 u32 vmolr = E1000_READ_REG(hw, E1000_VMOLR(vf));
6211 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6213 vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
6214 IGB_VF_FLAG_MULTI_PROMISC);
6215 vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6217 #ifdef IGB_ENABLE_VF_PROMISC
6218 if (*msgbuf & E1000_VF_SET_PROMISC_UNICAST) {
6219 vmolr |= E1000_VMOLR_ROPE;
6220 vf_data->flags |= IGB_VF_FLAG_UNI_PROMISC;
6221 *msgbuf &= ~E1000_VF_SET_PROMISC_UNICAST;
6224 if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
6225 vmolr |= E1000_VMOLR_MPME;
6226 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
6227 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
6230 * if we have hashes and we are clearing a multicast promisc
6231 * flag we need to write the hashes to the MTA as this step
6232 * was previously skipped
6234 if (vf_data->num_vf_mc_hashes > 30) {
6235 vmolr |= E1000_VMOLR_MPME;
6236 } else if (vf_data->num_vf_mc_hashes) {
6238 vmolr |= E1000_VMOLR_ROMPE;
6239 for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6240 igb_mta_set(adapter, vf_data->vf_mc_hashes[j]);
6244 E1000_WRITE_REG(hw, E1000_VMOLR(vf), vmolr);
6246 /* there are flags left unprocessed, likely not supported */
6247 if (*msgbuf & E1000_VT_MSGINFO_MASK)
6254 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
6255 u32 *msgbuf, u32 vf)
6257 int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6258 u16 *hash_list = (u16 *)&msgbuf[1];
6259 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6262 /* salt away the number of multicast addresses assigned
6263 * to this VF for later use to restore when the PF multi cast
6266 vf_data->num_vf_mc_hashes = n;
6268 /* only up to 30 hash values supported */
6272 /* store the hashes for later use */
6273 for (i = 0; i < n; i++)
6274 vf_data->vf_mc_hashes[i] = hash_list[i];
6276 /* Flush and reset the mta with the new values */
6277 igb_set_rx_mode(adapter->netdev);
6282 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
6284 struct e1000_hw *hw = &adapter->hw;
6285 struct vf_data_storage *vf_data;
6288 for (i = 0; i < adapter->vfs_allocated_count; i++) {
6289 u32 vmolr = E1000_READ_REG(hw, E1000_VMOLR(i));
6290 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6292 vf_data = &adapter->vf_data[i];
6294 if ((vf_data->num_vf_mc_hashes > 30) ||
6295 (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
6296 vmolr |= E1000_VMOLR_MPME;
6297 } else if (vf_data->num_vf_mc_hashes) {
6298 vmolr |= E1000_VMOLR_ROMPE;
6299 for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6300 igb_mta_set(adapter, vf_data->vf_mc_hashes[j]);
6302 E1000_WRITE_REG(hw, E1000_VMOLR(i), vmolr);
6306 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
6308 struct e1000_hw *hw = &adapter->hw;
6309 u32 pool_mask, reg, vid;
6313 pool_mask = 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
6315 /* Find the vlan filter for this id */
6316 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6317 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6319 /* remove the vf from the pool */
6322 /* if pool is empty then remove entry from vfta */
6323 if (!(reg & E1000_VLVF_POOLSEL_MASK) &&
6324 (reg & E1000_VLVF_VLANID_ENABLE)) {
6326 vid = reg & E1000_VLVF_VLANID_MASK;
6327 igb_vfta_set(adapter, vid, FALSE);
6330 E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6333 adapter->vf_data[vf].vlans_enabled = 0;
6335 vlan_default = adapter->vf_data[vf].default_vf_vlan_id;
6337 igb_vlvf_set(adapter, vlan_default, true, vf);
6340 s32 igb_vlvf_set(struct igb_adapter *adapter, u32 vid, bool add, u32 vf)
6342 struct e1000_hw *hw = &adapter->hw;
6345 /* The vlvf table only exists on 82576 hardware and newer */
6346 if (hw->mac.type < e1000_82576)
6349 /* we only need to do this if VMDq is enabled */
6350 if (!adapter->vmdq_pools)
6353 /* Find the vlan filter for this id */
6354 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6355 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6356 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
6357 vid == (reg & E1000_VLVF_VLANID_MASK))
6362 if (i == E1000_VLVF_ARRAY_SIZE) {
6363 /* Did not find a matching VLAN ID entry that was
6364 * enabled. Search for a free filter entry, i.e.
6365 * one without the enable bit set
6367 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6368 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6369 if (!(reg & E1000_VLVF_VLANID_ENABLE))
6373 if (i < E1000_VLVF_ARRAY_SIZE) {
6374 /* Found an enabled/available entry */
6375 reg |= 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
6377 /* if !enabled we need to set this up in vfta */
6378 if (!(reg & E1000_VLVF_VLANID_ENABLE)) {
6379 /* add VID to filter table */
6380 igb_vfta_set(adapter, vid, TRUE);
6381 reg |= E1000_VLVF_VLANID_ENABLE;
6383 reg &= ~E1000_VLVF_VLANID_MASK;
6385 E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6387 /* do not modify RLPML for PF devices */
6388 if (vf >= adapter->vfs_allocated_count)
6389 return E1000_SUCCESS;
6391 if (!adapter->vf_data[vf].vlans_enabled) {
6393 reg = E1000_READ_REG(hw, E1000_VMOLR(vf));
6394 size = reg & E1000_VMOLR_RLPML_MASK;
6396 reg &= ~E1000_VMOLR_RLPML_MASK;
6398 E1000_WRITE_REG(hw, E1000_VMOLR(vf), reg);
6401 adapter->vf_data[vf].vlans_enabled++;
6404 if (i < E1000_VLVF_ARRAY_SIZE) {
6405 /* remove vf from the pool */
6406 reg &= ~(1 << (E1000_VLVF_POOLSEL_SHIFT + vf));
6407 /* if pool is empty then remove entry from vfta */
6408 if (!(reg & E1000_VLVF_POOLSEL_MASK)) {
6410 igb_vfta_set(adapter, vid, FALSE);
6412 E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6414 /* do not modify RLPML for PF devices */
6415 if (vf >= adapter->vfs_allocated_count)
6416 return E1000_SUCCESS;
6418 adapter->vf_data[vf].vlans_enabled--;
6419 if (!adapter->vf_data[vf].vlans_enabled) {
6421 reg = E1000_READ_REG(hw, E1000_VMOLR(vf));
6422 size = reg & E1000_VMOLR_RLPML_MASK;
6424 reg &= ~E1000_VMOLR_RLPML_MASK;
6426 E1000_WRITE_REG(hw, E1000_VMOLR(vf), reg);
6430 return E1000_SUCCESS;
6434 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
6436 struct e1000_hw *hw = &adapter->hw;
6439 E1000_WRITE_REG(hw, E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
6441 E1000_WRITE_REG(hw, E1000_VMVIR(vf), 0);
6444 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
6445 #ifdef HAVE_VF_VLAN_PROTO
6446 int vf, u16 vlan, u8 qos, __be16 vlan_proto)
6448 int vf, u16 vlan, u8 qos)
6452 struct igb_adapter *adapter = netdev_priv(netdev);
6454 /* VLAN IDs accepted range 0-4094 */
6455 if ((vf >= adapter->vfs_allocated_count) || (vlan > VLAN_VID_MASK-1) || (qos > 7))
6458 #ifdef HAVE_VF_VLAN_PROTO
6459 if (vlan_proto != htons(ETH_P_8021Q))
6460 return -EPROTONOSUPPORT;
6464 err = igb_vlvf_set(adapter, vlan, !!vlan, vf);
6467 igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
6468 igb_set_vmolr(adapter, vf, !vlan);
6469 adapter->vf_data[vf].pf_vlan = vlan;
6470 adapter->vf_data[vf].pf_qos = qos;
6471 igb_set_vf_vlan_strip(adapter, vf, true);
6472 dev_info(&adapter->pdev->dev,
6473 "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
6474 if (test_bit(__IGB_DOWN, &adapter->state)) {
6475 dev_warn(&adapter->pdev->dev,
6476 "The VF VLAN has been set,"
6477 " but the PF device is not up.\n");
6478 dev_warn(&adapter->pdev->dev,
6479 "Bring the PF device up before"
6480 " attempting to use the VF device.\n");
6483 if (adapter->vf_data[vf].pf_vlan)
6484 dev_info(&adapter->pdev->dev,
6485 "Clearing VLAN on VF %d\n", vf);
6486 igb_vlvf_set(adapter, adapter->vf_data[vf].pf_vlan,
6488 igb_set_vmvir(adapter, vlan, vf);
6489 igb_set_vmolr(adapter, vf, true);
6490 igb_set_vf_vlan_strip(adapter, vf, false);
6491 adapter->vf_data[vf].pf_vlan = 0;
6492 adapter->vf_data[vf].pf_qos = 0;
6498 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
6499 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
6502 struct igb_adapter *adapter = netdev_priv(netdev);
6503 struct e1000_hw *hw = &adapter->hw;
6504 u32 dtxswc, reg_offset;
6506 if (!adapter->vfs_allocated_count)
6509 if (vf >= adapter->vfs_allocated_count)
6512 reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
6513 dtxswc = E1000_READ_REG(hw, reg_offset);
6515 dtxswc |= ((1 << vf) |
6516 (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
6518 dtxswc &= ~((1 << vf) |
6519 (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
6520 E1000_WRITE_REG(hw, reg_offset, dtxswc);
6522 adapter->vf_data[vf].spoofchk_enabled = setting;
6523 return E1000_SUCCESS;
6525 #endif /* HAVE_VF_SPOOFCHK_CONFIGURE */
6526 #endif /* IFLA_VF_MAX */
6528 static int igb_find_vlvf_entry(struct igb_adapter *adapter, int vid)
6530 struct e1000_hw *hw = &adapter->hw;
6534 /* Find the vlan filter for this id */
6535 for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6536 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6537 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
6538 vid == (reg & E1000_VLVF_VLANID_MASK))
6542 if (i >= E1000_VLVF_ARRAY_SIZE)
6548 static int igb_set_vf_vlan(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6550 struct e1000_hw *hw = &adapter->hw;
6551 int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6552 int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
6556 igb_set_vf_vlan_strip(adapter, vf, true);
6558 igb_set_vf_vlan_strip(adapter, vf, false);
6560 /* If in promiscuous mode we need to make sure the PF also has
6561 * the VLAN filter set.
6563 if (add && (adapter->netdev->flags & IFF_PROMISC))
6564 err = igb_vlvf_set(adapter, vid, add,
6565 adapter->vfs_allocated_count);
6569 err = igb_vlvf_set(adapter, vid, add, vf);
6574 /* Go through all the checks to see if the VLAN filter should
6575 * be wiped completely.
6577 if (!add && (adapter->netdev->flags & IFF_PROMISC)) {
6580 int regndx = igb_find_vlvf_entry(adapter, vid);
6583 /* See if any other pools are set for this VLAN filter
6584 * entry other than the PF.
6586 vlvf = bits = E1000_READ_REG(hw, E1000_VLVF(regndx));
6587 bits &= 1 << (E1000_VLVF_POOLSEL_SHIFT +
6588 adapter->vfs_allocated_count);
6589 /* If the filter was removed then ensure PF pool bit
6590 * is cleared if the PF only added itself to the pool
6591 * because the PF is in promiscuous mode.
6593 if ((vlvf & VLAN_VID_MASK) == vid &&
6594 #ifndef HAVE_VLAN_RX_REGISTER
6595 !test_bit(vid, adapter->active_vlans) &&
6598 igb_vlvf_set(adapter, vid, add,
6599 adapter->vfs_allocated_count);
6606 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
6608 struct e1000_hw *hw = &adapter->hw;
6610 /* clear flags except flag that the PF has set the MAC */
6611 adapter->vf_data[vf].flags &= IGB_VF_FLAG_PF_SET_MAC;
6612 adapter->vf_data[vf].last_nack = jiffies;
6614 /* reset offloads to defaults */
6615 igb_set_vmolr(adapter, vf, true);
6617 /* reset vlans for device */
6618 igb_clear_vf_vfta(adapter, vf);
6620 if (adapter->vf_data[vf].pf_vlan)
6621 igb_ndo_set_vf_vlan(adapter->netdev, vf,
6622 adapter->vf_data[vf].pf_vlan,
6623 #ifdef HAVE_VF_VLAN_PROTO
6624 adapter->vf_data[vf].pf_qos,
6625 htons(ETH_P_8021Q));
6627 adapter->vf_data[vf].pf_qos);
6630 igb_clear_vf_vfta(adapter, vf);
6633 /* reset multicast table array for vf */
6634 adapter->vf_data[vf].num_vf_mc_hashes = 0;
6636 /* Flush and reset the mta with the new values */
6637 igb_set_rx_mode(adapter->netdev);
6640 * Reset the VFs TDWBAL and TDWBAH registers which are not
6643 E1000_WRITE_REG(hw, E1000_TDWBAH(vf), 0);
6644 E1000_WRITE_REG(hw, E1000_TDWBAL(vf), 0);
6645 if (hw->mac.type == e1000_82576) {
6646 E1000_WRITE_REG(hw, E1000_TDWBAH(IGB_MAX_VF_FUNCTIONS + vf), 0);
6647 E1000_WRITE_REG(hw, E1000_TDWBAL(IGB_MAX_VF_FUNCTIONS + vf), 0);
6651 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
6653 unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6655 /* generate a new mac address as we were hotplug removed/added */
6656 if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
6657 random_ether_addr(vf_mac);
6659 /* process remaining reset events */
6660 igb_vf_reset(adapter, vf);
6663 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
6665 struct e1000_hw *hw = &adapter->hw;
6666 unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6668 u8 *addr = (u8 *)(&msgbuf[1]);
6670 /* process all the same items cleared in a function level reset */
6671 igb_vf_reset(adapter, vf);
6673 /* set vf mac address */
6674 igb_del_mac_filter(adapter, vf_mac, vf);
6675 igb_add_mac_filter(adapter, vf_mac, vf);
6677 /* enable transmit and receive for vf */
6678 reg = E1000_READ_REG(hw, E1000_VFTE);
6679 E1000_WRITE_REG(hw, E1000_VFTE, reg | (1 << vf));
6680 reg = E1000_READ_REG(hw, E1000_VFRE);
6681 E1000_WRITE_REG(hw, E1000_VFRE, reg | (1 << vf));
6683 adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
6685 /* reply to reset with ack and vf mac address */
6686 msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
6687 memcpy(addr, vf_mac, 6);
6688 e1000_write_mbx(hw, msgbuf, 3, vf);
6691 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
6694 * The VF MAC Address is stored in a packed array of bytes
6695 * starting at the second 32 bit word of the msg array
6697 unsigned char *addr = (unsigned char *)&msg[1];
6700 if (is_valid_ether_addr(addr))
6701 err = igb_set_vf_mac(adapter, vf, addr);
6706 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
6708 struct e1000_hw *hw = &adapter->hw;
6709 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6710 u32 msg = E1000_VT_MSGTYPE_NACK;
6712 /* if device isn't clear to send it shouldn't be reading either */
6713 if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
6714 time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6715 e1000_write_mbx(hw, &msg, 1, vf);
6716 vf_data->last_nack = jiffies;
6720 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
6722 struct pci_dev *pdev = adapter->pdev;
6723 u32 msgbuf[E1000_VFMAILBOX_SIZE];
6724 struct e1000_hw *hw = &adapter->hw;
6725 struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6728 retval = e1000_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf);
6731 dev_err(pci_dev_to_dev(pdev), "Error receiving message from VF\n");
6735 /* this is a message we already processed, do nothing */
6736 if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
6740 * until the vf completes a reset it should not be
6741 * allowed to start any configuration.
6744 if (msgbuf[0] == E1000_VF_RESET) {
6745 igb_vf_reset_msg(adapter, vf);
6749 if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
6750 msgbuf[0] = E1000_VT_MSGTYPE_NACK;
6751 if (time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6752 e1000_write_mbx(hw, msgbuf, 1, vf);
6753 vf_data->last_nack = jiffies;
6758 switch ((msgbuf[0] & 0xFFFF)) {
6759 case E1000_VF_SET_MAC_ADDR:
6761 #ifndef IGB_DISABLE_VF_MAC_SET
6762 if (!(vf_data->flags & IGB_VF_FLAG_PF_SET_MAC))
6763 retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
6766 "VF %d attempted to override administratively "
6767 "set MAC address\nReload the VF driver to "
6768 "resume operations\n", vf);
6771 case E1000_VF_SET_PROMISC:
6772 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
6774 case E1000_VF_SET_MULTICAST:
6775 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
6777 case E1000_VF_SET_LPE:
6778 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
6780 case E1000_VF_SET_VLAN:
6783 if (vf_data->pf_vlan)
6785 "VF %d attempted to override administratively "
6786 "set VLAN tag\nReload the VF driver to "
6787 "resume operations\n", vf);
6790 retval = igb_set_vf_vlan(adapter, msgbuf, vf);
6793 dev_err(pci_dev_to_dev(pdev), "Unhandled Msg %08x\n", msgbuf[0]);
6794 retval = -E1000_ERR_MBX;
6798 /* notify the VF of the results of what it sent us */
6800 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
6802 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
6804 msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
6806 e1000_write_mbx(hw, msgbuf, 1, vf);
6809 static void igb_msg_task(struct igb_adapter *adapter)
6811 struct e1000_hw *hw = &adapter->hw;
6814 for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
6815 /* process any reset requests */
6816 if (!e1000_check_for_rst(hw, vf))
6817 igb_vf_reset_event(adapter, vf);
6819 /* process any messages pending */
6820 if (!e1000_check_for_msg(hw, vf))
6821 igb_rcv_msg_from_vf(adapter, vf);
6823 /* process any acks */
6824 if (!e1000_check_for_ack(hw, vf))
6825 igb_rcv_ack_from_vf(adapter, vf);
6830 * igb_set_uta - Set unicast filter table address
6831 * @adapter: board private structure
6833 * The unicast table address is a register array of 32-bit registers.
6834 * The table is meant to be used in a way similar to how the MTA is used
6835 * however due to certain limitations in the hardware it is necessary to
6836 * set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
6837 * enable bit to allow vlan tag stripping when promiscuous mode is enabled
6839 static void igb_set_uta(struct igb_adapter *adapter)
6841 struct e1000_hw *hw = &adapter->hw;
6844 /* The UTA table only exists on 82576 hardware and newer */
6845 if (hw->mac.type < e1000_82576)
6848 /* we only need to do this if VMDq is enabled */
6849 if (!adapter->vmdq_pools)
6852 for (i = 0; i < hw->mac.uta_reg_count; i++)
6853 E1000_WRITE_REG_ARRAY(hw, E1000_UTA, i, ~0);
6857 * igb_intr_msi - Interrupt Handler
6858 * @irq: interrupt number
6859 * @data: pointer to a network interface device structure
6861 static irqreturn_t igb_intr_msi(int irq, void *data)
6863 struct igb_adapter *adapter = data;
6864 struct igb_q_vector *q_vector = adapter->q_vector[0];
6865 struct e1000_hw *hw = &adapter->hw;
6866 /* read ICR disables interrupts using IAM */
6867 u32 icr = E1000_READ_REG(hw, E1000_ICR);
6869 igb_write_itr(q_vector);
6871 if (icr & E1000_ICR_DRSTA)
6872 schedule_work(&adapter->reset_task);
6874 if (icr & E1000_ICR_DOUTSYNC) {
6875 /* HW is reporting DMA is out of sync */
6876 adapter->stats.doosync++;
6879 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6880 hw->mac.get_link_status = 1;
6881 if (!test_bit(__IGB_DOWN, &adapter->state))
6882 mod_timer(&adapter->watchdog_timer, jiffies + 1);
6885 #ifdef HAVE_PTP_1588_CLOCK
6886 if (icr & E1000_ICR_TS) {
6887 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
6889 if (tsicr & E1000_TSICR_TXTS) {
6890 /* acknowledge the interrupt */
6891 E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
6892 /* retrieve hardware timestamp */
6893 schedule_work(&adapter->ptp_tx_work);
6896 #endif /* HAVE_PTP_1588_CLOCK */
6898 napi_schedule(&q_vector->napi);
6904 * igb_intr - Legacy Interrupt Handler
6905 * @irq: interrupt number
6906 * @data: pointer to a network interface device structure
6908 static irqreturn_t igb_intr(int irq, void *data)
6910 struct igb_adapter *adapter = data;
6911 struct igb_q_vector *q_vector = adapter->q_vector[0];
6912 struct e1000_hw *hw = &adapter->hw;
6913 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
6914 * need for the IMC write */
6915 u32 icr = E1000_READ_REG(hw, E1000_ICR);
6917 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
6918 * not set, then the adapter didn't send an interrupt */
6919 if (!(icr & E1000_ICR_INT_ASSERTED))
6922 igb_write_itr(q_vector);
6924 if (icr & E1000_ICR_DRSTA)
6925 schedule_work(&adapter->reset_task);
6927 if (icr & E1000_ICR_DOUTSYNC) {
6928 /* HW is reporting DMA is out of sync */
6929 adapter->stats.doosync++;
6932 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6933 hw->mac.get_link_status = 1;
6934 /* guard against interrupt when we're going down */
6935 if (!test_bit(__IGB_DOWN, &adapter->state))
6936 mod_timer(&adapter->watchdog_timer, jiffies + 1);
6939 #ifdef HAVE_PTP_1588_CLOCK
6940 if (icr & E1000_ICR_TS) {
6941 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
6943 if (tsicr & E1000_TSICR_TXTS) {
6944 /* acknowledge the interrupt */
6945 E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
6946 /* retrieve hardware timestamp */
6947 schedule_work(&adapter->ptp_tx_work);
6950 #endif /* HAVE_PTP_1588_CLOCK */
6952 napi_schedule(&q_vector->napi);
6957 void igb_ring_irq_enable(struct igb_q_vector *q_vector)
6959 struct igb_adapter *adapter = q_vector->adapter;
6960 struct e1000_hw *hw = &adapter->hw;
6962 if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
6963 (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
6964 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
6965 igb_set_itr(q_vector);
6967 igb_update_ring_itr(q_vector);
6970 if (!test_bit(__IGB_DOWN, &adapter->state)) {
6971 if (adapter->msix_entries)
6972 E1000_WRITE_REG(hw, E1000_EIMS, q_vector->eims_value);
6974 igb_irq_enable(adapter);
6979 * igb_poll - NAPI Rx polling callback
6980 * @napi: napi polling structure
6981 * @budget: count of how many packets we should handle
6983 static int igb_poll(struct napi_struct *napi, int budget)
6985 struct igb_q_vector *q_vector = container_of(napi, struct igb_q_vector, napi);
6986 bool clean_complete = true;
6989 if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
6990 igb_update_dca(q_vector);
6992 if (q_vector->tx.ring)
6993 clean_complete = igb_clean_tx_irq(q_vector);
6995 if (q_vector->rx.ring)
6996 clean_complete &= igb_clean_rx_irq(q_vector, budget);
6998 #ifndef HAVE_NETDEV_NAPI_LIST
6999 /* if netdev is disabled we need to stop polling */
7000 if (!netif_running(q_vector->adapter->netdev))
7001 clean_complete = true;
7004 /* If all work not completed, return budget and keep polling */
7005 if (!clean_complete)
7008 /* If not enough Rx work done, exit the polling mode */
7009 napi_complete(napi);
7010 igb_ring_irq_enable(q_vector);
7016 * igb_clean_tx_irq - Reclaim resources after transmit completes
7017 * @q_vector: pointer to q_vector containing needed info
7018 * returns TRUE if ring is completely cleaned
7020 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
7022 struct igb_adapter *adapter = q_vector->adapter;
7023 struct igb_ring *tx_ring = q_vector->tx.ring;
7024 struct igb_tx_buffer *tx_buffer;
7025 union e1000_adv_tx_desc *tx_desc;
7026 unsigned int total_bytes = 0, total_packets = 0;
7027 unsigned int budget = q_vector->tx.work_limit;
7028 unsigned int i = tx_ring->next_to_clean;
7030 if (test_bit(__IGB_DOWN, &adapter->state))
7033 tx_buffer = &tx_ring->tx_buffer_info[i];
7034 tx_desc = IGB_TX_DESC(tx_ring, i);
7035 i -= tx_ring->count;
7038 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
7040 /* if next_to_watch is not set then there is no work pending */
7044 /* prevent any other reads prior to eop_desc */
7045 read_barrier_depends();
7047 /* if DD is not set pending work has not been completed */
7048 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
7051 /* clear next_to_watch to prevent false hangs */
7052 tx_buffer->next_to_watch = NULL;
7054 /* update the statistics for this packet */
7055 total_bytes += tx_buffer->bytecount;
7056 total_packets += tx_buffer->gso_segs;
7059 dev_kfree_skb_any(tx_buffer->skb);
7061 /* unmap skb header data */
7062 dma_unmap_single(tx_ring->dev,
7063 dma_unmap_addr(tx_buffer, dma),
7064 dma_unmap_len(tx_buffer, len),
7067 /* clear tx_buffer data */
7068 tx_buffer->skb = NULL;
7069 dma_unmap_len_set(tx_buffer, len, 0);
7071 /* clear last DMA location and unmap remaining buffers */
7072 while (tx_desc != eop_desc) {
7077 i -= tx_ring->count;
7078 tx_buffer = tx_ring->tx_buffer_info;
7079 tx_desc = IGB_TX_DESC(tx_ring, 0);
7082 /* unmap any remaining paged data */
7083 if (dma_unmap_len(tx_buffer, len)) {
7084 dma_unmap_page(tx_ring->dev,
7085 dma_unmap_addr(tx_buffer, dma),
7086 dma_unmap_len(tx_buffer, len),
7088 dma_unmap_len_set(tx_buffer, len, 0);
7092 /* move us one more past the eop_desc for start of next pkt */
7097 i -= tx_ring->count;
7098 tx_buffer = tx_ring->tx_buffer_info;
7099 tx_desc = IGB_TX_DESC(tx_ring, 0);
7102 /* issue prefetch for next Tx descriptor */
7105 /* update budget accounting */
7107 } while (likely(budget));
7109 netdev_tx_completed_queue(txring_txq(tx_ring),
7110 total_packets, total_bytes);
7112 i += tx_ring->count;
7113 tx_ring->next_to_clean = i;
7114 tx_ring->tx_stats.bytes += total_bytes;
7115 tx_ring->tx_stats.packets += total_packets;
7116 q_vector->tx.total_bytes += total_bytes;
7117 q_vector->tx.total_packets += total_packets;
7120 if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags) &&
7121 !(adapter->disable_hw_reset && adapter->tx_hang_detected)) {
7123 if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
7125 struct e1000_hw *hw = &adapter->hw;
7127 /* Detect a transmit hang in hardware, this serializes the
7128 * check with the clearing of time_stamp and movement of i */
7129 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
7130 if (tx_buffer->next_to_watch &&
7131 time_after(jiffies, tx_buffer->time_stamp +
7132 (adapter->tx_timeout_factor * HZ))
7133 && !(E1000_READ_REG(hw, E1000_STATUS) &
7134 E1000_STATUS_TXOFF)) {
7136 /* detected Tx unit hang */
7138 adapter->tx_hang_detected = TRUE;
7139 if (adapter->disable_hw_reset) {
7140 DPRINTK(DRV, WARNING,
7141 "Deactivating netdev watchdog timer\n");
7142 if (del_timer(&netdev_ring(tx_ring)->watchdog_timer))
7143 dev_put(netdev_ring(tx_ring));
7144 #ifndef HAVE_NET_DEVICE_OPS
7145 netdev_ring(tx_ring)->tx_timeout = NULL;
7149 dev_err(tx_ring->dev,
7150 "Detected Tx Unit Hang\n"
7154 " next_to_use <%x>\n"
7155 " next_to_clean <%x>\n"
7156 "buffer_info[next_to_clean]\n"
7157 " time_stamp <%lx>\n"
7158 " next_to_watch <%p>\n"
7160 " desc.status <%x>\n",
7161 tx_ring->queue_index,
7162 E1000_READ_REG(hw, E1000_TDH(tx_ring->reg_idx)),
7163 readl(tx_ring->tail),
7164 tx_ring->next_to_use,
7165 tx_ring->next_to_clean,
7166 tx_buffer->time_stamp,
7167 tx_buffer->next_to_watch,
7169 tx_buffer->next_to_watch->wb.status);
7170 if (netif_is_multiqueue(netdev_ring(tx_ring)))
7171 netif_stop_subqueue(netdev_ring(tx_ring),
7172 ring_queue_index(tx_ring));
7174 netif_stop_queue(netdev_ring(tx_ring));
7176 /* we are about to reset, no point in enabling stuff */
7181 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
7182 if (unlikely(total_packets &&
7183 netif_carrier_ok(netdev_ring(tx_ring)) &&
7184 igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
7185 /* Make sure that anybody stopping the queue after this
7186 * sees the new next_to_clean.
7189 if (netif_is_multiqueue(netdev_ring(tx_ring))) {
7190 if (__netif_subqueue_stopped(netdev_ring(tx_ring),
7191 ring_queue_index(tx_ring)) &&
7192 !(test_bit(__IGB_DOWN, &adapter->state))) {
7193 netif_wake_subqueue(netdev_ring(tx_ring),
7194 ring_queue_index(tx_ring));
7195 tx_ring->tx_stats.restart_queue++;
7198 if (netif_queue_stopped(netdev_ring(tx_ring)) &&
7199 !(test_bit(__IGB_DOWN, &adapter->state))) {
7200 netif_wake_queue(netdev_ring(tx_ring));
7201 tx_ring->tx_stats.restart_queue++;
7209 #ifdef HAVE_VLAN_RX_REGISTER
7211 * igb_receive_skb - helper function to handle rx indications
7212 * @q_vector: structure containing interrupt and ring information
7213 * @skb: packet to send up
7215 static void igb_receive_skb(struct igb_q_vector *q_vector,
7216 struct sk_buff *skb)
7218 struct vlan_group **vlgrp = netdev_priv(skb->dev);
7220 if (IGB_CB(skb)->vid) {
7222 vlan_gro_receive(&q_vector->napi, *vlgrp,
7223 IGB_CB(skb)->vid, skb);
7225 dev_kfree_skb_any(skb);
7228 napi_gro_receive(&q_vector->napi, skb);
7232 #endif /* HAVE_VLAN_RX_REGISTER */
7233 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7235 * igb_reuse_rx_page - page flip buffer and store it back on the ring
7236 * @rx_ring: rx descriptor ring to store buffers on
7237 * @old_buff: donor buffer to have page reused
7239 * Synchronizes page for reuse by the adapter
7241 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
7242 struct igb_rx_buffer *old_buff)
7244 struct igb_rx_buffer *new_buff;
7245 u16 nta = rx_ring->next_to_alloc;
7247 new_buff = &rx_ring->rx_buffer_info[nta];
7249 /* update, and store next to alloc */
7251 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
7253 /* transfer page from old buffer to new buffer */
7254 memcpy(new_buff, old_buff, sizeof(struct igb_rx_buffer));
7256 /* sync the buffer for use by the device */
7257 dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
7258 old_buff->page_offset,
7263 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
7265 unsigned int truesize)
7267 /* avoid re-using remote pages */
7268 if (unlikely(page_to_nid(page) != numa_node_id()))
7271 #if (PAGE_SIZE < 8192)
7272 /* if we are only owner of page we can reuse it */
7273 if (unlikely(page_count(page) != 1))
7276 /* flip page offset to other buffer */
7277 rx_buffer->page_offset ^= IGB_RX_BUFSZ;
7280 /* move offset up to the next cache line */
7281 rx_buffer->page_offset += truesize;
7283 if (rx_buffer->page_offset > (PAGE_SIZE - IGB_RX_BUFSZ))
7287 /* bump ref count on page before it is given to the stack */
7294 * igb_add_rx_frag - Add contents of Rx buffer to sk_buff
7295 * @rx_ring: rx descriptor ring to transact packets on
7296 * @rx_buffer: buffer containing page to add
7297 * @rx_desc: descriptor containing length of buffer written by hardware
7298 * @skb: sk_buff to place the data into
7300 * This function will add the data contained in rx_buffer->page to the skb.
7301 * This is done either through a direct copy if the data in the buffer is
7302 * less than the skb header size, otherwise it will just attach the page as
7303 * a frag to the skb.
7305 * The function will then update the page offset if necessary and return
7306 * true if the buffer can be reused by the adapter.
7308 static bool igb_add_rx_frag(struct igb_ring *rx_ring,
7309 struct igb_rx_buffer *rx_buffer,
7310 union e1000_adv_rx_desc *rx_desc,
7311 struct sk_buff *skb)
7313 struct page *page = rx_buffer->page;
7314 unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
7315 #if (PAGE_SIZE < 8192)
7316 unsigned int truesize = IGB_RX_BUFSZ;
7318 unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
7321 if ((size <= IGB_RX_HDR_LEN) && !skb_is_nonlinear(skb)) {
7322 unsigned char *va = page_address(page) + rx_buffer->page_offset;
7324 #ifdef HAVE_PTP_1588_CLOCK
7325 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
7326 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
7327 va += IGB_TS_HDR_LEN;
7328 size -= IGB_TS_HDR_LEN;
7330 #endif /* HAVE_PTP_1588_CLOCK */
7332 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
7334 /* we can reuse buffer as-is, just make sure it is local */
7335 if (likely(page_to_nid(page) == numa_node_id()))
7338 /* this page cannot be reused so discard it */
7343 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
7344 rx_buffer->page_offset, size, truesize);
7346 return igb_can_reuse_rx_page(rx_buffer, page, truesize);
7349 static struct sk_buff *igb_fetch_rx_buffer(struct igb_ring *rx_ring,
7350 union e1000_adv_rx_desc *rx_desc,
7351 struct sk_buff *skb)
7353 struct igb_rx_buffer *rx_buffer;
7356 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
7358 page = rx_buffer->page;
7362 void *page_addr = page_address(page) +
7363 rx_buffer->page_offset;
7365 /* prefetch first cache line of first page */
7366 prefetch(page_addr);
7367 #if L1_CACHE_BYTES < 128
7368 prefetch(page_addr + L1_CACHE_BYTES);
7371 /* allocate a skb to store the frags */
7372 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
7374 if (unlikely(!skb)) {
7375 rx_ring->rx_stats.alloc_failed++;
7380 * we will be copying header into skb->data in
7381 * pskb_may_pull so it is in our interest to prefetch
7382 * it now to avoid a possible cache miss
7384 prefetchw(skb->data);
7387 /* we are reusing so sync this buffer for CPU use */
7388 dma_sync_single_range_for_cpu(rx_ring->dev,
7390 rx_buffer->page_offset,
7394 /* pull page into skb */
7395 if (igb_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
7396 /* hand second half of page back to the ring */
7397 igb_reuse_rx_page(rx_ring, rx_buffer);
7399 /* we are not reusing the buffer so unmap it */
7400 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
7401 PAGE_SIZE, DMA_FROM_DEVICE);
7404 /* clear contents of rx_buffer */
7405 rx_buffer->page = NULL;
7411 static inline void igb_rx_checksum(struct igb_ring *ring,
7412 union e1000_adv_rx_desc *rx_desc,
7413 struct sk_buff *skb)
7415 skb_checksum_none_assert(skb);
7417 /* Ignore Checksum bit is set */
7418 if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
7421 /* Rx checksum disabled via ethtool */
7422 if (!(netdev_ring(ring)->features & NETIF_F_RXCSUM))
7425 /* TCP/UDP checksum error bit is set */
7426 if (igb_test_staterr(rx_desc,
7427 E1000_RXDEXT_STATERR_TCPE |
7428 E1000_RXDEXT_STATERR_IPE)) {
7430 * work around errata with sctp packets where the TCPE aka
7431 * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
7432 * packets, (aka let the stack check the crc32c)
7434 if (!((skb->len == 60) &&
7435 test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags)))
7436 ring->rx_stats.csum_err++;
7438 /* let the stack verify checksum errors */
7441 /* It must be a TCP or UDP packet with a valid checksum */
7442 if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
7443 E1000_RXD_STAT_UDPCS))
7444 skb->ip_summed = CHECKSUM_UNNECESSARY;
7447 #ifdef NETIF_F_RXHASH
7448 static inline void igb_rx_hash(struct igb_ring *ring,
7449 union e1000_adv_rx_desc *rx_desc,
7450 struct sk_buff *skb)
7452 if (netdev_ring(ring)->features & NETIF_F_RXHASH)
7453 skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
7459 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7461 * igb_merge_active_tail - merge active tail into lro skb
7462 * @tail: pointer to active tail in frag_list
7464 * This function merges the length and data of an active tail into the
7465 * skb containing the frag_list. It resets the tail's pointer to the head,
7466 * but it leaves the heads pointer to tail intact.
7468 static inline struct sk_buff *igb_merge_active_tail(struct sk_buff *tail)
7470 struct sk_buff *head = IGB_CB(tail)->head;
7475 head->len += tail->len;
7476 head->data_len += tail->len;
7477 head->truesize += tail->len;
7479 IGB_CB(tail)->head = NULL;
7485 * igb_add_active_tail - adds an active tail into the skb frag_list
7486 * @head: pointer to the start of the skb
7487 * @tail: pointer to active tail to add to frag_list
7489 * This function adds an active tail to the end of the frag list. This tail
7490 * will still be receiving data so we cannot yet ad it's stats to the main
7491 * skb. That is done via igb_merge_active_tail.
7493 static inline void igb_add_active_tail(struct sk_buff *head, struct sk_buff *tail)
7495 struct sk_buff *old_tail = IGB_CB(head)->tail;
7498 igb_merge_active_tail(old_tail);
7499 old_tail->next = tail;
7501 skb_shinfo(head)->frag_list = tail;
7504 IGB_CB(tail)->head = head;
7505 IGB_CB(head)->tail = tail;
7507 IGB_CB(head)->append_cnt++;
7511 * igb_close_active_frag_list - cleanup pointers on a frag_list skb
7512 * @head: pointer to head of an active frag list
7514 * This function will clear the frag_tail_tracker pointer on an active
7515 * frag_list and returns true if the pointer was actually set
7517 static inline bool igb_close_active_frag_list(struct sk_buff *head)
7519 struct sk_buff *tail = IGB_CB(head)->tail;
7524 igb_merge_active_tail(tail);
7526 IGB_CB(head)->tail = NULL;
7531 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
7533 * igb_can_lro - returns true if packet is TCP/IPV4 and LRO is enabled
7534 * @adapter: board private structure
7535 * @rx_desc: pointer to the rx descriptor
7536 * @skb: pointer to the skb to be merged
7539 static inline bool igb_can_lro(struct igb_ring *rx_ring,
7540 union e1000_adv_rx_desc *rx_desc,
7541 struct sk_buff *skb)
7543 struct iphdr *iph = (struct iphdr *)skb->data;
7544 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
7546 /* verify hardware indicates this is IPv4/TCP */
7547 if((!(pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_TCP)) ||
7548 !(pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4))))
7551 /* .. and LRO is enabled */
7552 if (!(netdev_ring(rx_ring)->features & NETIF_F_LRO))
7555 /* .. and we are not in promiscuous mode */
7556 if (netdev_ring(rx_ring)->flags & IFF_PROMISC)
7559 /* .. and the header is large enough for us to read IP/TCP fields */
7560 if (!pskb_may_pull(skb, sizeof(struct igb_lrohdr)))
7563 /* .. and there are no VLANs on packet */
7564 if (skb->protocol != __constant_htons(ETH_P_IP))
7567 /* .. and we are version 4 with no options */
7568 if (*(u8 *)iph != 0x45)
7571 /* .. and the packet is not fragmented */
7572 if (iph->frag_off & htons(IP_MF | IP_OFFSET))
7575 /* .. and that next header is TCP */
7576 if (iph->protocol != IPPROTO_TCP)
7582 static inline struct igb_lrohdr *igb_lro_hdr(struct sk_buff *skb)
7584 return (struct igb_lrohdr *)skb->data;
7588 * igb_lro_flush - Indicate packets to upper layer.
7590 * Update IP and TCP header part of head skb if more than one
7591 * skb's chained and indicate packets to upper layer.
7593 static void igb_lro_flush(struct igb_q_vector *q_vector,
7594 struct sk_buff *skb)
7596 struct igb_lro_list *lrolist = &q_vector->lrolist;
7598 __skb_unlink(skb, &lrolist->active);
7600 if (IGB_CB(skb)->append_cnt) {
7601 struct igb_lrohdr *lroh = igb_lro_hdr(skb);
7603 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7604 /* close any active lro contexts */
7605 igb_close_active_frag_list(skb);
7608 /* incorporate ip header and re-calculate checksum */
7609 lroh->iph.tot_len = ntohs(skb->len);
7610 lroh->iph.check = 0;
7612 /* header length is 5 since we know no options exist */
7613 lroh->iph.check = ip_fast_csum((u8 *)lroh, 5);
7615 /* clear TCP checksum to indicate we are an LRO frame */
7618 /* incorporate latest timestamp into the tcp header */
7619 if (IGB_CB(skb)->tsecr) {
7620 lroh->ts[2] = IGB_CB(skb)->tsecr;
7621 lroh->ts[1] = htonl(IGB_CB(skb)->tsval);
7625 skb_shinfo(skb)->gso_size = IGB_CB(skb)->mss;
7626 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
7630 #ifdef HAVE_VLAN_RX_REGISTER
7631 igb_receive_skb(q_vector, skb);
7633 napi_gro_receive(&q_vector->napi, skb);
7635 lrolist->stats.flushed++;
7638 static void igb_lro_flush_all(struct igb_q_vector *q_vector)
7640 struct igb_lro_list *lrolist = &q_vector->lrolist;
7641 struct sk_buff *skb, *tmp;
7643 skb_queue_reverse_walk_safe(&lrolist->active, skb, tmp)
7644 igb_lro_flush(q_vector, skb);
7648 * igb_lro_header_ok - Main LRO function.
7650 static void igb_lro_header_ok(struct sk_buff *skb)
7652 struct igb_lrohdr *lroh = igb_lro_hdr(skb);
7653 u16 opt_bytes, data_len;
7655 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7656 IGB_CB(skb)->tail = NULL;
7658 IGB_CB(skb)->tsecr = 0;
7659 IGB_CB(skb)->append_cnt = 0;
7660 IGB_CB(skb)->mss = 0;
7662 /* ensure that the checksum is valid */
7663 if (skb->ip_summed != CHECKSUM_UNNECESSARY)
7666 /* If we see CE codepoint in IP header, packet is not mergeable */
7667 if (INET_ECN_is_ce(ipv4_get_dsfield(&lroh->iph)))
7670 /* ensure no bits set besides ack or psh */
7671 if (lroh->th.fin || lroh->th.syn || lroh->th.rst ||
7672 lroh->th.urg || lroh->th.ece || lroh->th.cwr ||
7676 /* store the total packet length */
7677 data_len = ntohs(lroh->iph.tot_len);
7679 /* remove any padding from the end of the skb */
7680 __pskb_trim(skb, data_len);
7682 /* remove header length from data length */
7683 data_len -= sizeof(struct igb_lrohdr);
7686 * check for timestamps. Since the only option we handle are timestamps,
7687 * we only have to handle the simple case of aligned timestamps
7689 opt_bytes = (lroh->th.doff << 2) - sizeof(struct tcphdr);
7690 if (opt_bytes != 0) {
7691 if ((opt_bytes != TCPOLEN_TSTAMP_ALIGNED) ||
7692 !pskb_may_pull(skb, sizeof(struct igb_lrohdr) +
7693 TCPOLEN_TSTAMP_ALIGNED) ||
7694 (lroh->ts[0] != htonl((TCPOPT_NOP << 24) |
7695 (TCPOPT_NOP << 16) |
7696 (TCPOPT_TIMESTAMP << 8) |
7697 TCPOLEN_TIMESTAMP)) ||
7698 (lroh->ts[2] == 0)) {
7702 IGB_CB(skb)->tsval = ntohl(lroh->ts[1]);
7703 IGB_CB(skb)->tsecr = lroh->ts[2];
7705 data_len -= TCPOLEN_TSTAMP_ALIGNED;
7708 /* record data_len as mss for the packet */
7709 IGB_CB(skb)->mss = data_len;
7710 IGB_CB(skb)->next_seq = ntohl(lroh->th.seq);
7713 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7714 static void igb_merge_frags(struct sk_buff *lro_skb, struct sk_buff *new_skb)
7716 struct skb_shared_info *sh_info;
7717 struct skb_shared_info *new_skb_info;
7718 unsigned int data_len;
7720 sh_info = skb_shinfo(lro_skb);
7721 new_skb_info = skb_shinfo(new_skb);
7723 /* copy frags into the last skb */
7724 memcpy(sh_info->frags + sh_info->nr_frags,
7725 new_skb_info->frags,
7726 new_skb_info->nr_frags * sizeof(skb_frag_t));
7728 /* copy size data over */
7729 sh_info->nr_frags += new_skb_info->nr_frags;
7730 data_len = IGB_CB(new_skb)->mss;
7731 lro_skb->len += data_len;
7732 lro_skb->data_len += data_len;
7733 lro_skb->truesize += data_len;
7735 /* wipe record of data from new_skb */
7736 new_skb_info->nr_frags = 0;
7737 new_skb->len = new_skb->data_len = 0;
7738 dev_kfree_skb_any(new_skb);
7741 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
7743 * igb_lro_receive - if able, queue skb into lro chain
7744 * @q_vector: structure containing interrupt and ring information
7745 * @new_skb: pointer to current skb being checked
7747 * Checks whether the skb given is eligible for LRO and if that's
7748 * fine chains it to the existing lro_skb based on flowid. If an LRO for
7749 * the flow doesn't exist create one.
7751 static void igb_lro_receive(struct igb_q_vector *q_vector,
7752 struct sk_buff *new_skb)
7754 struct sk_buff *lro_skb;
7755 struct igb_lro_list *lrolist = &q_vector->lrolist;
7756 struct igb_lrohdr *lroh = igb_lro_hdr(new_skb);
7757 __be32 saddr = lroh->iph.saddr;
7758 __be32 daddr = lroh->iph.daddr;
7759 __be32 tcp_ports = *(__be32 *)&lroh->th;
7761 #ifdef HAVE_VLAN_RX_REGISTER
7762 u16 vid = IGB_CB(new_skb)->vid;
7764 u16 vid = new_skb->vlan_tci;
7767 igb_lro_header_ok(new_skb);
7770 * we have a packet that might be eligible for LRO,
7771 * so see if it matches anything we might expect
7773 skb_queue_walk(&lrolist->active, lro_skb) {
7774 if (*(__be32 *)&igb_lro_hdr(lro_skb)->th != tcp_ports ||
7775 igb_lro_hdr(lro_skb)->iph.saddr != saddr ||
7776 igb_lro_hdr(lro_skb)->iph.daddr != daddr)
7779 #ifdef HAVE_VLAN_RX_REGISTER
7780 if (IGB_CB(lro_skb)->vid != vid)
7782 if (lro_skb->vlan_tci != vid)
7786 /* out of order packet */
7787 if (IGB_CB(lro_skb)->next_seq != IGB_CB(new_skb)->next_seq) {
7788 igb_lro_flush(q_vector, lro_skb);
7789 IGB_CB(new_skb)->mss = 0;
7793 /* TCP timestamp options have changed */
7794 if (!IGB_CB(lro_skb)->tsecr != !IGB_CB(new_skb)->tsecr) {
7795 igb_lro_flush(q_vector, lro_skb);
7799 /* make sure timestamp values are increasing */
7800 if (IGB_CB(lro_skb)->tsecr &&
7801 IGB_CB(lro_skb)->tsval > IGB_CB(new_skb)->tsval) {
7802 igb_lro_flush(q_vector, lro_skb);
7803 IGB_CB(new_skb)->mss = 0;
7807 data_len = IGB_CB(new_skb)->mss;
7809 /* Check for all of the above below
7812 * resultant packet would be too large
7813 * new skb is larger than our current mss
7814 * data would remain in header
7815 * we would consume more frags then the sk_buff contains
7816 * ack sequence numbers changed
7817 * window size has changed
7819 if (data_len == 0 ||
7820 data_len > IGB_CB(lro_skb)->mss ||
7821 data_len > IGB_CB(lro_skb)->free ||
7822 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7823 data_len != new_skb->data_len ||
7824 skb_shinfo(new_skb)->nr_frags >=
7825 (MAX_SKB_FRAGS - skb_shinfo(lro_skb)->nr_frags) ||
7827 igb_lro_hdr(lro_skb)->th.ack_seq != lroh->th.ack_seq ||
7828 igb_lro_hdr(lro_skb)->th.window != lroh->th.window) {
7829 igb_lro_flush(q_vector, lro_skb);
7833 /* Remove IP and TCP header*/
7834 skb_pull(new_skb, new_skb->len - data_len);
7836 /* update timestamp and timestamp echo response */
7837 IGB_CB(lro_skb)->tsval = IGB_CB(new_skb)->tsval;
7838 IGB_CB(lro_skb)->tsecr = IGB_CB(new_skb)->tsecr;
7840 /* update sequence and free space */
7841 IGB_CB(lro_skb)->next_seq += data_len;
7842 IGB_CB(lro_skb)->free -= data_len;
7844 /* update append_cnt */
7845 IGB_CB(lro_skb)->append_cnt++;
7847 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7848 /* if header is empty pull pages into current skb */
7849 igb_merge_frags(lro_skb, new_skb);
7851 /* chain this new skb in frag_list */
7852 igb_add_active_tail(lro_skb, new_skb);
7855 if ((data_len < IGB_CB(lro_skb)->mss) || lroh->th.psh ||
7856 skb_shinfo(lro_skb)->nr_frags == MAX_SKB_FRAGS) {
7857 igb_lro_hdr(lro_skb)->th.psh |= lroh->th.psh;
7858 igb_lro_flush(q_vector, lro_skb);
7861 lrolist->stats.coal++;
7865 if (IGB_CB(new_skb)->mss && !lroh->th.psh) {
7866 /* if we are at capacity flush the tail */
7867 if (skb_queue_len(&lrolist->active) >= IGB_LRO_MAX) {
7868 lro_skb = skb_peek_tail(&lrolist->active);
7870 igb_lro_flush(q_vector, lro_skb);
7873 /* update sequence and free space */
7874 IGB_CB(new_skb)->next_seq += IGB_CB(new_skb)->mss;
7875 IGB_CB(new_skb)->free = 65521 - new_skb->len;
7877 /* .. and insert at the front of the active list */
7878 __skb_queue_head(&lrolist->active, new_skb);
7880 lrolist->stats.coal++;
7884 /* packet not handled by any of the above, pass it to the stack */
7885 #ifdef HAVE_VLAN_RX_REGISTER
7886 igb_receive_skb(q_vector, new_skb);
7888 napi_gro_receive(&q_vector->napi, new_skb);
7892 #endif /* IGB_NO_LRO */
7894 * igb_process_skb_fields - Populate skb header fields from Rx descriptor
7895 * @rx_ring: rx descriptor ring packet is being transacted on
7896 * @rx_desc: pointer to the EOP Rx descriptor
7897 * @skb: pointer to current skb being populated
7899 * This function checks the ring, descriptor, and packet information in
7900 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
7901 * other fields within the skb.
7903 static void igb_process_skb_fields(struct igb_ring *rx_ring,
7904 union e1000_adv_rx_desc *rx_desc,
7905 struct sk_buff *skb)
7907 struct net_device *dev = rx_ring->netdev;
7908 __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
7910 #ifdef NETIF_F_RXHASH
7911 igb_rx_hash(rx_ring, rx_desc, skb);
7914 igb_rx_checksum(rx_ring, rx_desc, skb);
7916 /* update packet type stats */
7917 if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4))
7918 rx_ring->rx_stats.ipv4_packets++;
7919 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4_EX))
7920 rx_ring->rx_stats.ipv4e_packets++;
7921 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV6))
7922 rx_ring->rx_stats.ipv6_packets++;
7923 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV6_EX))
7924 rx_ring->rx_stats.ipv6e_packets++;
7925 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_TCP))
7926 rx_ring->rx_stats.tcp_packets++;
7927 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_UDP))
7928 rx_ring->rx_stats.udp_packets++;
7929 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_SCTP))
7930 rx_ring->rx_stats.sctp_packets++;
7931 else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_NFS))
7932 rx_ring->rx_stats.nfs_packets++;
7934 #ifdef HAVE_PTP_1588_CLOCK
7935 igb_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
7936 #endif /* HAVE_PTP_1588_CLOCK */
7938 #ifdef NETIF_F_HW_VLAN_CTAG_RX
7939 if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
7941 if ((dev->features & NETIF_F_HW_VLAN_RX) &&
7943 igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
7945 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
7946 test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
7947 vid = be16_to_cpu(rx_desc->wb.upper.vlan);
7949 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
7950 #ifdef HAVE_VLAN_RX_REGISTER
7951 IGB_CB(skb)->vid = vid;
7953 IGB_CB(skb)->vid = 0;
7956 #ifdef HAVE_VLAN_PROTOCOL
7957 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
7959 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
7966 skb_record_rx_queue(skb, rx_ring->queue_index);
7968 skb->protocol = eth_type_trans(skb, dev);
7972 * igb_is_non_eop - process handling of non-EOP buffers
7973 * @rx_ring: Rx ring being processed
7974 * @rx_desc: Rx descriptor for current buffer
7976 * This function updates next to clean. If the buffer is an EOP buffer
7977 * this function exits returning false, otherwise it will place the
7978 * sk_buff in the next buffer to be chained and return true indicating
7979 * that this is in fact a non-EOP buffer.
7981 static bool igb_is_non_eop(struct igb_ring *rx_ring,
7982 union e1000_adv_rx_desc *rx_desc)
7984 u32 ntc = rx_ring->next_to_clean + 1;
7986 /* fetch, update, and store next to clean */
7987 ntc = (ntc < rx_ring->count) ? ntc : 0;
7988 rx_ring->next_to_clean = ntc;
7990 prefetch(IGB_RX_DESC(rx_ring, ntc));
7992 if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
7998 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7999 /* igb_clean_rx_irq -- * legacy */
8000 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, int budget)
8002 struct igb_ring *rx_ring = q_vector->rx.ring;
8003 unsigned int total_bytes = 0, total_packets = 0;
8004 u16 cleaned_count = igb_desc_unused(rx_ring);
8007 struct igb_rx_buffer *rx_buffer;
8008 union e1000_adv_rx_desc *rx_desc;
8009 struct sk_buff *skb;
8012 /* return some buffers to hardware, one at a time is too slow */
8013 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
8014 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8018 ntc = rx_ring->next_to_clean;
8019 rx_desc = IGB_RX_DESC(rx_ring, ntc);
8020 rx_buffer = &rx_ring->rx_buffer_info[ntc];
8022 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
8026 * This memory barrier is needed to keep us from reading
8027 * any other fields out of the rx_desc until we know the
8028 * RXD_STAT_DD bit is set
8032 skb = rx_buffer->skb;
8034 prefetch(skb->data);
8036 /* pull the header of the skb in */
8037 __skb_put(skb, le16_to_cpu(rx_desc->wb.upper.length));
8039 /* clear skb reference in buffer info structure */
8040 rx_buffer->skb = NULL;
8044 BUG_ON(igb_is_non_eop(rx_ring, rx_desc));
8046 dma_unmap_single(rx_ring->dev, rx_buffer->dma,
8047 rx_ring->rx_buffer_len,
8051 if (igb_test_staterr(rx_desc,
8052 E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
8053 dev_kfree_skb_any(skb);
8057 total_bytes += skb->len;
8059 /* populate checksum, timestamp, VLAN, and protocol */
8060 igb_process_skb_fields(rx_ring, rx_desc, skb);
8063 if (igb_can_lro(rx_ring, rx_desc, skb))
8064 igb_lro_receive(q_vector, skb);
8067 #ifdef HAVE_VLAN_RX_REGISTER
8068 igb_receive_skb(q_vector, skb);
8070 napi_gro_receive(&q_vector->napi, skb);
8074 netdev_ring(rx_ring)->last_rx = jiffies;
8077 /* update budget accounting */
8079 } while (likely(total_packets < budget));
8081 rx_ring->rx_stats.packets += total_packets;
8082 rx_ring->rx_stats.bytes += total_bytes;
8083 q_vector->rx.total_packets += total_packets;
8084 q_vector->rx.total_bytes += total_bytes;
8087 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8090 igb_lro_flush_all(q_vector);
8092 #endif /* IGB_NO_LRO */
8093 return total_packets < budget;
8095 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8097 * igb_get_headlen - determine size of header for LRO/GRO
8098 * @data: pointer to the start of the headers
8099 * @max_len: total length of section to find headers in
8101 * This function is meant to determine the length of headers that will
8102 * be recognized by hardware for LRO, and GRO offloads. The main
8103 * motivation of doing this is to only perform one pull for IPv4 TCP
8104 * packets so that we can do basic things like calculating the gso_size
8105 * based on the average data per packet.
8107 static unsigned int igb_get_headlen(unsigned char *data,
8108 unsigned int max_len)
8111 unsigned char *network;
8114 struct vlan_hdr *vlan;
8117 struct ipv6hdr *ipv6;
8120 u8 nexthdr = 0; /* default to not TCP */
8123 /* this should never happen, but better safe than sorry */
8124 if (max_len < ETH_HLEN)
8127 /* initialize network frame pointer */
8130 /* set first protocol and move network header forward */
8131 protocol = hdr.eth->h_proto;
8132 hdr.network += ETH_HLEN;
8134 /* handle any vlan tag if present */
8135 if (protocol == __constant_htons(ETH_P_8021Q)) {
8136 if ((hdr.network - data) > (max_len - VLAN_HLEN))
8139 protocol = hdr.vlan->h_vlan_encapsulated_proto;
8140 hdr.network += VLAN_HLEN;
8143 /* handle L3 protocols */
8144 if (protocol == __constant_htons(ETH_P_IP)) {
8145 if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
8148 /* access ihl as a u8 to avoid unaligned access on ia64 */
8149 hlen = (hdr.network[0] & 0x0F) << 2;
8151 /* verify hlen meets minimum size requirements */
8152 if (hlen < sizeof(struct iphdr))
8153 return hdr.network - data;
8155 /* record next protocol if header is present */
8156 if (!(hdr.ipv4->frag_off & htons(IP_OFFSET)))
8157 nexthdr = hdr.ipv4->protocol;
8159 } else if (protocol == __constant_htons(ETH_P_IPV6)) {
8160 if ((hdr.network - data) > (max_len - sizeof(struct ipv6hdr)))
8163 /* record next protocol */
8164 nexthdr = hdr.ipv6->nexthdr;
8165 hlen = sizeof(struct ipv6hdr);
8166 #endif /* NETIF_F_TSO6 */
8168 return hdr.network - data;
8171 /* relocate pointer to start of L4 header */
8172 hdr.network += hlen;
8174 /* finally sort out TCP */
8175 if (nexthdr == IPPROTO_TCP) {
8176 if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
8179 /* access doff as a u8 to avoid unaligned access on ia64 */
8180 hlen = (hdr.network[12] & 0xF0) >> 2;
8182 /* verify hlen meets minimum size requirements */
8183 if (hlen < sizeof(struct tcphdr))
8184 return hdr.network - data;
8186 hdr.network += hlen;
8187 } else if (nexthdr == IPPROTO_UDP) {
8188 if ((hdr.network - data) > (max_len - sizeof(struct udphdr)))
8191 hdr.network += sizeof(struct udphdr);
8195 * If everything has gone correctly hdr.network should be the
8196 * data section of the packet and will be the end of the header.
8197 * If not then it probably represents the end of the last recognized
8200 if ((hdr.network - data) < max_len)
8201 return hdr.network - data;
8207 * igb_pull_tail - igb specific version of skb_pull_tail
8208 * @rx_ring: rx descriptor ring packet is being transacted on
8209 * @rx_desc: pointer to the EOP Rx descriptor
8210 * @skb: pointer to current skb being adjusted
8212 * This function is an igb specific version of __pskb_pull_tail. The
8213 * main difference between this version and the original function is that
8214 * this function can make several assumptions about the state of things
8215 * that allow for significant optimizations versus the standard function.
8216 * As a result we can do things like drop a frag and maintain an accurate
8217 * truesize for the skb.
8219 static void igb_pull_tail(struct igb_ring *rx_ring,
8220 union e1000_adv_rx_desc *rx_desc,
8221 struct sk_buff *skb)
8223 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
8225 unsigned int pull_len;
8228 * it is valid to use page_address instead of kmap since we are
8229 * working with pages allocated out of the lomem pool per
8230 * alloc_page(GFP_ATOMIC)
8232 va = skb_frag_address(frag);
8234 #ifdef HAVE_PTP_1588_CLOCK
8235 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
8236 /* retrieve timestamp from buffer */
8237 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
8239 /* update pointers to remove timestamp header */
8240 skb_frag_size_sub(frag, IGB_TS_HDR_LEN);
8241 frag->page_offset += IGB_TS_HDR_LEN;
8242 skb->data_len -= IGB_TS_HDR_LEN;
8243 skb->len -= IGB_TS_HDR_LEN;
8245 /* move va to start of packet data */
8246 va += IGB_TS_HDR_LEN;
8248 #endif /* HAVE_PTP_1588_CLOCK */
8251 * we need the header to contain the greater of either ETH_HLEN or
8252 * 60 bytes if the skb->len is less than 60 for skb_pad.
8254 pull_len = igb_get_headlen(va, IGB_RX_HDR_LEN);
8256 /* align pull length to size of long to optimize memcpy performance */
8257 skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
8259 /* update all of the pointers */
8260 skb_frag_size_sub(frag, pull_len);
8261 frag->page_offset += pull_len;
8262 skb->data_len -= pull_len;
8263 skb->tail += pull_len;
8267 * igb_cleanup_headers - Correct corrupted or empty headers
8268 * @rx_ring: rx descriptor ring packet is being transacted on
8269 * @rx_desc: pointer to the EOP Rx descriptor
8270 * @skb: pointer to current skb being fixed
8272 * Address the case where we are pulling data in on pages only
8273 * and as such no data is present in the skb header.
8275 * In addition if skb is not at least 60 bytes we need to pad it so that
8276 * it is large enough to qualify as a valid Ethernet frame.
8278 * Returns true if an error was encountered and skb was freed.
8280 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
8281 union e1000_adv_rx_desc *rx_desc,
8282 struct sk_buff *skb)
8285 if (unlikely((igb_test_staterr(rx_desc,
8286 E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
8287 struct net_device *netdev = rx_ring->netdev;
8288 if (!(netdev->features & NETIF_F_RXALL)) {
8289 dev_kfree_skb_any(skb);
8294 /* place header in linear portion of buffer */
8295 if (skb_is_nonlinear(skb))
8296 igb_pull_tail(rx_ring, rx_desc, skb);
8298 /* if skb_pad returns an error the skb was freed */
8299 if (unlikely(skb->len < 60)) {
8300 int pad_len = 60 - skb->len;
8302 if (skb_pad(skb, pad_len))
8304 __skb_put(skb, pad_len);
8310 /* igb_clean_rx_irq -- * packet split */
8311 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, int budget)
8313 struct igb_ring *rx_ring = q_vector->rx.ring;
8314 struct sk_buff *skb = rx_ring->skb;
8315 unsigned int total_bytes = 0, total_packets = 0;
8316 u16 cleaned_count = igb_desc_unused(rx_ring);
8319 union e1000_adv_rx_desc *rx_desc;
8321 /* return some buffers to hardware, one at a time is too slow */
8322 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
8323 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8327 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
8329 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
8333 * This memory barrier is needed to keep us from reading
8334 * any other fields out of the rx_desc until we know the
8335 * RXD_STAT_DD bit is set
8339 /* retrieve a buffer from the ring */
8340 skb = igb_fetch_rx_buffer(rx_ring, rx_desc, skb);
8342 /* exit if we failed to retrieve a buffer */
8348 /* fetch next buffer in frame if non-eop */
8349 if (igb_is_non_eop(rx_ring, rx_desc))
8352 /* verify the packet layout is correct */
8353 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
8358 /* probably a little skewed due to removing CRC */
8359 total_bytes += skb->len;
8361 /* populate checksum, timestamp, VLAN, and protocol */
8362 igb_process_skb_fields(rx_ring, rx_desc, skb);
8365 if (igb_can_lro(rx_ring, rx_desc, skb))
8366 igb_lro_receive(q_vector, skb);
8369 #ifdef HAVE_VLAN_RX_REGISTER
8370 igb_receive_skb(q_vector, skb);
8372 napi_gro_receive(&q_vector->napi, skb);
8376 netdev_ring(rx_ring)->last_rx = jiffies;
8379 /* reset skb pointer */
8382 /* update budget accounting */
8384 } while (likely(total_packets < budget));
8386 /* place incomplete frames back on ring for completion */
8389 rx_ring->rx_stats.packets += total_packets;
8390 rx_ring->rx_stats.bytes += total_bytes;
8391 q_vector->rx.total_packets += total_packets;
8392 q_vector->rx.total_bytes += total_bytes;
8395 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8398 igb_lro_flush_all(q_vector);
8400 #endif /* IGB_NO_LRO */
8401 return total_packets < budget;
8403 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8405 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8406 static bool igb_alloc_mapped_skb(struct igb_ring *rx_ring,
8407 struct igb_rx_buffer *bi)
8409 struct sk_buff *skb = bi->skb;
8410 dma_addr_t dma = bi->dma;
8416 skb = netdev_alloc_skb_ip_align(netdev_ring(rx_ring),
8417 rx_ring->rx_buffer_len);
8420 rx_ring->rx_stats.alloc_failed++;
8424 /* initialize skb for ring */
8425 skb_record_rx_queue(skb, ring_queue_index(rx_ring));
8428 dma = dma_map_single(rx_ring->dev, skb->data,
8429 rx_ring->rx_buffer_len, DMA_FROM_DEVICE);
8431 /* if mapping failed free memory back to system since
8432 * there isn't much point in holding memory we can't use
8434 if (dma_mapping_error(rx_ring->dev, dma)) {
8435 dev_kfree_skb_any(skb);
8438 rx_ring->rx_stats.alloc_failed++;
8446 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8447 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
8448 struct igb_rx_buffer *bi)
8450 struct page *page = bi->page;
8453 /* since we are recycling buffers we should seldom need to alloc */
8457 /* alloc new page for storage */
8458 page = alloc_page(GFP_ATOMIC | __GFP_COLD);
8459 if (unlikely(!page)) {
8460 rx_ring->rx_stats.alloc_failed++;
8464 /* map page for use */
8465 dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
8468 * if mapping failed free memory back to system since
8469 * there isn't much point in holding memory we can't use
8471 if (dma_mapping_error(rx_ring->dev, dma)) {
8474 rx_ring->rx_stats.alloc_failed++;
8480 bi->page_offset = 0;
8485 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8487 * igb_alloc_rx_buffers - Replace used receive buffers; packet split
8488 * @adapter: address of board private structure
8490 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
8492 union e1000_adv_rx_desc *rx_desc;
8493 struct igb_rx_buffer *bi;
8494 u16 i = rx_ring->next_to_use;
8500 rx_desc = IGB_RX_DESC(rx_ring, i);
8501 bi = &rx_ring->rx_buffer_info[i];
8502 i -= rx_ring->count;
8505 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8506 if (!igb_alloc_mapped_skb(rx_ring, bi))
8508 if (!igb_alloc_mapped_page(rx_ring, bi))
8509 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8513 * Refresh the desc even if buffer_addrs didn't change
8514 * because each write-back erases this info.
8516 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8517 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
8519 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
8526 rx_desc = IGB_RX_DESC(rx_ring, 0);
8527 bi = rx_ring->rx_buffer_info;
8528 i -= rx_ring->count;
8531 /* clear the hdr_addr for the next_to_use descriptor */
8532 rx_desc->read.hdr_addr = 0;
8535 } while (cleaned_count);
8537 i += rx_ring->count;
8539 if (rx_ring->next_to_use != i) {
8540 /* record the next descriptor to use */
8541 rx_ring->next_to_use = i;
8543 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
8544 /* update next to alloc since we have filled the ring */
8545 rx_ring->next_to_alloc = i;
8549 * Force memory writes to complete before letting h/w
8550 * know there are new descriptors to fetch. (Only
8551 * applicable for weak-ordered memory model archs,
8555 writel(i, rx_ring->tail);
8566 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8568 struct igb_adapter *adapter = netdev_priv(netdev);
8569 struct mii_ioctl_data *data = if_mii(ifr);
8571 if (adapter->hw.phy.media_type != e1000_media_type_copper)
8576 data->phy_id = adapter->hw.phy.addr;
8579 if (!capable(CAP_NET_ADMIN))
8581 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
8589 return E1000_SUCCESS;
8599 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8606 return igb_mii_ioctl(netdev, ifr, cmd);
8608 #ifdef HAVE_PTP_1588_CLOCK
8610 return igb_ptp_hwtstamp_ioctl(netdev, ifr, cmd);
8611 #endif /* HAVE_PTP_1588_CLOCK */
8612 #ifdef ETHTOOL_OPS_COMPAT
8614 return ethtool_ioctl(ifr);
8621 s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8623 struct igb_adapter *adapter = hw->back;
8626 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
8628 return -E1000_ERR_CONFIG;
8630 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
8632 return E1000_SUCCESS;
8635 s32 e1000_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8637 struct igb_adapter *adapter = hw->back;
8640 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
8642 return -E1000_ERR_CONFIG;
8644 pci_write_config_word(adapter->pdev, cap_offset + reg, *value);
8646 return E1000_SUCCESS;
8649 #ifdef HAVE_VLAN_RX_REGISTER
8650 static void igb_vlan_mode(struct net_device *netdev, struct vlan_group *vlgrp)
8652 void igb_vlan_mode(struct net_device *netdev, u32 features)
8655 struct igb_adapter *adapter = netdev_priv(netdev);
8656 struct e1000_hw *hw = &adapter->hw;
8659 #ifdef HAVE_VLAN_RX_REGISTER
8660 bool enable = !!vlgrp;
8662 igb_irq_disable(adapter);
8664 adapter->vlgrp = vlgrp;
8666 if (!test_bit(__IGB_DOWN, &adapter->state))
8667 igb_irq_enable(adapter);
8669 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8670 bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
8672 bool enable = !!(features & NETIF_F_HW_VLAN_RX);
8677 /* enable VLAN tag insert/strip */
8678 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8679 ctrl |= E1000_CTRL_VME;
8680 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8682 /* Disable CFI check */
8683 rctl = E1000_READ_REG(hw, E1000_RCTL);
8684 rctl &= ~E1000_RCTL_CFIEN;
8685 E1000_WRITE_REG(hw, E1000_RCTL, rctl);
8687 /* disable VLAN tag insert/strip */
8688 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8689 ctrl &= ~E1000_CTRL_VME;
8690 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8693 #ifndef CONFIG_IGB_VMDQ_NETDEV
8694 for (i = 0; i < adapter->vmdq_pools; i++) {
8695 igb_set_vf_vlan_strip(adapter,
8696 adapter->vfs_allocated_count + i,
8701 igb_set_vf_vlan_strip(adapter,
8702 adapter->vfs_allocated_count,
8705 for (i = 1; i < adapter->vmdq_pools; i++) {
8706 #ifdef HAVE_VLAN_RX_REGISTER
8707 struct igb_vmdq_adapter *vadapter;
8708 vadapter = netdev_priv(adapter->vmdq_netdev[i-1]);
8709 enable = !!vadapter->vlgrp;
8711 struct net_device *vnetdev;
8712 vnetdev = adapter->vmdq_netdev[i-1];
8713 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8714 enable = !!(vnetdev->features & NETIF_F_HW_VLAN_CTAG_RX);
8716 enable = !!(vnetdev->features & NETIF_F_HW_VLAN_RX);
8719 igb_set_vf_vlan_strip(adapter,
8720 adapter->vfs_allocated_count + i,
8725 igb_rlpml_set(adapter);
8728 #ifdef HAVE_VLAN_PROTOCOL
8729 static int igb_vlan_rx_add_vid(struct net_device *netdev, __be16 proto, u16 vid)
8730 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
8731 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8732 static int igb_vlan_rx_add_vid(struct net_device *netdev,
8733 __always_unused __be16 proto, u16 vid)
8735 static int igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
8738 static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
8741 struct igb_adapter *adapter = netdev_priv(netdev);
8742 int pf_id = adapter->vfs_allocated_count;
8744 /* attempt to add filter to vlvf array */
8745 igb_vlvf_set(adapter, vid, TRUE, pf_id);
8747 /* add the filter since PF can receive vlans w/o entry in vlvf */
8748 igb_vfta_set(adapter, vid, TRUE);
8749 #ifndef HAVE_NETDEV_VLAN_FEATURES
8751 /* Copy feature flags from netdev to the vlan netdev for this vid.
8752 * This allows things like TSO to bubble down to our vlan device.
8753 * There is no need to update netdev for vlan 0 (DCB), since it
8754 * wouldn't has v_netdev.
8756 if (adapter->vlgrp) {
8757 struct vlan_group *vlgrp = adapter->vlgrp;
8758 struct net_device *v_netdev = vlan_group_get_device(vlgrp, vid);
8760 v_netdev->features |= netdev->features;
8761 vlan_group_set_device(vlgrp, vid, v_netdev);
8765 #ifndef HAVE_VLAN_RX_REGISTER
8767 set_bit(vid, adapter->active_vlans);
8769 #ifdef HAVE_INT_NDO_VLAN_RX_ADD_VID
8774 #ifdef HAVE_VLAN_PROTOCOL
8775 static int igb_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto, u16 vid)
8776 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
8777 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8778 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
8779 __always_unused __be16 proto, u16 vid)
8781 static int igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
8784 static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
8787 struct igb_adapter *adapter = netdev_priv(netdev);
8788 int pf_id = adapter->vfs_allocated_count;
8791 #ifdef HAVE_VLAN_RX_REGISTER
8792 igb_irq_disable(adapter);
8794 vlan_group_set_device(adapter->vlgrp, vid, NULL);
8796 if (!test_bit(__IGB_DOWN, &adapter->state))
8797 igb_irq_enable(adapter);
8799 #endif /* HAVE_VLAN_RX_REGISTER */
8800 /* remove vlan from VLVF table array */
8801 err = igb_vlvf_set(adapter, vid, FALSE, pf_id);
8803 /* if vid was not present in VLVF just remove it from table */
8805 igb_vfta_set(adapter, vid, FALSE);
8806 #ifndef HAVE_VLAN_RX_REGISTER
8808 clear_bit(vid, adapter->active_vlans);
8810 #ifdef HAVE_INT_NDO_VLAN_RX_ADD_VID
8815 static void igb_restore_vlan(struct igb_adapter *adapter)
8817 #ifdef HAVE_VLAN_RX_REGISTER
8818 igb_vlan_mode(adapter->netdev, adapter->vlgrp);
8820 if (adapter->vlgrp) {
8822 for (vid = 0; vid < VLAN_N_VID; vid++) {
8823 if (!vlan_group_get_device(adapter->vlgrp, vid))
8825 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8826 igb_vlan_rx_add_vid(adapter->netdev,
8827 htons(ETH_P_8021Q), vid);
8829 igb_vlan_rx_add_vid(adapter->netdev, vid);
8836 igb_vlan_mode(adapter->netdev, adapter->netdev->features);
8838 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
8839 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8840 igb_vlan_rx_add_vid(adapter->netdev,
8841 htons(ETH_P_8021Q), vid);
8843 igb_vlan_rx_add_vid(adapter->netdev, vid);
8848 int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx)
8850 struct pci_dev *pdev = adapter->pdev;
8851 struct e1000_mac_info *mac = &adapter->hw.mac;
8855 /* SerDes device's does not support 10Mbps Full/duplex
8856 * and 100Mbps Half duplex
8858 if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
8860 case SPEED_10 + DUPLEX_HALF:
8861 case SPEED_10 + DUPLEX_FULL:
8862 case SPEED_100 + DUPLEX_HALF:
8863 dev_err(pci_dev_to_dev(pdev),
8864 "Unsupported Speed/Duplex configuration\n");
8872 case SPEED_10 + DUPLEX_HALF:
8873 mac->forced_speed_duplex = ADVERTISE_10_HALF;
8875 case SPEED_10 + DUPLEX_FULL:
8876 mac->forced_speed_duplex = ADVERTISE_10_FULL;
8878 case SPEED_100 + DUPLEX_HALF:
8879 mac->forced_speed_duplex = ADVERTISE_100_HALF;
8881 case SPEED_100 + DUPLEX_FULL:
8882 mac->forced_speed_duplex = ADVERTISE_100_FULL;
8884 case SPEED_1000 + DUPLEX_FULL:
8886 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
8888 case SPEED_1000 + DUPLEX_HALF: /* not supported */
8890 dev_err(pci_dev_to_dev(pdev), "Unsupported Speed/Duplex configuration\n");
8894 /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
8895 adapter->hw.phy.mdix = AUTO_ALL_MODES;
8900 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
8903 struct net_device *netdev = pci_get_drvdata(pdev);
8904 struct igb_adapter *adapter = netdev_priv(netdev);
8905 struct e1000_hw *hw = &adapter->hw;
8906 u32 ctrl, rctl, status;
8907 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
8912 netif_device_detach(netdev);
8914 status = E1000_READ_REG(hw, E1000_STATUS);
8915 if (status & E1000_STATUS_LU)
8916 wufc &= ~E1000_WUFC_LNKC;
8918 if (netif_running(netdev))
8919 __igb_close(netdev, true);
8921 igb_clear_interrupt_scheme(adapter);
8924 retval = pci_save_state(pdev);
8930 igb_setup_rctl(adapter);
8931 igb_set_rx_mode(netdev);
8933 /* turn on all-multi mode if wake on multicast is enabled */
8934 if (wufc & E1000_WUFC_MC) {
8935 rctl = E1000_READ_REG(hw, E1000_RCTL);
8936 rctl |= E1000_RCTL_MPE;
8937 E1000_WRITE_REG(hw, E1000_RCTL, rctl);
8940 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8941 /* phy power management enable */
8942 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
8943 ctrl |= E1000_CTRL_ADVD3WUC;
8944 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8946 /* Allow time for pending master requests to run */
8947 e1000_disable_pcie_master(hw);
8949 E1000_WRITE_REG(hw, E1000_WUC, E1000_WUC_PME_EN);
8950 E1000_WRITE_REG(hw, E1000_WUFC, wufc);
8952 E1000_WRITE_REG(hw, E1000_WUC, 0);
8953 E1000_WRITE_REG(hw, E1000_WUFC, 0);
8956 *enable_wake = wufc || adapter->en_mng_pt;
8958 igb_power_down_link(adapter);
8960 igb_power_up_link(adapter);
8962 /* Release control of h/w to f/w. If f/w is AMT enabled, this
8963 * would have already happened in close and is redundant. */
8964 igb_release_hw_control(adapter);
8966 pci_disable_device(pdev);
8972 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8973 static int igb_suspend(struct device *dev)
8975 static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
8976 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8978 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8979 struct pci_dev *pdev = to_pci_dev(dev);
8980 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8984 retval = __igb_shutdown(pdev, &wake, 0);
8989 pci_prepare_to_sleep(pdev);
8991 pci_wake_from_d3(pdev, false);
8992 pci_set_power_state(pdev, PCI_D3hot);
8998 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8999 static int igb_resume(struct device *dev)
9001 static int igb_resume(struct pci_dev *pdev)
9002 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
9004 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
9005 struct pci_dev *pdev = to_pci_dev(dev);
9006 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
9007 struct net_device *netdev = pci_get_drvdata(pdev);
9008 struct igb_adapter *adapter = netdev_priv(netdev);
9009 struct e1000_hw *hw = &adapter->hw;
9012 pci_set_power_state(pdev, PCI_D0);
9013 pci_restore_state(pdev);
9014 pci_save_state(pdev);
9016 err = pci_enable_device_mem(pdev);
9018 dev_err(pci_dev_to_dev(pdev),
9019 "igb: Cannot enable PCI device from suspend\n");
9022 pci_set_master(pdev);
9024 pci_enable_wake(pdev, PCI_D3hot, 0);
9025 pci_enable_wake(pdev, PCI_D3cold, 0);
9027 if (igb_init_interrupt_scheme(adapter, true)) {
9028 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for queues\n");
9034 /* let the f/w know that the h/w is now under the control of the
9036 igb_get_hw_control(adapter);
9038 E1000_WRITE_REG(hw, E1000_WUS, ~0);
9040 if (netdev->flags & IFF_UP) {
9042 err = __igb_open(netdev, true);
9048 netif_device_attach(netdev);
9053 #ifdef CONFIG_PM_RUNTIME
9054 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
9055 static int igb_runtime_idle(struct device *dev)
9057 struct pci_dev *pdev = to_pci_dev(dev);
9058 struct net_device *netdev = pci_get_drvdata(pdev);
9059 struct igb_adapter *adapter = netdev_priv(netdev);
9061 if (!igb_has_link(adapter))
9062 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
9067 static int igb_runtime_suspend(struct device *dev)
9069 struct pci_dev *pdev = to_pci_dev(dev);
9073 retval = __igb_shutdown(pdev, &wake, 1);
9078 pci_prepare_to_sleep(pdev);
9080 pci_wake_from_d3(pdev, false);
9081 pci_set_power_state(pdev, PCI_D3hot);
9087 static int igb_runtime_resume(struct device *dev)
9089 return igb_resume(dev);
9091 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
9092 #endif /* CONFIG_PM_RUNTIME */
9093 #endif /* CONFIG_PM */
9095 #ifdef USE_REBOOT_NOTIFIER
9096 /* only want to do this for 2.4 kernels? */
9097 static int igb_notify_reboot(struct notifier_block *nb, unsigned long event,
9100 struct pci_dev *pdev = NULL;
9107 while ((pdev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pdev))) {
9108 if (pci_dev_driver(pdev) == &igb_driver) {
9109 __igb_shutdown(pdev, &wake, 0);
9110 if (event == SYS_POWER_OFF) {
9111 pci_wake_from_d3(pdev, wake);
9112 pci_set_power_state(pdev, PCI_D3hot);
9120 static void igb_shutdown(struct pci_dev *pdev)
9124 __igb_shutdown(pdev, &wake, 0);
9126 if (system_state == SYSTEM_POWER_OFF) {
9127 pci_wake_from_d3(pdev, wake);
9128 pci_set_power_state(pdev, PCI_D3hot);
9131 #endif /* USE_REBOOT_NOTIFIER */
9133 #ifdef CONFIG_NET_POLL_CONTROLLER
9135 * Polling 'interrupt' - used by things like netconsole to send skbs
9136 * without having to re-enable interrupts. It's not called while
9137 * the interrupt routine is executing.
9139 static void igb_netpoll(struct net_device *netdev)
9141 struct igb_adapter *adapter = netdev_priv(netdev);
9142 struct e1000_hw *hw = &adapter->hw;
9143 struct igb_q_vector *q_vector;
9146 for (i = 0; i < adapter->num_q_vectors; i++) {
9147 q_vector = adapter->q_vector[i];
9148 if (adapter->msix_entries)
9149 E1000_WRITE_REG(hw, E1000_EIMC, q_vector->eims_value);
9151 igb_irq_disable(adapter);
9152 napi_schedule(&q_vector->napi);
9155 #endif /* CONFIG_NET_POLL_CONTROLLER */
9158 #define E1000_DEV_ID_82576_VF 0x10CA
9160 * igb_io_error_detected - called when PCI error is detected
9161 * @pdev: Pointer to PCI device
9162 * @state: The current pci connection state
9164 * This function is called after a PCI bus error affecting
9165 * this device has been detected.
9167 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
9168 pci_channel_state_t state)
9170 struct net_device *netdev = pci_get_drvdata(pdev);
9171 struct igb_adapter *adapter = netdev_priv(netdev);
9173 #ifdef CONFIG_PCI_IOV__UNUSED
9174 struct pci_dev *bdev, *vfdev;
9175 u32 dw0, dw1, dw2, dw3;
9177 u16 req_id, pf_func;
9179 if (!(adapter->flags & IGB_FLAG_DETECT_BAD_DMA))
9180 goto skip_bad_vf_detection;
9182 bdev = pdev->bus->self;
9183 while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
9184 bdev = bdev->bus->self;
9187 goto skip_bad_vf_detection;
9189 pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
9191 goto skip_bad_vf_detection;
9193 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG, &dw0);
9194 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 4, &dw1);
9195 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 8, &dw2);
9196 pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 12, &dw3);
9199 /* On the 82576 if bit 7 of the requestor ID is set then it's a VF */
9200 if (!(req_id & 0x0080))
9201 goto skip_bad_vf_detection;
9203 pf_func = req_id & 0x01;
9204 if ((pf_func & 1) == (pdev->devfn & 1)) {
9206 vf = (req_id & 0x7F) >> 1;
9207 dev_err(pci_dev_to_dev(pdev),
9208 "VF %d has caused a PCIe error\n", vf);
9209 dev_err(pci_dev_to_dev(pdev),
9210 "TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
9211 "%8.8x\tdw3: %8.8x\n",
9212 dw0, dw1, dw2, dw3);
9214 /* Find the pci device of the offending VF */
9215 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9216 E1000_DEV_ID_82576_VF, NULL);
9218 if (vfdev->devfn == (req_id & 0xFF))
9220 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9221 E1000_DEV_ID_82576_VF, vfdev);
9224 * There's a slim chance the VF could have been hot plugged,
9225 * so if it is no longer present we don't need to issue the
9226 * VFLR. Just clean up the AER in that case.
9229 dev_err(pci_dev_to_dev(pdev),
9230 "Issuing VFLR to VF %d\n", vf);
9231 pci_write_config_dword(vfdev, 0xA8, 0x00008000);
9234 pci_cleanup_aer_uncorrect_error_status(pdev);
9238 * Even though the error may have occurred on the other port
9239 * we still need to increment the vf error reference count for
9240 * both ports because the I/O resume function will be called
9243 adapter->vferr_refcount++;
9245 return PCI_ERS_RESULT_RECOVERED;
9247 skip_bad_vf_detection:
9248 #endif /* CONFIG_PCI_IOV */
9250 netif_device_detach(netdev);
9252 if (state == pci_channel_io_perm_failure)
9253 return PCI_ERS_RESULT_DISCONNECT;
9255 if (netif_running(netdev))
9257 pci_disable_device(pdev);
9259 /* Request a slot slot reset. */
9260 return PCI_ERS_RESULT_NEED_RESET;
9264 * igb_io_slot_reset - called after the pci bus has been reset.
9265 * @pdev: Pointer to PCI device
9267 * Restart the card from scratch, as if from a cold-boot. Implementation
9268 * resembles the first-half of the igb_resume routine.
9270 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
9272 struct net_device *netdev = pci_get_drvdata(pdev);
9273 struct igb_adapter *adapter = netdev_priv(netdev);
9274 struct e1000_hw *hw = &adapter->hw;
9275 pci_ers_result_t result;
9277 if (pci_enable_device_mem(pdev)) {
9278 dev_err(pci_dev_to_dev(pdev),
9279 "Cannot re-enable PCI device after reset.\n");
9280 result = PCI_ERS_RESULT_DISCONNECT;
9282 pci_set_master(pdev);
9283 pci_restore_state(pdev);
9284 pci_save_state(pdev);
9286 pci_enable_wake(pdev, PCI_D3hot, 0);
9287 pci_enable_wake(pdev, PCI_D3cold, 0);
9289 schedule_work(&adapter->reset_task);
9290 E1000_WRITE_REG(hw, E1000_WUS, ~0);
9291 result = PCI_ERS_RESULT_RECOVERED;
9294 pci_cleanup_aer_uncorrect_error_status(pdev);
9300 * igb_io_resume - called when traffic can start flowing again.
9301 * @pdev: Pointer to PCI device
9303 * This callback is called when the error recovery driver tells us that
9304 * its OK to resume normal operation. Implementation resembles the
9305 * second-half of the igb_resume routine.
9307 static void igb_io_resume(struct pci_dev *pdev)
9309 struct net_device *netdev = pci_get_drvdata(pdev);
9310 struct igb_adapter *adapter = netdev_priv(netdev);
9312 if (adapter->vferr_refcount) {
9313 dev_info(pci_dev_to_dev(pdev), "Resuming after VF err\n");
9314 adapter->vferr_refcount--;
9318 if (netif_running(netdev)) {
9319 if (igb_up(adapter)) {
9320 dev_err(pci_dev_to_dev(pdev), "igb_up failed after reset\n");
9325 netif_device_attach(netdev);
9327 /* let the f/w know that the h/w is now under the control of the
9329 igb_get_hw_control(adapter);
9332 #endif /* HAVE_PCI_ERS */
9334 int igb_add_mac_filter(struct igb_adapter *adapter, u8 *addr, u16 queue)
9336 struct e1000_hw *hw = &adapter->hw;
9339 if (is_zero_ether_addr(addr))
9342 for (i = 0; i < hw->mac.rar_entry_count; i++) {
9343 if (adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE)
9345 adapter->mac_table[i].state = (IGB_MAC_STATE_MODIFIED |
9346 IGB_MAC_STATE_IN_USE);
9347 memcpy(adapter->mac_table[i].addr, addr, ETH_ALEN);
9348 adapter->mac_table[i].queue = queue;
9349 igb_sync_mac_table(adapter);
9354 int igb_del_mac_filter(struct igb_adapter *adapter, u8* addr, u16 queue)
9356 /* search table for addr, if found, set to 0 and sync */
9358 struct e1000_hw *hw = &adapter->hw;
9360 if (is_zero_ether_addr(addr))
9362 for (i = 0; i < hw->mac.rar_entry_count; i++) {
9363 if (ether_addr_equal(addr, adapter->mac_table[i].addr) &&
9364 adapter->mac_table[i].queue == queue) {
9365 adapter->mac_table[i].state = IGB_MAC_STATE_MODIFIED;
9366 memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
9367 adapter->mac_table[i].queue = 0;
9368 igb_sync_mac_table(adapter);
9374 static int igb_set_vf_mac(struct igb_adapter *adapter,
9375 int vf, unsigned char *mac_addr)
9377 igb_del_mac_filter(adapter, adapter->vf_data[vf].vf_mac_addresses, vf);
9378 memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, ETH_ALEN);
9380 igb_add_mac_filter(adapter, mac_addr, vf);
9386 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
9388 struct igb_adapter *adapter = netdev_priv(netdev);
9389 if (!is_valid_ether_addr(mac) || (vf >= adapter->vfs_allocated_count))
9391 adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
9392 dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n", mac, vf);
9393 dev_info(&adapter->pdev->dev, "Reload the VF driver to make this"
9394 " change effective.\n");
9395 if (test_bit(__IGB_DOWN, &adapter->state)) {
9396 dev_warn(&adapter->pdev->dev, "The VF MAC address has been set,"
9397 " but the PF device is not up.\n");
9398 dev_warn(&adapter->pdev->dev, "Bring the PF device up before"
9399 " attempting to use the VF device.\n");
9401 return igb_set_vf_mac(adapter, vf, mac);
9404 static int igb_link_mbps(int internal_link_speed)
9406 switch (internal_link_speed) {
9418 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
9425 /* Calculate the rate factor values to set */
9426 rf_int = link_speed / tx_rate;
9427 rf_dec = (link_speed - (rf_int * tx_rate));
9428 rf_dec = (rf_dec * (1<<E1000_RTTBCNRC_RF_INT_SHIFT)) / tx_rate;
9430 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
9431 bcnrc_val |= ((rf_int<<E1000_RTTBCNRC_RF_INT_SHIFT) &
9432 E1000_RTTBCNRC_RF_INT_MASK);
9433 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
9438 E1000_WRITE_REG(hw, E1000_RTTDQSEL, vf); /* vf X uses queue X */
9440 * Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
9441 * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
9443 E1000_WRITE_REG(hw, E1000_RTTBCNRM(0), 0x14);
9444 E1000_WRITE_REG(hw, E1000_RTTBCNRC, bcnrc_val);
9447 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
9449 int actual_link_speed, i;
9450 bool reset_rate = false;
9452 /* VF TX rate limit was not set */
9453 if ((adapter->vf_rate_link_speed == 0) ||
9454 (adapter->hw.mac.type != e1000_82576))
9457 actual_link_speed = igb_link_mbps(adapter->link_speed);
9458 if (actual_link_speed != adapter->vf_rate_link_speed) {
9460 adapter->vf_rate_link_speed = 0;
9461 dev_info(&adapter->pdev->dev,
9462 "Link speed has been changed. VF Transmit rate is disabled\n");
9465 for (i = 0; i < adapter->vfs_allocated_count; i++) {
9467 adapter->vf_data[i].tx_rate = 0;
9469 igb_set_vf_rate_limit(&adapter->hw, i,
9470 adapter->vf_data[i].tx_rate, actual_link_speed);
9474 #ifdef HAVE_VF_MIN_MAX_TXRATE
9475 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int min_tx_rate,
9477 #else /* HAVE_VF_MIN_MAX_TXRATE */
9478 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate)
9479 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9481 struct igb_adapter *adapter = netdev_priv(netdev);
9482 struct e1000_hw *hw = &adapter->hw;
9483 int actual_link_speed;
9485 if (hw->mac.type != e1000_82576)
9488 #ifdef HAVE_VF_MIN_MAX_TXRATE
9491 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9493 actual_link_speed = igb_link_mbps(adapter->link_speed);
9494 if ((vf >= adapter->vfs_allocated_count) ||
9495 (!(E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU)) ||
9496 (tx_rate < 0) || (tx_rate > actual_link_speed))
9499 adapter->vf_rate_link_speed = actual_link_speed;
9500 adapter->vf_data[vf].tx_rate = (u16)tx_rate;
9501 igb_set_vf_rate_limit(hw, vf, tx_rate, actual_link_speed);
9506 static int igb_ndo_get_vf_config(struct net_device *netdev,
9507 int vf, struct ifla_vf_info *ivi)
9509 struct igb_adapter *adapter = netdev_priv(netdev);
9510 if (vf >= adapter->vfs_allocated_count)
9513 memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
9514 #ifdef HAVE_VF_MIN_MAX_TXRATE
9515 ivi->max_tx_rate = adapter->vf_data[vf].tx_rate;
9516 ivi->min_tx_rate = 0;
9517 #else /* HAVE_VF_MIN_MAX_TXRATE */
9518 ivi->tx_rate = adapter->vf_data[vf].tx_rate;
9519 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9520 ivi->vlan = adapter->vf_data[vf].pf_vlan;
9521 ivi->qos = adapter->vf_data[vf].pf_qos;
9522 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
9523 ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
9528 static void igb_vmm_control(struct igb_adapter *adapter)
9530 struct e1000_hw *hw = &adapter->hw;
9534 switch (hw->mac.type) {
9537 /* replication is not supported for 82575 */
9540 /* notify HW that the MAC is adding vlan tags */
9541 reg = E1000_READ_REG(hw, E1000_DTXCTL);
9542 reg |= (E1000_DTXCTL_VLAN_ADDED |
9543 E1000_DTXCTL_SPOOF_INT);
9544 E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
9546 /* enable replication vlan tag stripping */
9547 reg = E1000_READ_REG(hw, E1000_RPLOLR);
9548 reg |= E1000_RPLOLR_STRVLAN;
9549 E1000_WRITE_REG(hw, E1000_RPLOLR, reg);
9552 /* none of the above registers are supported by i350 */
9556 /* Enable Malicious Driver Detection */
9557 if ((adapter->vfs_allocated_count) &&
9559 if (hw->mac.type == e1000_i350)
9560 igb_enable_mdd(adapter);
9563 /* enable replication and loopback support */
9564 count = adapter->vfs_allocated_count || adapter->vmdq_pools;
9565 if (adapter->flags & IGB_FLAG_LOOPBACK_ENABLE && count)
9566 e1000_vmdq_set_loopback_pf(hw, 1);
9567 e1000_vmdq_set_anti_spoofing_pf(hw,
9568 adapter->vfs_allocated_count || adapter->vmdq_pools,
9569 adapter->vfs_allocated_count);
9570 e1000_vmdq_set_replication_pf(hw, adapter->vfs_allocated_count ||
9571 adapter->vmdq_pools);
9574 static void igb_init_fw(struct igb_adapter *adapter)
9576 struct e1000_fw_drv_info fw_cmd;
9577 struct e1000_hw *hw = &adapter->hw;
9581 if (hw->mac.type == e1000_i210)
9582 mask = E1000_SWFW_EEP_SM;
9584 mask = E1000_SWFW_PHY0_SM;
9585 /* i211 parts do not support this feature */
9586 if (hw->mac.type == e1000_i211)
9587 hw->mac.arc_subsystem_valid = false;
9589 if (!hw->mac.ops.acquire_swfw_sync(hw, mask)) {
9590 for (i = 0; i <= FW_MAX_RETRIES; i++) {
9591 E1000_WRITE_REG(hw, E1000_FWSTS, E1000_FWSTS_FWRI);
9592 fw_cmd.hdr.cmd = FW_CMD_DRV_INFO;
9593 fw_cmd.hdr.buf_len = FW_CMD_DRV_INFO_LEN;
9594 fw_cmd.hdr.cmd_or_resp.cmd_resv = FW_CMD_RESERVED;
9595 fw_cmd.port_num = hw->bus.func;
9596 fw_cmd.drv_version = FW_FAMILY_DRV_VER;
9597 fw_cmd.hdr.checksum = 0;
9598 fw_cmd.hdr.checksum = e1000_calculate_checksum((u8 *)&fw_cmd,
9600 fw_cmd.hdr.buf_len));
9601 e1000_host_interface_command(hw, (u8*)&fw_cmd,
9603 if (fw_cmd.hdr.cmd_or_resp.ret_status == FW_STATUS_SUCCESS)
9607 dev_warn(pci_dev_to_dev(adapter->pdev),
9608 "Unable to get semaphore, firmware init failed.\n");
9609 hw->mac.ops.release_swfw_sync(hw, mask);
9612 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
9614 struct e1000_hw *hw = &adapter->hw;
9619 if (hw->mac.type == e1000_i211)
9622 if (hw->mac.type > e1000_82580) {
9623 if (adapter->dmac != IGB_DMAC_DISABLE) {
9626 /* force threshold to 0. */
9627 E1000_WRITE_REG(hw, E1000_DMCTXTH, 0);
9630 * DMA Coalescing high water mark needs to be greater
9631 * than the Rx threshold. Set hwm to PBA - max frame
9632 * size in 16B units, capping it at PBA - 6KB.
9634 hwm = 64 * pba - adapter->max_frame_size / 16;
9635 if (hwm < 64 * (pba - 6))
9636 hwm = 64 * (pba - 6);
9637 reg = E1000_READ_REG(hw, E1000_FCRTC);
9638 reg &= ~E1000_FCRTC_RTH_COAL_MASK;
9639 reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
9640 & E1000_FCRTC_RTH_COAL_MASK);
9641 E1000_WRITE_REG(hw, E1000_FCRTC, reg);
9644 * Set the DMA Coalescing Rx threshold to PBA - 2 * max
9645 * frame size, capping it at PBA - 10KB.
9647 dmac_thr = pba - adapter->max_frame_size / 512;
9648 if (dmac_thr < pba - 10)
9649 dmac_thr = pba - 10;
9650 reg = E1000_READ_REG(hw, E1000_DMACR);
9651 reg &= ~E1000_DMACR_DMACTHR_MASK;
9652 reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
9653 & E1000_DMACR_DMACTHR_MASK);
9655 /* transition to L0x or L1 if available..*/
9656 reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
9658 /* Check if status is 2.5Gb backplane connection
9659 * before configuration of watchdog timer, which is
9660 * in msec values in 12.8usec intervals
9661 * watchdog timer= msec values in 32usec intervals
9662 * for non 2.5Gb connection
9664 if (hw->mac.type == e1000_i354) {
9665 status = E1000_READ_REG(hw, E1000_STATUS);
9666 if ((status & E1000_STATUS_2P5_SKU) &&
9667 (!(status & E1000_STATUS_2P5_SKU_OVER)))
9668 reg |= ((adapter->dmac * 5) >> 6);
9670 reg |= ((adapter->dmac) >> 5);
9672 reg |= ((adapter->dmac) >> 5);
9676 * Disable BMC-to-OS Watchdog enable
9677 * on devices that support OS-to-BMC
9679 if (hw->mac.type != e1000_i354)
9680 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
9681 E1000_WRITE_REG(hw, E1000_DMACR, reg);
9683 /* no lower threshold to disable coalescing(smart fifb)-UTRESH=0*/
9684 E1000_WRITE_REG(hw, E1000_DMCRTRH, 0);
9686 /* This sets the time to wait before requesting
9687 * transition to low power state to number of usecs
9688 * needed to receive 1 512 byte frame at gigabit
9689 * line rate. On i350 device, time to make transition
9690 * to Lx state is delayed by 4 usec with flush disable
9691 * bit set to avoid losing mailbox interrupts
9693 reg = E1000_READ_REG(hw, E1000_DMCTLX);
9694 if (hw->mac.type == e1000_i350)
9695 reg |= IGB_DMCTLX_DCFLUSH_DIS;
9697 /* in 2.5Gb connection, TTLX unit is 0.4 usec
9698 * which is 0x4*2 = 0xA. But delay is still 4 usec
9700 if (hw->mac.type == e1000_i354) {
9701 status = E1000_READ_REG(hw, E1000_STATUS);
9702 if ((status & E1000_STATUS_2P5_SKU) &&
9703 (!(status & E1000_STATUS_2P5_SKU_OVER)))
9710 E1000_WRITE_REG(hw, E1000_DMCTLX, reg);
9712 /* free space in tx packet buffer to wake from DMA coal */
9713 E1000_WRITE_REG(hw, E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
9714 (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
9716 /* make low power state decision controlled by DMA coal */
9717 reg = E1000_READ_REG(hw, E1000_PCIEMISC);
9718 reg &= ~E1000_PCIEMISC_LX_DECISION;
9719 E1000_WRITE_REG(hw, E1000_PCIEMISC, reg);
9720 } /* endif adapter->dmac is not disabled */
9721 } else if (hw->mac.type == e1000_82580) {
9722 u32 reg = E1000_READ_REG(hw, E1000_PCIEMISC);
9723 E1000_WRITE_REG(hw, E1000_PCIEMISC,
9724 reg & ~E1000_PCIEMISC_LX_DECISION);
9725 E1000_WRITE_REG(hw, E1000_DMACR, 0);
9729 #ifdef HAVE_I2C_SUPPORT
9730 /* igb_read_i2c_byte - Reads 8 bit word over I2C
9731 * @hw: pointer to hardware structure
9732 * @byte_offset: byte offset to read
9733 * @dev_addr: device address
9736 * Performs byte read operation over I2C interface at
9737 * a specified device address.
9739 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9740 u8 dev_addr, u8 *data)
9742 struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9743 struct i2c_client *this_client = adapter->i2c_client;
9748 return E1000_ERR_I2C;
9750 swfw_mask = E1000_SWFW_PHY0_SM;
9752 if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)
9754 return E1000_ERR_SWFW_SYNC;
9756 status = i2c_smbus_read_byte_data(this_client, byte_offset);
9757 hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9760 return E1000_ERR_I2C;
9763 return E1000_SUCCESS;
9767 /* igb_write_i2c_byte - Writes 8 bit word over I2C
9768 * @hw: pointer to hardware structure
9769 * @byte_offset: byte offset to write
9770 * @dev_addr: device address
9771 * @data: value to write
9773 * Performs byte write operation over I2C interface at
9774 * a specified device address.
9776 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9777 u8 dev_addr, u8 data)
9779 struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9780 struct i2c_client *this_client = adapter->i2c_client;
9782 u16 swfw_mask = E1000_SWFW_PHY0_SM;
9785 return E1000_ERR_I2C;
9787 if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask) != E1000_SUCCESS)
9788 return E1000_ERR_SWFW_SYNC;
9789 status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
9790 hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9793 return E1000_ERR_I2C;
9795 return E1000_SUCCESS;
9797 #endif /* HAVE_I2C_SUPPORT */
9802 * igb_probe - Device Initialization Routine
9803 * @pdev: PCI device information struct
9804 * @ent: entry in igb_pci_tbl
9806 * Returns 0 on success, negative on failure
9808 * igb_probe initializes an adapter identified by a pci_dev structure.
9809 * The OS initialization, configuring of the adapter private structure,
9810 * and a hardware reset occur.
9812 int igb_kni_probe(struct pci_dev *pdev,
9813 struct net_device **lad_dev)
9815 struct net_device *netdev;
9816 struct igb_adapter *adapter;
9817 struct e1000_hw *hw;
9818 u16 eeprom_data = 0;
9819 u8 pba_str[E1000_PBANUM_LENGTH];
9821 static int global_quad_port_a; /* global quad port a indication */
9822 int i, err, pci_using_dac = 0;
9823 static int cards_found;
9825 err = pci_enable_device_mem(pdev);
9831 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
9833 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
9837 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
9839 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
9841 IGB_ERR("No usable DMA configuration, "
9848 #ifndef HAVE_ASPM_QUIRKS
9849 /* 82575 requires that the pci-e link partner disable the L0s state */
9850 switch (pdev->device) {
9851 case E1000_DEV_ID_82575EB_COPPER:
9852 case E1000_DEV_ID_82575EB_FIBER_SERDES:
9853 case E1000_DEV_ID_82575GB_QUAD_COPPER:
9854 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
9859 #endif /* HAVE_ASPM_QUIRKS */
9860 err = pci_request_selected_regions(pdev,
9861 pci_select_bars(pdev,
9867 pci_enable_pcie_error_reporting(pdev);
9869 pci_set_master(pdev);
9874 netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
9877 netdev = alloc_etherdev(sizeof(struct igb_adapter));
9878 #endif /* HAVE_TX_MQ */
9880 goto err_alloc_etherdev;
9882 SET_MODULE_OWNER(netdev);
9883 SET_NETDEV_DEV(netdev, &pdev->dev);
9885 //pci_set_drvdata(pdev, netdev);
9886 adapter = netdev_priv(netdev);
9887 adapter->netdev = netdev;
9888 adapter->pdev = pdev;
9891 adapter->port_num = hw->bus.func;
9892 adapter->msg_enable = (1 << debug) - 1;
9895 err = pci_save_state(pdev);
9900 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
9901 pci_resource_len(pdev, 0));
9905 #ifdef HAVE_NET_DEVICE_OPS
9906 netdev->netdev_ops = &igb_netdev_ops;
9907 #else /* HAVE_NET_DEVICE_OPS */
9908 netdev->open = &igb_open;
9909 netdev->stop = &igb_close;
9910 netdev->get_stats = &igb_get_stats;
9911 #ifdef HAVE_SET_RX_MODE
9912 netdev->set_rx_mode = &igb_set_rx_mode;
9914 netdev->set_multicast_list = &igb_set_rx_mode;
9915 netdev->set_mac_address = &igb_set_mac;
9916 netdev->change_mtu = &igb_change_mtu;
9917 netdev->do_ioctl = &igb_ioctl;
9918 #ifdef HAVE_TX_TIMEOUT
9919 netdev->tx_timeout = &igb_tx_timeout;
9921 netdev->vlan_rx_register = igb_vlan_mode;
9922 netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
9923 netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
9924 #ifdef CONFIG_NET_POLL_CONTROLLER
9925 netdev->poll_controller = igb_netpoll;
9927 netdev->hard_start_xmit = &igb_xmit_frame;
9928 #endif /* HAVE_NET_DEVICE_OPS */
9929 igb_set_ethtool_ops(netdev);
9930 #ifdef HAVE_TX_TIMEOUT
9931 netdev->watchdog_timeo = 5 * HZ;
9934 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
9936 adapter->bd_number = cards_found;
9938 /* setup the private structure */
9939 err = igb_sw_init(adapter);
9943 e1000_get_bus_info(hw);
9945 hw->phy.autoneg_wait_to_complete = FALSE;
9946 hw->mac.adaptive_ifs = FALSE;
9948 /* Copper options */
9949 if (hw->phy.media_type == e1000_media_type_copper) {
9950 hw->phy.mdix = AUTO_ALL_MODES;
9951 hw->phy.disable_polarity_correction = FALSE;
9952 hw->phy.ms_type = e1000_ms_hw_default;
9955 if (e1000_check_reset_block(hw))
9956 dev_info(pci_dev_to_dev(pdev),
9957 "PHY reset is blocked due to SOL/IDER session.\n");
9960 * features is initialized to 0 in allocation, it might have bits
9961 * set by igb_sw_init so we should use an or instead of an
9964 netdev->features |= NETIF_F_SG |
9966 #ifdef NETIF_F_IPV6_CSUM
9974 #endif /* NETIF_F_TSO */
9975 #ifdef NETIF_F_RXHASH
9979 #ifdef NETIF_F_HW_VLAN_CTAG_RX
9980 NETIF_F_HW_VLAN_CTAG_RX |
9981 NETIF_F_HW_VLAN_CTAG_TX;
9983 NETIF_F_HW_VLAN_RX |
9987 if (hw->mac.type >= e1000_82576)
9988 netdev->features |= NETIF_F_SCTP_CSUM;
9990 #ifdef HAVE_NDO_SET_FEATURES
9991 /* copy netdev features into list of user selectable features */
9992 netdev->hw_features |= netdev->features;
9995 /* give us the option of enabling LRO later */
9996 netdev->hw_features |= NETIF_F_LRO;
10001 /* this is only needed on kernels prior to 2.6.39 */
10002 netdev->features |= NETIF_F_GRO;
10006 /* set this bit last since it cannot be part of hw_features */
10007 #ifdef NETIF_F_HW_VLAN_CTAG_FILTER
10008 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
10010 netdev->features |= NETIF_F_HW_VLAN_FILTER;
10013 #ifdef HAVE_NETDEV_VLAN_FEATURES
10014 netdev->vlan_features |= NETIF_F_TSO |
10017 NETIF_F_IPV6_CSUM |
10022 netdev->features |= NETIF_F_HIGHDMA;
10025 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
10027 if (adapter->dmac != IGB_DMAC_DISABLE)
10028 printk("%s: DMA Coalescing is enabled..\n", netdev->name);
10031 /* before reading the NVM, reset the controller to put the device in a
10032 * known good starting state */
10033 e1000_reset_hw(hw);
10034 #endif /* NO_KNI */
10036 /* make sure the NVM is good */
10037 if (e1000_validate_nvm_checksum(hw) < 0) {
10038 dev_err(pci_dev_to_dev(pdev), "The NVM Checksum Is Not"
10044 /* copy the MAC address out of the NVM */
10045 if (e1000_read_mac_addr(hw))
10046 dev_err(pci_dev_to_dev(pdev), "NVM Read Error\n");
10047 memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
10048 #ifdef ETHTOOL_GPERMADDR
10049 memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
10051 if (!is_valid_ether_addr(netdev->perm_addr)) {
10053 if (!is_valid_ether_addr(netdev->dev_addr)) {
10055 dev_err(pci_dev_to_dev(pdev), "Invalid MAC Address\n");
10060 memcpy(&adapter->mac_table[0].addr, hw->mac.addr, netdev->addr_len);
10061 adapter->mac_table[0].queue = adapter->vfs_allocated_count;
10062 adapter->mac_table[0].state = (IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE);
10063 igb_rar_set(adapter, 0);
10065 /* get firmware version for ethtool -i */
10066 igb_set_fw_version(adapter);
10068 /* Check if Media Autosense is enabled */
10069 if (hw->mac.type == e1000_82580)
10070 igb_init_mas(adapter);
10073 #ifdef HAVE_TIMER_SETUP
10074 timer_setup(&adapter->watchdog_timer, &igb_watchdog, 0);
10075 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
10076 timer_setup(&adapter->dma_err_timer, &igb_dma_err_timer, 0);
10077 timer_setup(&adapter->phy_info_timer, &igb_update_phy_info, 0);
10079 setup_timer(&adapter->watchdog_timer, &igb_watchdog,
10080 (unsigned long) adapter);
10081 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
10082 setup_timer(&adapter->dma_err_timer, &igb_dma_err_timer,
10083 (unsigned long) adapter);
10084 setup_timer(&adapter->phy_info_timer, &igb_update_phy_info,
10085 (unsigned long) adapter);
10088 INIT_WORK(&adapter->reset_task, igb_reset_task);
10089 INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
10090 if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
10091 INIT_WORK(&adapter->dma_err_task, igb_dma_err_task);
10094 /* Initialize link properties that are user-changeable */
10095 adapter->fc_autoneg = true;
10096 hw->mac.autoneg = true;
10097 hw->phy.autoneg_advertised = 0x2f;
10099 hw->fc.requested_mode = e1000_fc_default;
10100 hw->fc.current_mode = e1000_fc_default;
10102 e1000_validate_mdi_setting(hw);
10104 /* By default, support wake on port A */
10105 if (hw->bus.func == 0)
10106 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10108 /* Check the NVM for wake support for non-port A ports */
10109 if (hw->mac.type >= e1000_82580)
10110 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
10111 NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
10113 else if (hw->bus.func == 1)
10114 e1000_read_nvm(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
10116 if (eeprom_data & IGB_EEPROM_APME)
10117 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10119 /* now that we have the eeprom settings, apply the special cases where
10120 * the eeprom may be wrong or the board simply won't support wake on
10121 * lan on a particular port */
10122 switch (pdev->device) {
10123 case E1000_DEV_ID_82575GB_QUAD_COPPER:
10124 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10126 case E1000_DEV_ID_82575EB_FIBER_SERDES:
10127 case E1000_DEV_ID_82576_FIBER:
10128 case E1000_DEV_ID_82576_SERDES:
10129 /* Wake events only supported on port A for dual fiber
10130 * regardless of eeprom setting */
10131 if (E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_FUNC_1)
10132 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10134 case E1000_DEV_ID_82576_QUAD_COPPER:
10135 case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
10136 /* if quad port adapter, disable WoL on all but port A */
10137 if (global_quad_port_a != 0)
10138 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10140 adapter->flags |= IGB_FLAG_QUAD_PORT_A;
10141 /* Reset for multiple quad port adapters */
10142 if (++global_quad_port_a == 4)
10143 global_quad_port_a = 0;
10146 /* If the device can't wake, don't set software support */
10147 if (!device_can_wakeup(&adapter->pdev->dev))
10148 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10152 /* initialize the wol settings based on the eeprom settings */
10153 if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
10154 adapter->wol |= E1000_WUFC_MAG;
10156 /* Some vendors want WoL disabled by default, but still supported */
10157 if ((hw->mac.type == e1000_i350) &&
10158 (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
10159 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10164 device_set_wakeup_enable(pci_dev_to_dev(adapter->pdev),
10165 adapter->flags & IGB_FLAG_WOL_SUPPORTED);
10167 /* reset the hardware with the new settings */
10168 igb_reset(adapter);
10169 adapter->devrc = 0;
10171 #ifdef HAVE_I2C_SUPPORT
10172 /* Init the I2C interface */
10173 err = igb_init_i2c(adapter);
10175 dev_err(&pdev->dev, "failed to init i2c interface\n");
10178 #endif /* HAVE_I2C_SUPPORT */
10180 /* let the f/w know that the h/w is now under the control of the
10182 igb_get_hw_control(adapter);
10184 strncpy(netdev->name, "eth%d", IFNAMSIZ);
10185 err = register_netdev(netdev);
10189 #ifdef CONFIG_IGB_VMDQ_NETDEV
10190 err = igb_init_vmdq_netdevs(adapter);
10194 /* carrier off reporting is important to ethtool even BEFORE open */
10195 netif_carrier_off(netdev);
10198 if (dca_add_requester(&pdev->dev) == E1000_SUCCESS) {
10199 adapter->flags |= IGB_FLAG_DCA_ENABLED;
10200 dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
10201 igb_setup_dca(adapter);
10205 #ifdef HAVE_PTP_1588_CLOCK
10206 /* do hw tstamp init after resetting */
10207 igb_ptp_init(adapter);
10208 #endif /* HAVE_PTP_1588_CLOCK */
10210 #endif /* NO_KNI */
10211 dev_info(pci_dev_to_dev(pdev), "Intel(R) Gigabit Ethernet Network Connection\n");
10212 /* print bus type/speed/width info */
10213 dev_info(pci_dev_to_dev(pdev), "%s: (PCIe:%s:%s) ",
10215 ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5GT/s" :
10216 (hw->bus.speed == e1000_bus_speed_5000) ? "5.0GT/s" :
10217 (hw->mac.type == e1000_i354) ? "integrated" :
10219 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
10220 (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :
10221 (hw->bus.width == e1000_bus_width_pcie_x1) ? "Width x1" :
10222 (hw->mac.type == e1000_i354) ? "integrated" :
10224 dev_info(pci_dev_to_dev(pdev), "%s: MAC: ", netdev->name);
10225 for (i = 0; i < 6; i++)
10226 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
10228 ret_val = e1000_read_pba_string(hw, pba_str, E1000_PBANUM_LENGTH);
10230 strncpy(pba_str, "Unknown", sizeof(pba_str) - 1);
10231 dev_info(pci_dev_to_dev(pdev), "%s: PBA No: %s\n", netdev->name,
10235 /* Initialize the thermal sensor on i350 devices. */
10236 if (hw->mac.type == e1000_i350) {
10237 if (hw->bus.func == 0) {
10241 * Read the NVM to determine if this i350 device
10242 * supports an external thermal sensor.
10244 e1000_read_nvm(hw, NVM_ETS_CFG, 1, &ets_word);
10245 if (ets_word != 0x0000 && ets_word != 0xFFFF)
10246 adapter->ets = true;
10248 adapter->ets = false;
10253 igb_sysfs_init(adapter);
10257 igb_procfs_init(adapter);
10258 #endif /* IGB_PROCFS */
10259 #endif /* IGB_HWMON */
10260 #endif /* NO_KNI */
10262 adapter->ets = false;
10265 if (hw->phy.media_type == e1000_media_type_copper) {
10266 switch (hw->mac.type) {
10270 /* Enable EEE for internal copper PHY devices */
10271 err = e1000_set_eee_i350(hw);
10273 (adapter->flags & IGB_FLAG_EEE))
10274 adapter->eee_advert =
10275 MDIO_EEE_100TX | MDIO_EEE_1000T;
10278 if ((E1000_READ_REG(hw, E1000_CTRL_EXT)) &
10279 (E1000_CTRL_EXT_LINK_MODE_SGMII)) {
10280 err = e1000_set_eee_i354(hw);
10282 (adapter->flags & IGB_FLAG_EEE))
10283 adapter->eee_advert =
10284 MDIO_EEE_100TX | MDIO_EEE_1000T;
10292 /* send driver version info to firmware */
10293 if (hw->mac.type >= e1000_i350)
10294 igb_init_fw(adapter);
10297 if (netdev->features & NETIF_F_LRO)
10298 dev_info(pci_dev_to_dev(pdev), "Internal LRO is enabled \n");
10300 dev_info(pci_dev_to_dev(pdev), "LRO is disabled \n");
10302 dev_info(pci_dev_to_dev(pdev),
10303 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
10304 adapter->msix_entries ? "MSI-X" :
10305 (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
10306 adapter->num_rx_queues, adapter->num_tx_queues);
10311 pm_runtime_put_noidle(&pdev->dev);
10315 // igb_release_hw_control(adapter);
10316 #ifdef HAVE_I2C_SUPPORT
10317 memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
10318 #endif /* HAVE_I2C_SUPPORT */
10320 // if (!e1000_check_reset_block(hw))
10321 // e1000_phy_hw_reset(hw);
10323 if (hw->flash_address)
10324 iounmap(hw->flash_address);
10326 // igb_clear_interrupt_scheme(adapter);
10327 // igb_reset_sriov_capability(adapter);
10328 iounmap(hw->hw_addr);
10330 free_netdev(netdev);
10331 err_alloc_etherdev:
10332 // pci_release_selected_regions(pdev,
10333 // pci_select_bars(pdev, IORESOURCE_MEM));
10336 pci_disable_device(pdev);
10341 void igb_kni_remove(struct pci_dev *pdev)
10343 pci_disable_device(pdev);