1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
12 #include <sys/queue.h>
15 #include <rte_interrupts.h>
16 #include <rte_memcpy.h>
17 #include <rte_common.h>
18 #include <rte_mempool.h>
19 #include <rte_malloc.h>
21 #include <rte_errno.h>
22 #include <rte_spinlock.h>
23 #include <rte_string_fns.h>
24 #include <rte_class.h>
25 #include <rte_ether.h>
26 #include <rte_telemetry.h>
28 #include "rte_ethdev_trace.h"
29 #include "rte_ethdev.h"
30 #include "ethdev_driver.h"
31 #include "ethdev_profile.h"
32 #include "ethdev_private.h"
33 #include "sff_telemetry.h"
35 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
37 /* public fast-path API */
38 struct rte_eth_fp_ops rte_eth_fp_ops[RTE_MAX_ETHPORTS];
40 /* spinlock for add/remove Rx callbacks */
41 static rte_spinlock_t eth_dev_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
43 /* spinlock for add/remove Tx callbacks */
44 static rte_spinlock_t eth_dev_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
46 /* store statistics names and its offset in stats structure */
47 struct rte_eth_xstats_name_off {
48 char name[RTE_ETH_XSTATS_NAME_SIZE];
52 static const struct rte_eth_xstats_name_off eth_dev_stats_strings[] = {
53 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
54 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
55 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
56 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
57 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
58 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
59 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
60 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
64 #define RTE_NB_STATS RTE_DIM(eth_dev_stats_strings)
66 static const struct rte_eth_xstats_name_off eth_dev_rxq_stats_strings[] = {
67 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
68 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
69 {"errors", offsetof(struct rte_eth_stats, q_errors)},
72 #define RTE_NB_RXQ_STATS RTE_DIM(eth_dev_rxq_stats_strings)
74 static const struct rte_eth_xstats_name_off eth_dev_txq_stats_strings[] = {
75 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
76 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
78 #define RTE_NB_TXQ_STATS RTE_DIM(eth_dev_txq_stats_strings)
80 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
81 { RTE_ETH_RX_OFFLOAD_##_name, #_name }
86 } eth_dev_rx_offload_names[] = {
87 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
88 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
89 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
90 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
91 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
92 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
93 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
94 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
95 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
96 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
97 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
98 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
99 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
100 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
101 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
102 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
103 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
104 RTE_RX_OFFLOAD_BIT2STR(RSS_HASH),
105 RTE_RX_OFFLOAD_BIT2STR(BUFFER_SPLIT),
108 #undef RTE_RX_OFFLOAD_BIT2STR
109 #undef RTE_ETH_RX_OFFLOAD_BIT2STR
111 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
112 { RTE_ETH_TX_OFFLOAD_##_name, #_name }
114 static const struct {
117 } eth_dev_tx_offload_names[] = {
118 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
119 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
120 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
121 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
122 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
123 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
124 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
125 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
126 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
127 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
128 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
129 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
130 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
131 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
132 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
133 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
134 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
135 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
136 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
137 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
138 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
139 RTE_TX_OFFLOAD_BIT2STR(SEND_ON_TIMESTAMP),
142 #undef RTE_TX_OFFLOAD_BIT2STR
144 static const struct {
147 } rte_eth_dev_capa_names[] = {
148 {RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP, "RUNTIME_RX_QUEUE_SETUP"},
149 {RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP, "RUNTIME_TX_QUEUE_SETUP"},
150 {RTE_ETH_DEV_CAPA_RXQ_SHARE, "RXQ_SHARE"},
151 {RTE_ETH_DEV_CAPA_FLOW_RULE_KEEP, "FLOW_RULE_KEEP"},
152 {RTE_ETH_DEV_CAPA_FLOW_SHARED_OBJECT_KEEP, "FLOW_SHARED_OBJECT_KEEP"},
161 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
164 struct rte_devargs devargs;
165 const char *bus_param_key;
166 char *bus_str = NULL;
167 char *cls_str = NULL;
171 RTE_ETHDEV_LOG(ERR, "Cannot initialize NULL iterator\n");
175 if (devargs_str == NULL) {
177 "Cannot initialize iterator from NULL device description string\n");
181 memset(iter, 0, sizeof(*iter));
182 memset(&devargs, 0, sizeof(devargs));
185 * The devargs string may use various syntaxes:
186 * - 0000:08:00.0,representor=[1-3]
187 * - pci:0000:06:00.0,representor=[0,5]
188 * - class=eth,mac=00:11:22:33:44:55
189 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
193 * Handle pure class filter (i.e. without any bus-level argument),
194 * from future new syntax.
195 * rte_devargs_parse() is not yet supporting the new syntax,
196 * that's why this simple case is temporarily parsed here.
198 #define iter_anybus_str "class=eth,"
199 if (strncmp(devargs_str, iter_anybus_str,
200 strlen(iter_anybus_str)) == 0) {
201 iter->cls_str = devargs_str + strlen(iter_anybus_str);
205 /* Split bus, device and parameters. */
206 ret = rte_devargs_parse(&devargs, devargs_str);
211 * Assume parameters of old syntax can match only at ethdev level.
212 * Extra parameters will be ignored, thanks to "+" prefix.
214 str_size = strlen(devargs.args) + 2;
215 cls_str = malloc(str_size);
216 if (cls_str == NULL) {
220 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
221 if (ret != str_size - 1) {
225 iter->cls_str = cls_str;
227 iter->bus = devargs.bus;
228 if (iter->bus->dev_iterate == NULL) {
233 /* Convert bus args to new syntax for use with new API dev_iterate. */
234 if ((strcmp(iter->bus->name, "vdev") == 0) ||
235 (strcmp(iter->bus->name, "fslmc") == 0) ||
236 (strcmp(iter->bus->name, "dpaa_bus") == 0)) {
237 bus_param_key = "name";
238 } else if (strcmp(iter->bus->name, "pci") == 0) {
239 bus_param_key = "addr";
244 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
245 bus_str = malloc(str_size);
246 if (bus_str == NULL) {
250 ret = snprintf(bus_str, str_size, "%s=%s",
251 bus_param_key, devargs.name);
252 if (ret != str_size - 1) {
256 iter->bus_str = bus_str;
259 iter->cls = rte_class_find_by_name("eth");
260 rte_devargs_reset(&devargs);
265 RTE_ETHDEV_LOG(ERR, "Bus %s does not support iterating.\n",
267 rte_devargs_reset(&devargs);
274 rte_eth_iterator_next(struct rte_dev_iterator *iter)
278 "Cannot get next device from NULL iterator\n");
279 return RTE_MAX_ETHPORTS;
282 if (iter->cls == NULL) /* invalid ethdev iterator */
283 return RTE_MAX_ETHPORTS;
285 do { /* loop to try all matching rte_device */
286 /* If not pure ethdev filter and */
287 if (iter->bus != NULL &&
288 /* not in middle of rte_eth_dev iteration, */
289 iter->class_device == NULL) {
290 /* get next rte_device to try. */
291 iter->device = iter->bus->dev_iterate(
292 iter->device, iter->bus_str, iter);
293 if (iter->device == NULL)
294 break; /* no more rte_device candidate */
296 /* A device is matching bus part, need to check ethdev part. */
297 iter->class_device = iter->cls->dev_iterate(
298 iter->class_device, iter->cls_str, iter);
299 if (iter->class_device != NULL)
300 return eth_dev_to_id(iter->class_device); /* match */
301 } while (iter->bus != NULL); /* need to try next rte_device */
303 /* No more ethdev port to iterate. */
304 rte_eth_iterator_cleanup(iter);
305 return RTE_MAX_ETHPORTS;
309 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
312 RTE_ETHDEV_LOG(ERR, "Cannot do clean up from NULL iterator\n");
316 if (iter->bus_str == NULL)
317 return; /* nothing to free in pure class filter */
318 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
319 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
320 memset(iter, 0, sizeof(*iter));
324 rte_eth_find_next(uint16_t port_id)
326 while (port_id < RTE_MAX_ETHPORTS &&
327 rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED)
330 if (port_id >= RTE_MAX_ETHPORTS)
331 return RTE_MAX_ETHPORTS;
337 * Macro to iterate over all valid ports for internal usage.
338 * Note: RTE_ETH_FOREACH_DEV is different because filtering owned ports.
340 #define RTE_ETH_FOREACH_VALID_DEV(port_id) \
341 for (port_id = rte_eth_find_next(0); \
342 port_id < RTE_MAX_ETHPORTS; \
343 port_id = rte_eth_find_next(port_id + 1))
346 rte_eth_find_next_of(uint16_t port_id, const struct rte_device *parent)
348 port_id = rte_eth_find_next(port_id);
349 while (port_id < RTE_MAX_ETHPORTS &&
350 rte_eth_devices[port_id].device != parent)
351 port_id = rte_eth_find_next(port_id + 1);
357 rte_eth_find_next_sibling(uint16_t port_id, uint16_t ref_port_id)
359 RTE_ETH_VALID_PORTID_OR_ERR_RET(ref_port_id, RTE_MAX_ETHPORTS);
360 return rte_eth_find_next_of(port_id,
361 rte_eth_devices[ref_port_id].device);
365 eth_dev_is_allocated(const struct rte_eth_dev *ethdev)
367 return ethdev->data->name[0] != '\0';
371 rte_eth_dev_is_valid_port(uint16_t port_id)
373 if (port_id >= RTE_MAX_ETHPORTS ||
374 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
381 eth_is_valid_owner_id(uint64_t owner_id)
383 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
384 eth_dev_shared_data->next_owner_id <= owner_id)
390 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
392 port_id = rte_eth_find_next(port_id);
393 while (port_id < RTE_MAX_ETHPORTS &&
394 rte_eth_devices[port_id].data->owner.id != owner_id)
395 port_id = rte_eth_find_next(port_id + 1);
401 rte_eth_dev_owner_new(uint64_t *owner_id)
403 if (owner_id == NULL) {
404 RTE_ETHDEV_LOG(ERR, "Cannot get new owner ID to NULL\n");
408 eth_dev_shared_data_prepare();
410 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
412 *owner_id = eth_dev_shared_data->next_owner_id++;
414 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
419 eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
420 const struct rte_eth_dev_owner *new_owner)
422 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
423 struct rte_eth_dev_owner *port_owner;
425 if (port_id >= RTE_MAX_ETHPORTS || !eth_dev_is_allocated(ethdev)) {
426 RTE_ETHDEV_LOG(ERR, "Port ID %"PRIu16" is not allocated\n",
431 if (new_owner == NULL) {
433 "Cannot set ethdev port %u owner from NULL owner\n",
438 if (!eth_is_valid_owner_id(new_owner->id) &&
439 !eth_is_valid_owner_id(old_owner_id)) {
441 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
442 old_owner_id, new_owner->id);
446 port_owner = &rte_eth_devices[port_id].data->owner;
447 if (port_owner->id != old_owner_id) {
449 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
450 port_id, port_owner->name, port_owner->id);
454 /* can not truncate (same structure) */
455 strlcpy(port_owner->name, new_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN);
457 port_owner->id = new_owner->id;
459 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
460 port_id, new_owner->name, new_owner->id);
466 rte_eth_dev_owner_set(const uint16_t port_id,
467 const struct rte_eth_dev_owner *owner)
471 eth_dev_shared_data_prepare();
473 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
475 ret = eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
477 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
482 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
484 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
485 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
488 eth_dev_shared_data_prepare();
490 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
492 ret = eth_dev_owner_set(port_id, owner_id, &new_owner);
494 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
499 rte_eth_dev_owner_delete(const uint64_t owner_id)
504 eth_dev_shared_data_prepare();
506 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
508 if (eth_is_valid_owner_id(owner_id)) {
509 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++) {
510 struct rte_eth_dev_data *data =
511 rte_eth_devices[port_id].data;
512 if (data != NULL && data->owner.id == owner_id)
513 memset(&data->owner, 0,
514 sizeof(struct rte_eth_dev_owner));
516 RTE_ETHDEV_LOG(NOTICE,
517 "All port owners owned by %016"PRIx64" identifier have removed\n",
521 "Invalid owner ID=%016"PRIx64"\n",
526 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
532 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
534 struct rte_eth_dev *ethdev;
536 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
537 ethdev = &rte_eth_devices[port_id];
539 if (!eth_dev_is_allocated(ethdev)) {
540 RTE_ETHDEV_LOG(ERR, "Port ID %"PRIu16" is not allocated\n",
546 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u owner to NULL\n",
551 eth_dev_shared_data_prepare();
553 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
554 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
555 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
561 rte_eth_dev_socket_id(uint16_t port_id)
563 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
564 return rte_eth_devices[port_id].data->numa_node;
568 rte_eth_dev_get_sec_ctx(uint16_t port_id)
570 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
571 return rte_eth_devices[port_id].security_ctx;
575 rte_eth_dev_count_avail(void)
582 RTE_ETH_FOREACH_DEV(p)
589 rte_eth_dev_count_total(void)
591 uint16_t port, count = 0;
593 RTE_ETH_FOREACH_VALID_DEV(port)
600 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
604 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
607 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u name to NULL\n",
612 /* shouldn't check 'rte_eth_devices[i].data',
613 * because it might be overwritten by VDEV PMD */
614 tmp = eth_dev_shared_data->data[port_id].name;
620 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
625 RTE_ETHDEV_LOG(ERR, "Cannot get port ID from NULL name");
629 if (port_id == NULL) {
631 "Cannot get port ID to NULL for %s\n", name);
635 RTE_ETH_FOREACH_VALID_DEV(pid)
636 if (!strcmp(name, eth_dev_shared_data->data[pid].name)) {
645 eth_err(uint16_t port_id, int ret)
649 if (rte_eth_dev_is_removed(port_id))
655 eth_dev_validate_rx_queue(const struct rte_eth_dev *dev, uint16_t rx_queue_id)
659 if (rx_queue_id >= dev->data->nb_rx_queues) {
660 port_id = dev->data->port_id;
662 "Invalid Rx queue_id=%u of device with port_id=%u\n",
663 rx_queue_id, port_id);
667 if (dev->data->rx_queues[rx_queue_id] == NULL) {
668 port_id = dev->data->port_id;
670 "Queue %u of device with port_id=%u has not been setup\n",
671 rx_queue_id, port_id);
679 eth_dev_validate_tx_queue(const struct rte_eth_dev *dev, uint16_t tx_queue_id)
683 if (tx_queue_id >= dev->data->nb_tx_queues) {
684 port_id = dev->data->port_id;
686 "Invalid Tx queue_id=%u of device with port_id=%u\n",
687 tx_queue_id, port_id);
691 if (dev->data->tx_queues[tx_queue_id] == NULL) {
692 port_id = dev->data->port_id;
694 "Queue %u of device with port_id=%u has not been setup\n",
695 tx_queue_id, port_id);
703 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
705 struct rte_eth_dev *dev;
708 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
709 dev = &rte_eth_devices[port_id];
711 if (!dev->data->dev_started) {
713 "Port %u must be started before start any queue\n",
718 ret = eth_dev_validate_rx_queue(dev, rx_queue_id);
722 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
724 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
726 "Can't start Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
727 rx_queue_id, port_id);
731 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
733 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
734 rx_queue_id, port_id);
738 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev, rx_queue_id));
742 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
744 struct rte_eth_dev *dev;
747 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
748 dev = &rte_eth_devices[port_id];
750 ret = eth_dev_validate_rx_queue(dev, rx_queue_id);
754 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
756 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
758 "Can't stop Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
759 rx_queue_id, port_id);
763 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
765 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
766 rx_queue_id, port_id);
770 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
774 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
776 struct rte_eth_dev *dev;
779 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
780 dev = &rte_eth_devices[port_id];
782 if (!dev->data->dev_started) {
784 "Port %u must be started before start any queue\n",
789 ret = eth_dev_validate_tx_queue(dev, tx_queue_id);
793 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
795 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
797 "Can't start Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
798 tx_queue_id, port_id);
802 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
804 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
805 tx_queue_id, port_id);
809 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
813 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
815 struct rte_eth_dev *dev;
818 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
819 dev = &rte_eth_devices[port_id];
821 ret = eth_dev_validate_tx_queue(dev, tx_queue_id);
825 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
827 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
829 "Can't stop Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
830 tx_queue_id, port_id);
834 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
836 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
837 tx_queue_id, port_id);
841 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
845 rte_eth_speed_bitflag(uint32_t speed, int duplex)
848 case RTE_ETH_SPEED_NUM_10M:
849 return duplex ? RTE_ETH_LINK_SPEED_10M : RTE_ETH_LINK_SPEED_10M_HD;
850 case RTE_ETH_SPEED_NUM_100M:
851 return duplex ? RTE_ETH_LINK_SPEED_100M : RTE_ETH_LINK_SPEED_100M_HD;
852 case RTE_ETH_SPEED_NUM_1G:
853 return RTE_ETH_LINK_SPEED_1G;
854 case RTE_ETH_SPEED_NUM_2_5G:
855 return RTE_ETH_LINK_SPEED_2_5G;
856 case RTE_ETH_SPEED_NUM_5G:
857 return RTE_ETH_LINK_SPEED_5G;
858 case RTE_ETH_SPEED_NUM_10G:
859 return RTE_ETH_LINK_SPEED_10G;
860 case RTE_ETH_SPEED_NUM_20G:
861 return RTE_ETH_LINK_SPEED_20G;
862 case RTE_ETH_SPEED_NUM_25G:
863 return RTE_ETH_LINK_SPEED_25G;
864 case RTE_ETH_SPEED_NUM_40G:
865 return RTE_ETH_LINK_SPEED_40G;
866 case RTE_ETH_SPEED_NUM_50G:
867 return RTE_ETH_LINK_SPEED_50G;
868 case RTE_ETH_SPEED_NUM_56G:
869 return RTE_ETH_LINK_SPEED_56G;
870 case RTE_ETH_SPEED_NUM_100G:
871 return RTE_ETH_LINK_SPEED_100G;
872 case RTE_ETH_SPEED_NUM_200G:
873 return RTE_ETH_LINK_SPEED_200G;
880 rte_eth_dev_rx_offload_name(uint64_t offload)
882 const char *name = "UNKNOWN";
885 for (i = 0; i < RTE_DIM(eth_dev_rx_offload_names); ++i) {
886 if (offload == eth_dev_rx_offload_names[i].offload) {
887 name = eth_dev_rx_offload_names[i].name;
896 rte_eth_dev_tx_offload_name(uint64_t offload)
898 const char *name = "UNKNOWN";
901 for (i = 0; i < RTE_DIM(eth_dev_tx_offload_names); ++i) {
902 if (offload == eth_dev_tx_offload_names[i].offload) {
903 name = eth_dev_tx_offload_names[i].name;
912 rte_eth_dev_capability_name(uint64_t capability)
914 const char *name = "UNKNOWN";
917 for (i = 0; i < RTE_DIM(rte_eth_dev_capa_names); ++i) {
918 if (capability == rte_eth_dev_capa_names[i].offload) {
919 name = rte_eth_dev_capa_names[i].name;
928 eth_dev_check_lro_pkt_size(uint16_t port_id, uint32_t config_size,
929 uint32_t max_rx_pkt_len, uint32_t dev_info_size)
933 if (dev_info_size == 0) {
934 if (config_size != max_rx_pkt_len) {
935 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size"
936 " %u != %u is not allowed\n",
937 port_id, config_size, max_rx_pkt_len);
940 } else if (config_size > dev_info_size) {
941 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
942 "> max allowed value %u\n", port_id, config_size,
945 } else if (config_size < RTE_ETHER_MIN_LEN) {
946 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
947 "< min allowed value %u\n", port_id, config_size,
948 (unsigned int)RTE_ETHER_MIN_LEN);
955 * Validate offloads that are requested through rte_eth_dev_configure against
956 * the offloads successfully set by the Ethernet device.
959 * The port identifier of the Ethernet device.
960 * @param req_offloads
961 * The offloads that have been requested through `rte_eth_dev_configure`.
962 * @param set_offloads
963 * The offloads successfully set by the Ethernet device.
964 * @param offload_type
965 * The offload type i.e. Rx/Tx string.
966 * @param offload_name
967 * The function that prints the offload name.
969 * - (0) if validation successful.
970 * - (-EINVAL) if requested offload has been silently disabled.
974 eth_dev_validate_offloads(uint16_t port_id, uint64_t req_offloads,
975 uint64_t set_offloads, const char *offload_type,
976 const char *(*offload_name)(uint64_t))
978 uint64_t offloads_diff = req_offloads ^ set_offloads;
982 while (offloads_diff != 0) {
983 /* Check if any offload is requested but not enabled. */
984 offload = RTE_BIT64(__builtin_ctzll(offloads_diff));
985 if (offload & req_offloads) {
987 "Port %u failed to enable %s offload %s\n",
988 port_id, offload_type, offload_name(offload));
992 /* Check if offload couldn't be disabled. */
993 if (offload & set_offloads) {
994 RTE_ETHDEV_LOG(DEBUG,
995 "Port %u %s offload %s is not requested but enabled\n",
996 port_id, offload_type, offload_name(offload));
999 offloads_diff &= ~offload;
1006 eth_dev_get_overhead_len(uint32_t max_rx_pktlen, uint16_t max_mtu)
1008 uint32_t overhead_len;
1010 if (max_mtu != UINT16_MAX && max_rx_pktlen > max_mtu)
1011 overhead_len = max_rx_pktlen - max_mtu;
1013 overhead_len = RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN;
1015 return overhead_len;
1018 /* rte_eth_dev_info_get() should be called prior to this function */
1020 eth_dev_validate_mtu(uint16_t port_id, struct rte_eth_dev_info *dev_info,
1023 uint32_t overhead_len;
1024 uint32_t frame_size;
1026 if (mtu < dev_info->min_mtu) {
1028 "MTU (%u) < device min MTU (%u) for port_id %u\n",
1029 mtu, dev_info->min_mtu, port_id);
1032 if (mtu > dev_info->max_mtu) {
1034 "MTU (%u) > device max MTU (%u) for port_id %u\n",
1035 mtu, dev_info->max_mtu, port_id);
1039 overhead_len = eth_dev_get_overhead_len(dev_info->max_rx_pktlen,
1041 frame_size = mtu + overhead_len;
1042 if (frame_size < RTE_ETHER_MIN_LEN) {
1044 "Frame size (%u) < min frame size (%u) for port_id %u\n",
1045 frame_size, RTE_ETHER_MIN_LEN, port_id);
1049 if (frame_size > dev_info->max_rx_pktlen) {
1051 "Frame size (%u) > device max frame size (%u) for port_id %u\n",
1052 frame_size, dev_info->max_rx_pktlen, port_id);
1060 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1061 const struct rte_eth_conf *dev_conf)
1063 struct rte_eth_dev *dev;
1064 struct rte_eth_dev_info dev_info;
1065 struct rte_eth_conf orig_conf;
1070 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1071 dev = &rte_eth_devices[port_id];
1073 if (dev_conf == NULL) {
1075 "Cannot configure ethdev port %u from NULL config\n",
1080 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1082 if (dev->data->dev_started) {
1084 "Port %u must be stopped to allow configuration\n",
1090 * Ensure that "dev_configured" is always 0 each time prepare to do
1091 * dev_configure() to avoid any non-anticipated behaviour.
1092 * And set to 1 when dev_configure() is executed successfully.
1094 dev->data->dev_configured = 0;
1096 /* Store original config, as rollback required on failure */
1097 memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1100 * Copy the dev_conf parameter into the dev structure.
1101 * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1103 if (dev_conf != &dev->data->dev_conf)
1104 memcpy(&dev->data->dev_conf, dev_conf,
1105 sizeof(dev->data->dev_conf));
1107 /* Backup mtu for rollback */
1108 old_mtu = dev->data->mtu;
1110 ret = rte_eth_dev_info_get(port_id, &dev_info);
1114 /* If number of queues specified by application for both Rx and Tx is
1115 * zero, use driver preferred values. This cannot be done individually
1116 * as it is valid for either Tx or Rx (but not both) to be zero.
1117 * If driver does not provide any preferred valued, fall back on
1120 if (nb_rx_q == 0 && nb_tx_q == 0) {
1121 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1123 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1124 nb_tx_q = dev_info.default_txportconf.nb_queues;
1126 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1129 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1131 "Number of Rx queues requested (%u) is greater than max supported(%d)\n",
1132 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1137 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1139 "Number of Tx queues requested (%u) is greater than max supported(%d)\n",
1140 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1146 * Check that the numbers of Rx and Tx queues are not greater
1147 * than the maximum number of Rx and Tx queues supported by the
1148 * configured device.
1150 if (nb_rx_q > dev_info.max_rx_queues) {
1151 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1152 port_id, nb_rx_q, dev_info.max_rx_queues);
1157 if (nb_tx_q > dev_info.max_tx_queues) {
1158 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1159 port_id, nb_tx_q, dev_info.max_tx_queues);
1164 /* Check that the device supports requested interrupts */
1165 if ((dev_conf->intr_conf.lsc == 1) &&
1166 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1167 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1168 dev->device->driver->name);
1172 if ((dev_conf->intr_conf.rmv == 1) &&
1173 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1174 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1175 dev->device->driver->name);
1180 if (dev_conf->rxmode.mtu == 0)
1181 dev->data->dev_conf.rxmode.mtu = RTE_ETHER_MTU;
1183 ret = eth_dev_validate_mtu(port_id, &dev_info,
1184 dev->data->dev_conf.rxmode.mtu);
1188 dev->data->mtu = dev->data->dev_conf.rxmode.mtu;
1191 * If LRO is enabled, check that the maximum aggregated packet
1192 * size is supported by the configured device.
1194 if (dev_conf->rxmode.offloads & RTE_ETH_RX_OFFLOAD_TCP_LRO) {
1195 uint32_t max_rx_pktlen;
1196 uint32_t overhead_len;
1198 overhead_len = eth_dev_get_overhead_len(dev_info.max_rx_pktlen,
1200 max_rx_pktlen = dev->data->dev_conf.rxmode.mtu + overhead_len;
1201 if (dev_conf->rxmode.max_lro_pkt_size == 0)
1202 dev->data->dev_conf.rxmode.max_lro_pkt_size = max_rx_pktlen;
1203 ret = eth_dev_check_lro_pkt_size(port_id,
1204 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1206 dev_info.max_lro_pkt_size);
1211 /* Any requested offloading must be within its device capabilities */
1212 if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1213 dev_conf->rxmode.offloads) {
1215 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1216 "capabilities 0x%"PRIx64" in %s()\n",
1217 port_id, dev_conf->rxmode.offloads,
1218 dev_info.rx_offload_capa,
1223 if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1224 dev_conf->txmode.offloads) {
1226 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1227 "capabilities 0x%"PRIx64" in %s()\n",
1228 port_id, dev_conf->txmode.offloads,
1229 dev_info.tx_offload_capa,
1235 dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf =
1236 rte_eth_rss_hf_refine(dev_conf->rx_adv_conf.rss_conf.rss_hf);
1238 /* Check that device supports requested rss hash functions. */
1239 if ((dev_info.flow_type_rss_offloads |
1240 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1241 dev_info.flow_type_rss_offloads) {
1243 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1244 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1245 dev_info.flow_type_rss_offloads);
1250 /* Check if Rx RSS distribution is disabled but RSS hash is enabled. */
1251 if (((dev_conf->rxmode.mq_mode & RTE_ETH_MQ_RX_RSS_FLAG) == 0) &&
1252 (dev_conf->rxmode.offloads & RTE_ETH_RX_OFFLOAD_RSS_HASH)) {
1254 "Ethdev port_id=%u config invalid Rx mq_mode without RSS but %s offload is requested\n",
1256 rte_eth_dev_rx_offload_name(RTE_ETH_RX_OFFLOAD_RSS_HASH));
1262 * Setup new number of Rx/Tx queues and reconfigure device.
1264 diag = eth_dev_rx_queue_config(dev, nb_rx_q);
1267 "Port%u eth_dev_rx_queue_config = %d\n",
1273 diag = eth_dev_tx_queue_config(dev, nb_tx_q);
1276 "Port%u eth_dev_tx_queue_config = %d\n",
1278 eth_dev_rx_queue_config(dev, 0);
1283 diag = (*dev->dev_ops->dev_configure)(dev);
1285 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1287 ret = eth_err(port_id, diag);
1291 /* Initialize Rx profiling if enabled at compilation time. */
1292 diag = __rte_eth_dev_profile_init(port_id, dev);
1294 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1296 ret = eth_err(port_id, diag);
1300 /* Validate Rx offloads. */
1301 diag = eth_dev_validate_offloads(port_id,
1302 dev_conf->rxmode.offloads,
1303 dev->data->dev_conf.rxmode.offloads, "Rx",
1304 rte_eth_dev_rx_offload_name);
1310 /* Validate Tx offloads. */
1311 diag = eth_dev_validate_offloads(port_id,
1312 dev_conf->txmode.offloads,
1313 dev->data->dev_conf.txmode.offloads, "Tx",
1314 rte_eth_dev_tx_offload_name);
1320 dev->data->dev_configured = 1;
1321 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, 0);
1324 eth_dev_rx_queue_config(dev, 0);
1325 eth_dev_tx_queue_config(dev, 0);
1327 memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1328 if (old_mtu != dev->data->mtu)
1329 dev->data->mtu = old_mtu;
1331 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, ret);
1336 eth_dev_mac_restore(struct rte_eth_dev *dev,
1337 struct rte_eth_dev_info *dev_info)
1339 struct rte_ether_addr *addr;
1344 /* replay MAC address configuration including default MAC */
1345 addr = &dev->data->mac_addrs[0];
1346 if (*dev->dev_ops->mac_addr_set != NULL)
1347 (*dev->dev_ops->mac_addr_set)(dev, addr);
1348 else if (*dev->dev_ops->mac_addr_add != NULL)
1349 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1351 if (*dev->dev_ops->mac_addr_add != NULL) {
1352 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1353 addr = &dev->data->mac_addrs[i];
1355 /* skip zero address */
1356 if (rte_is_zero_ether_addr(addr))
1360 pool_mask = dev->data->mac_pool_sel[i];
1363 if (pool_mask & UINT64_C(1))
1364 (*dev->dev_ops->mac_addr_add)(dev,
1368 } while (pool_mask);
1374 eth_dev_config_restore(struct rte_eth_dev *dev,
1375 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1379 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1380 eth_dev_mac_restore(dev, dev_info);
1382 /* replay promiscuous configuration */
1384 * use callbacks directly since we don't need port_id check and
1385 * would like to bypass the same value set
1387 if (rte_eth_promiscuous_get(port_id) == 1 &&
1388 *dev->dev_ops->promiscuous_enable != NULL) {
1389 ret = eth_err(port_id,
1390 (*dev->dev_ops->promiscuous_enable)(dev));
1391 if (ret != 0 && ret != -ENOTSUP) {
1393 "Failed to enable promiscuous mode for device (port %u): %s\n",
1394 port_id, rte_strerror(-ret));
1397 } else if (rte_eth_promiscuous_get(port_id) == 0 &&
1398 *dev->dev_ops->promiscuous_disable != NULL) {
1399 ret = eth_err(port_id,
1400 (*dev->dev_ops->promiscuous_disable)(dev));
1401 if (ret != 0 && ret != -ENOTSUP) {
1403 "Failed to disable promiscuous mode for device (port %u): %s\n",
1404 port_id, rte_strerror(-ret));
1409 /* replay all multicast configuration */
1411 * use callbacks directly since we don't need port_id check and
1412 * would like to bypass the same value set
1414 if (rte_eth_allmulticast_get(port_id) == 1 &&
1415 *dev->dev_ops->allmulticast_enable != NULL) {
1416 ret = eth_err(port_id,
1417 (*dev->dev_ops->allmulticast_enable)(dev));
1418 if (ret != 0 && ret != -ENOTSUP) {
1420 "Failed to enable allmulticast mode for device (port %u): %s\n",
1421 port_id, rte_strerror(-ret));
1424 } else if (rte_eth_allmulticast_get(port_id) == 0 &&
1425 *dev->dev_ops->allmulticast_disable != NULL) {
1426 ret = eth_err(port_id,
1427 (*dev->dev_ops->allmulticast_disable)(dev));
1428 if (ret != 0 && ret != -ENOTSUP) {
1430 "Failed to disable allmulticast mode for device (port %u): %s\n",
1431 port_id, rte_strerror(-ret));
1440 rte_eth_dev_start(uint16_t port_id)
1442 struct rte_eth_dev *dev;
1443 struct rte_eth_dev_info dev_info;
1447 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1448 dev = &rte_eth_devices[port_id];
1450 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1452 if (dev->data->dev_configured == 0) {
1453 RTE_ETHDEV_LOG(INFO,
1454 "Device with port_id=%"PRIu16" is not configured.\n",
1459 if (dev->data->dev_started != 0) {
1460 RTE_ETHDEV_LOG(INFO,
1461 "Device with port_id=%"PRIu16" already started\n",
1466 ret = rte_eth_dev_info_get(port_id, &dev_info);
1470 /* Lets restore MAC now if device does not support live change */
1471 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1472 eth_dev_mac_restore(dev, &dev_info);
1474 diag = (*dev->dev_ops->dev_start)(dev);
1476 dev->data->dev_started = 1;
1478 return eth_err(port_id, diag);
1480 ret = eth_dev_config_restore(dev, &dev_info, port_id);
1483 "Error during restoring configuration for device (port %u): %s\n",
1484 port_id, rte_strerror(-ret));
1485 ret_stop = rte_eth_dev_stop(port_id);
1486 if (ret_stop != 0) {
1488 "Failed to stop device (port %u): %s\n",
1489 port_id, rte_strerror(-ret_stop));
1495 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1496 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1497 (*dev->dev_ops->link_update)(dev, 0);
1500 /* expose selection of PMD fast-path functions */
1501 eth_dev_fp_ops_setup(rte_eth_fp_ops + port_id, dev);
1503 rte_ethdev_trace_start(port_id);
1508 rte_eth_dev_stop(uint16_t port_id)
1510 struct rte_eth_dev *dev;
1513 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1514 dev = &rte_eth_devices[port_id];
1516 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_stop, -ENOTSUP);
1518 if (dev->data->dev_started == 0) {
1519 RTE_ETHDEV_LOG(INFO,
1520 "Device with port_id=%"PRIu16" already stopped\n",
1525 /* point fast-path functions to dummy ones */
1526 eth_dev_fp_ops_reset(rte_eth_fp_ops + port_id);
1528 ret = (*dev->dev_ops->dev_stop)(dev);
1530 dev->data->dev_started = 0;
1531 rte_ethdev_trace_stop(port_id, ret);
1537 rte_eth_dev_set_link_up(uint16_t port_id)
1539 struct rte_eth_dev *dev;
1541 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1542 dev = &rte_eth_devices[port_id];
1544 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1545 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1549 rte_eth_dev_set_link_down(uint16_t port_id)
1551 struct rte_eth_dev *dev;
1553 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1554 dev = &rte_eth_devices[port_id];
1556 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1557 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1561 rte_eth_dev_close(uint16_t port_id)
1563 struct rte_eth_dev *dev;
1564 int firsterr, binerr;
1565 int *lasterr = &firsterr;
1567 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1568 dev = &rte_eth_devices[port_id];
1571 * Secondary process needs to close device to release process private
1572 * resources. But secondary process should not be obliged to wait
1573 * for device stop before closing ethdev.
1575 if (rte_eal_process_type() == RTE_PROC_PRIMARY &&
1576 dev->data->dev_started) {
1577 RTE_ETHDEV_LOG(ERR, "Cannot close started device (port %u)\n",
1582 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_close, -ENOTSUP);
1583 *lasterr = (*dev->dev_ops->dev_close)(dev);
1587 rte_ethdev_trace_close(port_id);
1588 *lasterr = rte_eth_dev_release_port(dev);
1594 rte_eth_dev_reset(uint16_t port_id)
1596 struct rte_eth_dev *dev;
1599 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1600 dev = &rte_eth_devices[port_id];
1602 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1604 ret = rte_eth_dev_stop(port_id);
1607 "Failed to stop device (port %u) before reset: %s - ignore\n",
1608 port_id, rte_strerror(-ret));
1610 ret = dev->dev_ops->dev_reset(dev);
1612 return eth_err(port_id, ret);
1616 rte_eth_dev_is_removed(uint16_t port_id)
1618 struct rte_eth_dev *dev;
1621 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1622 dev = &rte_eth_devices[port_id];
1624 if (dev->state == RTE_ETH_DEV_REMOVED)
1627 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1629 ret = dev->dev_ops->is_removed(dev);
1631 /* Device is physically removed. */
1632 dev->state = RTE_ETH_DEV_REMOVED;
1638 rte_eth_rx_queue_check_split(const struct rte_eth_rxseg_split *rx_seg,
1639 uint16_t n_seg, uint32_t *mbp_buf_size,
1640 const struct rte_eth_dev_info *dev_info)
1642 const struct rte_eth_rxseg_capa *seg_capa = &dev_info->rx_seg_capa;
1643 struct rte_mempool *mp_first;
1644 uint32_t offset_mask;
1647 if (n_seg > seg_capa->max_nseg) {
1649 "Requested Rx segments %u exceed supported %u\n",
1650 n_seg, seg_capa->max_nseg);
1654 * Check the sizes and offsets against buffer sizes
1655 * for each segment specified in extended configuration.
1657 mp_first = rx_seg[0].mp;
1658 offset_mask = RTE_BIT32(seg_capa->offset_align_log2) - 1;
1659 for (seg_idx = 0; seg_idx < n_seg; seg_idx++) {
1660 struct rte_mempool *mpl = rx_seg[seg_idx].mp;
1661 uint32_t length = rx_seg[seg_idx].length;
1662 uint32_t offset = rx_seg[seg_idx].offset;
1665 RTE_ETHDEV_LOG(ERR, "null mempool pointer\n");
1668 if (seg_idx != 0 && mp_first != mpl &&
1669 seg_capa->multi_pools == 0) {
1670 RTE_ETHDEV_LOG(ERR, "Receiving to multiple pools is not supported\n");
1674 if (seg_capa->offset_allowed == 0) {
1675 RTE_ETHDEV_LOG(ERR, "Rx segmentation with offset is not supported\n");
1678 if (offset & offset_mask) {
1679 RTE_ETHDEV_LOG(ERR, "Rx segmentation invalid offset alignment %u, %u\n",
1681 seg_capa->offset_align_log2);
1685 if (mpl->private_data_size <
1686 sizeof(struct rte_pktmbuf_pool_private)) {
1688 "%s private_data_size %u < %u\n",
1689 mpl->name, mpl->private_data_size,
1690 (unsigned int)sizeof
1691 (struct rte_pktmbuf_pool_private));
1694 offset += seg_idx != 0 ? 0 : RTE_PKTMBUF_HEADROOM;
1695 *mbp_buf_size = rte_pktmbuf_data_room_size(mpl);
1696 length = length != 0 ? length : *mbp_buf_size;
1697 if (*mbp_buf_size < length + offset) {
1699 "%s mbuf_data_room_size %u < %u (segment length=%u + segment offset=%u)\n",
1700 mpl->name, *mbp_buf_size,
1701 length + offset, length, offset);
1709 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1710 uint16_t nb_rx_desc, unsigned int socket_id,
1711 const struct rte_eth_rxconf *rx_conf,
1712 struct rte_mempool *mp)
1715 uint32_t mbp_buf_size;
1716 struct rte_eth_dev *dev;
1717 struct rte_eth_dev_info dev_info;
1718 struct rte_eth_rxconf local_conf;
1720 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1721 dev = &rte_eth_devices[port_id];
1723 if (rx_queue_id >= dev->data->nb_rx_queues) {
1724 RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u\n", rx_queue_id);
1728 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1730 ret = rte_eth_dev_info_get(port_id, &dev_info);
1735 /* Single pool configuration check. */
1736 if (rx_conf != NULL && rx_conf->rx_nseg != 0) {
1738 "Ambiguous segment configuration\n");
1742 * Check the size of the mbuf data buffer, this value
1743 * must be provided in the private data of the memory pool.
1744 * First check that the memory pool(s) has a valid private data.
1746 if (mp->private_data_size <
1747 sizeof(struct rte_pktmbuf_pool_private)) {
1748 RTE_ETHDEV_LOG(ERR, "%s private_data_size %u < %u\n",
1749 mp->name, mp->private_data_size,
1751 sizeof(struct rte_pktmbuf_pool_private));
1754 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1755 if (mbp_buf_size < dev_info.min_rx_bufsize +
1756 RTE_PKTMBUF_HEADROOM) {
1758 "%s mbuf_data_room_size %u < %u (RTE_PKTMBUF_HEADROOM=%u + min_rx_bufsize(dev)=%u)\n",
1759 mp->name, mbp_buf_size,
1760 RTE_PKTMBUF_HEADROOM +
1761 dev_info.min_rx_bufsize,
1762 RTE_PKTMBUF_HEADROOM,
1763 dev_info.min_rx_bufsize);
1767 const struct rte_eth_rxseg_split *rx_seg;
1770 /* Extended multi-segment configuration check. */
1771 if (rx_conf == NULL || rx_conf->rx_seg == NULL || rx_conf->rx_nseg == 0) {
1773 "Memory pool is null and no extended configuration provided\n");
1777 rx_seg = (const struct rte_eth_rxseg_split *)rx_conf->rx_seg;
1778 n_seg = rx_conf->rx_nseg;
1780 if (rx_conf->offloads & RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT) {
1781 ret = rte_eth_rx_queue_check_split(rx_seg, n_seg,
1787 RTE_ETHDEV_LOG(ERR, "No Rx segmentation offload configured\n");
1792 /* Use default specified by driver, if nb_rx_desc is zero */
1793 if (nb_rx_desc == 0) {
1794 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1795 /* If driver default is also zero, fall back on EAL default */
1796 if (nb_rx_desc == 0)
1797 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1800 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1801 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1802 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1805 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1806 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1807 dev_info.rx_desc_lim.nb_min,
1808 dev_info.rx_desc_lim.nb_align);
1812 if (dev->data->dev_started &&
1813 !(dev_info.dev_capa &
1814 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1817 if (dev->data->dev_started &&
1818 (dev->data->rx_queue_state[rx_queue_id] !=
1819 RTE_ETH_QUEUE_STATE_STOPPED))
1822 eth_dev_rxq_release(dev, rx_queue_id);
1824 if (rx_conf == NULL)
1825 rx_conf = &dev_info.default_rxconf;
1827 local_conf = *rx_conf;
1830 * If an offloading has already been enabled in
1831 * rte_eth_dev_configure(), it has been enabled on all queues,
1832 * so there is no need to enable it in this queue again.
1833 * The local_conf.offloads input to underlying PMD only carries
1834 * those offloadings which are only enabled on this queue and
1835 * not enabled on all queues.
1837 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1840 * New added offloadings for this queue are those not enabled in
1841 * rte_eth_dev_configure() and they must be per-queue type.
1842 * A pure per-port offloading can't be enabled on a queue while
1843 * disabled on another queue. A pure per-port offloading can't
1844 * be enabled for any queue as new added one if it hasn't been
1845 * enabled in rte_eth_dev_configure().
1847 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1848 local_conf.offloads) {
1850 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1851 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
1852 port_id, rx_queue_id, local_conf.offloads,
1853 dev_info.rx_queue_offload_capa,
1858 if (local_conf.share_group > 0 &&
1859 (dev_info.dev_capa & RTE_ETH_DEV_CAPA_RXQ_SHARE) == 0) {
1861 "Ethdev port_id=%d rx_queue_id=%d, enabled share_group=%hu while device doesn't support Rx queue share\n",
1862 port_id, rx_queue_id, local_conf.share_group);
1867 * If LRO is enabled, check that the maximum aggregated packet
1868 * size is supported by the configured device.
1870 /* Get the real Ethernet overhead length */
1871 if (local_conf.offloads & RTE_ETH_RX_OFFLOAD_TCP_LRO) {
1872 uint32_t overhead_len;
1873 uint32_t max_rx_pktlen;
1876 overhead_len = eth_dev_get_overhead_len(dev_info.max_rx_pktlen,
1878 max_rx_pktlen = dev->data->mtu + overhead_len;
1879 if (dev->data->dev_conf.rxmode.max_lro_pkt_size == 0)
1880 dev->data->dev_conf.rxmode.max_lro_pkt_size = max_rx_pktlen;
1881 ret = eth_dev_check_lro_pkt_size(port_id,
1882 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1884 dev_info.max_lro_pkt_size);
1889 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1890 socket_id, &local_conf, mp);
1892 if (!dev->data->min_rx_buf_size ||
1893 dev->data->min_rx_buf_size > mbp_buf_size)
1894 dev->data->min_rx_buf_size = mbp_buf_size;
1897 rte_ethdev_trace_rxq_setup(port_id, rx_queue_id, nb_rx_desc, mp,
1899 return eth_err(port_id, ret);
1903 rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1904 uint16_t nb_rx_desc,
1905 const struct rte_eth_hairpin_conf *conf)
1908 struct rte_eth_dev *dev;
1909 struct rte_eth_hairpin_cap cap;
1913 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1914 dev = &rte_eth_devices[port_id];
1916 if (rx_queue_id >= dev->data->nb_rx_queues) {
1917 RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u\n", rx_queue_id);
1923 "Cannot setup ethdev port %u Rx hairpin queue from NULL config\n",
1928 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
1931 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_hairpin_queue_setup,
1933 /* if nb_rx_desc is zero use max number of desc from the driver. */
1934 if (nb_rx_desc == 0)
1935 nb_rx_desc = cap.max_nb_desc;
1936 if (nb_rx_desc > cap.max_nb_desc) {
1938 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu",
1939 nb_rx_desc, cap.max_nb_desc);
1942 if (conf->peer_count > cap.max_rx_2_tx) {
1944 "Invalid value for number of peers for Rx queue(=%u), should be: <= %hu",
1945 conf->peer_count, cap.max_rx_2_tx);
1948 if (conf->peer_count == 0) {
1950 "Invalid value for number of peers for Rx queue(=%u), should be: > 0",
1954 for (i = 0, count = 0; i < dev->data->nb_rx_queues &&
1955 cap.max_nb_queues != UINT16_MAX; i++) {
1956 if (i == rx_queue_id || rte_eth_dev_is_rx_hairpin_queue(dev, i))
1959 if (count > cap.max_nb_queues) {
1960 RTE_ETHDEV_LOG(ERR, "To many Rx hairpin queues max is %d",
1964 if (dev->data->dev_started)
1966 eth_dev_rxq_release(dev, rx_queue_id);
1967 ret = (*dev->dev_ops->rx_hairpin_queue_setup)(dev, rx_queue_id,
1970 dev->data->rx_queue_state[rx_queue_id] =
1971 RTE_ETH_QUEUE_STATE_HAIRPIN;
1972 return eth_err(port_id, ret);
1976 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1977 uint16_t nb_tx_desc, unsigned int socket_id,
1978 const struct rte_eth_txconf *tx_conf)
1980 struct rte_eth_dev *dev;
1981 struct rte_eth_dev_info dev_info;
1982 struct rte_eth_txconf local_conf;
1985 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1986 dev = &rte_eth_devices[port_id];
1988 if (tx_queue_id >= dev->data->nb_tx_queues) {
1989 RTE_ETHDEV_LOG(ERR, "Invalid Tx queue_id=%u\n", tx_queue_id);
1993 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1995 ret = rte_eth_dev_info_get(port_id, &dev_info);
1999 /* Use default specified by driver, if nb_tx_desc is zero */
2000 if (nb_tx_desc == 0) {
2001 nb_tx_desc = dev_info.default_txportconf.ring_size;
2002 /* If driver default is zero, fall back on EAL default */
2003 if (nb_tx_desc == 0)
2004 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
2006 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
2007 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
2008 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
2010 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
2011 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
2012 dev_info.tx_desc_lim.nb_min,
2013 dev_info.tx_desc_lim.nb_align);
2017 if (dev->data->dev_started &&
2018 !(dev_info.dev_capa &
2019 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
2022 if (dev->data->dev_started &&
2023 (dev->data->tx_queue_state[tx_queue_id] !=
2024 RTE_ETH_QUEUE_STATE_STOPPED))
2027 eth_dev_txq_release(dev, tx_queue_id);
2029 if (tx_conf == NULL)
2030 tx_conf = &dev_info.default_txconf;
2032 local_conf = *tx_conf;
2035 * If an offloading has already been enabled in
2036 * rte_eth_dev_configure(), it has been enabled on all queues,
2037 * so there is no need to enable it in this queue again.
2038 * The local_conf.offloads input to underlying PMD only carries
2039 * those offloadings which are only enabled on this queue and
2040 * not enabled on all queues.
2042 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
2045 * New added offloadings for this queue are those not enabled in
2046 * rte_eth_dev_configure() and they must be per-queue type.
2047 * A pure per-port offloading can't be enabled on a queue while
2048 * disabled on another queue. A pure per-port offloading can't
2049 * be enabled for any queue as new added one if it hasn't been
2050 * enabled in rte_eth_dev_configure().
2052 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
2053 local_conf.offloads) {
2055 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
2056 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
2057 port_id, tx_queue_id, local_conf.offloads,
2058 dev_info.tx_queue_offload_capa,
2063 rte_ethdev_trace_txq_setup(port_id, tx_queue_id, nb_tx_desc, tx_conf);
2064 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
2065 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
2069 rte_eth_tx_hairpin_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2070 uint16_t nb_tx_desc,
2071 const struct rte_eth_hairpin_conf *conf)
2073 struct rte_eth_dev *dev;
2074 struct rte_eth_hairpin_cap cap;
2079 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2080 dev = &rte_eth_devices[port_id];
2082 if (tx_queue_id >= dev->data->nb_tx_queues) {
2083 RTE_ETHDEV_LOG(ERR, "Invalid Tx queue_id=%u\n", tx_queue_id);
2089 "Cannot setup ethdev port %u Tx hairpin queue from NULL config\n",
2094 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
2097 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_hairpin_queue_setup,
2099 /* if nb_rx_desc is zero use max number of desc from the driver. */
2100 if (nb_tx_desc == 0)
2101 nb_tx_desc = cap.max_nb_desc;
2102 if (nb_tx_desc > cap.max_nb_desc) {
2104 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu",
2105 nb_tx_desc, cap.max_nb_desc);
2108 if (conf->peer_count > cap.max_tx_2_rx) {
2110 "Invalid value for number of peers for Tx queue(=%u), should be: <= %hu",
2111 conf->peer_count, cap.max_tx_2_rx);
2114 if (conf->peer_count == 0) {
2116 "Invalid value for number of peers for Tx queue(=%u), should be: > 0",
2120 for (i = 0, count = 0; i < dev->data->nb_tx_queues &&
2121 cap.max_nb_queues != UINT16_MAX; i++) {
2122 if (i == tx_queue_id || rte_eth_dev_is_tx_hairpin_queue(dev, i))
2125 if (count > cap.max_nb_queues) {
2126 RTE_ETHDEV_LOG(ERR, "To many Tx hairpin queues max is %d",
2130 if (dev->data->dev_started)
2132 eth_dev_txq_release(dev, tx_queue_id);
2133 ret = (*dev->dev_ops->tx_hairpin_queue_setup)
2134 (dev, tx_queue_id, nb_tx_desc, conf);
2136 dev->data->tx_queue_state[tx_queue_id] =
2137 RTE_ETH_QUEUE_STATE_HAIRPIN;
2138 return eth_err(port_id, ret);
2142 rte_eth_hairpin_bind(uint16_t tx_port, uint16_t rx_port)
2144 struct rte_eth_dev *dev;
2147 RTE_ETH_VALID_PORTID_OR_ERR_RET(tx_port, -ENODEV);
2148 dev = &rte_eth_devices[tx_port];
2150 if (dev->data->dev_started == 0) {
2151 RTE_ETHDEV_LOG(ERR, "Tx port %d is not started\n", tx_port);
2155 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_bind, -ENOTSUP);
2156 ret = (*dev->dev_ops->hairpin_bind)(dev, rx_port);
2158 RTE_ETHDEV_LOG(ERR, "Failed to bind hairpin Tx %d"
2159 " to Rx %d (%d - all ports)\n",
2160 tx_port, rx_port, RTE_MAX_ETHPORTS);
2166 rte_eth_hairpin_unbind(uint16_t tx_port, uint16_t rx_port)
2168 struct rte_eth_dev *dev;
2171 RTE_ETH_VALID_PORTID_OR_ERR_RET(tx_port, -ENODEV);
2172 dev = &rte_eth_devices[tx_port];
2174 if (dev->data->dev_started == 0) {
2175 RTE_ETHDEV_LOG(ERR, "Tx port %d is already stopped\n", tx_port);
2179 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_unbind, -ENOTSUP);
2180 ret = (*dev->dev_ops->hairpin_unbind)(dev, rx_port);
2182 RTE_ETHDEV_LOG(ERR, "Failed to unbind hairpin Tx %d"
2183 " from Rx %d (%d - all ports)\n",
2184 tx_port, rx_port, RTE_MAX_ETHPORTS);
2190 rte_eth_hairpin_get_peer_ports(uint16_t port_id, uint16_t *peer_ports,
2191 size_t len, uint32_t direction)
2193 struct rte_eth_dev *dev;
2196 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2197 dev = &rte_eth_devices[port_id];
2199 if (peer_ports == NULL) {
2201 "Cannot get ethdev port %u hairpin peer ports to NULL\n",
2208 "Cannot get ethdev port %u hairpin peer ports to array with zero size\n",
2213 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_get_peer_ports,
2216 ret = (*dev->dev_ops->hairpin_get_peer_ports)(dev, peer_ports,
2219 RTE_ETHDEV_LOG(ERR, "Failed to get %d hairpin peer %s ports\n",
2220 port_id, direction ? "Rx" : "Tx");
2226 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
2227 void *userdata __rte_unused)
2229 rte_pktmbuf_free_bulk(pkts, unsent);
2233 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
2236 uint64_t *count = userdata;
2238 rte_pktmbuf_free_bulk(pkts, unsent);
2243 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
2244 buffer_tx_error_fn cbfn, void *userdata)
2246 if (buffer == NULL) {
2248 "Cannot set Tx buffer error callback to NULL buffer\n");
2252 buffer->error_callback = cbfn;
2253 buffer->error_userdata = userdata;
2258 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
2262 if (buffer == NULL) {
2263 RTE_ETHDEV_LOG(ERR, "Cannot initialize NULL buffer\n");
2267 buffer->size = size;
2268 if (buffer->error_callback == NULL) {
2269 ret = rte_eth_tx_buffer_set_err_callback(
2270 buffer, rte_eth_tx_buffer_drop_callback, NULL);
2277 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
2279 struct rte_eth_dev *dev;
2282 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2283 dev = &rte_eth_devices[port_id];
2285 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
2287 /* Call driver to free pending mbufs. */
2288 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
2290 return eth_err(port_id, ret);
2294 rte_eth_promiscuous_enable(uint16_t port_id)
2296 struct rte_eth_dev *dev;
2299 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2300 dev = &rte_eth_devices[port_id];
2302 if (dev->data->promiscuous == 1)
2305 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_enable, -ENOTSUP);
2307 diag = (*dev->dev_ops->promiscuous_enable)(dev);
2308 dev->data->promiscuous = (diag == 0) ? 1 : 0;
2310 return eth_err(port_id, diag);
2314 rte_eth_promiscuous_disable(uint16_t port_id)
2316 struct rte_eth_dev *dev;
2319 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2320 dev = &rte_eth_devices[port_id];
2322 if (dev->data->promiscuous == 0)
2325 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_disable, -ENOTSUP);
2327 dev->data->promiscuous = 0;
2328 diag = (*dev->dev_ops->promiscuous_disable)(dev);
2330 dev->data->promiscuous = 1;
2332 return eth_err(port_id, diag);
2336 rte_eth_promiscuous_get(uint16_t port_id)
2338 struct rte_eth_dev *dev;
2340 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2341 dev = &rte_eth_devices[port_id];
2343 return dev->data->promiscuous;
2347 rte_eth_allmulticast_enable(uint16_t port_id)
2349 struct rte_eth_dev *dev;
2352 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2353 dev = &rte_eth_devices[port_id];
2355 if (dev->data->all_multicast == 1)
2358 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_enable, -ENOTSUP);
2359 diag = (*dev->dev_ops->allmulticast_enable)(dev);
2360 dev->data->all_multicast = (diag == 0) ? 1 : 0;
2362 return eth_err(port_id, diag);
2366 rte_eth_allmulticast_disable(uint16_t port_id)
2368 struct rte_eth_dev *dev;
2371 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2372 dev = &rte_eth_devices[port_id];
2374 if (dev->data->all_multicast == 0)
2377 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_disable, -ENOTSUP);
2378 dev->data->all_multicast = 0;
2379 diag = (*dev->dev_ops->allmulticast_disable)(dev);
2381 dev->data->all_multicast = 1;
2383 return eth_err(port_id, diag);
2387 rte_eth_allmulticast_get(uint16_t port_id)
2389 struct rte_eth_dev *dev;
2391 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2392 dev = &rte_eth_devices[port_id];
2394 return dev->data->all_multicast;
2398 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
2400 struct rte_eth_dev *dev;
2402 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2403 dev = &rte_eth_devices[port_id];
2405 if (eth_link == NULL) {
2406 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u link to NULL\n",
2411 if (dev->data->dev_conf.intr_conf.lsc && dev->data->dev_started)
2412 rte_eth_linkstatus_get(dev, eth_link);
2414 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2415 (*dev->dev_ops->link_update)(dev, 1);
2416 *eth_link = dev->data->dev_link;
2423 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
2425 struct rte_eth_dev *dev;
2427 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2428 dev = &rte_eth_devices[port_id];
2430 if (eth_link == NULL) {
2431 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u link to NULL\n",
2436 if (dev->data->dev_conf.intr_conf.lsc && dev->data->dev_started)
2437 rte_eth_linkstatus_get(dev, eth_link);
2439 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2440 (*dev->dev_ops->link_update)(dev, 0);
2441 *eth_link = dev->data->dev_link;
2448 rte_eth_link_speed_to_str(uint32_t link_speed)
2450 switch (link_speed) {
2451 case RTE_ETH_SPEED_NUM_NONE: return "None";
2452 case RTE_ETH_SPEED_NUM_10M: return "10 Mbps";
2453 case RTE_ETH_SPEED_NUM_100M: return "100 Mbps";
2454 case RTE_ETH_SPEED_NUM_1G: return "1 Gbps";
2455 case RTE_ETH_SPEED_NUM_2_5G: return "2.5 Gbps";
2456 case RTE_ETH_SPEED_NUM_5G: return "5 Gbps";
2457 case RTE_ETH_SPEED_NUM_10G: return "10 Gbps";
2458 case RTE_ETH_SPEED_NUM_20G: return "20 Gbps";
2459 case RTE_ETH_SPEED_NUM_25G: return "25 Gbps";
2460 case RTE_ETH_SPEED_NUM_40G: return "40 Gbps";
2461 case RTE_ETH_SPEED_NUM_50G: return "50 Gbps";
2462 case RTE_ETH_SPEED_NUM_56G: return "56 Gbps";
2463 case RTE_ETH_SPEED_NUM_100G: return "100 Gbps";
2464 case RTE_ETH_SPEED_NUM_200G: return "200 Gbps";
2465 case RTE_ETH_SPEED_NUM_UNKNOWN: return "Unknown";
2466 default: return "Invalid";
2471 rte_eth_link_to_str(char *str, size_t len, const struct rte_eth_link *eth_link)
2474 RTE_ETHDEV_LOG(ERR, "Cannot convert link to NULL string\n");
2480 "Cannot convert link to string with zero size\n");
2484 if (eth_link == NULL) {
2485 RTE_ETHDEV_LOG(ERR, "Cannot convert to string from NULL link\n");
2489 if (eth_link->link_status == RTE_ETH_LINK_DOWN)
2490 return snprintf(str, len, "Link down");
2492 return snprintf(str, len, "Link up at %s %s %s",
2493 rte_eth_link_speed_to_str(eth_link->link_speed),
2494 (eth_link->link_duplex == RTE_ETH_LINK_FULL_DUPLEX) ?
2496 (eth_link->link_autoneg == RTE_ETH_LINK_AUTONEG) ?
2497 "Autoneg" : "Fixed");
2501 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
2503 struct rte_eth_dev *dev;
2505 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2506 dev = &rte_eth_devices[port_id];
2508 if (stats == NULL) {
2509 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u stats to NULL\n",
2514 memset(stats, 0, sizeof(*stats));
2516 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
2517 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
2518 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
2522 rte_eth_stats_reset(uint16_t port_id)
2524 struct rte_eth_dev *dev;
2527 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2528 dev = &rte_eth_devices[port_id];
2530 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
2531 ret = (*dev->dev_ops->stats_reset)(dev);
2533 return eth_err(port_id, ret);
2535 dev->data->rx_mbuf_alloc_failed = 0;
2541 eth_dev_get_xstats_basic_count(struct rte_eth_dev *dev)
2543 uint16_t nb_rxqs, nb_txqs;
2546 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2547 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2549 count = RTE_NB_STATS;
2550 if (dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS) {
2551 count += nb_rxqs * RTE_NB_RXQ_STATS;
2552 count += nb_txqs * RTE_NB_TXQ_STATS;
2559 eth_dev_get_xstats_count(uint16_t port_id)
2561 struct rte_eth_dev *dev;
2564 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2565 dev = &rte_eth_devices[port_id];
2566 if (dev->dev_ops->xstats_get_names != NULL) {
2567 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2569 return eth_err(port_id, count);
2574 count += eth_dev_get_xstats_basic_count(dev);
2580 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2583 int cnt_xstats, idx_xstat;
2585 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2587 if (xstat_name == NULL) {
2589 "Cannot get ethdev port %u xstats ID from NULL xstat name\n",
2596 "Cannot get ethdev port %u xstats ID to NULL\n",
2602 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2603 if (cnt_xstats < 0) {
2604 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2608 /* Get id-name lookup table */
2609 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2611 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2612 port_id, xstats_names, cnt_xstats, NULL)) {
2613 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2617 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2618 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2627 /* retrieve basic stats names */
2629 eth_basic_stats_get_names(struct rte_eth_dev *dev,
2630 struct rte_eth_xstat_name *xstats_names)
2632 int cnt_used_entries = 0;
2633 uint32_t idx, id_queue;
2636 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2637 strlcpy(xstats_names[cnt_used_entries].name,
2638 eth_dev_stats_strings[idx].name,
2639 sizeof(xstats_names[0].name));
2643 if ((dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS) == 0)
2644 return cnt_used_entries;
2646 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2647 for (id_queue = 0; id_queue < num_q; id_queue++) {
2648 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2649 snprintf(xstats_names[cnt_used_entries].name,
2650 sizeof(xstats_names[0].name),
2652 id_queue, eth_dev_rxq_stats_strings[idx].name);
2657 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2658 for (id_queue = 0; id_queue < num_q; id_queue++) {
2659 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2660 snprintf(xstats_names[cnt_used_entries].name,
2661 sizeof(xstats_names[0].name),
2663 id_queue, eth_dev_txq_stats_strings[idx].name);
2667 return cnt_used_entries;
2670 /* retrieve ethdev extended statistics names */
2672 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2673 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2676 struct rte_eth_xstat_name *xstats_names_copy;
2677 unsigned int no_basic_stat_requested = 1;
2678 unsigned int no_ext_stat_requested = 1;
2679 unsigned int expected_entries;
2680 unsigned int basic_count;
2681 struct rte_eth_dev *dev;
2685 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2686 dev = &rte_eth_devices[port_id];
2688 basic_count = eth_dev_get_xstats_basic_count(dev);
2689 ret = eth_dev_get_xstats_count(port_id);
2692 expected_entries = (unsigned int)ret;
2694 /* Return max number of stats if no ids given */
2697 return expected_entries;
2698 else if (xstats_names && size < expected_entries)
2699 return expected_entries;
2702 if (ids && !xstats_names)
2705 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2706 uint64_t ids_copy[size];
2708 for (i = 0; i < size; i++) {
2709 if (ids[i] < basic_count) {
2710 no_basic_stat_requested = 0;
2715 * Convert ids to xstats ids that PMD knows.
2716 * ids known by user are basic + extended stats.
2718 ids_copy[i] = ids[i] - basic_count;
2721 if (no_basic_stat_requested)
2722 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2723 ids_copy, xstats_names, size);
2726 /* Retrieve all stats */
2728 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2730 if (num_stats < 0 || num_stats > (int)expected_entries)
2733 return expected_entries;
2736 xstats_names_copy = calloc(expected_entries,
2737 sizeof(struct rte_eth_xstat_name));
2739 if (!xstats_names_copy) {
2740 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2745 for (i = 0; i < size; i++) {
2746 if (ids[i] >= basic_count) {
2747 no_ext_stat_requested = 0;
2753 /* Fill xstats_names_copy structure */
2754 if (ids && no_ext_stat_requested) {
2755 eth_basic_stats_get_names(dev, xstats_names_copy);
2757 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2760 free(xstats_names_copy);
2766 for (i = 0; i < size; i++) {
2767 if (ids[i] >= expected_entries) {
2768 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2769 free(xstats_names_copy);
2772 xstats_names[i] = xstats_names_copy[ids[i]];
2775 free(xstats_names_copy);
2780 rte_eth_xstats_get_names(uint16_t port_id,
2781 struct rte_eth_xstat_name *xstats_names,
2784 struct rte_eth_dev *dev;
2785 int cnt_used_entries;
2786 int cnt_expected_entries;
2787 int cnt_driver_entries;
2789 cnt_expected_entries = eth_dev_get_xstats_count(port_id);
2790 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2791 (int)size < cnt_expected_entries)
2792 return cnt_expected_entries;
2794 /* port_id checked in eth_dev_get_xstats_count() */
2795 dev = &rte_eth_devices[port_id];
2797 cnt_used_entries = eth_basic_stats_get_names(dev, xstats_names);
2799 if (dev->dev_ops->xstats_get_names != NULL) {
2800 /* If there are any driver-specific xstats, append them
2803 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2805 xstats_names + cnt_used_entries,
2806 size - cnt_used_entries);
2807 if (cnt_driver_entries < 0)
2808 return eth_err(port_id, cnt_driver_entries);
2809 cnt_used_entries += cnt_driver_entries;
2812 return cnt_used_entries;
2817 eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2819 struct rte_eth_dev *dev;
2820 struct rte_eth_stats eth_stats;
2821 unsigned int count = 0, i, q;
2822 uint64_t val, *stats_ptr;
2823 uint16_t nb_rxqs, nb_txqs;
2826 ret = rte_eth_stats_get(port_id, ð_stats);
2830 dev = &rte_eth_devices[port_id];
2832 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2833 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2836 for (i = 0; i < RTE_NB_STATS; i++) {
2837 stats_ptr = RTE_PTR_ADD(ð_stats,
2838 eth_dev_stats_strings[i].offset);
2840 xstats[count++].value = val;
2843 if ((dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS) == 0)
2847 for (q = 0; q < nb_rxqs; q++) {
2848 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2849 stats_ptr = RTE_PTR_ADD(ð_stats,
2850 eth_dev_rxq_stats_strings[i].offset +
2851 q * sizeof(uint64_t));
2853 xstats[count++].value = val;
2858 for (q = 0; q < nb_txqs; q++) {
2859 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2860 stats_ptr = RTE_PTR_ADD(ð_stats,
2861 eth_dev_txq_stats_strings[i].offset +
2862 q * sizeof(uint64_t));
2864 xstats[count++].value = val;
2870 /* retrieve ethdev extended statistics */
2872 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2873 uint64_t *values, unsigned int size)
2875 unsigned int no_basic_stat_requested = 1;
2876 unsigned int no_ext_stat_requested = 1;
2877 unsigned int num_xstats_filled;
2878 unsigned int basic_count;
2879 uint16_t expected_entries;
2880 struct rte_eth_dev *dev;
2884 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2885 dev = &rte_eth_devices[port_id];
2887 ret = eth_dev_get_xstats_count(port_id);
2890 expected_entries = (uint16_t)ret;
2891 struct rte_eth_xstat xstats[expected_entries];
2892 basic_count = eth_dev_get_xstats_basic_count(dev);
2894 /* Return max number of stats if no ids given */
2897 return expected_entries;
2898 else if (values && size < expected_entries)
2899 return expected_entries;
2905 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2906 unsigned int basic_count = eth_dev_get_xstats_basic_count(dev);
2907 uint64_t ids_copy[size];
2909 for (i = 0; i < size; i++) {
2910 if (ids[i] < basic_count) {
2911 no_basic_stat_requested = 0;
2916 * Convert ids to xstats ids that PMD knows.
2917 * ids known by user are basic + extended stats.
2919 ids_copy[i] = ids[i] - basic_count;
2922 if (no_basic_stat_requested)
2923 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2928 for (i = 0; i < size; i++) {
2929 if (ids[i] >= basic_count) {
2930 no_ext_stat_requested = 0;
2936 /* Fill the xstats structure */
2937 if (ids && no_ext_stat_requested)
2938 ret = eth_basic_stats_get(port_id, xstats);
2940 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2944 num_xstats_filled = (unsigned int)ret;
2946 /* Return all stats */
2948 for (i = 0; i < num_xstats_filled; i++)
2949 values[i] = xstats[i].value;
2950 return expected_entries;
2954 for (i = 0; i < size; i++) {
2955 if (ids[i] >= expected_entries) {
2956 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2959 values[i] = xstats[ids[i]].value;
2965 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2968 struct rte_eth_dev *dev;
2969 unsigned int count, i;
2970 signed int xcount = 0;
2973 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2974 if (xstats == NULL && n > 0)
2976 dev = &rte_eth_devices[port_id];
2978 count = eth_dev_get_xstats_basic_count(dev);
2980 /* implemented by the driver */
2981 if (dev->dev_ops->xstats_get != NULL) {
2982 /* Retrieve the xstats from the driver at the end of the
2985 xcount = (*dev->dev_ops->xstats_get)(dev,
2986 (n > count) ? xstats + count : NULL,
2987 (n > count) ? n - count : 0);
2990 return eth_err(port_id, xcount);
2993 if (n < count + xcount || xstats == NULL)
2994 return count + xcount;
2996 /* now fill the xstats structure */
2997 ret = eth_basic_stats_get(port_id, xstats);
3002 for (i = 0; i < count; i++)
3004 /* add an offset to driver-specific stats */
3005 for ( ; i < count + xcount; i++)
3006 xstats[i].id += count;
3008 return count + xcount;
3011 /* reset ethdev extended statistics */
3013 rte_eth_xstats_reset(uint16_t port_id)
3015 struct rte_eth_dev *dev;
3017 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3018 dev = &rte_eth_devices[port_id];
3020 /* implemented by the driver */
3021 if (dev->dev_ops->xstats_reset != NULL)
3022 return eth_err(port_id, (*dev->dev_ops->xstats_reset)(dev));
3024 /* fallback to default */
3025 return rte_eth_stats_reset(port_id);
3029 eth_dev_set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id,
3030 uint8_t stat_idx, uint8_t is_rx)
3032 struct rte_eth_dev *dev;
3034 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3035 dev = &rte_eth_devices[port_id];
3037 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
3040 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
3043 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
3046 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
3047 return (*dev->dev_ops->queue_stats_mapping_set) (dev, queue_id, stat_idx, is_rx);
3051 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
3054 return eth_err(port_id, eth_dev_set_queue_stats_mapping(port_id,
3056 stat_idx, STAT_QMAP_TX));
3060 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
3063 return eth_err(port_id, eth_dev_set_queue_stats_mapping(port_id,
3065 stat_idx, STAT_QMAP_RX));
3069 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
3071 struct rte_eth_dev *dev;
3073 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3074 dev = &rte_eth_devices[port_id];
3076 if (fw_version == NULL && fw_size > 0) {
3078 "Cannot get ethdev port %u FW version to NULL when string size is non zero\n",
3083 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
3084 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
3085 fw_version, fw_size));
3089 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
3091 struct rte_eth_dev *dev;
3092 const struct rte_eth_desc_lim lim = {
3093 .nb_max = UINT16_MAX,
3096 .nb_seg_max = UINT16_MAX,
3097 .nb_mtu_seg_max = UINT16_MAX,
3101 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3102 dev = &rte_eth_devices[port_id];
3104 if (dev_info == NULL) {
3105 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u info to NULL\n",
3111 * Init dev_info before port_id check since caller does not have
3112 * return status and does not know if get is successful or not.
3114 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
3115 dev_info->switch_info.domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
3117 dev_info->rx_desc_lim = lim;
3118 dev_info->tx_desc_lim = lim;
3119 dev_info->device = dev->device;
3120 dev_info->min_mtu = RTE_ETHER_MIN_LEN - RTE_ETHER_HDR_LEN -
3122 dev_info->max_mtu = UINT16_MAX;
3124 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
3125 diag = (*dev->dev_ops->dev_infos_get)(dev, dev_info);
3127 /* Cleanup already filled in device information */
3128 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
3129 return eth_err(port_id, diag);
3132 /* Maximum number of queues should be <= RTE_MAX_QUEUES_PER_PORT */
3133 dev_info->max_rx_queues = RTE_MIN(dev_info->max_rx_queues,
3134 RTE_MAX_QUEUES_PER_PORT);
3135 dev_info->max_tx_queues = RTE_MIN(dev_info->max_tx_queues,
3136 RTE_MAX_QUEUES_PER_PORT);
3138 dev_info->driver_name = dev->device->driver->name;
3139 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
3140 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
3142 dev_info->dev_flags = &dev->data->dev_flags;
3148 rte_eth_dev_conf_get(uint16_t port_id, struct rte_eth_conf *dev_conf)
3150 struct rte_eth_dev *dev;
3152 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3153 dev = &rte_eth_devices[port_id];
3155 if (dev_conf == NULL) {
3157 "Cannot get ethdev port %u configuration to NULL\n",
3162 memcpy(dev_conf, &dev->data->dev_conf, sizeof(struct rte_eth_conf));
3168 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
3169 uint32_t *ptypes, int num)
3172 struct rte_eth_dev *dev;
3173 const uint32_t *all_ptypes;
3175 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3176 dev = &rte_eth_devices[port_id];
3178 if (ptypes == NULL && num > 0) {
3180 "Cannot get ethdev port %u supported packet types to NULL when array size is non zero\n",
3185 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
3186 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3191 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
3192 if (all_ptypes[i] & ptype_mask) {
3194 ptypes[j] = all_ptypes[i];
3202 rte_eth_dev_set_ptypes(uint16_t port_id, uint32_t ptype_mask,
3203 uint32_t *set_ptypes, unsigned int num)
3205 const uint32_t valid_ptype_masks[] = {
3209 RTE_PTYPE_TUNNEL_MASK,
3210 RTE_PTYPE_INNER_L2_MASK,
3211 RTE_PTYPE_INNER_L3_MASK,
3212 RTE_PTYPE_INNER_L4_MASK,
3214 const uint32_t *all_ptypes;
3215 struct rte_eth_dev *dev;
3216 uint32_t unused_mask;
3220 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3221 dev = &rte_eth_devices[port_id];
3223 if (num > 0 && set_ptypes == NULL) {
3225 "Cannot get ethdev port %u set packet types to NULL when array size is non zero\n",
3230 if (*dev->dev_ops->dev_supported_ptypes_get == NULL ||
3231 *dev->dev_ops->dev_ptypes_set == NULL) {
3236 if (ptype_mask == 0) {
3237 ret = (*dev->dev_ops->dev_ptypes_set)(dev,
3242 unused_mask = ptype_mask;
3243 for (i = 0; i < RTE_DIM(valid_ptype_masks); i++) {
3244 uint32_t mask = ptype_mask & valid_ptype_masks[i];
3245 if (mask && mask != valid_ptype_masks[i]) {
3249 unused_mask &= ~valid_ptype_masks[i];
3257 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3258 if (all_ptypes == NULL) {
3264 * Accommodate as many set_ptypes as possible. If the supplied
3265 * set_ptypes array is insufficient fill it partially.
3267 for (i = 0, j = 0; set_ptypes != NULL &&
3268 (all_ptypes[i] != RTE_PTYPE_UNKNOWN); ++i) {
3269 if (ptype_mask & all_ptypes[i]) {
3271 set_ptypes[j] = all_ptypes[i];
3279 if (set_ptypes != NULL && j < num)
3280 set_ptypes[j] = RTE_PTYPE_UNKNOWN;
3282 return (*dev->dev_ops->dev_ptypes_set)(dev, ptype_mask);
3286 set_ptypes[0] = RTE_PTYPE_UNKNOWN;
3292 rte_eth_macaddrs_get(uint16_t port_id, struct rte_ether_addr *ma,
3296 struct rte_eth_dev *dev;
3297 struct rte_eth_dev_info dev_info;
3300 RTE_ETHDEV_LOG(ERR, "%s: invalid parameters\n", __func__);
3304 /* will check for us that port_id is a valid one */
3305 ret = rte_eth_dev_info_get(port_id, &dev_info);
3309 dev = &rte_eth_devices[port_id];
3310 num = RTE_MIN(dev_info.max_mac_addrs, num);
3311 memcpy(ma, dev->data->mac_addrs, num * sizeof(ma[0]));
3317 rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
3319 struct rte_eth_dev *dev;
3321 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3322 dev = &rte_eth_devices[port_id];
3324 if (mac_addr == NULL) {
3326 "Cannot get ethdev port %u MAC address to NULL\n",
3331 rte_ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
3337 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
3339 struct rte_eth_dev *dev;
3341 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3342 dev = &rte_eth_devices[port_id];
3345 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u MTU to NULL\n",
3350 *mtu = dev->data->mtu;
3355 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
3358 struct rte_eth_dev_info dev_info;
3359 struct rte_eth_dev *dev;
3361 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3362 dev = &rte_eth_devices[port_id];
3363 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
3366 * Check if the device supports dev_infos_get, if it does not
3367 * skip min_mtu/max_mtu validation here as this requires values
3368 * that are populated within the call to rte_eth_dev_info_get()
3369 * which relies on dev->dev_ops->dev_infos_get.
3371 if (*dev->dev_ops->dev_infos_get != NULL) {
3372 ret = rte_eth_dev_info_get(port_id, &dev_info);
3376 ret = eth_dev_validate_mtu(port_id, &dev_info, mtu);
3381 if (dev->data->dev_configured == 0) {
3383 "Port %u must be configured before MTU set\n",
3388 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
3390 dev->data->mtu = mtu;
3392 return eth_err(port_id, ret);
3396 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
3398 struct rte_eth_dev *dev;
3401 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3402 dev = &rte_eth_devices[port_id];
3404 if (!(dev->data->dev_conf.rxmode.offloads &
3405 RTE_ETH_RX_OFFLOAD_VLAN_FILTER)) {
3406 RTE_ETHDEV_LOG(ERR, "Port %u: VLAN-filtering disabled\n",
3411 if (vlan_id > 4095) {
3412 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
3416 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
3418 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
3420 struct rte_vlan_filter_conf *vfc;
3424 vfc = &dev->data->vlan_filter_conf;
3425 vidx = vlan_id / 64;
3426 vbit = vlan_id % 64;
3429 vfc->ids[vidx] |= RTE_BIT64(vbit);
3431 vfc->ids[vidx] &= ~RTE_BIT64(vbit);
3434 return eth_err(port_id, ret);
3438 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
3441 struct rte_eth_dev *dev;
3443 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3444 dev = &rte_eth_devices[port_id];
3446 if (rx_queue_id >= dev->data->nb_rx_queues) {
3447 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
3451 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
3452 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
3458 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
3459 enum rte_vlan_type vlan_type,
3462 struct rte_eth_dev *dev;
3464 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3465 dev = &rte_eth_devices[port_id];
3467 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
3468 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
3473 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
3475 struct rte_eth_dev_info dev_info;
3476 struct rte_eth_dev *dev;
3480 uint64_t orig_offloads;
3481 uint64_t dev_offloads;
3482 uint64_t new_offloads;
3484 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3485 dev = &rte_eth_devices[port_id];
3487 /* save original values in case of failure */
3488 orig_offloads = dev->data->dev_conf.rxmode.offloads;
3489 dev_offloads = orig_offloads;
3491 /* check which option changed by application */
3492 cur = !!(offload_mask & RTE_ETH_VLAN_STRIP_OFFLOAD);
3493 org = !!(dev_offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP);
3496 dev_offloads |= RTE_ETH_RX_OFFLOAD_VLAN_STRIP;
3498 dev_offloads &= ~RTE_ETH_RX_OFFLOAD_VLAN_STRIP;
3499 mask |= RTE_ETH_VLAN_STRIP_MASK;
3502 cur = !!(offload_mask & RTE_ETH_VLAN_FILTER_OFFLOAD);
3503 org = !!(dev_offloads & RTE_ETH_RX_OFFLOAD_VLAN_FILTER);
3506 dev_offloads |= RTE_ETH_RX_OFFLOAD_VLAN_FILTER;
3508 dev_offloads &= ~RTE_ETH_RX_OFFLOAD_VLAN_FILTER;
3509 mask |= RTE_ETH_VLAN_FILTER_MASK;
3512 cur = !!(offload_mask & RTE_ETH_VLAN_EXTEND_OFFLOAD);
3513 org = !!(dev_offloads & RTE_ETH_RX_OFFLOAD_VLAN_EXTEND);
3516 dev_offloads |= RTE_ETH_RX_OFFLOAD_VLAN_EXTEND;
3518 dev_offloads &= ~RTE_ETH_RX_OFFLOAD_VLAN_EXTEND;
3519 mask |= RTE_ETH_VLAN_EXTEND_MASK;
3522 cur = !!(offload_mask & RTE_ETH_QINQ_STRIP_OFFLOAD);
3523 org = !!(dev_offloads & RTE_ETH_RX_OFFLOAD_QINQ_STRIP);
3526 dev_offloads |= RTE_ETH_RX_OFFLOAD_QINQ_STRIP;
3528 dev_offloads &= ~RTE_ETH_RX_OFFLOAD_QINQ_STRIP;
3529 mask |= RTE_ETH_QINQ_STRIP_MASK;
3536 ret = rte_eth_dev_info_get(port_id, &dev_info);
3540 /* Rx VLAN offloading must be within its device capabilities */
3541 if ((dev_offloads & dev_info.rx_offload_capa) != dev_offloads) {
3542 new_offloads = dev_offloads & ~orig_offloads;
3544 "Ethdev port_id=%u requested new added VLAN offloads "
3545 "0x%" PRIx64 " must be within Rx offloads capabilities "
3546 "0x%" PRIx64 " in %s()\n",
3547 port_id, new_offloads, dev_info.rx_offload_capa,
3552 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
3553 dev->data->dev_conf.rxmode.offloads = dev_offloads;
3554 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
3556 /* hit an error restore original values */
3557 dev->data->dev_conf.rxmode.offloads = orig_offloads;
3560 return eth_err(port_id, ret);
3564 rte_eth_dev_get_vlan_offload(uint16_t port_id)
3566 struct rte_eth_dev *dev;
3567 uint64_t *dev_offloads;
3570 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3571 dev = &rte_eth_devices[port_id];
3572 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
3574 if (*dev_offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP)
3575 ret |= RTE_ETH_VLAN_STRIP_OFFLOAD;
3577 if (*dev_offloads & RTE_ETH_RX_OFFLOAD_VLAN_FILTER)
3578 ret |= RTE_ETH_VLAN_FILTER_OFFLOAD;
3580 if (*dev_offloads & RTE_ETH_RX_OFFLOAD_VLAN_EXTEND)
3581 ret |= RTE_ETH_VLAN_EXTEND_OFFLOAD;
3583 if (*dev_offloads & RTE_ETH_RX_OFFLOAD_QINQ_STRIP)
3584 ret |= RTE_ETH_QINQ_STRIP_OFFLOAD;
3590 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
3592 struct rte_eth_dev *dev;
3594 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3595 dev = &rte_eth_devices[port_id];
3597 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
3598 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
3602 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3604 struct rte_eth_dev *dev;
3606 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3607 dev = &rte_eth_devices[port_id];
3609 if (fc_conf == NULL) {
3611 "Cannot get ethdev port %u flow control config to NULL\n",
3616 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
3617 memset(fc_conf, 0, sizeof(*fc_conf));
3618 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
3622 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3624 struct rte_eth_dev *dev;
3626 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3627 dev = &rte_eth_devices[port_id];
3629 if (fc_conf == NULL) {
3631 "Cannot set ethdev port %u flow control from NULL config\n",
3636 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
3637 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
3641 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
3642 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
3646 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
3647 struct rte_eth_pfc_conf *pfc_conf)
3649 struct rte_eth_dev *dev;
3651 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3652 dev = &rte_eth_devices[port_id];
3654 if (pfc_conf == NULL) {
3656 "Cannot set ethdev port %u priority flow control from NULL config\n",
3661 if (pfc_conf->priority > (RTE_ETH_DCB_NUM_USER_PRIORITIES - 1)) {
3662 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
3666 /* High water, low water validation are device specific */
3667 if (*dev->dev_ops->priority_flow_ctrl_set)
3668 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
3674 validate_rx_pause_config(struct rte_eth_dev_info *dev_info, uint8_t tc_max,
3675 struct rte_eth_pfc_queue_conf *pfc_queue_conf)
3677 if ((pfc_queue_conf->mode == RTE_ETH_FC_RX_PAUSE) ||
3678 (pfc_queue_conf->mode == RTE_ETH_FC_FULL)) {
3679 if (pfc_queue_conf->rx_pause.tx_qid >= dev_info->nb_tx_queues) {
3681 "PFC Tx queue not in range for Rx pause requested:%d configured:%d\n",
3682 pfc_queue_conf->rx_pause.tx_qid,
3683 dev_info->nb_tx_queues);
3687 if (pfc_queue_conf->rx_pause.tc >= tc_max) {
3689 "PFC TC not in range for Rx pause requested:%d max:%d\n",
3690 pfc_queue_conf->rx_pause.tc, tc_max);
3699 validate_tx_pause_config(struct rte_eth_dev_info *dev_info, uint8_t tc_max,
3700 struct rte_eth_pfc_queue_conf *pfc_queue_conf)
3702 if ((pfc_queue_conf->mode == RTE_ETH_FC_TX_PAUSE) ||
3703 (pfc_queue_conf->mode == RTE_ETH_FC_FULL)) {
3704 if (pfc_queue_conf->tx_pause.rx_qid >= dev_info->nb_rx_queues) {
3706 "PFC Rx queue not in range for Tx pause requested:%d configured:%d\n",
3707 pfc_queue_conf->tx_pause.rx_qid,
3708 dev_info->nb_rx_queues);
3712 if (pfc_queue_conf->tx_pause.tc >= tc_max) {
3714 "PFC TC not in range for Tx pause requested:%d max:%d\n",
3715 pfc_queue_conf->tx_pause.tc, tc_max);
3724 rte_eth_dev_priority_flow_ctrl_queue_info_get(uint16_t port_id,
3725 struct rte_eth_pfc_queue_info *pfc_queue_info)
3727 struct rte_eth_dev *dev;
3729 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3730 dev = &rte_eth_devices[port_id];
3732 if (pfc_queue_info == NULL) {
3733 RTE_ETHDEV_LOG(ERR, "PFC info param is NULL for port (%u)\n",
3738 if (*dev->dev_ops->priority_flow_ctrl_queue_info_get)
3739 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_queue_info_get)
3740 (dev, pfc_queue_info));
3745 rte_eth_dev_priority_flow_ctrl_queue_configure(uint16_t port_id,
3746 struct rte_eth_pfc_queue_conf *pfc_queue_conf)
3748 struct rte_eth_pfc_queue_info pfc_info;
3749 struct rte_eth_dev_info dev_info;
3750 struct rte_eth_dev *dev;
3753 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3754 dev = &rte_eth_devices[port_id];
3756 if (pfc_queue_conf == NULL) {
3757 RTE_ETHDEV_LOG(ERR, "PFC parameters are NULL for port (%u)\n",
3762 ret = rte_eth_dev_info_get(port_id, &dev_info);
3766 ret = rte_eth_dev_priority_flow_ctrl_queue_info_get(port_id, &pfc_info);
3770 if (pfc_info.tc_max == 0) {
3771 RTE_ETHDEV_LOG(ERR, "Ethdev port %u does not support PFC TC values\n",
3776 /* Check requested mode supported or not */
3777 if (pfc_info.mode_capa == RTE_ETH_FC_RX_PAUSE &&
3778 pfc_queue_conf->mode == RTE_ETH_FC_TX_PAUSE) {
3779 RTE_ETHDEV_LOG(ERR, "PFC Tx pause unsupported for port (%d)\n",
3784 if (pfc_info.mode_capa == RTE_ETH_FC_TX_PAUSE &&
3785 pfc_queue_conf->mode == RTE_ETH_FC_RX_PAUSE) {
3786 RTE_ETHDEV_LOG(ERR, "PFC Rx pause unsupported for port (%d)\n",
3791 /* Validate Rx pause parameters */
3792 if (pfc_info.mode_capa == RTE_ETH_FC_FULL ||
3793 pfc_info.mode_capa == RTE_ETH_FC_RX_PAUSE) {
3794 ret = validate_rx_pause_config(&dev_info, pfc_info.tc_max,
3800 /* Validate Tx pause parameters */
3801 if (pfc_info.mode_capa == RTE_ETH_FC_FULL ||
3802 pfc_info.mode_capa == RTE_ETH_FC_TX_PAUSE) {
3803 ret = validate_tx_pause_config(&dev_info, pfc_info.tc_max,
3809 if (*dev->dev_ops->priority_flow_ctrl_queue_config)
3810 return eth_err(port_id,
3811 (*dev->dev_ops->priority_flow_ctrl_queue_config)(
3812 dev, pfc_queue_conf));
3817 eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
3822 num = (reta_size + RTE_ETH_RETA_GROUP_SIZE - 1) / RTE_ETH_RETA_GROUP_SIZE;
3823 for (i = 0; i < num; i++) {
3824 if (reta_conf[i].mask)
3832 eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
3836 uint16_t i, idx, shift;
3839 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
3843 for (i = 0; i < reta_size; i++) {
3844 idx = i / RTE_ETH_RETA_GROUP_SIZE;
3845 shift = i % RTE_ETH_RETA_GROUP_SIZE;
3846 if ((reta_conf[idx].mask & RTE_BIT64(shift)) &&
3847 (reta_conf[idx].reta[shift] >= max_rxq)) {
3849 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
3851 reta_conf[idx].reta[shift], max_rxq);
3860 rte_eth_dev_rss_reta_update(uint16_t port_id,
3861 struct rte_eth_rss_reta_entry64 *reta_conf,
3864 enum rte_eth_rx_mq_mode mq_mode;
3865 struct rte_eth_dev *dev;
3868 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3869 dev = &rte_eth_devices[port_id];
3871 if (reta_conf == NULL) {
3873 "Cannot update ethdev port %u RSS RETA to NULL\n",
3878 if (reta_size == 0) {
3880 "Cannot update ethdev port %u RSS RETA with zero size\n",
3885 /* Check mask bits */
3886 ret = eth_check_reta_mask(reta_conf, reta_size);
3890 /* Check entry value */
3891 ret = eth_check_reta_entry(reta_conf, reta_size,
3892 dev->data->nb_rx_queues);
3896 mq_mode = dev->data->dev_conf.rxmode.mq_mode;
3897 if (!(mq_mode & RTE_ETH_MQ_RX_RSS_FLAG)) {
3898 RTE_ETHDEV_LOG(ERR, "Multi-queue RSS mode isn't enabled.\n");
3902 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
3903 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
3908 rte_eth_dev_rss_reta_query(uint16_t port_id,
3909 struct rte_eth_rss_reta_entry64 *reta_conf,
3912 struct rte_eth_dev *dev;
3915 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3916 dev = &rte_eth_devices[port_id];
3918 if (reta_conf == NULL) {
3920 "Cannot query ethdev port %u RSS RETA from NULL config\n",
3925 /* Check mask bits */
3926 ret = eth_check_reta_mask(reta_conf, reta_size);
3930 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
3931 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
3936 rte_eth_dev_rss_hash_update(uint16_t port_id,
3937 struct rte_eth_rss_conf *rss_conf)
3939 struct rte_eth_dev *dev;
3940 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
3941 enum rte_eth_rx_mq_mode mq_mode;
3944 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3945 dev = &rte_eth_devices[port_id];
3947 if (rss_conf == NULL) {
3949 "Cannot update ethdev port %u RSS hash from NULL config\n",
3954 ret = rte_eth_dev_info_get(port_id, &dev_info);
3958 rss_conf->rss_hf = rte_eth_rss_hf_refine(rss_conf->rss_hf);
3959 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
3960 dev_info.flow_type_rss_offloads) {
3962 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
3963 port_id, rss_conf->rss_hf,
3964 dev_info.flow_type_rss_offloads);
3968 mq_mode = dev->data->dev_conf.rxmode.mq_mode;
3969 if (!(mq_mode & RTE_ETH_MQ_RX_RSS_FLAG)) {
3970 RTE_ETHDEV_LOG(ERR, "Multi-queue RSS mode isn't enabled.\n");
3974 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
3975 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
3980 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
3981 struct rte_eth_rss_conf *rss_conf)
3983 struct rte_eth_dev *dev;
3985 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3986 dev = &rte_eth_devices[port_id];
3988 if (rss_conf == NULL) {
3990 "Cannot get ethdev port %u RSS hash config to NULL\n",
3995 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
3996 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
4001 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
4002 struct rte_eth_udp_tunnel *udp_tunnel)
4004 struct rte_eth_dev *dev;
4006 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4007 dev = &rte_eth_devices[port_id];
4009 if (udp_tunnel == NULL) {
4011 "Cannot add ethdev port %u UDP tunnel port from NULL UDP tunnel\n",
4016 if (udp_tunnel->prot_type >= RTE_ETH_TUNNEL_TYPE_MAX) {
4017 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4021 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
4022 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
4027 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
4028 struct rte_eth_udp_tunnel *udp_tunnel)
4030 struct rte_eth_dev *dev;
4032 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4033 dev = &rte_eth_devices[port_id];
4035 if (udp_tunnel == NULL) {
4037 "Cannot delete ethdev port %u UDP tunnel port from NULL UDP tunnel\n",
4042 if (udp_tunnel->prot_type >= RTE_ETH_TUNNEL_TYPE_MAX) {
4043 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4047 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
4048 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
4053 rte_eth_led_on(uint16_t port_id)
4055 struct rte_eth_dev *dev;
4057 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4058 dev = &rte_eth_devices[port_id];
4060 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
4061 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
4065 rte_eth_led_off(uint16_t port_id)
4067 struct rte_eth_dev *dev;
4069 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4070 dev = &rte_eth_devices[port_id];
4072 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
4073 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
4077 rte_eth_fec_get_capability(uint16_t port_id,
4078 struct rte_eth_fec_capa *speed_fec_capa,
4081 struct rte_eth_dev *dev;
4084 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4085 dev = &rte_eth_devices[port_id];
4087 if (speed_fec_capa == NULL && num > 0) {
4089 "Cannot get ethdev port %u FEC capability to NULL when array size is non zero\n",
4094 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_get_capability, -ENOTSUP);
4095 ret = (*dev->dev_ops->fec_get_capability)(dev, speed_fec_capa, num);
4101 rte_eth_fec_get(uint16_t port_id, uint32_t *fec_capa)
4103 struct rte_eth_dev *dev;
4105 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4106 dev = &rte_eth_devices[port_id];
4108 if (fec_capa == NULL) {
4110 "Cannot get ethdev port %u current FEC mode to NULL\n",
4115 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_get, -ENOTSUP);
4116 return eth_err(port_id, (*dev->dev_ops->fec_get)(dev, fec_capa));
4120 rte_eth_fec_set(uint16_t port_id, uint32_t fec_capa)
4122 struct rte_eth_dev *dev;
4124 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4125 dev = &rte_eth_devices[port_id];
4127 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_set, -ENOTSUP);
4128 return eth_err(port_id, (*dev->dev_ops->fec_set)(dev, fec_capa));
4132 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
4136 eth_dev_get_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
4138 struct rte_eth_dev_info dev_info;
4139 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4143 ret = rte_eth_dev_info_get(port_id, &dev_info);
4147 for (i = 0; i < dev_info.max_mac_addrs; i++)
4148 if (memcmp(addr, &dev->data->mac_addrs[i],
4149 RTE_ETHER_ADDR_LEN) == 0)
4155 static const struct rte_ether_addr null_mac_addr;
4158 rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr,
4161 struct rte_eth_dev *dev;
4166 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4167 dev = &rte_eth_devices[port_id];
4171 "Cannot add ethdev port %u MAC address from NULL address\n",
4176 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
4178 if (rte_is_zero_ether_addr(addr)) {
4179 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
4183 if (pool >= RTE_ETH_64_POOLS) {
4184 RTE_ETHDEV_LOG(ERR, "Pool ID must be 0-%d\n", RTE_ETH_64_POOLS - 1);
4188 index = eth_dev_get_mac_addr_index(port_id, addr);
4190 index = eth_dev_get_mac_addr_index(port_id, &null_mac_addr);
4192 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
4197 pool_mask = dev->data->mac_pool_sel[index];
4199 /* Check if both MAC address and pool is already there, and do nothing */
4200 if (pool_mask & RTE_BIT64(pool))
4205 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
4208 /* Update address in NIC data structure */
4209 rte_ether_addr_copy(addr, &dev->data->mac_addrs[index]);
4211 /* Update pool bitmap in NIC data structure */
4212 dev->data->mac_pool_sel[index] |= RTE_BIT64(pool);
4215 return eth_err(port_id, ret);
4219 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *addr)
4221 struct rte_eth_dev *dev;
4224 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4225 dev = &rte_eth_devices[port_id];
4229 "Cannot remove ethdev port %u MAC address from NULL address\n",
4234 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
4236 index = eth_dev_get_mac_addr_index(port_id, addr);
4239 "Port %u: Cannot remove default MAC address\n",
4242 } else if (index < 0)
4243 return 0; /* Do nothing if address wasn't found */
4246 (*dev->dev_ops->mac_addr_remove)(dev, index);
4248 /* Update address in NIC data structure */
4249 rte_ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
4251 /* reset pool bitmap */
4252 dev->data->mac_pool_sel[index] = 0;
4258 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *addr)
4260 struct rte_eth_dev *dev;
4263 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4264 dev = &rte_eth_devices[port_id];
4268 "Cannot set ethdev port %u default MAC address from NULL address\n",
4273 if (!rte_is_valid_assigned_ether_addr(addr))
4276 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
4278 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
4282 /* Update default address in NIC data structure */
4283 rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]);
4290 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
4294 eth_dev_get_hash_mac_addr_index(uint16_t port_id,
4295 const struct rte_ether_addr *addr)
4297 struct rte_eth_dev_info dev_info;
4298 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4302 ret = rte_eth_dev_info_get(port_id, &dev_info);
4306 if (!dev->data->hash_mac_addrs)
4309 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
4310 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
4311 RTE_ETHER_ADDR_LEN) == 0)
4318 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
4323 struct rte_eth_dev *dev;
4325 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4326 dev = &rte_eth_devices[port_id];
4330 "Cannot set ethdev port %u unicast hash table from NULL address\n",
4335 if (rte_is_zero_ether_addr(addr)) {
4336 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
4341 index = eth_dev_get_hash_mac_addr_index(port_id, addr);
4342 /* Check if it's already there, and do nothing */
4343 if ((index >= 0) && on)
4349 "Port %u: the MAC address was not set in UTA\n",
4354 index = eth_dev_get_hash_mac_addr_index(port_id, &null_mac_addr);
4356 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
4362 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
4363 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
4365 /* Update address in NIC data structure */
4367 rte_ether_addr_copy(addr,
4368 &dev->data->hash_mac_addrs[index]);
4370 rte_ether_addr_copy(&null_mac_addr,
4371 &dev->data->hash_mac_addrs[index]);
4374 return eth_err(port_id, ret);
4378 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
4380 struct rte_eth_dev *dev;
4382 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4383 dev = &rte_eth_devices[port_id];
4385 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
4386 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
4390 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
4393 struct rte_eth_dev *dev;
4394 struct rte_eth_dev_info dev_info;
4395 struct rte_eth_link link;
4398 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4399 dev = &rte_eth_devices[port_id];
4401 ret = rte_eth_dev_info_get(port_id, &dev_info);
4405 link = dev->data->dev_link;
4407 if (queue_idx > dev_info.max_tx_queues) {
4409 "Set queue rate limit:port %u: invalid queue ID=%u\n",
4410 port_id, queue_idx);
4414 if (tx_rate > link.link_speed) {
4416 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
4417 tx_rate, link.link_speed);
4421 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
4422 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
4423 queue_idx, tx_rate));
4426 int rte_eth_rx_avail_thresh_set(uint16_t port_id, uint16_t queue_id,
4427 uint8_t avail_thresh)
4429 struct rte_eth_dev *dev;
4431 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4432 dev = &rte_eth_devices[port_id];
4434 if (queue_id > dev->data->nb_rx_queues) {
4436 "Set queue avail thresh: port %u: invalid queue ID=%u.\n",
4441 if (avail_thresh > 99) {
4443 "Set queue avail thresh: port %u: threshold should be <= 99.\n",
4447 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_avail_thresh_set, -ENOTSUP);
4448 return eth_err(port_id, (*dev->dev_ops->rx_queue_avail_thresh_set)(dev,
4449 queue_id, avail_thresh));
4452 int rte_eth_rx_avail_thresh_query(uint16_t port_id, uint16_t *queue_id,
4453 uint8_t *avail_thresh)
4455 struct rte_eth_dev *dev;
4457 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4458 dev = &rte_eth_devices[port_id];
4460 if (queue_id == NULL)
4462 if (*queue_id >= dev->data->nb_rx_queues)
4465 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_avail_thresh_query, -ENOTSUP);
4466 return eth_err(port_id, (*dev->dev_ops->rx_queue_avail_thresh_query)(dev,
4467 queue_id, avail_thresh));
4470 RTE_INIT(eth_dev_init_fp_ops)
4474 for (i = 0; i != RTE_DIM(rte_eth_fp_ops); i++)
4475 eth_dev_fp_ops_reset(rte_eth_fp_ops + i);
4478 RTE_INIT(eth_dev_init_cb_lists)
4482 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
4483 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
4487 rte_eth_dev_callback_register(uint16_t port_id,
4488 enum rte_eth_event_type event,
4489 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4491 struct rte_eth_dev *dev;
4492 struct rte_eth_dev_callback *user_cb;
4496 if (cb_fn == NULL) {
4498 "Cannot register ethdev port %u callback from NULL\n",
4503 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4504 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4508 if (port_id == RTE_ETH_ALL) {
4510 last_port = RTE_MAX_ETHPORTS - 1;
4512 next_port = last_port = port_id;
4515 rte_spinlock_lock(ð_dev_cb_lock);
4518 dev = &rte_eth_devices[next_port];
4520 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
4521 if (user_cb->cb_fn == cb_fn &&
4522 user_cb->cb_arg == cb_arg &&
4523 user_cb->event == event) {
4528 /* create a new callback. */
4529 if (user_cb == NULL) {
4530 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
4531 sizeof(struct rte_eth_dev_callback), 0);
4532 if (user_cb != NULL) {
4533 user_cb->cb_fn = cb_fn;
4534 user_cb->cb_arg = cb_arg;
4535 user_cb->event = event;
4536 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
4539 rte_spinlock_unlock(ð_dev_cb_lock);
4540 rte_eth_dev_callback_unregister(port_id, event,
4546 } while (++next_port <= last_port);
4548 rte_spinlock_unlock(ð_dev_cb_lock);
4553 rte_eth_dev_callback_unregister(uint16_t port_id,
4554 enum rte_eth_event_type event,
4555 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4558 struct rte_eth_dev *dev;
4559 struct rte_eth_dev_callback *cb, *next;
4563 if (cb_fn == NULL) {
4565 "Cannot unregister ethdev port %u callback from NULL\n",
4570 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4571 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4575 if (port_id == RTE_ETH_ALL) {
4577 last_port = RTE_MAX_ETHPORTS - 1;
4579 next_port = last_port = port_id;
4582 rte_spinlock_lock(ð_dev_cb_lock);
4585 dev = &rte_eth_devices[next_port];
4587 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
4590 next = TAILQ_NEXT(cb, next);
4592 if (cb->cb_fn != cb_fn || cb->event != event ||
4593 (cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
4597 * if this callback is not executing right now,
4600 if (cb->active == 0) {
4601 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
4607 } while (++next_port <= last_port);
4609 rte_spinlock_unlock(ð_dev_cb_lock);
4614 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
4617 struct rte_eth_dev *dev;
4618 struct rte_intr_handle *intr_handle;
4622 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4623 dev = &rte_eth_devices[port_id];
4625 if (!dev->intr_handle) {
4626 RTE_ETHDEV_LOG(ERR, "Rx Intr handle unset\n");
4630 intr_handle = dev->intr_handle;
4631 if (rte_intr_vec_list_index_get(intr_handle, 0) < 0) {
4632 RTE_ETHDEV_LOG(ERR, "Rx Intr vector unset\n");
4636 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
4637 vec = rte_intr_vec_list_index_get(intr_handle, qid);
4638 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4639 if (rc && rc != -EEXIST) {
4641 "p %u q %u Rx ctl error op %d epfd %d vec %u\n",
4642 port_id, qid, op, epfd, vec);
4650 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
4652 struct rte_intr_handle *intr_handle;
4653 struct rte_eth_dev *dev;
4654 unsigned int efd_idx;
4658 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
4659 dev = &rte_eth_devices[port_id];
4661 if (queue_id >= dev->data->nb_rx_queues) {
4662 RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u\n", queue_id);
4666 if (!dev->intr_handle) {
4667 RTE_ETHDEV_LOG(ERR, "Rx Intr handle unset\n");
4671 intr_handle = dev->intr_handle;
4672 if (rte_intr_vec_list_index_get(intr_handle, 0) < 0) {
4673 RTE_ETHDEV_LOG(ERR, "Rx Intr vector unset\n");
4677 vec = rte_intr_vec_list_index_get(intr_handle, queue_id);
4678 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
4679 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
4680 fd = rte_intr_efds_index_get(intr_handle, efd_idx);
4686 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
4687 int epfd, int op, void *data)
4690 struct rte_eth_dev *dev;
4691 struct rte_intr_handle *intr_handle;
4694 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4695 dev = &rte_eth_devices[port_id];
4697 if (queue_id >= dev->data->nb_rx_queues) {
4698 RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u\n", queue_id);
4702 if (!dev->intr_handle) {
4703 RTE_ETHDEV_LOG(ERR, "Rx Intr handle unset\n");
4707 intr_handle = dev->intr_handle;
4708 if (rte_intr_vec_list_index_get(intr_handle, 0) < 0) {
4709 RTE_ETHDEV_LOG(ERR, "Rx Intr vector unset\n");
4713 vec = rte_intr_vec_list_index_get(intr_handle, queue_id);
4714 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4715 if (rc && rc != -EEXIST) {
4717 "p %u q %u Rx ctl error op %d epfd %d vec %u\n",
4718 port_id, queue_id, op, epfd, vec);
4726 rte_eth_dev_rx_intr_enable(uint16_t port_id,
4729 struct rte_eth_dev *dev;
4732 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4733 dev = &rte_eth_devices[port_id];
4735 ret = eth_dev_validate_rx_queue(dev, queue_id);
4739 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
4740 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id));
4744 rte_eth_dev_rx_intr_disable(uint16_t port_id,
4747 struct rte_eth_dev *dev;
4750 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4751 dev = &rte_eth_devices[port_id];
4753 ret = eth_dev_validate_rx_queue(dev, queue_id);
4757 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
4758 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id));
4762 const struct rte_eth_rxtx_callback *
4763 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
4764 rte_rx_callback_fn fn, void *user_param)
4766 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4767 rte_errno = ENOTSUP;
4770 struct rte_eth_dev *dev;
4772 /* check input parameters */
4773 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4774 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4778 dev = &rte_eth_devices[port_id];
4779 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
4783 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4791 cb->param = user_param;
4793 rte_spinlock_lock(ð_dev_rx_cb_lock);
4794 /* Add the callbacks in fifo order. */
4795 struct rte_eth_rxtx_callback *tail =
4796 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4799 /* Stores to cb->fn and cb->param should complete before
4800 * cb is visible to data plane.
4803 &rte_eth_devices[port_id].post_rx_burst_cbs[queue_id],
4804 cb, __ATOMIC_RELEASE);
4809 /* Stores to cb->fn and cb->param should complete before
4810 * cb is visible to data plane.
4812 __atomic_store_n(&tail->next, cb, __ATOMIC_RELEASE);
4814 rte_spinlock_unlock(ð_dev_rx_cb_lock);
4819 const struct rte_eth_rxtx_callback *
4820 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
4821 rte_rx_callback_fn fn, void *user_param)
4823 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4824 rte_errno = ENOTSUP;
4827 /* check input parameters */
4828 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4829 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4834 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4842 cb->param = user_param;
4844 rte_spinlock_lock(ð_dev_rx_cb_lock);
4845 /* Add the callbacks at first position */
4846 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4847 /* Stores to cb->fn, cb->param and cb->next should complete before
4848 * cb is visible to data plane threads.
4851 &rte_eth_devices[port_id].post_rx_burst_cbs[queue_id],
4852 cb, __ATOMIC_RELEASE);
4853 rte_spinlock_unlock(ð_dev_rx_cb_lock);
4858 const struct rte_eth_rxtx_callback *
4859 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
4860 rte_tx_callback_fn fn, void *user_param)
4862 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4863 rte_errno = ENOTSUP;
4866 struct rte_eth_dev *dev;
4868 /* check input parameters */
4869 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4870 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
4875 dev = &rte_eth_devices[port_id];
4876 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
4881 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4889 cb->param = user_param;
4891 rte_spinlock_lock(ð_dev_tx_cb_lock);
4892 /* Add the callbacks in fifo order. */
4893 struct rte_eth_rxtx_callback *tail =
4894 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
4897 /* Stores to cb->fn and cb->param should complete before
4898 * cb is visible to data plane.
4901 &rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id],
4902 cb, __ATOMIC_RELEASE);
4907 /* Stores to cb->fn and cb->param should complete before
4908 * cb is visible to data plane.
4910 __atomic_store_n(&tail->next, cb, __ATOMIC_RELEASE);
4912 rte_spinlock_unlock(ð_dev_tx_cb_lock);
4918 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
4919 const struct rte_eth_rxtx_callback *user_cb)
4921 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4924 /* Check input parameters. */
4925 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4926 if (user_cb == NULL ||
4927 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
4930 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4931 struct rte_eth_rxtx_callback *cb;
4932 struct rte_eth_rxtx_callback **prev_cb;
4935 rte_spinlock_lock(ð_dev_rx_cb_lock);
4936 prev_cb = &dev->post_rx_burst_cbs[queue_id];
4937 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4939 if (cb == user_cb) {
4940 /* Remove the user cb from the callback list. */
4941 __atomic_store_n(prev_cb, cb->next, __ATOMIC_RELAXED);
4946 rte_spinlock_unlock(ð_dev_rx_cb_lock);
4952 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
4953 const struct rte_eth_rxtx_callback *user_cb)
4955 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4958 /* Check input parameters. */
4959 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4960 if (user_cb == NULL ||
4961 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
4964 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4966 struct rte_eth_rxtx_callback *cb;
4967 struct rte_eth_rxtx_callback **prev_cb;
4969 rte_spinlock_lock(ð_dev_tx_cb_lock);
4970 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
4971 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4973 if (cb == user_cb) {
4974 /* Remove the user cb from the callback list. */
4975 __atomic_store_n(prev_cb, cb->next, __ATOMIC_RELAXED);
4980 rte_spinlock_unlock(ð_dev_tx_cb_lock);
4986 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4987 struct rte_eth_rxq_info *qinfo)
4989 struct rte_eth_dev *dev;
4991 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4992 dev = &rte_eth_devices[port_id];
4994 if (queue_id >= dev->data->nb_rx_queues) {
4995 RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u\n", queue_id);
4999 if (qinfo == NULL) {
5000 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u Rx queue %u info to NULL\n",
5005 if (dev->data->rx_queues == NULL ||
5006 dev->data->rx_queues[queue_id] == NULL) {
5008 "Rx queue %"PRIu16" of device with port_id=%"
5009 PRIu16" has not been setup\n",
5014 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
5015 RTE_ETHDEV_LOG(INFO,
5016 "Can't get hairpin Rx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
5021 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
5023 memset(qinfo, 0, sizeof(*qinfo));
5024 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
5025 qinfo->queue_state = dev->data->rx_queue_state[queue_id];
5031 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
5032 struct rte_eth_txq_info *qinfo)
5034 struct rte_eth_dev *dev;
5036 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5037 dev = &rte_eth_devices[port_id];
5039 if (queue_id >= dev->data->nb_tx_queues) {
5040 RTE_ETHDEV_LOG(ERR, "Invalid Tx queue_id=%u\n", queue_id);
5044 if (qinfo == NULL) {
5045 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u Tx queue %u info to NULL\n",
5050 if (dev->data->tx_queues == NULL ||
5051 dev->data->tx_queues[queue_id] == NULL) {
5053 "Tx queue %"PRIu16" of device with port_id=%"
5054 PRIu16" has not been setup\n",
5059 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
5060 RTE_ETHDEV_LOG(INFO,
5061 "Can't get hairpin Tx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
5066 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
5068 memset(qinfo, 0, sizeof(*qinfo));
5069 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
5070 qinfo->queue_state = dev->data->tx_queue_state[queue_id];
5076 rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
5077 struct rte_eth_burst_mode *mode)
5079 struct rte_eth_dev *dev;
5081 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5082 dev = &rte_eth_devices[port_id];
5084 if (queue_id >= dev->data->nb_rx_queues) {
5085 RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u\n", queue_id);
5091 "Cannot get ethdev port %u Rx queue %u burst mode to NULL\n",
5096 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_burst_mode_get, -ENOTSUP);
5097 memset(mode, 0, sizeof(*mode));
5098 return eth_err(port_id,
5099 dev->dev_ops->rx_burst_mode_get(dev, queue_id, mode));
5103 rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
5104 struct rte_eth_burst_mode *mode)
5106 struct rte_eth_dev *dev;
5108 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5109 dev = &rte_eth_devices[port_id];
5111 if (queue_id >= dev->data->nb_tx_queues) {
5112 RTE_ETHDEV_LOG(ERR, "Invalid Tx queue_id=%u\n", queue_id);
5118 "Cannot get ethdev port %u Tx queue %u burst mode to NULL\n",
5123 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_burst_mode_get, -ENOTSUP);
5124 memset(mode, 0, sizeof(*mode));
5125 return eth_err(port_id,
5126 dev->dev_ops->tx_burst_mode_get(dev, queue_id, mode));
5130 rte_eth_get_monitor_addr(uint16_t port_id, uint16_t queue_id,
5131 struct rte_power_monitor_cond *pmc)
5133 struct rte_eth_dev *dev;
5135 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5136 dev = &rte_eth_devices[port_id];
5138 if (queue_id >= dev->data->nb_rx_queues) {
5139 RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u\n", queue_id);
5145 "Cannot get ethdev port %u Rx queue %u power monitor condition to NULL\n",
5150 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_monitor_addr, -ENOTSUP);
5151 return eth_err(port_id,
5152 dev->dev_ops->get_monitor_addr(dev->data->rx_queues[queue_id], pmc));
5156 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
5157 struct rte_ether_addr *mc_addr_set,
5158 uint32_t nb_mc_addr)
5160 struct rte_eth_dev *dev;
5162 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5163 dev = &rte_eth_devices[port_id];
5165 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
5166 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
5167 mc_addr_set, nb_mc_addr));
5171 rte_eth_timesync_enable(uint16_t port_id)
5173 struct rte_eth_dev *dev;
5175 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5176 dev = &rte_eth_devices[port_id];
5178 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
5179 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
5183 rte_eth_timesync_disable(uint16_t port_id)
5185 struct rte_eth_dev *dev;
5187 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5188 dev = &rte_eth_devices[port_id];
5190 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
5191 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
5195 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
5198 struct rte_eth_dev *dev;
5200 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5201 dev = &rte_eth_devices[port_id];
5203 if (timestamp == NULL) {
5205 "Cannot read ethdev port %u Rx timestamp to NULL\n",
5210 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
5211 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
5212 (dev, timestamp, flags));
5216 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
5217 struct timespec *timestamp)
5219 struct rte_eth_dev *dev;
5221 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5222 dev = &rte_eth_devices[port_id];
5224 if (timestamp == NULL) {
5226 "Cannot read ethdev port %u Tx timestamp to NULL\n",
5231 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
5232 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
5237 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
5239 struct rte_eth_dev *dev;
5241 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5242 dev = &rte_eth_devices[port_id];
5244 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
5245 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev, delta));
5249 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
5251 struct rte_eth_dev *dev;
5253 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5254 dev = &rte_eth_devices[port_id];
5256 if (timestamp == NULL) {
5258 "Cannot read ethdev port %u timesync time to NULL\n",
5263 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
5264 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
5269 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
5271 struct rte_eth_dev *dev;
5273 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5274 dev = &rte_eth_devices[port_id];
5276 if (timestamp == NULL) {
5278 "Cannot write ethdev port %u timesync from NULL time\n",
5283 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
5284 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
5289 rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
5291 struct rte_eth_dev *dev;
5293 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5294 dev = &rte_eth_devices[port_id];
5296 if (clock == NULL) {
5297 RTE_ETHDEV_LOG(ERR, "Cannot read ethdev port %u clock to NULL\n",
5302 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->read_clock, -ENOTSUP);
5303 return eth_err(port_id, (*dev->dev_ops->read_clock)(dev, clock));
5307 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
5309 struct rte_eth_dev *dev;
5311 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5312 dev = &rte_eth_devices[port_id];
5316 "Cannot get ethdev port %u register info to NULL\n",
5321 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
5322 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
5326 rte_eth_dev_get_eeprom_length(uint16_t port_id)
5328 struct rte_eth_dev *dev;
5330 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5331 dev = &rte_eth_devices[port_id];
5333 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
5334 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
5338 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
5340 struct rte_eth_dev *dev;
5342 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5343 dev = &rte_eth_devices[port_id];
5347 "Cannot get ethdev port %u EEPROM info to NULL\n",
5352 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
5353 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
5357 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
5359 struct rte_eth_dev *dev;
5361 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5362 dev = &rte_eth_devices[port_id];
5366 "Cannot set ethdev port %u EEPROM from NULL info\n",
5371 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
5372 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
5376 rte_eth_dev_get_module_info(uint16_t port_id,
5377 struct rte_eth_dev_module_info *modinfo)
5379 struct rte_eth_dev *dev;
5381 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5382 dev = &rte_eth_devices[port_id];
5384 if (modinfo == NULL) {
5386 "Cannot get ethdev port %u EEPROM module info to NULL\n",
5391 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
5392 return (*dev->dev_ops->get_module_info)(dev, modinfo);
5396 rte_eth_dev_get_module_eeprom(uint16_t port_id,
5397 struct rte_dev_eeprom_info *info)
5399 struct rte_eth_dev *dev;
5401 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5402 dev = &rte_eth_devices[port_id];
5406 "Cannot get ethdev port %u module EEPROM info to NULL\n",
5411 if (info->data == NULL) {
5413 "Cannot get ethdev port %u module EEPROM data to NULL\n",
5418 if (info->length == 0) {
5420 "Cannot get ethdev port %u module EEPROM to data with zero size\n",
5425 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
5426 return (*dev->dev_ops->get_module_eeprom)(dev, info);
5430 rte_eth_dev_get_dcb_info(uint16_t port_id,
5431 struct rte_eth_dcb_info *dcb_info)
5433 struct rte_eth_dev *dev;
5435 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5436 dev = &rte_eth_devices[port_id];
5438 if (dcb_info == NULL) {
5440 "Cannot get ethdev port %u DCB info to NULL\n",
5445 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
5447 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
5448 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
5452 eth_dev_adjust_nb_desc(uint16_t *nb_desc,
5453 const struct rte_eth_desc_lim *desc_lim)
5455 if (desc_lim->nb_align != 0)
5456 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
5458 if (desc_lim->nb_max != 0)
5459 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
5461 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
5465 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
5466 uint16_t *nb_rx_desc,
5467 uint16_t *nb_tx_desc)
5469 struct rte_eth_dev_info dev_info;
5472 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5474 ret = rte_eth_dev_info_get(port_id, &dev_info);
5478 if (nb_rx_desc != NULL)
5479 eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
5481 if (nb_tx_desc != NULL)
5482 eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
5488 rte_eth_dev_hairpin_capability_get(uint16_t port_id,
5489 struct rte_eth_hairpin_cap *cap)
5491 struct rte_eth_dev *dev;
5493 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5494 dev = &rte_eth_devices[port_id];
5498 "Cannot get ethdev port %u hairpin capability to NULL\n",
5503 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_cap_get, -ENOTSUP);
5504 memset(cap, 0, sizeof(*cap));
5505 return eth_err(port_id, (*dev->dev_ops->hairpin_cap_get)(dev, cap));
5509 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
5511 struct rte_eth_dev *dev;
5513 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5514 dev = &rte_eth_devices[port_id];
5518 "Cannot test ethdev port %u mempool operation from NULL pool\n",
5523 if (*dev->dev_ops->pool_ops_supported == NULL)
5524 return 1; /* all pools are supported */
5526 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
5530 eth_dev_handle_port_list(const char *cmd __rte_unused,
5531 const char *params __rte_unused,
5532 struct rte_tel_data *d)
5536 rte_tel_data_start_array(d, RTE_TEL_INT_VAL);
5537 RTE_ETH_FOREACH_DEV(port_id)
5538 rte_tel_data_add_array_int(d, port_id);
5543 eth_dev_add_port_queue_stats(struct rte_tel_data *d, uint64_t *q_stats,
5544 const char *stat_name)
5547 struct rte_tel_data *q_data = rte_tel_data_alloc();
5550 rte_tel_data_start_array(q_data, RTE_TEL_U64_VAL);
5551 for (q = 0; q < RTE_ETHDEV_QUEUE_STAT_CNTRS; q++)
5552 rte_tel_data_add_array_u64(q_data, q_stats[q]);
5553 rte_tel_data_add_dict_container(d, stat_name, q_data, 0);
5556 #define ADD_DICT_STAT(stats, s) rte_tel_data_add_dict_u64(d, #s, stats.s)
5559 eth_dev_handle_port_stats(const char *cmd __rte_unused,
5561 struct rte_tel_data *d)
5563 struct rte_eth_stats stats;
5566 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
5569 port_id = atoi(params);
5570 if (!rte_eth_dev_is_valid_port(port_id))
5573 ret = rte_eth_stats_get(port_id, &stats);
5577 rte_tel_data_start_dict(d);
5578 ADD_DICT_STAT(stats, ipackets);
5579 ADD_DICT_STAT(stats, opackets);
5580 ADD_DICT_STAT(stats, ibytes);
5581 ADD_DICT_STAT(stats, obytes);
5582 ADD_DICT_STAT(stats, imissed);
5583 ADD_DICT_STAT(stats, ierrors);
5584 ADD_DICT_STAT(stats, oerrors);
5585 ADD_DICT_STAT(stats, rx_nombuf);
5586 eth_dev_add_port_queue_stats(d, stats.q_ipackets, "q_ipackets");
5587 eth_dev_add_port_queue_stats(d, stats.q_opackets, "q_opackets");
5588 eth_dev_add_port_queue_stats(d, stats.q_ibytes, "q_ibytes");
5589 eth_dev_add_port_queue_stats(d, stats.q_obytes, "q_obytes");
5590 eth_dev_add_port_queue_stats(d, stats.q_errors, "q_errors");
5596 eth_dev_handle_port_xstats(const char *cmd __rte_unused,
5598 struct rte_tel_data *d)
5600 struct rte_eth_xstat *eth_xstats;
5601 struct rte_eth_xstat_name *xstat_names;
5602 int port_id, num_xstats;
5606 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
5609 port_id = strtoul(params, &end_param, 0);
5610 if (*end_param != '\0')
5611 RTE_ETHDEV_LOG(NOTICE,
5612 "Extra parameters passed to ethdev telemetry command, ignoring");
5613 if (!rte_eth_dev_is_valid_port(port_id))
5616 num_xstats = rte_eth_xstats_get(port_id, NULL, 0);
5620 /* use one malloc for both names and stats */
5621 eth_xstats = malloc((sizeof(struct rte_eth_xstat) +
5622 sizeof(struct rte_eth_xstat_name)) * num_xstats);
5623 if (eth_xstats == NULL)
5625 xstat_names = (void *)ð_xstats[num_xstats];
5627 ret = rte_eth_xstats_get_names(port_id, xstat_names, num_xstats);
5628 if (ret < 0 || ret > num_xstats) {
5633 ret = rte_eth_xstats_get(port_id, eth_xstats, num_xstats);
5634 if (ret < 0 || ret > num_xstats) {
5639 rte_tel_data_start_dict(d);
5640 for (i = 0; i < num_xstats; i++)
5641 rte_tel_data_add_dict_u64(d, xstat_names[i].name,
5642 eth_xstats[i].value);
5648 eth_dev_handle_port_link_status(const char *cmd __rte_unused,
5650 struct rte_tel_data *d)
5652 static const char *status_str = "status";
5654 struct rte_eth_link link;
5657 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
5660 port_id = strtoul(params, &end_param, 0);
5661 if (*end_param != '\0')
5662 RTE_ETHDEV_LOG(NOTICE,
5663 "Extra parameters passed to ethdev telemetry command, ignoring");
5664 if (!rte_eth_dev_is_valid_port(port_id))
5667 ret = rte_eth_link_get_nowait(port_id, &link);
5671 rte_tel_data_start_dict(d);
5672 if (!link.link_status) {
5673 rte_tel_data_add_dict_string(d, status_str, "DOWN");
5676 rte_tel_data_add_dict_string(d, status_str, "UP");
5677 rte_tel_data_add_dict_u64(d, "speed", link.link_speed);
5678 rte_tel_data_add_dict_string(d, "duplex",
5679 (link.link_duplex == RTE_ETH_LINK_FULL_DUPLEX) ?
5680 "full-duplex" : "half-duplex");
5685 eth_dev_handle_port_info(const char *cmd __rte_unused,
5687 struct rte_tel_data *d)
5689 struct rte_tel_data *rxq_state, *txq_state;
5690 char mac_addr[RTE_ETHER_ADDR_FMT_SIZE];
5691 struct rte_eth_dev *eth_dev;
5695 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
5698 port_id = strtoul(params, &end_param, 0);
5699 if (*end_param != '\0')
5700 RTE_ETHDEV_LOG(NOTICE,
5701 "Extra parameters passed to ethdev telemetry command, ignoring");
5703 if (!rte_eth_dev_is_valid_port(port_id))
5706 eth_dev = &rte_eth_devices[port_id];
5708 rxq_state = rte_tel_data_alloc();
5712 txq_state = rte_tel_data_alloc();
5714 rte_tel_data_free(rxq_state);
5718 rte_tel_data_start_dict(d);
5719 rte_tel_data_add_dict_string(d, "name", eth_dev->data->name);
5720 rte_tel_data_add_dict_int(d, "state", eth_dev->state);
5721 rte_tel_data_add_dict_int(d, "nb_rx_queues",
5722 eth_dev->data->nb_rx_queues);
5723 rte_tel_data_add_dict_int(d, "nb_tx_queues",
5724 eth_dev->data->nb_tx_queues);
5725 rte_tel_data_add_dict_int(d, "port_id", eth_dev->data->port_id);
5726 rte_tel_data_add_dict_int(d, "mtu", eth_dev->data->mtu);
5727 rte_tel_data_add_dict_int(d, "rx_mbuf_size_min",
5728 eth_dev->data->min_rx_buf_size);
5729 rte_tel_data_add_dict_int(d, "rx_mbuf_alloc_fail",
5730 eth_dev->data->rx_mbuf_alloc_failed);
5731 rte_ether_format_addr(mac_addr, sizeof(mac_addr),
5732 eth_dev->data->mac_addrs);
5733 rte_tel_data_add_dict_string(d, "mac_addr", mac_addr);
5734 rte_tel_data_add_dict_int(d, "promiscuous",
5735 eth_dev->data->promiscuous);
5736 rte_tel_data_add_dict_int(d, "scattered_rx",
5737 eth_dev->data->scattered_rx);
5738 rte_tel_data_add_dict_int(d, "all_multicast",
5739 eth_dev->data->all_multicast);
5740 rte_tel_data_add_dict_int(d, "dev_started", eth_dev->data->dev_started);
5741 rte_tel_data_add_dict_int(d, "lro", eth_dev->data->lro);
5742 rte_tel_data_add_dict_int(d, "dev_configured",
5743 eth_dev->data->dev_configured);
5745 rte_tel_data_start_array(rxq_state, RTE_TEL_INT_VAL);
5746 for (i = 0; i < eth_dev->data->nb_rx_queues; i++)
5747 rte_tel_data_add_array_int(rxq_state,
5748 eth_dev->data->rx_queue_state[i]);
5750 rte_tel_data_start_array(txq_state, RTE_TEL_INT_VAL);
5751 for (i = 0; i < eth_dev->data->nb_tx_queues; i++)
5752 rte_tel_data_add_array_int(txq_state,
5753 eth_dev->data->tx_queue_state[i]);
5755 rte_tel_data_add_dict_container(d, "rxq_state", rxq_state, 0);
5756 rte_tel_data_add_dict_container(d, "txq_state", txq_state, 0);
5757 rte_tel_data_add_dict_int(d, "numa_node", eth_dev->data->numa_node);
5758 rte_tel_data_add_dict_int(d, "dev_flags", eth_dev->data->dev_flags);
5759 rte_tel_data_add_dict_int(d, "rx_offloads",
5760 eth_dev->data->dev_conf.rxmode.offloads);
5761 rte_tel_data_add_dict_int(d, "tx_offloads",
5762 eth_dev->data->dev_conf.txmode.offloads);
5763 rte_tel_data_add_dict_int(d, "ethdev_rss_hf",
5764 eth_dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf);
5770 rte_eth_representor_info_get(uint16_t port_id,
5771 struct rte_eth_representor_info *info)
5773 struct rte_eth_dev *dev;
5775 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5776 dev = &rte_eth_devices[port_id];
5778 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->representor_info_get, -ENOTSUP);
5779 return eth_err(port_id, (*dev->dev_ops->representor_info_get)(dev, info));
5783 rte_eth_rx_metadata_negotiate(uint16_t port_id, uint64_t *features)
5785 struct rte_eth_dev *dev;
5787 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5788 dev = &rte_eth_devices[port_id];
5790 if (dev->data->dev_configured != 0) {
5792 "The port (ID=%"PRIu16") is already configured\n",
5797 if (features == NULL) {
5798 RTE_ETHDEV_LOG(ERR, "Invalid features (NULL)\n");
5802 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_metadata_negotiate, -ENOTSUP);
5803 return eth_err(port_id,
5804 (*dev->dev_ops->rx_metadata_negotiate)(dev, features));
5808 rte_eth_ip_reassembly_capability_get(uint16_t port_id,
5809 struct rte_eth_ip_reassembly_params *reassembly_capa)
5811 struct rte_eth_dev *dev;
5813 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5814 dev = &rte_eth_devices[port_id];
5816 if (dev->data->dev_configured == 0) {
5818 "Device with port_id=%u is not configured.\n"
5819 "Cannot get IP reassembly capability\n",
5824 if (reassembly_capa == NULL) {
5825 RTE_ETHDEV_LOG(ERR, "Cannot get reassembly capability to NULL");
5829 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->ip_reassembly_capability_get,
5831 memset(reassembly_capa, 0, sizeof(struct rte_eth_ip_reassembly_params));
5833 return eth_err(port_id, (*dev->dev_ops->ip_reassembly_capability_get)
5834 (dev, reassembly_capa));
5838 rte_eth_ip_reassembly_conf_get(uint16_t port_id,
5839 struct rte_eth_ip_reassembly_params *conf)
5841 struct rte_eth_dev *dev;
5843 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5844 dev = &rte_eth_devices[port_id];
5846 if (dev->data->dev_configured == 0) {
5848 "Device with port_id=%u is not configured.\n"
5849 "Cannot get IP reassembly configuration\n",
5855 RTE_ETHDEV_LOG(ERR, "Cannot get reassembly info to NULL");
5859 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->ip_reassembly_conf_get,
5861 memset(conf, 0, sizeof(struct rte_eth_ip_reassembly_params));
5862 return eth_err(port_id,
5863 (*dev->dev_ops->ip_reassembly_conf_get)(dev, conf));
5867 rte_eth_ip_reassembly_conf_set(uint16_t port_id,
5868 const struct rte_eth_ip_reassembly_params *conf)
5870 struct rte_eth_dev *dev;
5872 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5873 dev = &rte_eth_devices[port_id];
5875 if (dev->data->dev_configured == 0) {
5877 "Device with port_id=%u is not configured.\n"
5878 "Cannot set IP reassembly configuration",
5883 if (dev->data->dev_started != 0) {
5885 "Device with port_id=%u started,\n"
5886 "cannot configure IP reassembly params.\n",
5893 "Invalid IP reassembly configuration (NULL)\n");
5897 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->ip_reassembly_conf_set,
5899 return eth_err(port_id,
5900 (*dev->dev_ops->ip_reassembly_conf_set)(dev, conf));
5904 rte_eth_dev_priv_dump(uint16_t port_id, FILE *file)
5906 struct rte_eth_dev *dev;
5908 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5909 dev = &rte_eth_devices[port_id];
5912 RTE_ETHDEV_LOG(ERR, "Invalid file (NULL)\n");
5916 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->eth_dev_priv_dump, -ENOTSUP);
5917 return eth_err(port_id, (*dev->dev_ops->eth_dev_priv_dump)(dev, file));
5920 RTE_LOG_REGISTER_DEFAULT(rte_eth_dev_logtype, INFO);
5922 RTE_INIT(ethdev_init_telemetry)
5924 rte_telemetry_register_cmd("/ethdev/list", eth_dev_handle_port_list,
5925 "Returns list of available ethdev ports. Takes no parameters");
5926 rte_telemetry_register_cmd("/ethdev/stats", eth_dev_handle_port_stats,
5927 "Returns the common stats for a port. Parameters: int port_id");
5928 rte_telemetry_register_cmd("/ethdev/xstats", eth_dev_handle_port_xstats,
5929 "Returns the extended stats for a port. Parameters: int port_id");
5930 rte_telemetry_register_cmd("/ethdev/link_status",
5931 eth_dev_handle_port_link_status,
5932 "Returns the link status for a port. Parameters: int port_id");
5933 rte_telemetry_register_cmd("/ethdev/info", eth_dev_handle_port_info,
5934 "Returns the device info for a port. Parameters: int port_id");
5935 rte_telemetry_register_cmd("/ethdev/module_eeprom", eth_dev_handle_port_module_eeprom,
5936 "Returns module EEPROM info with SFF specs. Parameters: int port_id");