1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
12 #include <sys/queue.h>
14 #include <rte_byteorder.h>
16 #include <rte_debug.h>
17 #include <rte_interrupts.h>
18 #include <rte_memory.h>
19 #include <rte_memcpy.h>
20 #include <rte_memzone.h>
21 #include <rte_launch.h>
23 #include <rte_per_lcore.h>
24 #include <rte_lcore.h>
25 #include <rte_branch_prediction.h>
26 #include <rte_common.h>
27 #include <rte_mempool.h>
28 #include <rte_malloc.h>
30 #include <rte_errno.h>
31 #include <rte_spinlock.h>
32 #include <rte_string_fns.h>
33 #include <rte_kvargs.h>
34 #include <rte_class.h>
35 #include <rte_ether.h>
36 #include <rte_telemetry.h>
38 #include "rte_ethdev_trace.h"
39 #include "rte_ethdev.h"
40 #include "ethdev_driver.h"
41 #include "ethdev_profile.h"
42 #include "ethdev_private.h"
44 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
45 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
47 /* public fast-path API */
48 struct rte_eth_fp_ops rte_eth_fp_ops[RTE_MAX_ETHPORTS];
50 /* spinlock for eth device callbacks */
51 static rte_spinlock_t eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
53 /* spinlock for add/remove Rx callbacks */
54 static rte_spinlock_t eth_dev_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
56 /* spinlock for add/remove Tx callbacks */
57 static rte_spinlock_t eth_dev_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
59 /* spinlock for shared data allocation */
60 static rte_spinlock_t eth_dev_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
62 /* store statistics names and its offset in stats structure */
63 struct rte_eth_xstats_name_off {
64 char name[RTE_ETH_XSTATS_NAME_SIZE];
68 /* Shared memory between primary and secondary processes. */
70 uint64_t next_owner_id;
71 rte_spinlock_t ownership_lock;
72 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
73 } *eth_dev_shared_data;
75 static const struct rte_eth_xstats_name_off eth_dev_stats_strings[] = {
76 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
77 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
78 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
79 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
80 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
81 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
82 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
83 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
87 #define RTE_NB_STATS RTE_DIM(eth_dev_stats_strings)
89 static const struct rte_eth_xstats_name_off eth_dev_rxq_stats_strings[] = {
90 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
91 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
92 {"errors", offsetof(struct rte_eth_stats, q_errors)},
95 #define RTE_NB_RXQ_STATS RTE_DIM(eth_dev_rxq_stats_strings)
97 static const struct rte_eth_xstats_name_off eth_dev_txq_stats_strings[] = {
98 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
99 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
101 #define RTE_NB_TXQ_STATS RTE_DIM(eth_dev_txq_stats_strings)
103 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
104 { RTE_ETH_RX_OFFLOAD_##_name, #_name }
106 static const struct {
109 } eth_dev_rx_offload_names[] = {
110 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
111 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
112 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
113 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
114 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
115 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
116 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
118 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
119 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
120 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
121 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
122 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
123 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
124 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
125 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
126 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
127 RTE_RX_OFFLOAD_BIT2STR(RSS_HASH),
128 RTE_RX_OFFLOAD_BIT2STR(BUFFER_SPLIT),
131 #undef RTE_RX_OFFLOAD_BIT2STR
132 #undef RTE_ETH_RX_OFFLOAD_BIT2STR
134 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
135 { RTE_ETH_TX_OFFLOAD_##_name, #_name }
137 static const struct {
140 } eth_dev_tx_offload_names[] = {
141 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
142 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
143 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
144 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
147 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
148 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
149 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
150 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
151 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
152 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
155 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
156 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
157 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
158 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
159 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
160 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
161 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
162 RTE_TX_OFFLOAD_BIT2STR(SEND_ON_TIMESTAMP),
165 #undef RTE_TX_OFFLOAD_BIT2STR
167 static const struct {
170 } rte_eth_dev_capa_names[] = {
171 {RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP, "RUNTIME_RX_QUEUE_SETUP"},
172 {RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP, "RUNTIME_TX_QUEUE_SETUP"},
173 {RTE_ETH_DEV_CAPA_RXQ_SHARE, "RXQ_SHARE"},
174 {RTE_ETH_DEV_CAPA_FLOW_RULE_KEEP, "FLOW_RULE_KEEP"},
175 {RTE_ETH_DEV_CAPA_FLOW_SHARED_OBJECT_KEEP, "FLOW_SHARED_OBJECT_KEEP"},
179 * The user application callback description.
181 * It contains callback address to be registered by user application,
182 * the pointer to the parameters for callback, and the event type.
184 struct rte_eth_dev_callback {
185 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
186 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
187 void *cb_arg; /**< Parameter for callback */
188 void *ret_param; /**< Return parameter */
189 enum rte_eth_event_type event; /**< Interrupt event type */
190 uint32_t active; /**< Callback is executing */
199 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
202 struct rte_devargs devargs;
203 const char *bus_param_key;
204 char *bus_str = NULL;
205 char *cls_str = NULL;
209 RTE_ETHDEV_LOG(ERR, "Cannot initialize NULL iterator\n");
213 if (devargs_str == NULL) {
215 "Cannot initialize iterator from NULL device description string\n");
219 memset(iter, 0, sizeof(*iter));
220 memset(&devargs, 0, sizeof(devargs));
223 * The devargs string may use various syntaxes:
224 * - 0000:08:00.0,representor=[1-3]
225 * - pci:0000:06:00.0,representor=[0,5]
226 * - class=eth,mac=00:11:22:33:44:55
227 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
231 * Handle pure class filter (i.e. without any bus-level argument),
232 * from future new syntax.
233 * rte_devargs_parse() is not yet supporting the new syntax,
234 * that's why this simple case is temporarily parsed here.
236 #define iter_anybus_str "class=eth,"
237 if (strncmp(devargs_str, iter_anybus_str,
238 strlen(iter_anybus_str)) == 0) {
239 iter->cls_str = devargs_str + strlen(iter_anybus_str);
243 /* Split bus, device and parameters. */
244 ret = rte_devargs_parse(&devargs, devargs_str);
249 * Assume parameters of old syntax can match only at ethdev level.
250 * Extra parameters will be ignored, thanks to "+" prefix.
252 str_size = strlen(devargs.args) + 2;
253 cls_str = malloc(str_size);
254 if (cls_str == NULL) {
258 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
259 if (ret != str_size - 1) {
263 iter->cls_str = cls_str;
265 iter->bus = devargs.bus;
266 if (iter->bus->dev_iterate == NULL) {
271 /* Convert bus args to new syntax for use with new API dev_iterate. */
272 if ((strcmp(iter->bus->name, "vdev") == 0) ||
273 (strcmp(iter->bus->name, "fslmc") == 0) ||
274 (strcmp(iter->bus->name, "dpaa_bus") == 0)) {
275 bus_param_key = "name";
276 } else if (strcmp(iter->bus->name, "pci") == 0) {
277 bus_param_key = "addr";
282 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
283 bus_str = malloc(str_size);
284 if (bus_str == NULL) {
288 ret = snprintf(bus_str, str_size, "%s=%s",
289 bus_param_key, devargs.name);
290 if (ret != str_size - 1) {
294 iter->bus_str = bus_str;
297 iter->cls = rte_class_find_by_name("eth");
298 rte_devargs_reset(&devargs);
303 RTE_ETHDEV_LOG(ERR, "Bus %s does not support iterating.\n",
305 rte_devargs_reset(&devargs);
312 rte_eth_iterator_next(struct rte_dev_iterator *iter)
316 "Cannot get next device from NULL iterator\n");
317 return RTE_MAX_ETHPORTS;
320 if (iter->cls == NULL) /* invalid ethdev iterator */
321 return RTE_MAX_ETHPORTS;
323 do { /* loop to try all matching rte_device */
324 /* If not pure ethdev filter and */
325 if (iter->bus != NULL &&
326 /* not in middle of rte_eth_dev iteration, */
327 iter->class_device == NULL) {
328 /* get next rte_device to try. */
329 iter->device = iter->bus->dev_iterate(
330 iter->device, iter->bus_str, iter);
331 if (iter->device == NULL)
332 break; /* no more rte_device candidate */
334 /* A device is matching bus part, need to check ethdev part. */
335 iter->class_device = iter->cls->dev_iterate(
336 iter->class_device, iter->cls_str, iter);
337 if (iter->class_device != NULL)
338 return eth_dev_to_id(iter->class_device); /* match */
339 } while (iter->bus != NULL); /* need to try next rte_device */
341 /* No more ethdev port to iterate. */
342 rte_eth_iterator_cleanup(iter);
343 return RTE_MAX_ETHPORTS;
347 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
350 RTE_ETHDEV_LOG(ERR, "Cannot do clean up from NULL iterator\n");
354 if (iter->bus_str == NULL)
355 return; /* nothing to free in pure class filter */
356 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
357 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
358 memset(iter, 0, sizeof(*iter));
362 rte_eth_find_next(uint16_t port_id)
364 while (port_id < RTE_MAX_ETHPORTS &&
365 rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED)
368 if (port_id >= RTE_MAX_ETHPORTS)
369 return RTE_MAX_ETHPORTS;
375 * Macro to iterate over all valid ports for internal usage.
376 * Note: RTE_ETH_FOREACH_DEV is different because filtering owned ports.
378 #define RTE_ETH_FOREACH_VALID_DEV(port_id) \
379 for (port_id = rte_eth_find_next(0); \
380 port_id < RTE_MAX_ETHPORTS; \
381 port_id = rte_eth_find_next(port_id + 1))
384 rte_eth_find_next_of(uint16_t port_id, const struct rte_device *parent)
386 port_id = rte_eth_find_next(port_id);
387 while (port_id < RTE_MAX_ETHPORTS &&
388 rte_eth_devices[port_id].device != parent)
389 port_id = rte_eth_find_next(port_id + 1);
395 rte_eth_find_next_sibling(uint16_t port_id, uint16_t ref_port_id)
397 RTE_ETH_VALID_PORTID_OR_ERR_RET(ref_port_id, RTE_MAX_ETHPORTS);
398 return rte_eth_find_next_of(port_id,
399 rte_eth_devices[ref_port_id].device);
403 eth_dev_shared_data_prepare(void)
405 const unsigned flags = 0;
406 const struct rte_memzone *mz;
408 rte_spinlock_lock(ð_dev_shared_data_lock);
410 if (eth_dev_shared_data == NULL) {
411 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
412 /* Allocate port data and ownership shared memory. */
413 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
414 sizeof(*eth_dev_shared_data),
415 rte_socket_id(), flags);
417 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
419 rte_panic("Cannot allocate ethdev shared data\n");
421 eth_dev_shared_data = mz->addr;
422 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
423 eth_dev_shared_data->next_owner_id =
424 RTE_ETH_DEV_NO_OWNER + 1;
425 rte_spinlock_init(ð_dev_shared_data->ownership_lock);
426 memset(eth_dev_shared_data->data, 0,
427 sizeof(eth_dev_shared_data->data));
431 rte_spinlock_unlock(ð_dev_shared_data_lock);
435 eth_dev_is_allocated(const struct rte_eth_dev *ethdev)
437 return ethdev->data->name[0] != '\0';
440 static struct rte_eth_dev *
441 eth_dev_allocated(const char *name)
445 RTE_BUILD_BUG_ON(RTE_MAX_ETHPORTS >= UINT16_MAX);
447 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
448 if (rte_eth_devices[i].data != NULL &&
449 strcmp(rte_eth_devices[i].data->name, name) == 0)
450 return &rte_eth_devices[i];
456 rte_eth_dev_allocated(const char *name)
458 struct rte_eth_dev *ethdev;
460 eth_dev_shared_data_prepare();
462 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
464 ethdev = eth_dev_allocated(name);
466 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
472 eth_dev_find_free_port(void)
476 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
477 /* Using shared name field to find a free port. */
478 if (eth_dev_shared_data->data[i].name[0] == '\0') {
479 RTE_ASSERT(rte_eth_devices[i].state ==
484 return RTE_MAX_ETHPORTS;
487 static struct rte_eth_dev *
488 eth_dev_get(uint16_t port_id)
490 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
492 eth_dev->data = ð_dev_shared_data->data[port_id];
498 rte_eth_dev_allocate(const char *name)
501 struct rte_eth_dev *eth_dev = NULL;
504 name_len = strnlen(name, RTE_ETH_NAME_MAX_LEN);
506 RTE_ETHDEV_LOG(ERR, "Zero length Ethernet device name\n");
510 if (name_len >= RTE_ETH_NAME_MAX_LEN) {
511 RTE_ETHDEV_LOG(ERR, "Ethernet device name is too long\n");
515 eth_dev_shared_data_prepare();
517 /* Synchronize port creation between primary and secondary threads. */
518 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
520 if (eth_dev_allocated(name) != NULL) {
522 "Ethernet device with name %s already allocated\n",
527 port_id = eth_dev_find_free_port();
528 if (port_id == RTE_MAX_ETHPORTS) {
530 "Reached maximum number of Ethernet ports\n");
534 eth_dev = eth_dev_get(port_id);
535 strlcpy(eth_dev->data->name, name, sizeof(eth_dev->data->name));
536 eth_dev->data->port_id = port_id;
537 eth_dev->data->backer_port_id = RTE_MAX_ETHPORTS;
538 eth_dev->data->mtu = RTE_ETHER_MTU;
539 pthread_mutex_init(ð_dev->data->flow_ops_mutex, NULL);
542 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
548 * Attach to a port already registered by the primary process, which
549 * makes sure that the same device would have the same port ID both
550 * in the primary and secondary process.
553 rte_eth_dev_attach_secondary(const char *name)
556 struct rte_eth_dev *eth_dev = NULL;
558 eth_dev_shared_data_prepare();
560 /* Synchronize port attachment to primary port creation and release. */
561 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
563 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
564 if (strcmp(eth_dev_shared_data->data[i].name, name) == 0)
567 if (i == RTE_MAX_ETHPORTS) {
569 "Device %s is not driven by the primary process\n",
572 eth_dev = eth_dev_get(i);
573 RTE_ASSERT(eth_dev->data->port_id == i);
576 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
581 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
586 eth_dev_shared_data_prepare();
588 if (eth_dev->state != RTE_ETH_DEV_UNUSED)
589 rte_eth_dev_callback_process(eth_dev,
590 RTE_ETH_EVENT_DESTROY, NULL);
592 eth_dev_fp_ops_reset(rte_eth_fp_ops + eth_dev->data->port_id);
594 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
596 eth_dev->state = RTE_ETH_DEV_UNUSED;
597 eth_dev->device = NULL;
598 eth_dev->process_private = NULL;
599 eth_dev->intr_handle = NULL;
600 eth_dev->rx_pkt_burst = NULL;
601 eth_dev->tx_pkt_burst = NULL;
602 eth_dev->tx_pkt_prepare = NULL;
603 eth_dev->rx_queue_count = NULL;
604 eth_dev->rx_descriptor_status = NULL;
605 eth_dev->tx_descriptor_status = NULL;
606 eth_dev->dev_ops = NULL;
608 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
609 rte_free(eth_dev->data->rx_queues);
610 rte_free(eth_dev->data->tx_queues);
611 rte_free(eth_dev->data->mac_addrs);
612 rte_free(eth_dev->data->hash_mac_addrs);
613 rte_free(eth_dev->data->dev_private);
614 pthread_mutex_destroy(ð_dev->data->flow_ops_mutex);
615 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
618 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
624 rte_eth_dev_is_valid_port(uint16_t port_id)
626 if (port_id >= RTE_MAX_ETHPORTS ||
627 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
634 eth_is_valid_owner_id(uint64_t owner_id)
636 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
637 eth_dev_shared_data->next_owner_id <= owner_id)
643 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
645 port_id = rte_eth_find_next(port_id);
646 while (port_id < RTE_MAX_ETHPORTS &&
647 rte_eth_devices[port_id].data->owner.id != owner_id)
648 port_id = rte_eth_find_next(port_id + 1);
654 rte_eth_dev_owner_new(uint64_t *owner_id)
656 if (owner_id == NULL) {
657 RTE_ETHDEV_LOG(ERR, "Cannot get new owner ID to NULL\n");
661 eth_dev_shared_data_prepare();
663 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
665 *owner_id = eth_dev_shared_data->next_owner_id++;
667 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
672 eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
673 const struct rte_eth_dev_owner *new_owner)
675 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
676 struct rte_eth_dev_owner *port_owner;
678 if (port_id >= RTE_MAX_ETHPORTS || !eth_dev_is_allocated(ethdev)) {
679 RTE_ETHDEV_LOG(ERR, "Port ID %"PRIu16" is not allocated\n",
684 if (new_owner == NULL) {
686 "Cannot set ethdev port %u owner from NULL owner\n",
691 if (!eth_is_valid_owner_id(new_owner->id) &&
692 !eth_is_valid_owner_id(old_owner_id)) {
694 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
695 old_owner_id, new_owner->id);
699 port_owner = &rte_eth_devices[port_id].data->owner;
700 if (port_owner->id != old_owner_id) {
702 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
703 port_id, port_owner->name, port_owner->id);
707 /* can not truncate (same structure) */
708 strlcpy(port_owner->name, new_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN);
710 port_owner->id = new_owner->id;
712 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
713 port_id, new_owner->name, new_owner->id);
719 rte_eth_dev_owner_set(const uint16_t port_id,
720 const struct rte_eth_dev_owner *owner)
724 eth_dev_shared_data_prepare();
726 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
728 ret = eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
730 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
735 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
737 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
738 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
741 eth_dev_shared_data_prepare();
743 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
745 ret = eth_dev_owner_set(port_id, owner_id, &new_owner);
747 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
752 rte_eth_dev_owner_delete(const uint64_t owner_id)
757 eth_dev_shared_data_prepare();
759 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
761 if (eth_is_valid_owner_id(owner_id)) {
762 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++) {
763 struct rte_eth_dev_data *data =
764 rte_eth_devices[port_id].data;
765 if (data != NULL && data->owner.id == owner_id)
766 memset(&data->owner, 0,
767 sizeof(struct rte_eth_dev_owner));
769 RTE_ETHDEV_LOG(NOTICE,
770 "All port owners owned by %016"PRIx64" identifier have removed\n",
774 "Invalid owner ID=%016"PRIx64"\n",
779 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
785 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
787 struct rte_eth_dev *ethdev;
789 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
790 ethdev = &rte_eth_devices[port_id];
792 if (!eth_dev_is_allocated(ethdev)) {
793 RTE_ETHDEV_LOG(ERR, "Port ID %"PRIu16" is not allocated\n",
799 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u owner to NULL\n",
804 eth_dev_shared_data_prepare();
806 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
807 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
808 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
814 rte_eth_dev_socket_id(uint16_t port_id)
816 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
817 return rte_eth_devices[port_id].data->numa_node;
821 rte_eth_dev_get_sec_ctx(uint16_t port_id)
823 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
824 return rte_eth_devices[port_id].security_ctx;
828 rte_eth_dev_count_avail(void)
835 RTE_ETH_FOREACH_DEV(p)
842 rte_eth_dev_count_total(void)
844 uint16_t port, count = 0;
846 RTE_ETH_FOREACH_VALID_DEV(port)
853 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
857 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
860 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u name to NULL\n",
865 /* shouldn't check 'rte_eth_devices[i].data',
866 * because it might be overwritten by VDEV PMD */
867 tmp = eth_dev_shared_data->data[port_id].name;
873 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
878 RTE_ETHDEV_LOG(ERR, "Cannot get port ID from NULL name");
882 if (port_id == NULL) {
884 "Cannot get port ID to NULL for %s\n", name);
888 RTE_ETH_FOREACH_VALID_DEV(pid)
889 if (!strcmp(name, eth_dev_shared_data->data[pid].name)) {
898 eth_err(uint16_t port_id, int ret)
902 if (rte_eth_dev_is_removed(port_id))
908 eth_dev_rxq_release(struct rte_eth_dev *dev, uint16_t qid)
910 void **rxq = dev->data->rx_queues;
912 if (rxq[qid] == NULL)
915 if (dev->dev_ops->rx_queue_release != NULL)
916 (*dev->dev_ops->rx_queue_release)(dev, qid);
921 eth_dev_txq_release(struct rte_eth_dev *dev, uint16_t qid)
923 void **txq = dev->data->tx_queues;
925 if (txq[qid] == NULL)
928 if (dev->dev_ops->tx_queue_release != NULL)
929 (*dev->dev_ops->tx_queue_release)(dev, qid);
934 eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
936 uint16_t old_nb_queues = dev->data->nb_rx_queues;
939 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
940 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
941 sizeof(dev->data->rx_queues[0]) *
942 RTE_MAX_QUEUES_PER_PORT,
943 RTE_CACHE_LINE_SIZE);
944 if (dev->data->rx_queues == NULL) {
945 dev->data->nb_rx_queues = 0;
948 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
949 for (i = nb_queues; i < old_nb_queues; i++)
950 eth_dev_rxq_release(dev, i);
952 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
953 for (i = nb_queues; i < old_nb_queues; i++)
954 eth_dev_rxq_release(dev, i);
956 rte_free(dev->data->rx_queues);
957 dev->data->rx_queues = NULL;
959 dev->data->nb_rx_queues = nb_queues;
964 eth_dev_validate_rx_queue(const struct rte_eth_dev *dev, uint16_t rx_queue_id)
968 if (rx_queue_id >= dev->data->nb_rx_queues) {
969 port_id = dev->data->port_id;
971 "Invalid Rx queue_id=%u of device with port_id=%u\n",
972 rx_queue_id, port_id);
976 if (dev->data->rx_queues[rx_queue_id] == NULL) {
977 port_id = dev->data->port_id;
979 "Queue %u of device with port_id=%u has not been setup\n",
980 rx_queue_id, port_id);
988 eth_dev_validate_tx_queue(const struct rte_eth_dev *dev, uint16_t tx_queue_id)
992 if (tx_queue_id >= dev->data->nb_tx_queues) {
993 port_id = dev->data->port_id;
995 "Invalid Tx queue_id=%u of device with port_id=%u\n",
996 tx_queue_id, port_id);
1000 if (dev->data->tx_queues[tx_queue_id] == NULL) {
1001 port_id = dev->data->port_id;
1003 "Queue %u of device with port_id=%u has not been setup\n",
1004 tx_queue_id, port_id);
1012 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
1014 struct rte_eth_dev *dev;
1017 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1018 dev = &rte_eth_devices[port_id];
1020 if (!dev->data->dev_started) {
1022 "Port %u must be started before start any queue\n",
1027 ret = eth_dev_validate_rx_queue(dev, rx_queue_id);
1031 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
1033 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
1034 RTE_ETHDEV_LOG(INFO,
1035 "Can't start Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1036 rx_queue_id, port_id);
1040 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
1041 RTE_ETHDEV_LOG(INFO,
1042 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
1043 rx_queue_id, port_id);
1047 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev, rx_queue_id));
1051 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
1053 struct rte_eth_dev *dev;
1056 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1057 dev = &rte_eth_devices[port_id];
1059 ret = eth_dev_validate_rx_queue(dev, rx_queue_id);
1063 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
1065 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
1066 RTE_ETHDEV_LOG(INFO,
1067 "Can't stop Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1068 rx_queue_id, port_id);
1072 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
1073 RTE_ETHDEV_LOG(INFO,
1074 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
1075 rx_queue_id, port_id);
1079 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
1083 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
1085 struct rte_eth_dev *dev;
1088 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1089 dev = &rte_eth_devices[port_id];
1091 if (!dev->data->dev_started) {
1093 "Port %u must be started before start any queue\n",
1098 ret = eth_dev_validate_tx_queue(dev, tx_queue_id);
1102 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
1104 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
1105 RTE_ETHDEV_LOG(INFO,
1106 "Can't start Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1107 tx_queue_id, port_id);
1111 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
1112 RTE_ETHDEV_LOG(INFO,
1113 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
1114 tx_queue_id, port_id);
1118 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
1122 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
1124 struct rte_eth_dev *dev;
1127 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1128 dev = &rte_eth_devices[port_id];
1130 ret = eth_dev_validate_tx_queue(dev, tx_queue_id);
1134 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
1136 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
1137 RTE_ETHDEV_LOG(INFO,
1138 "Can't stop Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1139 tx_queue_id, port_id);
1143 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
1144 RTE_ETHDEV_LOG(INFO,
1145 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
1146 tx_queue_id, port_id);
1150 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
1154 eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
1156 uint16_t old_nb_queues = dev->data->nb_tx_queues;
1159 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
1160 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
1161 sizeof(dev->data->tx_queues[0]) *
1162 RTE_MAX_QUEUES_PER_PORT,
1163 RTE_CACHE_LINE_SIZE);
1164 if (dev->data->tx_queues == NULL) {
1165 dev->data->nb_tx_queues = 0;
1168 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
1169 for (i = nb_queues; i < old_nb_queues; i++)
1170 eth_dev_txq_release(dev, i);
1172 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1173 for (i = nb_queues; i < old_nb_queues; i++)
1174 eth_dev_txq_release(dev, i);
1176 rte_free(dev->data->tx_queues);
1177 dev->data->tx_queues = NULL;
1179 dev->data->nb_tx_queues = nb_queues;
1184 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1187 case RTE_ETH_SPEED_NUM_10M:
1188 return duplex ? RTE_ETH_LINK_SPEED_10M : RTE_ETH_LINK_SPEED_10M_HD;
1189 case RTE_ETH_SPEED_NUM_100M:
1190 return duplex ? RTE_ETH_LINK_SPEED_100M : RTE_ETH_LINK_SPEED_100M_HD;
1191 case RTE_ETH_SPEED_NUM_1G:
1192 return RTE_ETH_LINK_SPEED_1G;
1193 case RTE_ETH_SPEED_NUM_2_5G:
1194 return RTE_ETH_LINK_SPEED_2_5G;
1195 case RTE_ETH_SPEED_NUM_5G:
1196 return RTE_ETH_LINK_SPEED_5G;
1197 case RTE_ETH_SPEED_NUM_10G:
1198 return RTE_ETH_LINK_SPEED_10G;
1199 case RTE_ETH_SPEED_NUM_20G:
1200 return RTE_ETH_LINK_SPEED_20G;
1201 case RTE_ETH_SPEED_NUM_25G:
1202 return RTE_ETH_LINK_SPEED_25G;
1203 case RTE_ETH_SPEED_NUM_40G:
1204 return RTE_ETH_LINK_SPEED_40G;
1205 case RTE_ETH_SPEED_NUM_50G:
1206 return RTE_ETH_LINK_SPEED_50G;
1207 case RTE_ETH_SPEED_NUM_56G:
1208 return RTE_ETH_LINK_SPEED_56G;
1209 case RTE_ETH_SPEED_NUM_100G:
1210 return RTE_ETH_LINK_SPEED_100G;
1211 case RTE_ETH_SPEED_NUM_200G:
1212 return RTE_ETH_LINK_SPEED_200G;
1219 rte_eth_dev_rx_offload_name(uint64_t offload)
1221 const char *name = "UNKNOWN";
1224 for (i = 0; i < RTE_DIM(eth_dev_rx_offload_names); ++i) {
1225 if (offload == eth_dev_rx_offload_names[i].offload) {
1226 name = eth_dev_rx_offload_names[i].name;
1235 rte_eth_dev_tx_offload_name(uint64_t offload)
1237 const char *name = "UNKNOWN";
1240 for (i = 0; i < RTE_DIM(eth_dev_tx_offload_names); ++i) {
1241 if (offload == eth_dev_tx_offload_names[i].offload) {
1242 name = eth_dev_tx_offload_names[i].name;
1251 rte_eth_dev_capability_name(uint64_t capability)
1253 const char *name = "UNKNOWN";
1256 for (i = 0; i < RTE_DIM(rte_eth_dev_capa_names); ++i) {
1257 if (capability == rte_eth_dev_capa_names[i].offload) {
1258 name = rte_eth_dev_capa_names[i].name;
1267 eth_dev_check_lro_pkt_size(uint16_t port_id, uint32_t config_size,
1268 uint32_t max_rx_pkt_len, uint32_t dev_info_size)
1272 if (dev_info_size == 0) {
1273 if (config_size != max_rx_pkt_len) {
1274 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size"
1275 " %u != %u is not allowed\n",
1276 port_id, config_size, max_rx_pkt_len);
1279 } else if (config_size > dev_info_size) {
1280 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1281 "> max allowed value %u\n", port_id, config_size,
1284 } else if (config_size < RTE_ETHER_MIN_LEN) {
1285 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1286 "< min allowed value %u\n", port_id, config_size,
1287 (unsigned int)RTE_ETHER_MIN_LEN);
1294 * Validate offloads that are requested through rte_eth_dev_configure against
1295 * the offloads successfully set by the Ethernet device.
1298 * The port identifier of the Ethernet device.
1299 * @param req_offloads
1300 * The offloads that have been requested through `rte_eth_dev_configure`.
1301 * @param set_offloads
1302 * The offloads successfully set by the Ethernet device.
1303 * @param offload_type
1304 * The offload type i.e. Rx/Tx string.
1305 * @param offload_name
1306 * The function that prints the offload name.
1308 * - (0) if validation successful.
1309 * - (-EINVAL) if requested offload has been silently disabled.
1313 eth_dev_validate_offloads(uint16_t port_id, uint64_t req_offloads,
1314 uint64_t set_offloads, const char *offload_type,
1315 const char *(*offload_name)(uint64_t))
1317 uint64_t offloads_diff = req_offloads ^ set_offloads;
1321 while (offloads_diff != 0) {
1322 /* Check if any offload is requested but not enabled. */
1323 offload = RTE_BIT64(__builtin_ctzll(offloads_diff));
1324 if (offload & req_offloads) {
1326 "Port %u failed to enable %s offload %s\n",
1327 port_id, offload_type, offload_name(offload));
1331 /* Check if offload couldn't be disabled. */
1332 if (offload & set_offloads) {
1333 RTE_ETHDEV_LOG(DEBUG,
1334 "Port %u %s offload %s is not requested but enabled\n",
1335 port_id, offload_type, offload_name(offload));
1338 offloads_diff &= ~offload;
1345 eth_dev_get_overhead_len(uint32_t max_rx_pktlen, uint16_t max_mtu)
1347 uint32_t overhead_len;
1349 if (max_mtu != UINT16_MAX && max_rx_pktlen > max_mtu)
1350 overhead_len = max_rx_pktlen - max_mtu;
1352 overhead_len = RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN;
1354 return overhead_len;
1357 /* rte_eth_dev_info_get() should be called prior to this function */
1359 eth_dev_validate_mtu(uint16_t port_id, struct rte_eth_dev_info *dev_info,
1362 uint32_t overhead_len;
1363 uint32_t frame_size;
1365 if (mtu < dev_info->min_mtu) {
1367 "MTU (%u) < device min MTU (%u) for port_id %u\n",
1368 mtu, dev_info->min_mtu, port_id);
1371 if (mtu > dev_info->max_mtu) {
1373 "MTU (%u) > device max MTU (%u) for port_id %u\n",
1374 mtu, dev_info->max_mtu, port_id);
1378 overhead_len = eth_dev_get_overhead_len(dev_info->max_rx_pktlen,
1380 frame_size = mtu + overhead_len;
1381 if (frame_size < RTE_ETHER_MIN_LEN) {
1383 "Frame size (%u) < min frame size (%u) for port_id %u\n",
1384 frame_size, RTE_ETHER_MIN_LEN, port_id);
1388 if (frame_size > dev_info->max_rx_pktlen) {
1390 "Frame size (%u) > device max frame size (%u) for port_id %u\n",
1391 frame_size, dev_info->max_rx_pktlen, port_id);
1399 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1400 const struct rte_eth_conf *dev_conf)
1402 struct rte_eth_dev *dev;
1403 struct rte_eth_dev_info dev_info;
1404 struct rte_eth_conf orig_conf;
1409 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1410 dev = &rte_eth_devices[port_id];
1412 if (dev_conf == NULL) {
1414 "Cannot configure ethdev port %u from NULL config\n",
1419 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1421 if (dev->data->dev_started) {
1423 "Port %u must be stopped to allow configuration\n",
1429 * Ensure that "dev_configured" is always 0 each time prepare to do
1430 * dev_configure() to avoid any non-anticipated behaviour.
1431 * And set to 1 when dev_configure() is executed successfully.
1433 dev->data->dev_configured = 0;
1435 /* Store original config, as rollback required on failure */
1436 memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1439 * Copy the dev_conf parameter into the dev structure.
1440 * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1442 if (dev_conf != &dev->data->dev_conf)
1443 memcpy(&dev->data->dev_conf, dev_conf,
1444 sizeof(dev->data->dev_conf));
1446 /* Backup mtu for rollback */
1447 old_mtu = dev->data->mtu;
1449 ret = rte_eth_dev_info_get(port_id, &dev_info);
1453 /* If number of queues specified by application for both Rx and Tx is
1454 * zero, use driver preferred values. This cannot be done individually
1455 * as it is valid for either Tx or Rx (but not both) to be zero.
1456 * If driver does not provide any preferred valued, fall back on
1459 if (nb_rx_q == 0 && nb_tx_q == 0) {
1460 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1462 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1463 nb_tx_q = dev_info.default_txportconf.nb_queues;
1465 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1468 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1470 "Number of Rx queues requested (%u) is greater than max supported(%d)\n",
1471 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1476 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1478 "Number of Tx queues requested (%u) is greater than max supported(%d)\n",
1479 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1485 * Check that the numbers of Rx and Tx queues are not greater
1486 * than the maximum number of Rx and Tx queues supported by the
1487 * configured device.
1489 if (nb_rx_q > dev_info.max_rx_queues) {
1490 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1491 port_id, nb_rx_q, dev_info.max_rx_queues);
1496 if (nb_tx_q > dev_info.max_tx_queues) {
1497 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1498 port_id, nb_tx_q, dev_info.max_tx_queues);
1503 /* Check that the device supports requested interrupts */
1504 if ((dev_conf->intr_conf.lsc == 1) &&
1505 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1506 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1507 dev->device->driver->name);
1511 if ((dev_conf->intr_conf.rmv == 1) &&
1512 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1513 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1514 dev->device->driver->name);
1519 if (dev_conf->rxmode.mtu == 0)
1520 dev->data->dev_conf.rxmode.mtu = RTE_ETHER_MTU;
1522 ret = eth_dev_validate_mtu(port_id, &dev_info,
1523 dev->data->dev_conf.rxmode.mtu);
1527 dev->data->mtu = dev->data->dev_conf.rxmode.mtu;
1530 * If LRO is enabled, check that the maximum aggregated packet
1531 * size is supported by the configured device.
1533 if (dev_conf->rxmode.offloads & RTE_ETH_RX_OFFLOAD_TCP_LRO) {
1534 uint32_t max_rx_pktlen;
1535 uint32_t overhead_len;
1537 overhead_len = eth_dev_get_overhead_len(dev_info.max_rx_pktlen,
1539 max_rx_pktlen = dev->data->dev_conf.rxmode.mtu + overhead_len;
1540 if (dev_conf->rxmode.max_lro_pkt_size == 0)
1541 dev->data->dev_conf.rxmode.max_lro_pkt_size = max_rx_pktlen;
1542 ret = eth_dev_check_lro_pkt_size(port_id,
1543 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1545 dev_info.max_lro_pkt_size);
1550 /* Any requested offloading must be within its device capabilities */
1551 if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1552 dev_conf->rxmode.offloads) {
1554 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1555 "capabilities 0x%"PRIx64" in %s()\n",
1556 port_id, dev_conf->rxmode.offloads,
1557 dev_info.rx_offload_capa,
1562 if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1563 dev_conf->txmode.offloads) {
1565 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1566 "capabilities 0x%"PRIx64" in %s()\n",
1567 port_id, dev_conf->txmode.offloads,
1568 dev_info.tx_offload_capa,
1574 dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf =
1575 rte_eth_rss_hf_refine(dev_conf->rx_adv_conf.rss_conf.rss_hf);
1577 /* Check that device supports requested rss hash functions. */
1578 if ((dev_info.flow_type_rss_offloads |
1579 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1580 dev_info.flow_type_rss_offloads) {
1582 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1583 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1584 dev_info.flow_type_rss_offloads);
1589 /* Check if Rx RSS distribution is disabled but RSS hash is enabled. */
1590 if (((dev_conf->rxmode.mq_mode & RTE_ETH_MQ_RX_RSS_FLAG) == 0) &&
1591 (dev_conf->rxmode.offloads & RTE_ETH_RX_OFFLOAD_RSS_HASH)) {
1593 "Ethdev port_id=%u config invalid Rx mq_mode without RSS but %s offload is requested\n",
1595 rte_eth_dev_rx_offload_name(RTE_ETH_RX_OFFLOAD_RSS_HASH));
1601 * Setup new number of Rx/Tx queues and reconfigure device.
1603 diag = eth_dev_rx_queue_config(dev, nb_rx_q);
1606 "Port%u eth_dev_rx_queue_config = %d\n",
1612 diag = eth_dev_tx_queue_config(dev, nb_tx_q);
1615 "Port%u eth_dev_tx_queue_config = %d\n",
1617 eth_dev_rx_queue_config(dev, 0);
1622 diag = (*dev->dev_ops->dev_configure)(dev);
1624 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1626 ret = eth_err(port_id, diag);
1630 /* Initialize Rx profiling if enabled at compilation time. */
1631 diag = __rte_eth_dev_profile_init(port_id, dev);
1633 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1635 ret = eth_err(port_id, diag);
1639 /* Validate Rx offloads. */
1640 diag = eth_dev_validate_offloads(port_id,
1641 dev_conf->rxmode.offloads,
1642 dev->data->dev_conf.rxmode.offloads, "Rx",
1643 rte_eth_dev_rx_offload_name);
1649 /* Validate Tx offloads. */
1650 diag = eth_dev_validate_offloads(port_id,
1651 dev_conf->txmode.offloads,
1652 dev->data->dev_conf.txmode.offloads, "Tx",
1653 rte_eth_dev_tx_offload_name);
1659 dev->data->dev_configured = 1;
1660 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, 0);
1663 eth_dev_rx_queue_config(dev, 0);
1664 eth_dev_tx_queue_config(dev, 0);
1666 memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1667 if (old_mtu != dev->data->mtu)
1668 dev->data->mtu = old_mtu;
1670 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, ret);
1675 rte_eth_dev_internal_reset(struct rte_eth_dev *dev)
1677 if (dev->data->dev_started) {
1678 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1679 dev->data->port_id);
1683 eth_dev_rx_queue_config(dev, 0);
1684 eth_dev_tx_queue_config(dev, 0);
1686 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1690 eth_dev_mac_restore(struct rte_eth_dev *dev,
1691 struct rte_eth_dev_info *dev_info)
1693 struct rte_ether_addr *addr;
1698 /* replay MAC address configuration including default MAC */
1699 addr = &dev->data->mac_addrs[0];
1700 if (*dev->dev_ops->mac_addr_set != NULL)
1701 (*dev->dev_ops->mac_addr_set)(dev, addr);
1702 else if (*dev->dev_ops->mac_addr_add != NULL)
1703 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1705 if (*dev->dev_ops->mac_addr_add != NULL) {
1706 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1707 addr = &dev->data->mac_addrs[i];
1709 /* skip zero address */
1710 if (rte_is_zero_ether_addr(addr))
1714 pool_mask = dev->data->mac_pool_sel[i];
1717 if (pool_mask & UINT64_C(1))
1718 (*dev->dev_ops->mac_addr_add)(dev,
1722 } while (pool_mask);
1728 eth_dev_config_restore(struct rte_eth_dev *dev,
1729 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1733 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1734 eth_dev_mac_restore(dev, dev_info);
1736 /* replay promiscuous configuration */
1738 * use callbacks directly since we don't need port_id check and
1739 * would like to bypass the same value set
1741 if (rte_eth_promiscuous_get(port_id) == 1 &&
1742 *dev->dev_ops->promiscuous_enable != NULL) {
1743 ret = eth_err(port_id,
1744 (*dev->dev_ops->promiscuous_enable)(dev));
1745 if (ret != 0 && ret != -ENOTSUP) {
1747 "Failed to enable promiscuous mode for device (port %u): %s\n",
1748 port_id, rte_strerror(-ret));
1751 } else if (rte_eth_promiscuous_get(port_id) == 0 &&
1752 *dev->dev_ops->promiscuous_disable != NULL) {
1753 ret = eth_err(port_id,
1754 (*dev->dev_ops->promiscuous_disable)(dev));
1755 if (ret != 0 && ret != -ENOTSUP) {
1757 "Failed to disable promiscuous mode for device (port %u): %s\n",
1758 port_id, rte_strerror(-ret));
1763 /* replay all multicast configuration */
1765 * use callbacks directly since we don't need port_id check and
1766 * would like to bypass the same value set
1768 if (rte_eth_allmulticast_get(port_id) == 1 &&
1769 *dev->dev_ops->allmulticast_enable != NULL) {
1770 ret = eth_err(port_id,
1771 (*dev->dev_ops->allmulticast_enable)(dev));
1772 if (ret != 0 && ret != -ENOTSUP) {
1774 "Failed to enable allmulticast mode for device (port %u): %s\n",
1775 port_id, rte_strerror(-ret));
1778 } else if (rte_eth_allmulticast_get(port_id) == 0 &&
1779 *dev->dev_ops->allmulticast_disable != NULL) {
1780 ret = eth_err(port_id,
1781 (*dev->dev_ops->allmulticast_disable)(dev));
1782 if (ret != 0 && ret != -ENOTSUP) {
1784 "Failed to disable allmulticast mode for device (port %u): %s\n",
1785 port_id, rte_strerror(-ret));
1794 rte_eth_dev_start(uint16_t port_id)
1796 struct rte_eth_dev *dev;
1797 struct rte_eth_dev_info dev_info;
1801 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1802 dev = &rte_eth_devices[port_id];
1804 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1806 if (dev->data->dev_configured == 0) {
1807 RTE_ETHDEV_LOG(INFO,
1808 "Device with port_id=%"PRIu16" is not configured.\n",
1813 if (dev->data->dev_started != 0) {
1814 RTE_ETHDEV_LOG(INFO,
1815 "Device with port_id=%"PRIu16" already started\n",
1820 ret = rte_eth_dev_info_get(port_id, &dev_info);
1824 /* Lets restore MAC now if device does not support live change */
1825 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1826 eth_dev_mac_restore(dev, &dev_info);
1828 diag = (*dev->dev_ops->dev_start)(dev);
1830 dev->data->dev_started = 1;
1832 return eth_err(port_id, diag);
1834 ret = eth_dev_config_restore(dev, &dev_info, port_id);
1837 "Error during restoring configuration for device (port %u): %s\n",
1838 port_id, rte_strerror(-ret));
1839 ret_stop = rte_eth_dev_stop(port_id);
1840 if (ret_stop != 0) {
1842 "Failed to stop device (port %u): %s\n",
1843 port_id, rte_strerror(-ret_stop));
1849 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1850 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1851 (*dev->dev_ops->link_update)(dev, 0);
1854 /* expose selection of PMD fast-path functions */
1855 eth_dev_fp_ops_setup(rte_eth_fp_ops + port_id, dev);
1857 rte_ethdev_trace_start(port_id);
1862 rte_eth_dev_stop(uint16_t port_id)
1864 struct rte_eth_dev *dev;
1867 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1868 dev = &rte_eth_devices[port_id];
1870 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_stop, -ENOTSUP);
1872 if (dev->data->dev_started == 0) {
1873 RTE_ETHDEV_LOG(INFO,
1874 "Device with port_id=%"PRIu16" already stopped\n",
1879 /* point fast-path functions to dummy ones */
1880 eth_dev_fp_ops_reset(rte_eth_fp_ops + port_id);
1882 dev->data->dev_started = 0;
1883 ret = (*dev->dev_ops->dev_stop)(dev);
1884 rte_ethdev_trace_stop(port_id, ret);
1890 rte_eth_dev_set_link_up(uint16_t port_id)
1892 struct rte_eth_dev *dev;
1894 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1895 dev = &rte_eth_devices[port_id];
1897 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1898 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1902 rte_eth_dev_set_link_down(uint16_t port_id)
1904 struct rte_eth_dev *dev;
1906 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1907 dev = &rte_eth_devices[port_id];
1909 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1910 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1914 rte_eth_dev_close(uint16_t port_id)
1916 struct rte_eth_dev *dev;
1917 int firsterr, binerr;
1918 int *lasterr = &firsterr;
1920 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1921 dev = &rte_eth_devices[port_id];
1923 if (dev->data->dev_started) {
1924 RTE_ETHDEV_LOG(ERR, "Cannot close started device (port %u)\n",
1929 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_close, -ENOTSUP);
1930 *lasterr = (*dev->dev_ops->dev_close)(dev);
1934 rte_ethdev_trace_close(port_id);
1935 *lasterr = rte_eth_dev_release_port(dev);
1941 rte_eth_dev_reset(uint16_t port_id)
1943 struct rte_eth_dev *dev;
1946 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1947 dev = &rte_eth_devices[port_id];
1949 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1951 ret = rte_eth_dev_stop(port_id);
1954 "Failed to stop device (port %u) before reset: %s - ignore\n",
1955 port_id, rte_strerror(-ret));
1957 ret = dev->dev_ops->dev_reset(dev);
1959 return eth_err(port_id, ret);
1963 rte_eth_dev_is_removed(uint16_t port_id)
1965 struct rte_eth_dev *dev;
1968 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1969 dev = &rte_eth_devices[port_id];
1971 if (dev->state == RTE_ETH_DEV_REMOVED)
1974 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1976 ret = dev->dev_ops->is_removed(dev);
1978 /* Device is physically removed. */
1979 dev->state = RTE_ETH_DEV_REMOVED;
1985 rte_eth_rx_queue_check_split(const struct rte_eth_rxseg_split *rx_seg,
1986 uint16_t n_seg, uint32_t *mbp_buf_size,
1987 const struct rte_eth_dev_info *dev_info)
1989 const struct rte_eth_rxseg_capa *seg_capa = &dev_info->rx_seg_capa;
1990 struct rte_mempool *mp_first;
1991 uint32_t offset_mask;
1994 if (n_seg > seg_capa->max_nseg) {
1996 "Requested Rx segments %u exceed supported %u\n",
1997 n_seg, seg_capa->max_nseg);
2001 * Check the sizes and offsets against buffer sizes
2002 * for each segment specified in extended configuration.
2004 mp_first = rx_seg[0].mp;
2005 offset_mask = RTE_BIT32(seg_capa->offset_align_log2) - 1;
2006 for (seg_idx = 0; seg_idx < n_seg; seg_idx++) {
2007 struct rte_mempool *mpl = rx_seg[seg_idx].mp;
2008 uint32_t length = rx_seg[seg_idx].length;
2009 uint32_t offset = rx_seg[seg_idx].offset;
2012 RTE_ETHDEV_LOG(ERR, "null mempool pointer\n");
2015 if (seg_idx != 0 && mp_first != mpl &&
2016 seg_capa->multi_pools == 0) {
2017 RTE_ETHDEV_LOG(ERR, "Receiving to multiple pools is not supported\n");
2021 if (seg_capa->offset_allowed == 0) {
2022 RTE_ETHDEV_LOG(ERR, "Rx segmentation with offset is not supported\n");
2025 if (offset & offset_mask) {
2026 RTE_ETHDEV_LOG(ERR, "Rx segmentation invalid offset alignment %u, %u\n",
2028 seg_capa->offset_align_log2);
2032 if (mpl->private_data_size <
2033 sizeof(struct rte_pktmbuf_pool_private)) {
2035 "%s private_data_size %u < %u\n",
2036 mpl->name, mpl->private_data_size,
2037 (unsigned int)sizeof
2038 (struct rte_pktmbuf_pool_private));
2041 offset += seg_idx != 0 ? 0 : RTE_PKTMBUF_HEADROOM;
2042 *mbp_buf_size = rte_pktmbuf_data_room_size(mpl);
2043 length = length != 0 ? length : *mbp_buf_size;
2044 if (*mbp_buf_size < length + offset) {
2046 "%s mbuf_data_room_size %u < %u (segment length=%u + segment offset=%u)\n",
2047 mpl->name, *mbp_buf_size,
2048 length + offset, length, offset);
2056 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
2057 uint16_t nb_rx_desc, unsigned int socket_id,
2058 const struct rte_eth_rxconf *rx_conf,
2059 struct rte_mempool *mp)
2062 uint32_t mbp_buf_size;
2063 struct rte_eth_dev *dev;
2064 struct rte_eth_dev_info dev_info;
2065 struct rte_eth_rxconf local_conf;
2067 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2068 dev = &rte_eth_devices[port_id];
2070 if (rx_queue_id >= dev->data->nb_rx_queues) {
2071 RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u\n", rx_queue_id);
2075 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
2077 ret = rte_eth_dev_info_get(port_id, &dev_info);
2082 /* Single pool configuration check. */
2083 if (rx_conf != NULL && rx_conf->rx_nseg != 0) {
2085 "Ambiguous segment configuration\n");
2089 * Check the size of the mbuf data buffer, this value
2090 * must be provided in the private data of the memory pool.
2091 * First check that the memory pool(s) has a valid private data.
2093 if (mp->private_data_size <
2094 sizeof(struct rte_pktmbuf_pool_private)) {
2095 RTE_ETHDEV_LOG(ERR, "%s private_data_size %u < %u\n",
2096 mp->name, mp->private_data_size,
2098 sizeof(struct rte_pktmbuf_pool_private));
2101 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
2102 if (mbp_buf_size < dev_info.min_rx_bufsize +
2103 RTE_PKTMBUF_HEADROOM) {
2105 "%s mbuf_data_room_size %u < %u (RTE_PKTMBUF_HEADROOM=%u + min_rx_bufsize(dev)=%u)\n",
2106 mp->name, mbp_buf_size,
2107 RTE_PKTMBUF_HEADROOM +
2108 dev_info.min_rx_bufsize,
2109 RTE_PKTMBUF_HEADROOM,
2110 dev_info.min_rx_bufsize);
2114 const struct rte_eth_rxseg_split *rx_seg;
2117 /* Extended multi-segment configuration check. */
2118 if (rx_conf == NULL || rx_conf->rx_seg == NULL || rx_conf->rx_nseg == 0) {
2120 "Memory pool is null and no extended configuration provided\n");
2124 rx_seg = (const struct rte_eth_rxseg_split *)rx_conf->rx_seg;
2125 n_seg = rx_conf->rx_nseg;
2127 if (rx_conf->offloads & RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT) {
2128 ret = rte_eth_rx_queue_check_split(rx_seg, n_seg,
2134 RTE_ETHDEV_LOG(ERR, "No Rx segmentation offload configured\n");
2139 /* Use default specified by driver, if nb_rx_desc is zero */
2140 if (nb_rx_desc == 0) {
2141 nb_rx_desc = dev_info.default_rxportconf.ring_size;
2142 /* If driver default is also zero, fall back on EAL default */
2143 if (nb_rx_desc == 0)
2144 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
2147 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
2148 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
2149 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
2152 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
2153 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
2154 dev_info.rx_desc_lim.nb_min,
2155 dev_info.rx_desc_lim.nb_align);
2159 if (dev->data->dev_started &&
2160 !(dev_info.dev_capa &
2161 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
2164 if (dev->data->dev_started &&
2165 (dev->data->rx_queue_state[rx_queue_id] !=
2166 RTE_ETH_QUEUE_STATE_STOPPED))
2169 eth_dev_rxq_release(dev, rx_queue_id);
2171 if (rx_conf == NULL)
2172 rx_conf = &dev_info.default_rxconf;
2174 local_conf = *rx_conf;
2177 * If an offloading has already been enabled in
2178 * rte_eth_dev_configure(), it has been enabled on all queues,
2179 * so there is no need to enable it in this queue again.
2180 * The local_conf.offloads input to underlying PMD only carries
2181 * those offloadings which are only enabled on this queue and
2182 * not enabled on all queues.
2184 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
2187 * New added offloadings for this queue are those not enabled in
2188 * rte_eth_dev_configure() and they must be per-queue type.
2189 * A pure per-port offloading can't be enabled on a queue while
2190 * disabled on another queue. A pure per-port offloading can't
2191 * be enabled for any queue as new added one if it hasn't been
2192 * enabled in rte_eth_dev_configure().
2194 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
2195 local_conf.offloads) {
2197 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
2198 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
2199 port_id, rx_queue_id, local_conf.offloads,
2200 dev_info.rx_queue_offload_capa,
2205 if (local_conf.share_group > 0 &&
2206 (dev_info.dev_capa & RTE_ETH_DEV_CAPA_RXQ_SHARE) == 0) {
2208 "Ethdev port_id=%d rx_queue_id=%d, enabled share_group=%hu while device doesn't support Rx queue share\n",
2209 port_id, rx_queue_id, local_conf.share_group);
2214 * If LRO is enabled, check that the maximum aggregated packet
2215 * size is supported by the configured device.
2217 /* Get the real Ethernet overhead length */
2218 if (local_conf.offloads & RTE_ETH_RX_OFFLOAD_TCP_LRO) {
2219 uint32_t overhead_len;
2220 uint32_t max_rx_pktlen;
2223 overhead_len = eth_dev_get_overhead_len(dev_info.max_rx_pktlen,
2225 max_rx_pktlen = dev->data->mtu + overhead_len;
2226 if (dev->data->dev_conf.rxmode.max_lro_pkt_size == 0)
2227 dev->data->dev_conf.rxmode.max_lro_pkt_size = max_rx_pktlen;
2228 ret = eth_dev_check_lro_pkt_size(port_id,
2229 dev->data->dev_conf.rxmode.max_lro_pkt_size,
2231 dev_info.max_lro_pkt_size);
2236 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
2237 socket_id, &local_conf, mp);
2239 if (!dev->data->min_rx_buf_size ||
2240 dev->data->min_rx_buf_size > mbp_buf_size)
2241 dev->data->min_rx_buf_size = mbp_buf_size;
2244 rte_ethdev_trace_rxq_setup(port_id, rx_queue_id, nb_rx_desc, mp,
2246 return eth_err(port_id, ret);
2250 rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
2251 uint16_t nb_rx_desc,
2252 const struct rte_eth_hairpin_conf *conf)
2255 struct rte_eth_dev *dev;
2256 struct rte_eth_hairpin_cap cap;
2260 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2261 dev = &rte_eth_devices[port_id];
2263 if (rx_queue_id >= dev->data->nb_rx_queues) {
2264 RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u\n", rx_queue_id);
2270 "Cannot setup ethdev port %u Rx hairpin queue from NULL config\n",
2275 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
2278 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_hairpin_queue_setup,
2280 /* if nb_rx_desc is zero use max number of desc from the driver. */
2281 if (nb_rx_desc == 0)
2282 nb_rx_desc = cap.max_nb_desc;
2283 if (nb_rx_desc > cap.max_nb_desc) {
2285 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu",
2286 nb_rx_desc, cap.max_nb_desc);
2289 if (conf->peer_count > cap.max_rx_2_tx) {
2291 "Invalid value for number of peers for Rx queue(=%u), should be: <= %hu",
2292 conf->peer_count, cap.max_rx_2_tx);
2295 if (conf->peer_count == 0) {
2297 "Invalid value for number of peers for Rx queue(=%u), should be: > 0",
2301 for (i = 0, count = 0; i < dev->data->nb_rx_queues &&
2302 cap.max_nb_queues != UINT16_MAX; i++) {
2303 if (i == rx_queue_id || rte_eth_dev_is_rx_hairpin_queue(dev, i))
2306 if (count > cap.max_nb_queues) {
2307 RTE_ETHDEV_LOG(ERR, "To many Rx hairpin queues max is %d",
2311 if (dev->data->dev_started)
2313 eth_dev_rxq_release(dev, rx_queue_id);
2314 ret = (*dev->dev_ops->rx_hairpin_queue_setup)(dev, rx_queue_id,
2317 dev->data->rx_queue_state[rx_queue_id] =
2318 RTE_ETH_QUEUE_STATE_HAIRPIN;
2319 return eth_err(port_id, ret);
2323 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2324 uint16_t nb_tx_desc, unsigned int socket_id,
2325 const struct rte_eth_txconf *tx_conf)
2327 struct rte_eth_dev *dev;
2328 struct rte_eth_dev_info dev_info;
2329 struct rte_eth_txconf local_conf;
2332 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2333 dev = &rte_eth_devices[port_id];
2335 if (tx_queue_id >= dev->data->nb_tx_queues) {
2336 RTE_ETHDEV_LOG(ERR, "Invalid Tx queue_id=%u\n", tx_queue_id);
2340 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
2342 ret = rte_eth_dev_info_get(port_id, &dev_info);
2346 /* Use default specified by driver, if nb_tx_desc is zero */
2347 if (nb_tx_desc == 0) {
2348 nb_tx_desc = dev_info.default_txportconf.ring_size;
2349 /* If driver default is zero, fall back on EAL default */
2350 if (nb_tx_desc == 0)
2351 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
2353 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
2354 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
2355 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
2357 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
2358 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
2359 dev_info.tx_desc_lim.nb_min,
2360 dev_info.tx_desc_lim.nb_align);
2364 if (dev->data->dev_started &&
2365 !(dev_info.dev_capa &
2366 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
2369 if (dev->data->dev_started &&
2370 (dev->data->tx_queue_state[tx_queue_id] !=
2371 RTE_ETH_QUEUE_STATE_STOPPED))
2374 eth_dev_txq_release(dev, tx_queue_id);
2376 if (tx_conf == NULL)
2377 tx_conf = &dev_info.default_txconf;
2379 local_conf = *tx_conf;
2382 * If an offloading has already been enabled in
2383 * rte_eth_dev_configure(), it has been enabled on all queues,
2384 * so there is no need to enable it in this queue again.
2385 * The local_conf.offloads input to underlying PMD only carries
2386 * those offloadings which are only enabled on this queue and
2387 * not enabled on all queues.
2389 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
2392 * New added offloadings for this queue are those not enabled in
2393 * rte_eth_dev_configure() and they must be per-queue type.
2394 * A pure per-port offloading can't be enabled on a queue while
2395 * disabled on another queue. A pure per-port offloading can't
2396 * be enabled for any queue as new added one if it hasn't been
2397 * enabled in rte_eth_dev_configure().
2399 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
2400 local_conf.offloads) {
2402 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
2403 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
2404 port_id, tx_queue_id, local_conf.offloads,
2405 dev_info.tx_queue_offload_capa,
2410 rte_ethdev_trace_txq_setup(port_id, tx_queue_id, nb_tx_desc, tx_conf);
2411 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
2412 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
2416 rte_eth_tx_hairpin_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2417 uint16_t nb_tx_desc,
2418 const struct rte_eth_hairpin_conf *conf)
2420 struct rte_eth_dev *dev;
2421 struct rte_eth_hairpin_cap cap;
2426 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2427 dev = &rte_eth_devices[port_id];
2429 if (tx_queue_id >= dev->data->nb_tx_queues) {
2430 RTE_ETHDEV_LOG(ERR, "Invalid Tx queue_id=%u\n", tx_queue_id);
2436 "Cannot setup ethdev port %u Tx hairpin queue from NULL config\n",
2441 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
2444 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_hairpin_queue_setup,
2446 /* if nb_rx_desc is zero use max number of desc from the driver. */
2447 if (nb_tx_desc == 0)
2448 nb_tx_desc = cap.max_nb_desc;
2449 if (nb_tx_desc > cap.max_nb_desc) {
2451 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu",
2452 nb_tx_desc, cap.max_nb_desc);
2455 if (conf->peer_count > cap.max_tx_2_rx) {
2457 "Invalid value for number of peers for Tx queue(=%u), should be: <= %hu",
2458 conf->peer_count, cap.max_tx_2_rx);
2461 if (conf->peer_count == 0) {
2463 "Invalid value for number of peers for Tx queue(=%u), should be: > 0",
2467 for (i = 0, count = 0; i < dev->data->nb_tx_queues &&
2468 cap.max_nb_queues != UINT16_MAX; i++) {
2469 if (i == tx_queue_id || rte_eth_dev_is_tx_hairpin_queue(dev, i))
2472 if (count > cap.max_nb_queues) {
2473 RTE_ETHDEV_LOG(ERR, "To many Tx hairpin queues max is %d",
2477 if (dev->data->dev_started)
2479 eth_dev_txq_release(dev, tx_queue_id);
2480 ret = (*dev->dev_ops->tx_hairpin_queue_setup)
2481 (dev, tx_queue_id, nb_tx_desc, conf);
2483 dev->data->tx_queue_state[tx_queue_id] =
2484 RTE_ETH_QUEUE_STATE_HAIRPIN;
2485 return eth_err(port_id, ret);
2489 rte_eth_hairpin_bind(uint16_t tx_port, uint16_t rx_port)
2491 struct rte_eth_dev *dev;
2494 RTE_ETH_VALID_PORTID_OR_ERR_RET(tx_port, -ENODEV);
2495 dev = &rte_eth_devices[tx_port];
2497 if (dev->data->dev_started == 0) {
2498 RTE_ETHDEV_LOG(ERR, "Tx port %d is not started\n", tx_port);
2502 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_bind, -ENOTSUP);
2503 ret = (*dev->dev_ops->hairpin_bind)(dev, rx_port);
2505 RTE_ETHDEV_LOG(ERR, "Failed to bind hairpin Tx %d"
2506 " to Rx %d (%d - all ports)\n",
2507 tx_port, rx_port, RTE_MAX_ETHPORTS);
2513 rte_eth_hairpin_unbind(uint16_t tx_port, uint16_t rx_port)
2515 struct rte_eth_dev *dev;
2518 RTE_ETH_VALID_PORTID_OR_ERR_RET(tx_port, -ENODEV);
2519 dev = &rte_eth_devices[tx_port];
2521 if (dev->data->dev_started == 0) {
2522 RTE_ETHDEV_LOG(ERR, "Tx port %d is already stopped\n", tx_port);
2526 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_unbind, -ENOTSUP);
2527 ret = (*dev->dev_ops->hairpin_unbind)(dev, rx_port);
2529 RTE_ETHDEV_LOG(ERR, "Failed to unbind hairpin Tx %d"
2530 " from Rx %d (%d - all ports)\n",
2531 tx_port, rx_port, RTE_MAX_ETHPORTS);
2537 rte_eth_hairpin_get_peer_ports(uint16_t port_id, uint16_t *peer_ports,
2538 size_t len, uint32_t direction)
2540 struct rte_eth_dev *dev;
2543 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2544 dev = &rte_eth_devices[port_id];
2546 if (peer_ports == NULL) {
2548 "Cannot get ethdev port %u hairpin peer ports to NULL\n",
2555 "Cannot get ethdev port %u hairpin peer ports to array with zero size\n",
2560 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_get_peer_ports,
2563 ret = (*dev->dev_ops->hairpin_get_peer_ports)(dev, peer_ports,
2566 RTE_ETHDEV_LOG(ERR, "Failed to get %d hairpin peer %s ports\n",
2567 port_id, direction ? "Rx" : "Tx");
2573 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
2574 void *userdata __rte_unused)
2576 rte_pktmbuf_free_bulk(pkts, unsent);
2580 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
2583 uint64_t *count = userdata;
2585 rte_pktmbuf_free_bulk(pkts, unsent);
2590 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
2591 buffer_tx_error_fn cbfn, void *userdata)
2593 if (buffer == NULL) {
2595 "Cannot set Tx buffer error callback to NULL buffer\n");
2599 buffer->error_callback = cbfn;
2600 buffer->error_userdata = userdata;
2605 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
2609 if (buffer == NULL) {
2610 RTE_ETHDEV_LOG(ERR, "Cannot initialize NULL buffer\n");
2614 buffer->size = size;
2615 if (buffer->error_callback == NULL) {
2616 ret = rte_eth_tx_buffer_set_err_callback(
2617 buffer, rte_eth_tx_buffer_drop_callback, NULL);
2624 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
2626 struct rte_eth_dev *dev;
2629 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2630 dev = &rte_eth_devices[port_id];
2632 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
2634 /* Call driver to free pending mbufs. */
2635 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
2637 return eth_err(port_id, ret);
2641 rte_eth_promiscuous_enable(uint16_t port_id)
2643 struct rte_eth_dev *dev;
2646 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2647 dev = &rte_eth_devices[port_id];
2649 if (dev->data->promiscuous == 1)
2652 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_enable, -ENOTSUP);
2654 diag = (*dev->dev_ops->promiscuous_enable)(dev);
2655 dev->data->promiscuous = (diag == 0) ? 1 : 0;
2657 return eth_err(port_id, diag);
2661 rte_eth_promiscuous_disable(uint16_t port_id)
2663 struct rte_eth_dev *dev;
2666 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2667 dev = &rte_eth_devices[port_id];
2669 if (dev->data->promiscuous == 0)
2672 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_disable, -ENOTSUP);
2674 dev->data->promiscuous = 0;
2675 diag = (*dev->dev_ops->promiscuous_disable)(dev);
2677 dev->data->promiscuous = 1;
2679 return eth_err(port_id, diag);
2683 rte_eth_promiscuous_get(uint16_t port_id)
2685 struct rte_eth_dev *dev;
2687 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2688 dev = &rte_eth_devices[port_id];
2690 return dev->data->promiscuous;
2694 rte_eth_allmulticast_enable(uint16_t port_id)
2696 struct rte_eth_dev *dev;
2699 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2700 dev = &rte_eth_devices[port_id];
2702 if (dev->data->all_multicast == 1)
2705 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_enable, -ENOTSUP);
2706 diag = (*dev->dev_ops->allmulticast_enable)(dev);
2707 dev->data->all_multicast = (diag == 0) ? 1 : 0;
2709 return eth_err(port_id, diag);
2713 rte_eth_allmulticast_disable(uint16_t port_id)
2715 struct rte_eth_dev *dev;
2718 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2719 dev = &rte_eth_devices[port_id];
2721 if (dev->data->all_multicast == 0)
2724 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_disable, -ENOTSUP);
2725 dev->data->all_multicast = 0;
2726 diag = (*dev->dev_ops->allmulticast_disable)(dev);
2728 dev->data->all_multicast = 1;
2730 return eth_err(port_id, diag);
2734 rte_eth_allmulticast_get(uint16_t port_id)
2736 struct rte_eth_dev *dev;
2738 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2739 dev = &rte_eth_devices[port_id];
2741 return dev->data->all_multicast;
2745 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
2747 struct rte_eth_dev *dev;
2749 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2750 dev = &rte_eth_devices[port_id];
2752 if (eth_link == NULL) {
2753 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u link to NULL\n",
2758 if (dev->data->dev_conf.intr_conf.lsc && dev->data->dev_started)
2759 rte_eth_linkstatus_get(dev, eth_link);
2761 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2762 (*dev->dev_ops->link_update)(dev, 1);
2763 *eth_link = dev->data->dev_link;
2770 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
2772 struct rte_eth_dev *dev;
2774 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2775 dev = &rte_eth_devices[port_id];
2777 if (eth_link == NULL) {
2778 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u link to NULL\n",
2783 if (dev->data->dev_conf.intr_conf.lsc && dev->data->dev_started)
2784 rte_eth_linkstatus_get(dev, eth_link);
2786 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2787 (*dev->dev_ops->link_update)(dev, 0);
2788 *eth_link = dev->data->dev_link;
2795 rte_eth_link_speed_to_str(uint32_t link_speed)
2797 switch (link_speed) {
2798 case RTE_ETH_SPEED_NUM_NONE: return "None";
2799 case RTE_ETH_SPEED_NUM_10M: return "10 Mbps";
2800 case RTE_ETH_SPEED_NUM_100M: return "100 Mbps";
2801 case RTE_ETH_SPEED_NUM_1G: return "1 Gbps";
2802 case RTE_ETH_SPEED_NUM_2_5G: return "2.5 Gbps";
2803 case RTE_ETH_SPEED_NUM_5G: return "5 Gbps";
2804 case RTE_ETH_SPEED_NUM_10G: return "10 Gbps";
2805 case RTE_ETH_SPEED_NUM_20G: return "20 Gbps";
2806 case RTE_ETH_SPEED_NUM_25G: return "25 Gbps";
2807 case RTE_ETH_SPEED_NUM_40G: return "40 Gbps";
2808 case RTE_ETH_SPEED_NUM_50G: return "50 Gbps";
2809 case RTE_ETH_SPEED_NUM_56G: return "56 Gbps";
2810 case RTE_ETH_SPEED_NUM_100G: return "100 Gbps";
2811 case RTE_ETH_SPEED_NUM_200G: return "200 Gbps";
2812 case RTE_ETH_SPEED_NUM_UNKNOWN: return "Unknown";
2813 default: return "Invalid";
2818 rte_eth_link_to_str(char *str, size_t len, const struct rte_eth_link *eth_link)
2821 RTE_ETHDEV_LOG(ERR, "Cannot convert link to NULL string\n");
2827 "Cannot convert link to string with zero size\n");
2831 if (eth_link == NULL) {
2832 RTE_ETHDEV_LOG(ERR, "Cannot convert to string from NULL link\n");
2836 if (eth_link->link_status == RTE_ETH_LINK_DOWN)
2837 return snprintf(str, len, "Link down");
2839 return snprintf(str, len, "Link up at %s %s %s",
2840 rte_eth_link_speed_to_str(eth_link->link_speed),
2841 (eth_link->link_duplex == RTE_ETH_LINK_FULL_DUPLEX) ?
2843 (eth_link->link_autoneg == RTE_ETH_LINK_AUTONEG) ?
2844 "Autoneg" : "Fixed");
2848 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
2850 struct rte_eth_dev *dev;
2852 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2853 dev = &rte_eth_devices[port_id];
2855 if (stats == NULL) {
2856 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u stats to NULL\n",
2861 memset(stats, 0, sizeof(*stats));
2863 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
2864 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
2865 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
2869 rte_eth_stats_reset(uint16_t port_id)
2871 struct rte_eth_dev *dev;
2874 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2875 dev = &rte_eth_devices[port_id];
2877 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
2878 ret = (*dev->dev_ops->stats_reset)(dev);
2880 return eth_err(port_id, ret);
2882 dev->data->rx_mbuf_alloc_failed = 0;
2888 eth_dev_get_xstats_basic_count(struct rte_eth_dev *dev)
2890 uint16_t nb_rxqs, nb_txqs;
2893 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2894 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2896 count = RTE_NB_STATS;
2897 if (dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS) {
2898 count += nb_rxqs * RTE_NB_RXQ_STATS;
2899 count += nb_txqs * RTE_NB_TXQ_STATS;
2906 eth_dev_get_xstats_count(uint16_t port_id)
2908 struct rte_eth_dev *dev;
2911 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2912 dev = &rte_eth_devices[port_id];
2913 if (dev->dev_ops->xstats_get_names != NULL) {
2914 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2916 return eth_err(port_id, count);
2921 count += eth_dev_get_xstats_basic_count(dev);
2927 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2930 int cnt_xstats, idx_xstat;
2932 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2934 if (xstat_name == NULL) {
2936 "Cannot get ethdev port %u xstats ID from NULL xstat name\n",
2943 "Cannot get ethdev port %u xstats ID to NULL\n",
2949 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2950 if (cnt_xstats < 0) {
2951 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2955 /* Get id-name lookup table */
2956 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2958 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2959 port_id, xstats_names, cnt_xstats, NULL)) {
2960 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2964 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2965 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2974 /* retrieve basic stats names */
2976 eth_basic_stats_get_names(struct rte_eth_dev *dev,
2977 struct rte_eth_xstat_name *xstats_names)
2979 int cnt_used_entries = 0;
2980 uint32_t idx, id_queue;
2983 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2984 strlcpy(xstats_names[cnt_used_entries].name,
2985 eth_dev_stats_strings[idx].name,
2986 sizeof(xstats_names[0].name));
2990 if ((dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS) == 0)
2991 return cnt_used_entries;
2993 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2994 for (id_queue = 0; id_queue < num_q; id_queue++) {
2995 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2996 snprintf(xstats_names[cnt_used_entries].name,
2997 sizeof(xstats_names[0].name),
2999 id_queue, eth_dev_rxq_stats_strings[idx].name);
3004 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
3005 for (id_queue = 0; id_queue < num_q; id_queue++) {
3006 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
3007 snprintf(xstats_names[cnt_used_entries].name,
3008 sizeof(xstats_names[0].name),
3010 id_queue, eth_dev_txq_stats_strings[idx].name);
3014 return cnt_used_entries;
3017 /* retrieve ethdev extended statistics names */
3019 rte_eth_xstats_get_names_by_id(uint16_t port_id,
3020 struct rte_eth_xstat_name *xstats_names, unsigned int size,
3023 struct rte_eth_xstat_name *xstats_names_copy;
3024 unsigned int no_basic_stat_requested = 1;
3025 unsigned int no_ext_stat_requested = 1;
3026 unsigned int expected_entries;
3027 unsigned int basic_count;
3028 struct rte_eth_dev *dev;
3032 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3033 dev = &rte_eth_devices[port_id];
3035 basic_count = eth_dev_get_xstats_basic_count(dev);
3036 ret = eth_dev_get_xstats_count(port_id);
3039 expected_entries = (unsigned int)ret;
3041 /* Return max number of stats if no ids given */
3044 return expected_entries;
3045 else if (xstats_names && size < expected_entries)
3046 return expected_entries;
3049 if (ids && !xstats_names)
3052 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
3053 uint64_t ids_copy[size];
3055 for (i = 0; i < size; i++) {
3056 if (ids[i] < basic_count) {
3057 no_basic_stat_requested = 0;
3062 * Convert ids to xstats ids that PMD knows.
3063 * ids known by user are basic + extended stats.
3065 ids_copy[i] = ids[i] - basic_count;
3068 if (no_basic_stat_requested)
3069 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
3070 ids_copy, xstats_names, size);
3073 /* Retrieve all stats */
3075 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
3077 if (num_stats < 0 || num_stats > (int)expected_entries)
3080 return expected_entries;
3083 xstats_names_copy = calloc(expected_entries,
3084 sizeof(struct rte_eth_xstat_name));
3086 if (!xstats_names_copy) {
3087 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
3092 for (i = 0; i < size; i++) {
3093 if (ids[i] >= basic_count) {
3094 no_ext_stat_requested = 0;
3100 /* Fill xstats_names_copy structure */
3101 if (ids && no_ext_stat_requested) {
3102 eth_basic_stats_get_names(dev, xstats_names_copy);
3104 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
3107 free(xstats_names_copy);
3113 for (i = 0; i < size; i++) {
3114 if (ids[i] >= expected_entries) {
3115 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
3116 free(xstats_names_copy);
3119 xstats_names[i] = xstats_names_copy[ids[i]];
3122 free(xstats_names_copy);
3127 rte_eth_xstats_get_names(uint16_t port_id,
3128 struct rte_eth_xstat_name *xstats_names,
3131 struct rte_eth_dev *dev;
3132 int cnt_used_entries;
3133 int cnt_expected_entries;
3134 int cnt_driver_entries;
3136 cnt_expected_entries = eth_dev_get_xstats_count(port_id);
3137 if (xstats_names == NULL || cnt_expected_entries < 0 ||
3138 (int)size < cnt_expected_entries)
3139 return cnt_expected_entries;
3141 /* port_id checked in eth_dev_get_xstats_count() */
3142 dev = &rte_eth_devices[port_id];
3144 cnt_used_entries = eth_basic_stats_get_names(dev, xstats_names);
3146 if (dev->dev_ops->xstats_get_names != NULL) {
3147 /* If there are any driver-specific xstats, append them
3150 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
3152 xstats_names + cnt_used_entries,
3153 size - cnt_used_entries);
3154 if (cnt_driver_entries < 0)
3155 return eth_err(port_id, cnt_driver_entries);
3156 cnt_used_entries += cnt_driver_entries;
3159 return cnt_used_entries;
3164 eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
3166 struct rte_eth_dev *dev;
3167 struct rte_eth_stats eth_stats;
3168 unsigned int count = 0, i, q;
3169 uint64_t val, *stats_ptr;
3170 uint16_t nb_rxqs, nb_txqs;
3173 ret = rte_eth_stats_get(port_id, ð_stats);
3177 dev = &rte_eth_devices[port_id];
3179 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
3180 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
3183 for (i = 0; i < RTE_NB_STATS; i++) {
3184 stats_ptr = RTE_PTR_ADD(ð_stats,
3185 eth_dev_stats_strings[i].offset);
3187 xstats[count++].value = val;
3190 if ((dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS) == 0)
3194 for (q = 0; q < nb_rxqs; q++) {
3195 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
3196 stats_ptr = RTE_PTR_ADD(ð_stats,
3197 eth_dev_rxq_stats_strings[i].offset +
3198 q * sizeof(uint64_t));
3200 xstats[count++].value = val;
3205 for (q = 0; q < nb_txqs; q++) {
3206 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
3207 stats_ptr = RTE_PTR_ADD(ð_stats,
3208 eth_dev_txq_stats_strings[i].offset +
3209 q * sizeof(uint64_t));
3211 xstats[count++].value = val;
3217 /* retrieve ethdev extended statistics */
3219 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
3220 uint64_t *values, unsigned int size)
3222 unsigned int no_basic_stat_requested = 1;
3223 unsigned int no_ext_stat_requested = 1;
3224 unsigned int num_xstats_filled;
3225 unsigned int basic_count;
3226 uint16_t expected_entries;
3227 struct rte_eth_dev *dev;
3231 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3232 dev = &rte_eth_devices[port_id];
3234 ret = eth_dev_get_xstats_count(port_id);
3237 expected_entries = (uint16_t)ret;
3238 struct rte_eth_xstat xstats[expected_entries];
3239 basic_count = eth_dev_get_xstats_basic_count(dev);
3241 /* Return max number of stats if no ids given */
3244 return expected_entries;
3245 else if (values && size < expected_entries)
3246 return expected_entries;
3252 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
3253 unsigned int basic_count = eth_dev_get_xstats_basic_count(dev);
3254 uint64_t ids_copy[size];
3256 for (i = 0; i < size; i++) {
3257 if (ids[i] < basic_count) {
3258 no_basic_stat_requested = 0;
3263 * Convert ids to xstats ids that PMD knows.
3264 * ids known by user are basic + extended stats.
3266 ids_copy[i] = ids[i] - basic_count;
3269 if (no_basic_stat_requested)
3270 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
3275 for (i = 0; i < size; i++) {
3276 if (ids[i] >= basic_count) {
3277 no_ext_stat_requested = 0;
3283 /* Fill the xstats structure */
3284 if (ids && no_ext_stat_requested)
3285 ret = eth_basic_stats_get(port_id, xstats);
3287 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
3291 num_xstats_filled = (unsigned int)ret;
3293 /* Return all stats */
3295 for (i = 0; i < num_xstats_filled; i++)
3296 values[i] = xstats[i].value;
3297 return expected_entries;
3301 for (i = 0; i < size; i++) {
3302 if (ids[i] >= expected_entries) {
3303 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
3306 values[i] = xstats[ids[i]].value;
3312 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
3315 struct rte_eth_dev *dev;
3316 unsigned int count = 0, i;
3317 signed int xcount = 0;
3318 uint16_t nb_rxqs, nb_txqs;
3321 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3322 dev = &rte_eth_devices[port_id];
3324 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
3325 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
3327 /* Return generic statistics */
3328 count = RTE_NB_STATS;
3329 if (dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS)
3330 count += (nb_rxqs * RTE_NB_RXQ_STATS) + (nb_txqs * RTE_NB_TXQ_STATS);
3332 /* implemented by the driver */
3333 if (dev->dev_ops->xstats_get != NULL) {
3334 /* Retrieve the xstats from the driver at the end of the
3337 xcount = (*dev->dev_ops->xstats_get)(dev,
3338 xstats ? xstats + count : NULL,
3339 (n > count) ? n - count : 0);
3342 return eth_err(port_id, xcount);
3345 if (n < count + xcount || xstats == NULL)
3346 return count + xcount;
3348 /* now fill the xstats structure */
3349 ret = eth_basic_stats_get(port_id, xstats);
3354 for (i = 0; i < count; i++)
3356 /* add an offset to driver-specific stats */
3357 for ( ; i < count + xcount; i++)
3358 xstats[i].id += count;
3360 return count + xcount;
3363 /* reset ethdev extended statistics */
3365 rte_eth_xstats_reset(uint16_t port_id)
3367 struct rte_eth_dev *dev;
3369 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3370 dev = &rte_eth_devices[port_id];
3372 /* implemented by the driver */
3373 if (dev->dev_ops->xstats_reset != NULL)
3374 return eth_err(port_id, (*dev->dev_ops->xstats_reset)(dev));
3376 /* fallback to default */
3377 return rte_eth_stats_reset(port_id);
3381 eth_dev_set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id,
3382 uint8_t stat_idx, uint8_t is_rx)
3384 struct rte_eth_dev *dev;
3386 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3387 dev = &rte_eth_devices[port_id];
3389 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
3392 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
3395 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
3398 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
3399 return (*dev->dev_ops->queue_stats_mapping_set) (dev, queue_id, stat_idx, is_rx);
3403 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
3406 return eth_err(port_id, eth_dev_set_queue_stats_mapping(port_id,
3408 stat_idx, STAT_QMAP_TX));
3412 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
3415 return eth_err(port_id, eth_dev_set_queue_stats_mapping(port_id,
3417 stat_idx, STAT_QMAP_RX));
3421 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
3423 struct rte_eth_dev *dev;
3425 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3426 dev = &rte_eth_devices[port_id];
3428 if (fw_version == NULL && fw_size > 0) {
3430 "Cannot get ethdev port %u FW version to NULL when string size is non zero\n",
3435 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
3436 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
3437 fw_version, fw_size));
3441 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
3443 struct rte_eth_dev *dev;
3444 const struct rte_eth_desc_lim lim = {
3445 .nb_max = UINT16_MAX,
3448 .nb_seg_max = UINT16_MAX,
3449 .nb_mtu_seg_max = UINT16_MAX,
3453 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3454 dev = &rte_eth_devices[port_id];
3456 if (dev_info == NULL) {
3457 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u info to NULL\n",
3463 * Init dev_info before port_id check since caller does not have
3464 * return status and does not know if get is successful or not.
3466 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
3467 dev_info->switch_info.domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
3469 dev_info->rx_desc_lim = lim;
3470 dev_info->tx_desc_lim = lim;
3471 dev_info->device = dev->device;
3472 dev_info->min_mtu = RTE_ETHER_MIN_LEN - RTE_ETHER_HDR_LEN -
3474 dev_info->max_mtu = UINT16_MAX;
3476 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
3477 diag = (*dev->dev_ops->dev_infos_get)(dev, dev_info);
3479 /* Cleanup already filled in device information */
3480 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
3481 return eth_err(port_id, diag);
3484 /* Maximum number of queues should be <= RTE_MAX_QUEUES_PER_PORT */
3485 dev_info->max_rx_queues = RTE_MIN(dev_info->max_rx_queues,
3486 RTE_MAX_QUEUES_PER_PORT);
3487 dev_info->max_tx_queues = RTE_MIN(dev_info->max_tx_queues,
3488 RTE_MAX_QUEUES_PER_PORT);
3490 dev_info->driver_name = dev->device->driver->name;
3491 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
3492 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
3494 dev_info->dev_flags = &dev->data->dev_flags;
3500 rte_eth_dev_conf_get(uint16_t port_id, struct rte_eth_conf *dev_conf)
3502 struct rte_eth_dev *dev;
3504 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3505 dev = &rte_eth_devices[port_id];
3507 if (dev_conf == NULL) {
3509 "Cannot get ethdev port %u configuration to NULL\n",
3514 memcpy(dev_conf, &dev->data->dev_conf, sizeof(struct rte_eth_conf));
3520 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
3521 uint32_t *ptypes, int num)
3524 struct rte_eth_dev *dev;
3525 const uint32_t *all_ptypes;
3527 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3528 dev = &rte_eth_devices[port_id];
3530 if (ptypes == NULL && num > 0) {
3532 "Cannot get ethdev port %u supported packet types to NULL when array size is non zero\n",
3537 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
3538 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3543 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
3544 if (all_ptypes[i] & ptype_mask) {
3546 ptypes[j] = all_ptypes[i];
3554 rte_eth_dev_set_ptypes(uint16_t port_id, uint32_t ptype_mask,
3555 uint32_t *set_ptypes, unsigned int num)
3557 const uint32_t valid_ptype_masks[] = {
3561 RTE_PTYPE_TUNNEL_MASK,
3562 RTE_PTYPE_INNER_L2_MASK,
3563 RTE_PTYPE_INNER_L3_MASK,
3564 RTE_PTYPE_INNER_L4_MASK,
3566 const uint32_t *all_ptypes;
3567 struct rte_eth_dev *dev;
3568 uint32_t unused_mask;
3572 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3573 dev = &rte_eth_devices[port_id];
3575 if (num > 0 && set_ptypes == NULL) {
3577 "Cannot get ethdev port %u set packet types to NULL when array size is non zero\n",
3582 if (*dev->dev_ops->dev_supported_ptypes_get == NULL ||
3583 *dev->dev_ops->dev_ptypes_set == NULL) {
3588 if (ptype_mask == 0) {
3589 ret = (*dev->dev_ops->dev_ptypes_set)(dev,
3594 unused_mask = ptype_mask;
3595 for (i = 0; i < RTE_DIM(valid_ptype_masks); i++) {
3596 uint32_t mask = ptype_mask & valid_ptype_masks[i];
3597 if (mask && mask != valid_ptype_masks[i]) {
3601 unused_mask &= ~valid_ptype_masks[i];
3609 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3610 if (all_ptypes == NULL) {
3616 * Accommodate as many set_ptypes as possible. If the supplied
3617 * set_ptypes array is insufficient fill it partially.
3619 for (i = 0, j = 0; set_ptypes != NULL &&
3620 (all_ptypes[i] != RTE_PTYPE_UNKNOWN); ++i) {
3621 if (ptype_mask & all_ptypes[i]) {
3623 set_ptypes[j] = all_ptypes[i];
3631 if (set_ptypes != NULL && j < num)
3632 set_ptypes[j] = RTE_PTYPE_UNKNOWN;
3634 return (*dev->dev_ops->dev_ptypes_set)(dev, ptype_mask);
3638 set_ptypes[0] = RTE_PTYPE_UNKNOWN;
3644 rte_eth_macaddrs_get(uint16_t port_id, struct rte_ether_addr *ma,
3648 struct rte_eth_dev *dev;
3649 struct rte_eth_dev_info dev_info;
3652 RTE_ETHDEV_LOG(ERR, "%s: invalid parameters\n", __func__);
3656 /* will check for us that port_id is a valid one */
3657 ret = rte_eth_dev_info_get(port_id, &dev_info);
3661 dev = &rte_eth_devices[port_id];
3662 num = RTE_MIN(dev_info.max_mac_addrs, num);
3663 memcpy(ma, dev->data->mac_addrs, num * sizeof(ma[0]));
3669 rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
3671 struct rte_eth_dev *dev;
3673 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3674 dev = &rte_eth_devices[port_id];
3676 if (mac_addr == NULL) {
3678 "Cannot get ethdev port %u MAC address to NULL\n",
3683 rte_ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
3689 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
3691 struct rte_eth_dev *dev;
3693 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3694 dev = &rte_eth_devices[port_id];
3697 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u MTU to NULL\n",
3702 *mtu = dev->data->mtu;
3707 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
3710 struct rte_eth_dev_info dev_info;
3711 struct rte_eth_dev *dev;
3713 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3714 dev = &rte_eth_devices[port_id];
3715 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
3718 * Check if the device supports dev_infos_get, if it does not
3719 * skip min_mtu/max_mtu validation here as this requires values
3720 * that are populated within the call to rte_eth_dev_info_get()
3721 * which relies on dev->dev_ops->dev_infos_get.
3723 if (*dev->dev_ops->dev_infos_get != NULL) {
3724 ret = rte_eth_dev_info_get(port_id, &dev_info);
3728 ret = eth_dev_validate_mtu(port_id, &dev_info, mtu);
3733 if (dev->data->dev_configured == 0) {
3735 "Port %u must be configured before MTU set\n",
3740 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
3742 dev->data->mtu = mtu;
3744 return eth_err(port_id, ret);
3748 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
3750 struct rte_eth_dev *dev;
3753 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3754 dev = &rte_eth_devices[port_id];
3756 if (!(dev->data->dev_conf.rxmode.offloads &
3757 RTE_ETH_RX_OFFLOAD_VLAN_FILTER)) {
3758 RTE_ETHDEV_LOG(ERR, "Port %u: VLAN-filtering disabled\n",
3763 if (vlan_id > 4095) {
3764 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
3768 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
3770 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
3772 struct rte_vlan_filter_conf *vfc;
3776 vfc = &dev->data->vlan_filter_conf;
3777 vidx = vlan_id / 64;
3778 vbit = vlan_id % 64;
3781 vfc->ids[vidx] |= RTE_BIT64(vbit);
3783 vfc->ids[vidx] &= ~RTE_BIT64(vbit);
3786 return eth_err(port_id, ret);
3790 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
3793 struct rte_eth_dev *dev;
3795 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3796 dev = &rte_eth_devices[port_id];
3798 if (rx_queue_id >= dev->data->nb_rx_queues) {
3799 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
3803 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
3804 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
3810 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
3811 enum rte_vlan_type vlan_type,
3814 struct rte_eth_dev *dev;
3816 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3817 dev = &rte_eth_devices[port_id];
3819 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
3820 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
3825 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
3827 struct rte_eth_dev_info dev_info;
3828 struct rte_eth_dev *dev;
3832 uint64_t orig_offloads;
3833 uint64_t dev_offloads;
3834 uint64_t new_offloads;
3836 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3837 dev = &rte_eth_devices[port_id];
3839 /* save original values in case of failure */
3840 orig_offloads = dev->data->dev_conf.rxmode.offloads;
3841 dev_offloads = orig_offloads;
3843 /* check which option changed by application */
3844 cur = !!(offload_mask & RTE_ETH_VLAN_STRIP_OFFLOAD);
3845 org = !!(dev_offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP);
3848 dev_offloads |= RTE_ETH_RX_OFFLOAD_VLAN_STRIP;
3850 dev_offloads &= ~RTE_ETH_RX_OFFLOAD_VLAN_STRIP;
3851 mask |= RTE_ETH_VLAN_STRIP_MASK;
3854 cur = !!(offload_mask & RTE_ETH_VLAN_FILTER_OFFLOAD);
3855 org = !!(dev_offloads & RTE_ETH_RX_OFFLOAD_VLAN_FILTER);
3858 dev_offloads |= RTE_ETH_RX_OFFLOAD_VLAN_FILTER;
3860 dev_offloads &= ~RTE_ETH_RX_OFFLOAD_VLAN_FILTER;
3861 mask |= RTE_ETH_VLAN_FILTER_MASK;
3864 cur = !!(offload_mask & RTE_ETH_VLAN_EXTEND_OFFLOAD);
3865 org = !!(dev_offloads & RTE_ETH_RX_OFFLOAD_VLAN_EXTEND);
3868 dev_offloads |= RTE_ETH_RX_OFFLOAD_VLAN_EXTEND;
3870 dev_offloads &= ~RTE_ETH_RX_OFFLOAD_VLAN_EXTEND;
3871 mask |= RTE_ETH_VLAN_EXTEND_MASK;
3874 cur = !!(offload_mask & RTE_ETH_QINQ_STRIP_OFFLOAD);
3875 org = !!(dev_offloads & RTE_ETH_RX_OFFLOAD_QINQ_STRIP);
3878 dev_offloads |= RTE_ETH_RX_OFFLOAD_QINQ_STRIP;
3880 dev_offloads &= ~RTE_ETH_RX_OFFLOAD_QINQ_STRIP;
3881 mask |= RTE_ETH_QINQ_STRIP_MASK;
3888 ret = rte_eth_dev_info_get(port_id, &dev_info);
3892 /* Rx VLAN offloading must be within its device capabilities */
3893 if ((dev_offloads & dev_info.rx_offload_capa) != dev_offloads) {
3894 new_offloads = dev_offloads & ~orig_offloads;
3896 "Ethdev port_id=%u requested new added VLAN offloads "
3897 "0x%" PRIx64 " must be within Rx offloads capabilities "
3898 "0x%" PRIx64 " in %s()\n",
3899 port_id, new_offloads, dev_info.rx_offload_capa,
3904 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
3905 dev->data->dev_conf.rxmode.offloads = dev_offloads;
3906 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
3908 /* hit an error restore original values */
3909 dev->data->dev_conf.rxmode.offloads = orig_offloads;
3912 return eth_err(port_id, ret);
3916 rte_eth_dev_get_vlan_offload(uint16_t port_id)
3918 struct rte_eth_dev *dev;
3919 uint64_t *dev_offloads;
3922 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3923 dev = &rte_eth_devices[port_id];
3924 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
3926 if (*dev_offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP)
3927 ret |= RTE_ETH_VLAN_STRIP_OFFLOAD;
3929 if (*dev_offloads & RTE_ETH_RX_OFFLOAD_VLAN_FILTER)
3930 ret |= RTE_ETH_VLAN_FILTER_OFFLOAD;
3932 if (*dev_offloads & RTE_ETH_RX_OFFLOAD_VLAN_EXTEND)
3933 ret |= RTE_ETH_VLAN_EXTEND_OFFLOAD;
3935 if (*dev_offloads & RTE_ETH_RX_OFFLOAD_QINQ_STRIP)
3936 ret |= RTE_ETH_QINQ_STRIP_OFFLOAD;
3942 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
3944 struct rte_eth_dev *dev;
3946 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3947 dev = &rte_eth_devices[port_id];
3949 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
3950 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
3954 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3956 struct rte_eth_dev *dev;
3958 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3959 dev = &rte_eth_devices[port_id];
3961 if (fc_conf == NULL) {
3963 "Cannot get ethdev port %u flow control config to NULL\n",
3968 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
3969 memset(fc_conf, 0, sizeof(*fc_conf));
3970 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
3974 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3976 struct rte_eth_dev *dev;
3978 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3979 dev = &rte_eth_devices[port_id];
3981 if (fc_conf == NULL) {
3983 "Cannot set ethdev port %u flow control from NULL config\n",
3988 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
3989 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
3993 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
3994 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
3998 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
3999 struct rte_eth_pfc_conf *pfc_conf)
4001 struct rte_eth_dev *dev;
4003 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4004 dev = &rte_eth_devices[port_id];
4006 if (pfc_conf == NULL) {
4008 "Cannot set ethdev port %u priority flow control from NULL config\n",
4013 if (pfc_conf->priority > (RTE_ETH_DCB_NUM_USER_PRIORITIES - 1)) {
4014 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
4018 /* High water, low water validation are device specific */
4019 if (*dev->dev_ops->priority_flow_ctrl_set)
4020 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
4026 eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
4031 num = (reta_size + RTE_ETH_RETA_GROUP_SIZE - 1) / RTE_ETH_RETA_GROUP_SIZE;
4032 for (i = 0; i < num; i++) {
4033 if (reta_conf[i].mask)
4041 eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
4045 uint16_t i, idx, shift;
4048 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
4052 for (i = 0; i < reta_size; i++) {
4053 idx = i / RTE_ETH_RETA_GROUP_SIZE;
4054 shift = i % RTE_ETH_RETA_GROUP_SIZE;
4055 if ((reta_conf[idx].mask & RTE_BIT64(shift)) &&
4056 (reta_conf[idx].reta[shift] >= max_rxq)) {
4058 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
4060 reta_conf[idx].reta[shift], max_rxq);
4069 rte_eth_dev_rss_reta_update(uint16_t port_id,
4070 struct rte_eth_rss_reta_entry64 *reta_conf,
4073 struct rte_eth_dev *dev;
4076 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4077 dev = &rte_eth_devices[port_id];
4079 if (reta_conf == NULL) {
4081 "Cannot update ethdev port %u RSS RETA to NULL\n",
4086 if (reta_size == 0) {
4088 "Cannot update ethdev port %u RSS RETA with zero size\n",
4093 /* Check mask bits */
4094 ret = eth_check_reta_mask(reta_conf, reta_size);
4098 /* Check entry value */
4099 ret = eth_check_reta_entry(reta_conf, reta_size,
4100 dev->data->nb_rx_queues);
4104 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
4105 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
4110 rte_eth_dev_rss_reta_query(uint16_t port_id,
4111 struct rte_eth_rss_reta_entry64 *reta_conf,
4114 struct rte_eth_dev *dev;
4117 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4118 dev = &rte_eth_devices[port_id];
4120 if (reta_conf == NULL) {
4122 "Cannot query ethdev port %u RSS RETA from NULL config\n",
4127 /* Check mask bits */
4128 ret = eth_check_reta_mask(reta_conf, reta_size);
4132 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
4133 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
4138 rte_eth_dev_rss_hash_update(uint16_t port_id,
4139 struct rte_eth_rss_conf *rss_conf)
4141 struct rte_eth_dev *dev;
4142 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
4145 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4146 dev = &rte_eth_devices[port_id];
4148 if (rss_conf == NULL) {
4150 "Cannot update ethdev port %u RSS hash from NULL config\n",
4155 ret = rte_eth_dev_info_get(port_id, &dev_info);
4159 rss_conf->rss_hf = rte_eth_rss_hf_refine(rss_conf->rss_hf);
4160 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
4161 dev_info.flow_type_rss_offloads) {
4163 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
4164 port_id, rss_conf->rss_hf,
4165 dev_info.flow_type_rss_offloads);
4168 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
4169 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
4174 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
4175 struct rte_eth_rss_conf *rss_conf)
4177 struct rte_eth_dev *dev;
4179 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4180 dev = &rte_eth_devices[port_id];
4182 if (rss_conf == NULL) {
4184 "Cannot get ethdev port %u RSS hash config to NULL\n",
4189 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
4190 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
4195 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
4196 struct rte_eth_udp_tunnel *udp_tunnel)
4198 struct rte_eth_dev *dev;
4200 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4201 dev = &rte_eth_devices[port_id];
4203 if (udp_tunnel == NULL) {
4205 "Cannot add ethdev port %u UDP tunnel port from NULL UDP tunnel\n",
4210 if (udp_tunnel->prot_type >= RTE_ETH_TUNNEL_TYPE_MAX) {
4211 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4215 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
4216 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
4221 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
4222 struct rte_eth_udp_tunnel *udp_tunnel)
4224 struct rte_eth_dev *dev;
4226 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4227 dev = &rte_eth_devices[port_id];
4229 if (udp_tunnel == NULL) {
4231 "Cannot delete ethdev port %u UDP tunnel port from NULL UDP tunnel\n",
4236 if (udp_tunnel->prot_type >= RTE_ETH_TUNNEL_TYPE_MAX) {
4237 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4241 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
4242 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
4247 rte_eth_led_on(uint16_t port_id)
4249 struct rte_eth_dev *dev;
4251 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4252 dev = &rte_eth_devices[port_id];
4254 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
4255 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
4259 rte_eth_led_off(uint16_t port_id)
4261 struct rte_eth_dev *dev;
4263 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4264 dev = &rte_eth_devices[port_id];
4266 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
4267 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
4271 rte_eth_fec_get_capability(uint16_t port_id,
4272 struct rte_eth_fec_capa *speed_fec_capa,
4275 struct rte_eth_dev *dev;
4278 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4279 dev = &rte_eth_devices[port_id];
4281 if (speed_fec_capa == NULL && num > 0) {
4283 "Cannot get ethdev port %u FEC capability to NULL when array size is non zero\n",
4288 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_get_capability, -ENOTSUP);
4289 ret = (*dev->dev_ops->fec_get_capability)(dev, speed_fec_capa, num);
4295 rte_eth_fec_get(uint16_t port_id, uint32_t *fec_capa)
4297 struct rte_eth_dev *dev;
4299 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4300 dev = &rte_eth_devices[port_id];
4302 if (fec_capa == NULL) {
4304 "Cannot get ethdev port %u current FEC mode to NULL\n",
4309 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_get, -ENOTSUP);
4310 return eth_err(port_id, (*dev->dev_ops->fec_get)(dev, fec_capa));
4314 rte_eth_fec_set(uint16_t port_id, uint32_t fec_capa)
4316 struct rte_eth_dev *dev;
4318 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4319 dev = &rte_eth_devices[port_id];
4321 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_set, -ENOTSUP);
4322 return eth_err(port_id, (*dev->dev_ops->fec_set)(dev, fec_capa));
4326 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
4330 eth_dev_get_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
4332 struct rte_eth_dev_info dev_info;
4333 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4337 ret = rte_eth_dev_info_get(port_id, &dev_info);
4341 for (i = 0; i < dev_info.max_mac_addrs; i++)
4342 if (memcmp(addr, &dev->data->mac_addrs[i],
4343 RTE_ETHER_ADDR_LEN) == 0)
4349 static const struct rte_ether_addr null_mac_addr;
4352 rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr,
4355 struct rte_eth_dev *dev;
4360 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4361 dev = &rte_eth_devices[port_id];
4365 "Cannot add ethdev port %u MAC address from NULL address\n",
4370 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
4372 if (rte_is_zero_ether_addr(addr)) {
4373 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
4377 if (pool >= RTE_ETH_64_POOLS) {
4378 RTE_ETHDEV_LOG(ERR, "Pool ID must be 0-%d\n", RTE_ETH_64_POOLS - 1);
4382 index = eth_dev_get_mac_addr_index(port_id, addr);
4384 index = eth_dev_get_mac_addr_index(port_id, &null_mac_addr);
4386 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
4391 pool_mask = dev->data->mac_pool_sel[index];
4393 /* Check if both MAC address and pool is already there, and do nothing */
4394 if (pool_mask & RTE_BIT64(pool))
4399 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
4402 /* Update address in NIC data structure */
4403 rte_ether_addr_copy(addr, &dev->data->mac_addrs[index]);
4405 /* Update pool bitmap in NIC data structure */
4406 dev->data->mac_pool_sel[index] |= RTE_BIT64(pool);
4409 return eth_err(port_id, ret);
4413 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *addr)
4415 struct rte_eth_dev *dev;
4418 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4419 dev = &rte_eth_devices[port_id];
4423 "Cannot remove ethdev port %u MAC address from NULL address\n",
4428 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
4430 index = eth_dev_get_mac_addr_index(port_id, addr);
4433 "Port %u: Cannot remove default MAC address\n",
4436 } else if (index < 0)
4437 return 0; /* Do nothing if address wasn't found */
4440 (*dev->dev_ops->mac_addr_remove)(dev, index);
4442 /* Update address in NIC data structure */
4443 rte_ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
4445 /* reset pool bitmap */
4446 dev->data->mac_pool_sel[index] = 0;
4452 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *addr)
4454 struct rte_eth_dev *dev;
4457 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4458 dev = &rte_eth_devices[port_id];
4462 "Cannot set ethdev port %u default MAC address from NULL address\n",
4467 if (!rte_is_valid_assigned_ether_addr(addr))
4470 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
4472 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
4476 /* Update default address in NIC data structure */
4477 rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]);
4484 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
4488 eth_dev_get_hash_mac_addr_index(uint16_t port_id,
4489 const struct rte_ether_addr *addr)
4491 struct rte_eth_dev_info dev_info;
4492 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4496 ret = rte_eth_dev_info_get(port_id, &dev_info);
4500 if (!dev->data->hash_mac_addrs)
4503 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
4504 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
4505 RTE_ETHER_ADDR_LEN) == 0)
4512 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
4517 struct rte_eth_dev *dev;
4519 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4520 dev = &rte_eth_devices[port_id];
4524 "Cannot set ethdev port %u unicast hash table from NULL address\n",
4529 if (rte_is_zero_ether_addr(addr)) {
4530 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
4535 index = eth_dev_get_hash_mac_addr_index(port_id, addr);
4536 /* Check if it's already there, and do nothing */
4537 if ((index >= 0) && on)
4543 "Port %u: the MAC address was not set in UTA\n",
4548 index = eth_dev_get_hash_mac_addr_index(port_id, &null_mac_addr);
4550 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
4556 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
4557 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
4559 /* Update address in NIC data structure */
4561 rte_ether_addr_copy(addr,
4562 &dev->data->hash_mac_addrs[index]);
4564 rte_ether_addr_copy(&null_mac_addr,
4565 &dev->data->hash_mac_addrs[index]);
4568 return eth_err(port_id, ret);
4572 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
4574 struct rte_eth_dev *dev;
4576 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4577 dev = &rte_eth_devices[port_id];
4579 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
4580 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
4584 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
4587 struct rte_eth_dev *dev;
4588 struct rte_eth_dev_info dev_info;
4589 struct rte_eth_link link;
4592 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4593 dev = &rte_eth_devices[port_id];
4595 ret = rte_eth_dev_info_get(port_id, &dev_info);
4599 link = dev->data->dev_link;
4601 if (queue_idx > dev_info.max_tx_queues) {
4603 "Set queue rate limit:port %u: invalid queue ID=%u\n",
4604 port_id, queue_idx);
4608 if (tx_rate > link.link_speed) {
4610 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
4611 tx_rate, link.link_speed);
4615 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
4616 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
4617 queue_idx, tx_rate));
4620 RTE_INIT(eth_dev_init_fp_ops)
4624 for (i = 0; i != RTE_DIM(rte_eth_fp_ops); i++)
4625 eth_dev_fp_ops_reset(rte_eth_fp_ops + i);
4628 RTE_INIT(eth_dev_init_cb_lists)
4632 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
4633 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
4637 rte_eth_dev_callback_register(uint16_t port_id,
4638 enum rte_eth_event_type event,
4639 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4641 struct rte_eth_dev *dev;
4642 struct rte_eth_dev_callback *user_cb;
4646 if (cb_fn == NULL) {
4648 "Cannot register ethdev port %u callback from NULL\n",
4653 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4654 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4658 if (port_id == RTE_ETH_ALL) {
4660 last_port = RTE_MAX_ETHPORTS - 1;
4662 next_port = last_port = port_id;
4665 rte_spinlock_lock(ð_dev_cb_lock);
4668 dev = &rte_eth_devices[next_port];
4670 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
4671 if (user_cb->cb_fn == cb_fn &&
4672 user_cb->cb_arg == cb_arg &&
4673 user_cb->event == event) {
4678 /* create a new callback. */
4679 if (user_cb == NULL) {
4680 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
4681 sizeof(struct rte_eth_dev_callback), 0);
4682 if (user_cb != NULL) {
4683 user_cb->cb_fn = cb_fn;
4684 user_cb->cb_arg = cb_arg;
4685 user_cb->event = event;
4686 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
4689 rte_spinlock_unlock(ð_dev_cb_lock);
4690 rte_eth_dev_callback_unregister(port_id, event,
4696 } while (++next_port <= last_port);
4698 rte_spinlock_unlock(ð_dev_cb_lock);
4703 rte_eth_dev_callback_unregister(uint16_t port_id,
4704 enum rte_eth_event_type event,
4705 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4708 struct rte_eth_dev *dev;
4709 struct rte_eth_dev_callback *cb, *next;
4713 if (cb_fn == NULL) {
4715 "Cannot unregister ethdev port %u callback from NULL\n",
4720 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4721 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4725 if (port_id == RTE_ETH_ALL) {
4727 last_port = RTE_MAX_ETHPORTS - 1;
4729 next_port = last_port = port_id;
4732 rte_spinlock_lock(ð_dev_cb_lock);
4735 dev = &rte_eth_devices[next_port];
4737 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
4740 next = TAILQ_NEXT(cb, next);
4742 if (cb->cb_fn != cb_fn || cb->event != event ||
4743 (cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
4747 * if this callback is not executing right now,
4750 if (cb->active == 0) {
4751 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
4757 } while (++next_port <= last_port);
4759 rte_spinlock_unlock(ð_dev_cb_lock);
4764 rte_eth_dev_callback_process(struct rte_eth_dev *dev,
4765 enum rte_eth_event_type event, void *ret_param)
4767 struct rte_eth_dev_callback *cb_lst;
4768 struct rte_eth_dev_callback dev_cb;
4771 rte_spinlock_lock(ð_dev_cb_lock);
4772 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
4773 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
4777 if (ret_param != NULL)
4778 dev_cb.ret_param = ret_param;
4780 rte_spinlock_unlock(ð_dev_cb_lock);
4781 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
4782 dev_cb.cb_arg, dev_cb.ret_param);
4783 rte_spinlock_lock(ð_dev_cb_lock);
4786 rte_spinlock_unlock(ð_dev_cb_lock);
4791 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
4797 * for secondary process, at that point we expect device
4798 * to be already 'usable', so shared data and all function pointers
4799 * for fast-path devops have to be setup properly inside rte_eth_dev.
4801 if (rte_eal_process_type() == RTE_PROC_SECONDARY)
4802 eth_dev_fp_ops_setup(rte_eth_fp_ops + dev->data->port_id, dev);
4804 rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
4806 dev->state = RTE_ETH_DEV_ATTACHED;
4810 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
4813 struct rte_eth_dev *dev;
4814 struct rte_intr_handle *intr_handle;
4818 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4819 dev = &rte_eth_devices[port_id];
4821 if (!dev->intr_handle) {
4822 RTE_ETHDEV_LOG(ERR, "Rx Intr handle unset\n");
4826 intr_handle = dev->intr_handle;
4827 if (rte_intr_vec_list_index_get(intr_handle, 0) < 0) {
4828 RTE_ETHDEV_LOG(ERR, "Rx Intr vector unset\n");
4832 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
4833 vec = rte_intr_vec_list_index_get(intr_handle, qid);
4834 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4835 if (rc && rc != -EEXIST) {
4837 "p %u q %u Rx ctl error op %d epfd %d vec %u\n",
4838 port_id, qid, op, epfd, vec);
4846 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
4848 struct rte_intr_handle *intr_handle;
4849 struct rte_eth_dev *dev;
4850 unsigned int efd_idx;
4854 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
4855 dev = &rte_eth_devices[port_id];
4857 if (queue_id >= dev->data->nb_rx_queues) {
4858 RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u\n", queue_id);
4862 if (!dev->intr_handle) {
4863 RTE_ETHDEV_LOG(ERR, "Rx Intr handle unset\n");
4867 intr_handle = dev->intr_handle;
4868 if (rte_intr_vec_list_index_get(intr_handle, 0) < 0) {
4869 RTE_ETHDEV_LOG(ERR, "Rx Intr vector unset\n");
4873 vec = rte_intr_vec_list_index_get(intr_handle, queue_id);
4874 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
4875 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
4876 fd = rte_intr_efds_index_get(intr_handle, efd_idx);
4882 eth_dev_dma_mzone_name(char *name, size_t len, uint16_t port_id, uint16_t queue_id,
4883 const char *ring_name)
4885 return snprintf(name, len, "eth_p%d_q%d_%s",
4886 port_id, queue_id, ring_name);
4889 const struct rte_memzone *
4890 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
4891 uint16_t queue_id, size_t size, unsigned align,
4894 char z_name[RTE_MEMZONE_NAMESIZE];
4895 const struct rte_memzone *mz;
4898 rc = eth_dev_dma_mzone_name(z_name, sizeof(z_name), dev->data->port_id,
4899 queue_id, ring_name);
4900 if (rc >= RTE_MEMZONE_NAMESIZE) {
4901 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4902 rte_errno = ENAMETOOLONG;
4906 mz = rte_memzone_lookup(z_name);
4908 if ((socket_id != SOCKET_ID_ANY && socket_id != mz->socket_id) ||
4910 ((uintptr_t)mz->addr & (align - 1)) != 0) {
4912 "memzone %s does not justify the requested attributes\n",
4920 return rte_memzone_reserve_aligned(z_name, size, socket_id,
4921 RTE_MEMZONE_IOVA_CONTIG, align);
4925 rte_eth_dma_zone_free(const struct rte_eth_dev *dev, const char *ring_name,
4928 char z_name[RTE_MEMZONE_NAMESIZE];
4929 const struct rte_memzone *mz;
4932 rc = eth_dev_dma_mzone_name(z_name, sizeof(z_name), dev->data->port_id,
4933 queue_id, ring_name);
4934 if (rc >= RTE_MEMZONE_NAMESIZE) {
4935 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4936 return -ENAMETOOLONG;
4939 mz = rte_memzone_lookup(z_name);
4941 rc = rte_memzone_free(mz);
4949 rte_eth_dev_create(struct rte_device *device, const char *name,
4950 size_t priv_data_size,
4951 ethdev_bus_specific_init ethdev_bus_specific_init,
4952 void *bus_init_params,
4953 ethdev_init_t ethdev_init, void *init_params)
4955 struct rte_eth_dev *ethdev;
4958 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
4960 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
4961 ethdev = rte_eth_dev_allocate(name);
4965 if (priv_data_size) {
4966 ethdev->data->dev_private = rte_zmalloc_socket(
4967 name, priv_data_size, RTE_CACHE_LINE_SIZE,
4970 if (!ethdev->data->dev_private) {
4972 "failed to allocate private data\n");
4978 ethdev = rte_eth_dev_attach_secondary(name);
4981 "secondary process attach failed, ethdev doesn't exist\n");
4986 ethdev->device = device;
4988 if (ethdev_bus_specific_init) {
4989 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
4992 "ethdev bus specific initialisation failed\n");
4997 retval = ethdev_init(ethdev, init_params);
4999 RTE_ETHDEV_LOG(ERR, "ethdev initialisation failed\n");
5003 rte_eth_dev_probing_finish(ethdev);
5008 rte_eth_dev_release_port(ethdev);
5013 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
5014 ethdev_uninit_t ethdev_uninit)
5018 ethdev = rte_eth_dev_allocated(ethdev->data->name);
5022 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
5024 ret = ethdev_uninit(ethdev);
5028 return rte_eth_dev_release_port(ethdev);
5032 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
5033 int epfd, int op, void *data)
5036 struct rte_eth_dev *dev;
5037 struct rte_intr_handle *intr_handle;
5040 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5041 dev = &rte_eth_devices[port_id];
5043 if (queue_id >= dev->data->nb_rx_queues) {
5044 RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u\n", queue_id);
5048 if (!dev->intr_handle) {
5049 RTE_ETHDEV_LOG(ERR, "Rx Intr handle unset\n");
5053 intr_handle = dev->intr_handle;
5054 if (rte_intr_vec_list_index_get(intr_handle, 0) < 0) {
5055 RTE_ETHDEV_LOG(ERR, "Rx Intr vector unset\n");
5059 vec = rte_intr_vec_list_index_get(intr_handle, queue_id);
5060 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
5061 if (rc && rc != -EEXIST) {
5063 "p %u q %u Rx ctl error op %d epfd %d vec %u\n",
5064 port_id, queue_id, op, epfd, vec);
5072 rte_eth_dev_rx_intr_enable(uint16_t port_id,
5075 struct rte_eth_dev *dev;
5078 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5079 dev = &rte_eth_devices[port_id];
5081 ret = eth_dev_validate_rx_queue(dev, queue_id);
5085 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
5086 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id));
5090 rte_eth_dev_rx_intr_disable(uint16_t port_id,
5093 struct rte_eth_dev *dev;
5096 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5097 dev = &rte_eth_devices[port_id];
5099 ret = eth_dev_validate_rx_queue(dev, queue_id);
5103 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
5104 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id));
5108 const struct rte_eth_rxtx_callback *
5109 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
5110 rte_rx_callback_fn fn, void *user_param)
5112 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
5113 rte_errno = ENOTSUP;
5116 struct rte_eth_dev *dev;
5118 /* check input parameters */
5119 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
5120 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
5124 dev = &rte_eth_devices[port_id];
5125 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
5129 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
5137 cb->param = user_param;
5139 rte_spinlock_lock(ð_dev_rx_cb_lock);
5140 /* Add the callbacks in fifo order. */
5141 struct rte_eth_rxtx_callback *tail =
5142 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
5145 /* Stores to cb->fn and cb->param should complete before
5146 * cb is visible to data plane.
5149 &rte_eth_devices[port_id].post_rx_burst_cbs[queue_id],
5150 cb, __ATOMIC_RELEASE);
5155 /* Stores to cb->fn and cb->param should complete before
5156 * cb is visible to data plane.
5158 __atomic_store_n(&tail->next, cb, __ATOMIC_RELEASE);
5160 rte_spinlock_unlock(ð_dev_rx_cb_lock);
5165 const struct rte_eth_rxtx_callback *
5166 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
5167 rte_rx_callback_fn fn, void *user_param)
5169 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
5170 rte_errno = ENOTSUP;
5173 /* check input parameters */
5174 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
5175 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
5180 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
5188 cb->param = user_param;
5190 rte_spinlock_lock(ð_dev_rx_cb_lock);
5191 /* Add the callbacks at first position */
5192 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
5193 /* Stores to cb->fn, cb->param and cb->next should complete before
5194 * cb is visible to data plane threads.
5197 &rte_eth_devices[port_id].post_rx_burst_cbs[queue_id],
5198 cb, __ATOMIC_RELEASE);
5199 rte_spinlock_unlock(ð_dev_rx_cb_lock);
5204 const struct rte_eth_rxtx_callback *
5205 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
5206 rte_tx_callback_fn fn, void *user_param)
5208 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
5209 rte_errno = ENOTSUP;
5212 struct rte_eth_dev *dev;
5214 /* check input parameters */
5215 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
5216 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
5221 dev = &rte_eth_devices[port_id];
5222 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
5227 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
5235 cb->param = user_param;
5237 rte_spinlock_lock(ð_dev_tx_cb_lock);
5238 /* Add the callbacks in fifo order. */
5239 struct rte_eth_rxtx_callback *tail =
5240 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
5243 /* Stores to cb->fn and cb->param should complete before
5244 * cb is visible to data plane.
5247 &rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id],
5248 cb, __ATOMIC_RELEASE);
5253 /* Stores to cb->fn and cb->param should complete before
5254 * cb is visible to data plane.
5256 __atomic_store_n(&tail->next, cb, __ATOMIC_RELEASE);
5258 rte_spinlock_unlock(ð_dev_tx_cb_lock);
5264 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
5265 const struct rte_eth_rxtx_callback *user_cb)
5267 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
5270 /* Check input parameters. */
5271 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5272 if (user_cb == NULL ||
5273 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
5276 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
5277 struct rte_eth_rxtx_callback *cb;
5278 struct rte_eth_rxtx_callback **prev_cb;
5281 rte_spinlock_lock(ð_dev_rx_cb_lock);
5282 prev_cb = &dev->post_rx_burst_cbs[queue_id];
5283 for (; *prev_cb != NULL; prev_cb = &cb->next) {
5285 if (cb == user_cb) {
5286 /* Remove the user cb from the callback list. */
5287 __atomic_store_n(prev_cb, cb->next, __ATOMIC_RELAXED);
5292 rte_spinlock_unlock(ð_dev_rx_cb_lock);
5298 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
5299 const struct rte_eth_rxtx_callback *user_cb)
5301 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
5304 /* Check input parameters. */
5305 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5306 if (user_cb == NULL ||
5307 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
5310 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
5312 struct rte_eth_rxtx_callback *cb;
5313 struct rte_eth_rxtx_callback **prev_cb;
5315 rte_spinlock_lock(ð_dev_tx_cb_lock);
5316 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
5317 for (; *prev_cb != NULL; prev_cb = &cb->next) {
5319 if (cb == user_cb) {
5320 /* Remove the user cb from the callback list. */
5321 __atomic_store_n(prev_cb, cb->next, __ATOMIC_RELAXED);
5326 rte_spinlock_unlock(ð_dev_tx_cb_lock);
5332 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
5333 struct rte_eth_rxq_info *qinfo)
5335 struct rte_eth_dev *dev;
5337 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5338 dev = &rte_eth_devices[port_id];
5340 if (queue_id >= dev->data->nb_rx_queues) {
5341 RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u\n", queue_id);
5345 if (qinfo == NULL) {
5346 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u Rx queue %u info to NULL\n",
5351 if (dev->data->rx_queues == NULL ||
5352 dev->data->rx_queues[queue_id] == NULL) {
5354 "Rx queue %"PRIu16" of device with port_id=%"
5355 PRIu16" has not been setup\n",
5360 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
5361 RTE_ETHDEV_LOG(INFO,
5362 "Can't get hairpin Rx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
5367 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
5369 memset(qinfo, 0, sizeof(*qinfo));
5370 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
5371 qinfo->queue_state = dev->data->rx_queue_state[queue_id];
5377 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
5378 struct rte_eth_txq_info *qinfo)
5380 struct rte_eth_dev *dev;
5382 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5383 dev = &rte_eth_devices[port_id];
5385 if (queue_id >= dev->data->nb_tx_queues) {
5386 RTE_ETHDEV_LOG(ERR, "Invalid Tx queue_id=%u\n", queue_id);
5390 if (qinfo == NULL) {
5391 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u Tx queue %u info to NULL\n",
5396 if (dev->data->tx_queues == NULL ||
5397 dev->data->tx_queues[queue_id] == NULL) {
5399 "Tx queue %"PRIu16" of device with port_id=%"
5400 PRIu16" has not been setup\n",
5405 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
5406 RTE_ETHDEV_LOG(INFO,
5407 "Can't get hairpin Tx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
5412 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
5414 memset(qinfo, 0, sizeof(*qinfo));
5415 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
5416 qinfo->queue_state = dev->data->tx_queue_state[queue_id];
5422 rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
5423 struct rte_eth_burst_mode *mode)
5425 struct rte_eth_dev *dev;
5427 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5428 dev = &rte_eth_devices[port_id];
5430 if (queue_id >= dev->data->nb_rx_queues) {
5431 RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u\n", queue_id);
5437 "Cannot get ethdev port %u Rx queue %u burst mode to NULL\n",
5442 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_burst_mode_get, -ENOTSUP);
5443 memset(mode, 0, sizeof(*mode));
5444 return eth_err(port_id,
5445 dev->dev_ops->rx_burst_mode_get(dev, queue_id, mode));
5449 rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
5450 struct rte_eth_burst_mode *mode)
5452 struct rte_eth_dev *dev;
5454 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5455 dev = &rte_eth_devices[port_id];
5457 if (queue_id >= dev->data->nb_tx_queues) {
5458 RTE_ETHDEV_LOG(ERR, "Invalid Tx queue_id=%u\n", queue_id);
5464 "Cannot get ethdev port %u Tx queue %u burst mode to NULL\n",
5469 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_burst_mode_get, -ENOTSUP);
5470 memset(mode, 0, sizeof(*mode));
5471 return eth_err(port_id,
5472 dev->dev_ops->tx_burst_mode_get(dev, queue_id, mode));
5476 rte_eth_get_monitor_addr(uint16_t port_id, uint16_t queue_id,
5477 struct rte_power_monitor_cond *pmc)
5479 struct rte_eth_dev *dev;
5481 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5482 dev = &rte_eth_devices[port_id];
5484 if (queue_id >= dev->data->nb_rx_queues) {
5485 RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u\n", queue_id);
5491 "Cannot get ethdev port %u Rx queue %u power monitor condition to NULL\n",
5496 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_monitor_addr, -ENOTSUP);
5497 return eth_err(port_id,
5498 dev->dev_ops->get_monitor_addr(dev->data->rx_queues[queue_id], pmc));
5502 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
5503 struct rte_ether_addr *mc_addr_set,
5504 uint32_t nb_mc_addr)
5506 struct rte_eth_dev *dev;
5508 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5509 dev = &rte_eth_devices[port_id];
5511 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
5512 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
5513 mc_addr_set, nb_mc_addr));
5517 rte_eth_timesync_enable(uint16_t port_id)
5519 struct rte_eth_dev *dev;
5521 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5522 dev = &rte_eth_devices[port_id];
5524 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
5525 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
5529 rte_eth_timesync_disable(uint16_t port_id)
5531 struct rte_eth_dev *dev;
5533 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5534 dev = &rte_eth_devices[port_id];
5536 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
5537 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
5541 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
5544 struct rte_eth_dev *dev;
5546 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5547 dev = &rte_eth_devices[port_id];
5549 if (timestamp == NULL) {
5551 "Cannot read ethdev port %u Rx timestamp to NULL\n",
5556 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
5557 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
5558 (dev, timestamp, flags));
5562 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
5563 struct timespec *timestamp)
5565 struct rte_eth_dev *dev;
5567 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5568 dev = &rte_eth_devices[port_id];
5570 if (timestamp == NULL) {
5572 "Cannot read ethdev port %u Tx timestamp to NULL\n",
5577 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
5578 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
5583 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
5585 struct rte_eth_dev *dev;
5587 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5588 dev = &rte_eth_devices[port_id];
5590 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
5591 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev, delta));
5595 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
5597 struct rte_eth_dev *dev;
5599 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5600 dev = &rte_eth_devices[port_id];
5602 if (timestamp == NULL) {
5604 "Cannot read ethdev port %u timesync time to NULL\n",
5609 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
5610 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
5615 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
5617 struct rte_eth_dev *dev;
5619 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5620 dev = &rte_eth_devices[port_id];
5622 if (timestamp == NULL) {
5624 "Cannot write ethdev port %u timesync from NULL time\n",
5629 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
5630 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
5635 rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
5637 struct rte_eth_dev *dev;
5639 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5640 dev = &rte_eth_devices[port_id];
5642 if (clock == NULL) {
5643 RTE_ETHDEV_LOG(ERR, "Cannot read ethdev port %u clock to NULL\n",
5648 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->read_clock, -ENOTSUP);
5649 return eth_err(port_id, (*dev->dev_ops->read_clock)(dev, clock));
5653 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
5655 struct rte_eth_dev *dev;
5657 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5658 dev = &rte_eth_devices[port_id];
5662 "Cannot get ethdev port %u register info to NULL\n",
5667 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
5668 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
5672 rte_eth_dev_get_eeprom_length(uint16_t port_id)
5674 struct rte_eth_dev *dev;
5676 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5677 dev = &rte_eth_devices[port_id];
5679 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
5680 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
5684 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
5686 struct rte_eth_dev *dev;
5688 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5689 dev = &rte_eth_devices[port_id];
5693 "Cannot get ethdev port %u EEPROM info to NULL\n",
5698 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
5699 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
5703 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
5705 struct rte_eth_dev *dev;
5707 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5708 dev = &rte_eth_devices[port_id];
5712 "Cannot set ethdev port %u EEPROM from NULL info\n",
5717 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
5718 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
5722 rte_eth_dev_get_module_info(uint16_t port_id,
5723 struct rte_eth_dev_module_info *modinfo)
5725 struct rte_eth_dev *dev;
5727 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5728 dev = &rte_eth_devices[port_id];
5730 if (modinfo == NULL) {
5732 "Cannot get ethdev port %u EEPROM module info to NULL\n",
5737 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
5738 return (*dev->dev_ops->get_module_info)(dev, modinfo);
5742 rte_eth_dev_get_module_eeprom(uint16_t port_id,
5743 struct rte_dev_eeprom_info *info)
5745 struct rte_eth_dev *dev;
5747 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5748 dev = &rte_eth_devices[port_id];
5752 "Cannot get ethdev port %u module EEPROM info to NULL\n",
5757 if (info->data == NULL) {
5759 "Cannot get ethdev port %u module EEPROM data to NULL\n",
5764 if (info->length == 0) {
5766 "Cannot get ethdev port %u module EEPROM to data with zero size\n",
5771 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
5772 return (*dev->dev_ops->get_module_eeprom)(dev, info);
5776 rte_eth_dev_get_dcb_info(uint16_t port_id,
5777 struct rte_eth_dcb_info *dcb_info)
5779 struct rte_eth_dev *dev;
5781 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5782 dev = &rte_eth_devices[port_id];
5784 if (dcb_info == NULL) {
5786 "Cannot get ethdev port %u DCB info to NULL\n",
5791 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
5793 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
5794 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
5798 eth_dev_adjust_nb_desc(uint16_t *nb_desc,
5799 const struct rte_eth_desc_lim *desc_lim)
5801 if (desc_lim->nb_align != 0)
5802 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
5804 if (desc_lim->nb_max != 0)
5805 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
5807 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
5811 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
5812 uint16_t *nb_rx_desc,
5813 uint16_t *nb_tx_desc)
5815 struct rte_eth_dev_info dev_info;
5818 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5820 ret = rte_eth_dev_info_get(port_id, &dev_info);
5824 if (nb_rx_desc != NULL)
5825 eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
5827 if (nb_tx_desc != NULL)
5828 eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
5834 rte_eth_dev_hairpin_capability_get(uint16_t port_id,
5835 struct rte_eth_hairpin_cap *cap)
5837 struct rte_eth_dev *dev;
5839 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5840 dev = &rte_eth_devices[port_id];
5844 "Cannot get ethdev port %u hairpin capability to NULL\n",
5849 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_cap_get, -ENOTSUP);
5850 memset(cap, 0, sizeof(*cap));
5851 return eth_err(port_id, (*dev->dev_ops->hairpin_cap_get)(dev, cap));
5855 rte_eth_dev_is_rx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5857 if (dev->data->rx_queue_state[queue_id] == RTE_ETH_QUEUE_STATE_HAIRPIN)
5863 rte_eth_dev_is_tx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5865 if (dev->data->tx_queue_state[queue_id] == RTE_ETH_QUEUE_STATE_HAIRPIN)
5871 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
5873 struct rte_eth_dev *dev;
5875 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5876 dev = &rte_eth_devices[port_id];
5880 "Cannot test ethdev port %u mempool operation from NULL pool\n",
5885 if (*dev->dev_ops->pool_ops_supported == NULL)
5886 return 1; /* all pools are supported */
5888 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
5892 * A set of values to describe the possible states of a switch domain.
5894 enum rte_eth_switch_domain_state {
5895 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
5896 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
5900 * Array of switch domains available for allocation. Array is sized to
5901 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
5902 * ethdev ports in a single process.
5904 static struct rte_eth_dev_switch {
5905 enum rte_eth_switch_domain_state state;
5906 } eth_dev_switch_domains[RTE_MAX_ETHPORTS];
5909 rte_eth_switch_domain_alloc(uint16_t *domain_id)
5913 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
5915 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
5916 if (eth_dev_switch_domains[i].state ==
5917 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
5918 eth_dev_switch_domains[i].state =
5919 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
5929 rte_eth_switch_domain_free(uint16_t domain_id)
5931 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
5932 domain_id >= RTE_MAX_ETHPORTS)
5935 if (eth_dev_switch_domains[domain_id].state !=
5936 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
5939 eth_dev_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
5945 eth_dev_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
5948 struct rte_kvargs_pair *pair;
5951 arglist->str = strdup(str_in);
5952 if (arglist->str == NULL)
5955 letter = arglist->str;
5958 pair = &arglist->pairs[0];
5961 case 0: /* Initial */
5964 else if (*letter == '\0')
5971 case 1: /* Parsing key */
5972 if (*letter == '=') {
5974 pair->value = letter + 1;
5976 } else if (*letter == ',' || *letter == '\0')
5981 case 2: /* Parsing value */
5984 else if (*letter == ',') {
5987 pair = &arglist->pairs[arglist->count];
5989 } else if (*letter == '\0') {
5992 pair = &arglist->pairs[arglist->count];
5997 case 3: /* Parsing list */
6000 else if (*letter == '\0')
6009 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
6011 struct rte_kvargs args;
6012 struct rte_kvargs_pair *pair;
6016 memset(eth_da, 0, sizeof(*eth_da));
6018 result = eth_dev_devargs_tokenise(&args, dargs);
6022 for (i = 0; i < args.count; i++) {
6023 pair = &args.pairs[i];
6024 if (strcmp("representor", pair->key) == 0) {
6025 if (eth_da->type != RTE_ETH_REPRESENTOR_NONE) {
6026 RTE_LOG(ERR, EAL, "duplicated representor key: %s\n",
6031 result = rte_eth_devargs_parse_representor_ports(
6032 pair->value, eth_da);
6046 rte_eth_representor_id_get(uint16_t port_id,
6047 enum rte_eth_representor_type type,
6048 int controller, int pf, int representor_port,
6053 struct rte_eth_representor_info *info = NULL;
6056 if (type == RTE_ETH_REPRESENTOR_NONE)
6058 if (repr_id == NULL)
6061 /* Get PMD representor range info. */
6062 ret = rte_eth_representor_info_get(port_id, NULL);
6063 if (ret == -ENOTSUP && type == RTE_ETH_REPRESENTOR_VF &&
6064 controller == -1 && pf == -1) {
6065 /* Direct mapping for legacy VF representor. */
6066 *repr_id = representor_port;
6068 } else if (ret < 0) {
6072 size = sizeof(*info) + n * sizeof(info->ranges[0]);
6073 info = calloc(1, size);
6076 info->nb_ranges_alloc = n;
6077 ret = rte_eth_representor_info_get(port_id, info);
6081 /* Default controller and pf to caller. */
6082 if (controller == -1)
6083 controller = info->controller;
6087 /* Locate representor ID. */
6089 for (i = 0; i < info->nb_ranges; ++i) {
6090 if (info->ranges[i].type != type)
6092 if (info->ranges[i].controller != controller)
6094 if (info->ranges[i].id_end < info->ranges[i].id_base) {
6095 RTE_LOG(WARNING, EAL, "Port %hu invalid representor ID Range %u - %u, entry %d\n",
6096 port_id, info->ranges[i].id_base,
6097 info->ranges[i].id_end, i);
6101 count = info->ranges[i].id_end - info->ranges[i].id_base + 1;
6102 switch (info->ranges[i].type) {
6103 case RTE_ETH_REPRESENTOR_PF:
6104 if (pf < info->ranges[i].pf ||
6105 pf >= info->ranges[i].pf + count)
6107 *repr_id = info->ranges[i].id_base +
6108 (pf - info->ranges[i].pf);
6111 case RTE_ETH_REPRESENTOR_VF:
6112 if (info->ranges[i].pf != pf)
6114 if (representor_port < info->ranges[i].vf ||
6115 representor_port >= info->ranges[i].vf + count)
6117 *repr_id = info->ranges[i].id_base +
6118 (representor_port - info->ranges[i].vf);
6121 case RTE_ETH_REPRESENTOR_SF:
6122 if (info->ranges[i].pf != pf)
6124 if (representor_port < info->ranges[i].sf ||
6125 representor_port >= info->ranges[i].sf + count)
6127 *repr_id = info->ranges[i].id_base +
6128 (representor_port - info->ranges[i].sf);
6141 eth_dev_handle_port_list(const char *cmd __rte_unused,
6142 const char *params __rte_unused,
6143 struct rte_tel_data *d)
6147 rte_tel_data_start_array(d, RTE_TEL_INT_VAL);
6148 RTE_ETH_FOREACH_DEV(port_id)
6149 rte_tel_data_add_array_int(d, port_id);
6154 eth_dev_add_port_queue_stats(struct rte_tel_data *d, uint64_t *q_stats,
6155 const char *stat_name)
6158 struct rte_tel_data *q_data = rte_tel_data_alloc();
6159 rte_tel_data_start_array(q_data, RTE_TEL_U64_VAL);
6160 for (q = 0; q < RTE_ETHDEV_QUEUE_STAT_CNTRS; q++)
6161 rte_tel_data_add_array_u64(q_data, q_stats[q]);
6162 rte_tel_data_add_dict_container(d, stat_name, q_data, 0);
6165 #define ADD_DICT_STAT(stats, s) rte_tel_data_add_dict_u64(d, #s, stats.s)
6168 eth_dev_handle_port_stats(const char *cmd __rte_unused,
6170 struct rte_tel_data *d)
6172 struct rte_eth_stats stats;
6175 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
6178 port_id = atoi(params);
6179 if (!rte_eth_dev_is_valid_port(port_id))
6182 ret = rte_eth_stats_get(port_id, &stats);
6186 rte_tel_data_start_dict(d);
6187 ADD_DICT_STAT(stats, ipackets);
6188 ADD_DICT_STAT(stats, opackets);
6189 ADD_DICT_STAT(stats, ibytes);
6190 ADD_DICT_STAT(stats, obytes);
6191 ADD_DICT_STAT(stats, imissed);
6192 ADD_DICT_STAT(stats, ierrors);
6193 ADD_DICT_STAT(stats, oerrors);
6194 ADD_DICT_STAT(stats, rx_nombuf);
6195 eth_dev_add_port_queue_stats(d, stats.q_ipackets, "q_ipackets");
6196 eth_dev_add_port_queue_stats(d, stats.q_opackets, "q_opackets");
6197 eth_dev_add_port_queue_stats(d, stats.q_ibytes, "q_ibytes");
6198 eth_dev_add_port_queue_stats(d, stats.q_obytes, "q_obytes");
6199 eth_dev_add_port_queue_stats(d, stats.q_errors, "q_errors");
6205 eth_dev_handle_port_xstats(const char *cmd __rte_unused,
6207 struct rte_tel_data *d)
6209 struct rte_eth_xstat *eth_xstats;
6210 struct rte_eth_xstat_name *xstat_names;
6211 int port_id, num_xstats;
6215 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
6218 port_id = strtoul(params, &end_param, 0);
6219 if (*end_param != '\0')
6220 RTE_ETHDEV_LOG(NOTICE,
6221 "Extra parameters passed to ethdev telemetry command, ignoring");
6222 if (!rte_eth_dev_is_valid_port(port_id))
6225 num_xstats = rte_eth_xstats_get(port_id, NULL, 0);
6229 /* use one malloc for both names and stats */
6230 eth_xstats = malloc((sizeof(struct rte_eth_xstat) +
6231 sizeof(struct rte_eth_xstat_name)) * num_xstats);
6232 if (eth_xstats == NULL)
6234 xstat_names = (void *)ð_xstats[num_xstats];
6236 ret = rte_eth_xstats_get_names(port_id, xstat_names, num_xstats);
6237 if (ret < 0 || ret > num_xstats) {
6242 ret = rte_eth_xstats_get(port_id, eth_xstats, num_xstats);
6243 if (ret < 0 || ret > num_xstats) {
6248 rte_tel_data_start_dict(d);
6249 for (i = 0; i < num_xstats; i++)
6250 rte_tel_data_add_dict_u64(d, xstat_names[i].name,
6251 eth_xstats[i].value);
6256 eth_dev_handle_port_link_status(const char *cmd __rte_unused,
6258 struct rte_tel_data *d)
6260 static const char *status_str = "status";
6262 struct rte_eth_link link;
6265 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
6268 port_id = strtoul(params, &end_param, 0);
6269 if (*end_param != '\0')
6270 RTE_ETHDEV_LOG(NOTICE,
6271 "Extra parameters passed to ethdev telemetry command, ignoring");
6272 if (!rte_eth_dev_is_valid_port(port_id))
6275 ret = rte_eth_link_get_nowait(port_id, &link);
6279 rte_tel_data_start_dict(d);
6280 if (!link.link_status) {
6281 rte_tel_data_add_dict_string(d, status_str, "DOWN");
6284 rte_tel_data_add_dict_string(d, status_str, "UP");
6285 rte_tel_data_add_dict_u64(d, "speed", link.link_speed);
6286 rte_tel_data_add_dict_string(d, "duplex",
6287 (link.link_duplex == RTE_ETH_LINK_FULL_DUPLEX) ?
6288 "full-duplex" : "half-duplex");
6293 eth_dev_handle_port_info(const char *cmd __rte_unused,
6295 struct rte_tel_data *d)
6297 struct rte_tel_data *rxq_state, *txq_state;
6298 char mac_addr[RTE_ETHER_ADDR_LEN];
6299 struct rte_eth_dev *eth_dev;
6303 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
6306 port_id = strtoul(params, &end_param, 0);
6307 if (*end_param != '\0')
6308 RTE_ETHDEV_LOG(NOTICE,
6309 "Extra parameters passed to ethdev telemetry command, ignoring");
6311 if (!rte_eth_dev_is_valid_port(port_id))
6314 eth_dev = &rte_eth_devices[port_id];
6318 rxq_state = rte_tel_data_alloc();
6322 txq_state = rte_tel_data_alloc();
6324 rte_tel_data_free(rxq_state);
6328 rte_tel_data_start_dict(d);
6329 rte_tel_data_add_dict_string(d, "name", eth_dev->data->name);
6330 rte_tel_data_add_dict_int(d, "state", eth_dev->state);
6331 rte_tel_data_add_dict_int(d, "nb_rx_queues",
6332 eth_dev->data->nb_rx_queues);
6333 rte_tel_data_add_dict_int(d, "nb_tx_queues",
6334 eth_dev->data->nb_tx_queues);
6335 rte_tel_data_add_dict_int(d, "port_id", eth_dev->data->port_id);
6336 rte_tel_data_add_dict_int(d, "mtu", eth_dev->data->mtu);
6337 rte_tel_data_add_dict_int(d, "rx_mbuf_size_min",
6338 eth_dev->data->min_rx_buf_size);
6339 rte_tel_data_add_dict_int(d, "rx_mbuf_alloc_fail",
6340 eth_dev->data->rx_mbuf_alloc_failed);
6341 snprintf(mac_addr, RTE_ETHER_ADDR_LEN, "%02x:%02x:%02x:%02x:%02x:%02x",
6342 eth_dev->data->mac_addrs->addr_bytes[0],
6343 eth_dev->data->mac_addrs->addr_bytes[1],
6344 eth_dev->data->mac_addrs->addr_bytes[2],
6345 eth_dev->data->mac_addrs->addr_bytes[3],
6346 eth_dev->data->mac_addrs->addr_bytes[4],
6347 eth_dev->data->mac_addrs->addr_bytes[5]);
6348 rte_tel_data_add_dict_string(d, "mac_addr", mac_addr);
6349 rte_tel_data_add_dict_int(d, "promiscuous",
6350 eth_dev->data->promiscuous);
6351 rte_tel_data_add_dict_int(d, "scattered_rx",
6352 eth_dev->data->scattered_rx);
6353 rte_tel_data_add_dict_int(d, "all_multicast",
6354 eth_dev->data->all_multicast);
6355 rte_tel_data_add_dict_int(d, "dev_started", eth_dev->data->dev_started);
6356 rte_tel_data_add_dict_int(d, "lro", eth_dev->data->lro);
6357 rte_tel_data_add_dict_int(d, "dev_configured",
6358 eth_dev->data->dev_configured);
6360 rte_tel_data_start_array(rxq_state, RTE_TEL_INT_VAL);
6361 for (i = 0; i < eth_dev->data->nb_rx_queues; i++)
6362 rte_tel_data_add_array_int(rxq_state,
6363 eth_dev->data->rx_queue_state[i]);
6365 rte_tel_data_start_array(txq_state, RTE_TEL_INT_VAL);
6366 for (i = 0; i < eth_dev->data->nb_tx_queues; i++)
6367 rte_tel_data_add_array_int(txq_state,
6368 eth_dev->data->tx_queue_state[i]);
6370 rte_tel_data_add_dict_container(d, "rxq_state", rxq_state, 0);
6371 rte_tel_data_add_dict_container(d, "txq_state", txq_state, 0);
6372 rte_tel_data_add_dict_int(d, "numa_node", eth_dev->data->numa_node);
6373 rte_tel_data_add_dict_int(d, "dev_flags", eth_dev->data->dev_flags);
6374 rte_tel_data_add_dict_int(d, "rx_offloads",
6375 eth_dev->data->dev_conf.rxmode.offloads);
6376 rte_tel_data_add_dict_int(d, "tx_offloads",
6377 eth_dev->data->dev_conf.txmode.offloads);
6378 rte_tel_data_add_dict_int(d, "ethdev_rss_hf",
6379 eth_dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf);
6385 rte_eth_hairpin_queue_peer_update(uint16_t peer_port, uint16_t peer_queue,
6386 struct rte_hairpin_peer_info *cur_info,
6387 struct rte_hairpin_peer_info *peer_info,
6390 struct rte_eth_dev *dev;
6392 /* Current queue information is not mandatory. */
6393 if (peer_info == NULL)
6396 /* No need to check the validity again. */
6397 dev = &rte_eth_devices[peer_port];
6398 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_queue_peer_update,
6401 return (*dev->dev_ops->hairpin_queue_peer_update)(dev, peer_queue,
6402 cur_info, peer_info, direction);
6406 rte_eth_hairpin_queue_peer_bind(uint16_t cur_port, uint16_t cur_queue,
6407 struct rte_hairpin_peer_info *peer_info,
6410 struct rte_eth_dev *dev;
6412 if (peer_info == NULL)
6415 /* No need to check the validity again. */
6416 dev = &rte_eth_devices[cur_port];
6417 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_queue_peer_bind,
6420 return (*dev->dev_ops->hairpin_queue_peer_bind)(dev, cur_queue,
6421 peer_info, direction);
6425 rte_eth_hairpin_queue_peer_unbind(uint16_t cur_port, uint16_t cur_queue,
6428 struct rte_eth_dev *dev;
6430 /* No need to check the validity again. */
6431 dev = &rte_eth_devices[cur_port];
6432 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_queue_peer_unbind,
6435 return (*dev->dev_ops->hairpin_queue_peer_unbind)(dev, cur_queue,
6440 rte_eth_representor_info_get(uint16_t port_id,
6441 struct rte_eth_representor_info *info)
6443 struct rte_eth_dev *dev;
6445 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
6446 dev = &rte_eth_devices[port_id];
6448 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->representor_info_get, -ENOTSUP);
6449 return eth_err(port_id, (*dev->dev_ops->representor_info_get)(dev, info));
6453 rte_eth_rx_metadata_negotiate(uint16_t port_id, uint64_t *features)
6455 struct rte_eth_dev *dev;
6457 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
6458 dev = &rte_eth_devices[port_id];
6460 if (dev->data->dev_configured != 0) {
6462 "The port (ID=%"PRIu16") is already configured\n",
6467 if (features == NULL) {
6468 RTE_ETHDEV_LOG(ERR, "Invalid features (NULL)\n");
6472 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_metadata_negotiate, -ENOTSUP);
6473 return eth_err(port_id,
6474 (*dev->dev_ops->rx_metadata_negotiate)(dev, features));
6477 RTE_LOG_REGISTER_DEFAULT(rte_eth_dev_logtype, INFO);
6479 RTE_INIT(ethdev_init_telemetry)
6481 rte_telemetry_register_cmd("/ethdev/list", eth_dev_handle_port_list,
6482 "Returns list of available ethdev ports. Takes no parameters");
6483 rte_telemetry_register_cmd("/ethdev/stats", eth_dev_handle_port_stats,
6484 "Returns the common stats for a port. Parameters: int port_id");
6485 rte_telemetry_register_cmd("/ethdev/xstats", eth_dev_handle_port_xstats,
6486 "Returns the extended stats for a port. Parameters: int port_id");
6487 rte_telemetry_register_cmd("/ethdev/link_status",
6488 eth_dev_handle_port_link_status,
6489 "Returns the link status for a port. Parameters: int port_id");
6490 rte_telemetry_register_cmd("/ethdev/info", eth_dev_handle_port_info,
6491 "Returns the device info for a port. Parameters: int port_id");