1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
12 #include <sys/queue.h>
14 #include <rte_byteorder.h>
16 #include <rte_debug.h>
17 #include <rte_interrupts.h>
18 #include <rte_memory.h>
19 #include <rte_memcpy.h>
20 #include <rte_memzone.h>
21 #include <rte_launch.h>
23 #include <rte_per_lcore.h>
24 #include <rte_lcore.h>
25 #include <rte_branch_prediction.h>
26 #include <rte_common.h>
27 #include <rte_mempool.h>
28 #include <rte_malloc.h>
30 #include <rte_errno.h>
31 #include <rte_spinlock.h>
32 #include <rte_string_fns.h>
33 #include <rte_kvargs.h>
34 #include <rte_class.h>
35 #include <rte_ether.h>
36 #include <rte_telemetry.h>
38 #include "rte_ethdev_trace.h"
39 #include "rte_ethdev.h"
40 #include "ethdev_driver.h"
41 #include "ethdev_profile.h"
42 #include "ethdev_private.h"
44 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
45 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
47 /* spinlock for eth device callbacks */
48 static rte_spinlock_t eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
50 /* spinlock for add/remove rx callbacks */
51 static rte_spinlock_t eth_dev_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
53 /* spinlock for add/remove tx callbacks */
54 static rte_spinlock_t eth_dev_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
56 /* spinlock for shared data allocation */
57 static rte_spinlock_t eth_dev_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
59 /* store statistics names and its offset in stats structure */
60 struct rte_eth_xstats_name_off {
61 char name[RTE_ETH_XSTATS_NAME_SIZE];
65 /* Shared memory between primary and secondary processes. */
67 uint64_t next_owner_id;
68 rte_spinlock_t ownership_lock;
69 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
70 } *eth_dev_shared_data;
72 static const struct rte_eth_xstats_name_off eth_dev_stats_strings[] = {
73 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
74 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
75 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
76 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
77 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
78 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
79 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
80 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
84 #define RTE_NB_STATS RTE_DIM(eth_dev_stats_strings)
86 static const struct rte_eth_xstats_name_off eth_dev_rxq_stats_strings[] = {
87 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
88 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
89 {"errors", offsetof(struct rte_eth_stats, q_errors)},
92 #define RTE_NB_RXQ_STATS RTE_DIM(eth_dev_rxq_stats_strings)
94 static const struct rte_eth_xstats_name_off eth_dev_txq_stats_strings[] = {
95 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
96 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
98 #define RTE_NB_TXQ_STATS RTE_DIM(eth_dev_txq_stats_strings)
100 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
101 { DEV_RX_OFFLOAD_##_name, #_name }
103 #define RTE_ETH_RX_OFFLOAD_BIT2STR(_name) \
104 { RTE_ETH_RX_OFFLOAD_##_name, #_name }
106 static const struct {
109 } eth_dev_rx_offload_names[] = {
110 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
111 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
112 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
113 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
114 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
115 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
116 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
118 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
119 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
120 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
121 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
122 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
123 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
124 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
125 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
126 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
127 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
128 RTE_RX_OFFLOAD_BIT2STR(RSS_HASH),
129 RTE_ETH_RX_OFFLOAD_BIT2STR(BUFFER_SPLIT),
132 #undef RTE_RX_OFFLOAD_BIT2STR
133 #undef RTE_ETH_RX_OFFLOAD_BIT2STR
135 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
136 { DEV_TX_OFFLOAD_##_name, #_name }
138 static const struct {
141 } eth_dev_tx_offload_names[] = {
142 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
143 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
144 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
148 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
150 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
151 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
152 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
156 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
157 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
158 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
159 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
160 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
161 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
162 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
163 RTE_TX_OFFLOAD_BIT2STR(SEND_ON_TIMESTAMP),
166 #undef RTE_TX_OFFLOAD_BIT2STR
169 * The user application callback description.
171 * It contains callback address to be registered by user application,
172 * the pointer to the parameters for callback, and the event type.
174 struct rte_eth_dev_callback {
175 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
176 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
177 void *cb_arg; /**< Parameter for callback */
178 void *ret_param; /**< Return parameter */
179 enum rte_eth_event_type event; /**< Interrupt event type */
180 uint32_t active; /**< Callback is executing */
189 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
192 struct rte_devargs devargs;
193 const char *bus_param_key;
194 char *bus_str = NULL;
195 char *cls_str = NULL;
199 RTE_ETHDEV_LOG(ERR, "Cannot initialize NULL iterator\n");
203 if (devargs_str == NULL) {
205 "Cannot initialize iterator from NULL device description string\n");
209 memset(iter, 0, sizeof(*iter));
210 memset(&devargs, 0, sizeof(devargs));
213 * The devargs string may use various syntaxes:
214 * - 0000:08:00.0,representor=[1-3]
215 * - pci:0000:06:00.0,representor=[0,5]
216 * - class=eth,mac=00:11:22:33:44:55
217 * A new syntax is in development (not yet supported):
218 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
222 * Handle pure class filter (i.e. without any bus-level argument),
223 * from future new syntax.
224 * rte_devargs_parse() is not yet supporting the new syntax,
225 * that's why this simple case is temporarily parsed here.
227 #define iter_anybus_str "class=eth,"
228 if (strncmp(devargs_str, iter_anybus_str,
229 strlen(iter_anybus_str)) == 0) {
230 iter->cls_str = devargs_str + strlen(iter_anybus_str);
234 /* Split bus, device and parameters. */
235 ret = rte_devargs_parse(&devargs, devargs_str);
240 * Assume parameters of old syntax can match only at ethdev level.
241 * Extra parameters will be ignored, thanks to "+" prefix.
243 str_size = strlen(devargs.args) + 2;
244 cls_str = malloc(str_size);
245 if (cls_str == NULL) {
249 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
250 if (ret != str_size - 1) {
254 iter->cls_str = cls_str;
256 iter->bus = devargs.bus;
257 if (iter->bus->dev_iterate == NULL) {
262 /* Convert bus args to new syntax for use with new API dev_iterate. */
263 if ((strcmp(iter->bus->name, "vdev") == 0) ||
264 (strcmp(iter->bus->name, "fslmc") == 0) ||
265 (strcmp(iter->bus->name, "dpaa_bus") == 0)) {
266 bus_param_key = "name";
267 } else if (strcmp(iter->bus->name, "pci") == 0) {
268 bus_param_key = "addr";
273 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
274 bus_str = malloc(str_size);
275 if (bus_str == NULL) {
279 ret = snprintf(bus_str, str_size, "%s=%s",
280 bus_param_key, devargs.name);
281 if (ret != str_size - 1) {
285 iter->bus_str = bus_str;
288 iter->cls = rte_class_find_by_name("eth");
289 rte_devargs_reset(&devargs);
294 RTE_ETHDEV_LOG(ERR, "Bus %s does not support iterating.\n",
296 rte_devargs_reset(&devargs);
303 rte_eth_iterator_next(struct rte_dev_iterator *iter)
307 "Cannot get next device from NULL iterator\n");
308 return RTE_MAX_ETHPORTS;
311 if (iter->cls == NULL) /* invalid ethdev iterator */
312 return RTE_MAX_ETHPORTS;
314 do { /* loop to try all matching rte_device */
315 /* If not pure ethdev filter and */
316 if (iter->bus != NULL &&
317 /* not in middle of rte_eth_dev iteration, */
318 iter->class_device == NULL) {
319 /* get next rte_device to try. */
320 iter->device = iter->bus->dev_iterate(
321 iter->device, iter->bus_str, iter);
322 if (iter->device == NULL)
323 break; /* no more rte_device candidate */
325 /* A device is matching bus part, need to check ethdev part. */
326 iter->class_device = iter->cls->dev_iterate(
327 iter->class_device, iter->cls_str, iter);
328 if (iter->class_device != NULL)
329 return eth_dev_to_id(iter->class_device); /* match */
330 } while (iter->bus != NULL); /* need to try next rte_device */
332 /* No more ethdev port to iterate. */
333 rte_eth_iterator_cleanup(iter);
334 return RTE_MAX_ETHPORTS;
338 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
341 RTE_ETHDEV_LOG(ERR, "Cannot do clean up from NULL iterator\n");
345 if (iter->bus_str == NULL)
346 return; /* nothing to free in pure class filter */
347 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
348 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
349 memset(iter, 0, sizeof(*iter));
353 rte_eth_find_next(uint16_t port_id)
355 while (port_id < RTE_MAX_ETHPORTS &&
356 rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED)
359 if (port_id >= RTE_MAX_ETHPORTS)
360 return RTE_MAX_ETHPORTS;
366 * Macro to iterate over all valid ports for internal usage.
367 * Note: RTE_ETH_FOREACH_DEV is different because filtering owned ports.
369 #define RTE_ETH_FOREACH_VALID_DEV(port_id) \
370 for (port_id = rte_eth_find_next(0); \
371 port_id < RTE_MAX_ETHPORTS; \
372 port_id = rte_eth_find_next(port_id + 1))
375 rte_eth_find_next_of(uint16_t port_id, const struct rte_device *parent)
377 port_id = rte_eth_find_next(port_id);
378 while (port_id < RTE_MAX_ETHPORTS &&
379 rte_eth_devices[port_id].device != parent)
380 port_id = rte_eth_find_next(port_id + 1);
386 rte_eth_find_next_sibling(uint16_t port_id, uint16_t ref_port_id)
388 RTE_ETH_VALID_PORTID_OR_ERR_RET(ref_port_id, RTE_MAX_ETHPORTS);
389 return rte_eth_find_next_of(port_id,
390 rte_eth_devices[ref_port_id].device);
394 eth_dev_shared_data_prepare(void)
396 const unsigned flags = 0;
397 const struct rte_memzone *mz;
399 rte_spinlock_lock(ð_dev_shared_data_lock);
401 if (eth_dev_shared_data == NULL) {
402 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
403 /* Allocate port data and ownership shared memory. */
404 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
405 sizeof(*eth_dev_shared_data),
406 rte_socket_id(), flags);
408 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
410 rte_panic("Cannot allocate ethdev shared data\n");
412 eth_dev_shared_data = mz->addr;
413 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
414 eth_dev_shared_data->next_owner_id =
415 RTE_ETH_DEV_NO_OWNER + 1;
416 rte_spinlock_init(ð_dev_shared_data->ownership_lock);
417 memset(eth_dev_shared_data->data, 0,
418 sizeof(eth_dev_shared_data->data));
422 rte_spinlock_unlock(ð_dev_shared_data_lock);
426 eth_dev_is_allocated(const struct rte_eth_dev *ethdev)
428 return ethdev->data->name[0] != '\0';
431 static struct rte_eth_dev *
432 eth_dev_allocated(const char *name)
436 RTE_BUILD_BUG_ON(RTE_MAX_ETHPORTS >= UINT16_MAX);
438 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
439 if (rte_eth_devices[i].data != NULL &&
440 strcmp(rte_eth_devices[i].data->name, name) == 0)
441 return &rte_eth_devices[i];
447 rte_eth_dev_allocated(const char *name)
449 struct rte_eth_dev *ethdev;
451 eth_dev_shared_data_prepare();
453 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
455 ethdev = eth_dev_allocated(name);
457 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
463 eth_dev_find_free_port(void)
467 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
468 /* Using shared name field to find a free port. */
469 if (eth_dev_shared_data->data[i].name[0] == '\0') {
470 RTE_ASSERT(rte_eth_devices[i].state ==
475 return RTE_MAX_ETHPORTS;
478 static struct rte_eth_dev *
479 eth_dev_get(uint16_t port_id)
481 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
483 eth_dev->data = ð_dev_shared_data->data[port_id];
489 rte_eth_dev_allocate(const char *name)
492 struct rte_eth_dev *eth_dev = NULL;
495 name_len = strnlen(name, RTE_ETH_NAME_MAX_LEN);
497 RTE_ETHDEV_LOG(ERR, "Zero length Ethernet device name\n");
501 if (name_len >= RTE_ETH_NAME_MAX_LEN) {
502 RTE_ETHDEV_LOG(ERR, "Ethernet device name is too long\n");
506 eth_dev_shared_data_prepare();
508 /* Synchronize port creation between primary and secondary threads. */
509 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
511 if (eth_dev_allocated(name) != NULL) {
513 "Ethernet device with name %s already allocated\n",
518 port_id = eth_dev_find_free_port();
519 if (port_id == RTE_MAX_ETHPORTS) {
521 "Reached maximum number of Ethernet ports\n");
525 eth_dev = eth_dev_get(port_id);
526 strlcpy(eth_dev->data->name, name, sizeof(eth_dev->data->name));
527 eth_dev->data->port_id = port_id;
528 eth_dev->data->mtu = RTE_ETHER_MTU;
529 pthread_mutex_init(ð_dev->data->flow_ops_mutex, NULL);
532 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
538 * Attach to a port already registered by the primary process, which
539 * makes sure that the same device would have the same port id both
540 * in the primary and secondary process.
543 rte_eth_dev_attach_secondary(const char *name)
546 struct rte_eth_dev *eth_dev = NULL;
548 eth_dev_shared_data_prepare();
550 /* Synchronize port attachment to primary port creation and release. */
551 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
553 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
554 if (strcmp(eth_dev_shared_data->data[i].name, name) == 0)
557 if (i == RTE_MAX_ETHPORTS) {
559 "Device %s is not driven by the primary process\n",
562 eth_dev = eth_dev_get(i);
563 RTE_ASSERT(eth_dev->data->port_id == i);
566 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
571 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
576 eth_dev_shared_data_prepare();
578 if (eth_dev->state != RTE_ETH_DEV_UNUSED)
579 rte_eth_dev_callback_process(eth_dev,
580 RTE_ETH_EVENT_DESTROY, NULL);
582 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
584 eth_dev->state = RTE_ETH_DEV_UNUSED;
585 eth_dev->device = NULL;
586 eth_dev->process_private = NULL;
587 eth_dev->intr_handle = NULL;
588 eth_dev->rx_pkt_burst = NULL;
589 eth_dev->tx_pkt_burst = NULL;
590 eth_dev->tx_pkt_prepare = NULL;
591 eth_dev->rx_queue_count = NULL;
592 eth_dev->rx_descriptor_done = NULL;
593 eth_dev->rx_descriptor_status = NULL;
594 eth_dev->tx_descriptor_status = NULL;
595 eth_dev->dev_ops = NULL;
597 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
598 rte_free(eth_dev->data->rx_queues);
599 rte_free(eth_dev->data->tx_queues);
600 rte_free(eth_dev->data->mac_addrs);
601 rte_free(eth_dev->data->hash_mac_addrs);
602 rte_free(eth_dev->data->dev_private);
603 pthread_mutex_destroy(ð_dev->data->flow_ops_mutex);
604 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
607 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
613 rte_eth_dev_is_valid_port(uint16_t port_id)
615 if (port_id >= RTE_MAX_ETHPORTS ||
616 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
623 eth_is_valid_owner_id(uint64_t owner_id)
625 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
626 eth_dev_shared_data->next_owner_id <= owner_id)
632 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
634 port_id = rte_eth_find_next(port_id);
635 while (port_id < RTE_MAX_ETHPORTS &&
636 rte_eth_devices[port_id].data->owner.id != owner_id)
637 port_id = rte_eth_find_next(port_id + 1);
643 rte_eth_dev_owner_new(uint64_t *owner_id)
645 if (owner_id == NULL) {
646 RTE_ETHDEV_LOG(ERR, "Cannot get new owner ID to NULL\n");
650 eth_dev_shared_data_prepare();
652 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
654 *owner_id = eth_dev_shared_data->next_owner_id++;
656 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
661 eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
662 const struct rte_eth_dev_owner *new_owner)
664 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
665 struct rte_eth_dev_owner *port_owner;
667 if (port_id >= RTE_MAX_ETHPORTS || !eth_dev_is_allocated(ethdev)) {
668 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
673 if (new_owner == NULL) {
675 "Cannot set ethdev port %u owner from NULL owner\n",
680 if (!eth_is_valid_owner_id(new_owner->id) &&
681 !eth_is_valid_owner_id(old_owner_id)) {
683 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
684 old_owner_id, new_owner->id);
688 port_owner = &rte_eth_devices[port_id].data->owner;
689 if (port_owner->id != old_owner_id) {
691 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
692 port_id, port_owner->name, port_owner->id);
696 /* can not truncate (same structure) */
697 strlcpy(port_owner->name, new_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN);
699 port_owner->id = new_owner->id;
701 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
702 port_id, new_owner->name, new_owner->id);
708 rte_eth_dev_owner_set(const uint16_t port_id,
709 const struct rte_eth_dev_owner *owner)
713 eth_dev_shared_data_prepare();
715 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
717 ret = eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
719 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
724 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
726 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
727 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
730 eth_dev_shared_data_prepare();
732 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
734 ret = eth_dev_owner_set(port_id, owner_id, &new_owner);
736 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
741 rte_eth_dev_owner_delete(const uint64_t owner_id)
746 eth_dev_shared_data_prepare();
748 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
750 if (eth_is_valid_owner_id(owner_id)) {
751 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
752 if (rte_eth_devices[port_id].data->owner.id == owner_id)
753 memset(&rte_eth_devices[port_id].data->owner, 0,
754 sizeof(struct rte_eth_dev_owner));
755 RTE_ETHDEV_LOG(NOTICE,
756 "All port owners owned by %016"PRIx64" identifier have removed\n",
760 "Invalid owner id=%016"PRIx64"\n",
765 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
771 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
773 struct rte_eth_dev *ethdev;
775 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
776 ethdev = &rte_eth_devices[port_id];
778 if (!eth_dev_is_allocated(ethdev)) {
779 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
785 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u owner to NULL\n",
790 eth_dev_shared_data_prepare();
792 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
793 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
794 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
800 rte_eth_dev_socket_id(uint16_t port_id)
802 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
803 return rte_eth_devices[port_id].data->numa_node;
807 rte_eth_dev_get_sec_ctx(uint16_t port_id)
809 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
810 return rte_eth_devices[port_id].security_ctx;
814 rte_eth_dev_count_avail(void)
821 RTE_ETH_FOREACH_DEV(p)
828 rte_eth_dev_count_total(void)
830 uint16_t port, count = 0;
832 RTE_ETH_FOREACH_VALID_DEV(port)
839 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
843 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
846 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u name to NULL\n",
851 /* shouldn't check 'rte_eth_devices[i].data',
852 * because it might be overwritten by VDEV PMD */
853 tmp = eth_dev_shared_data->data[port_id].name;
859 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
864 RTE_ETHDEV_LOG(ERR, "Cannot get port ID from NULL name");
868 if (port_id == NULL) {
870 "Cannot get port ID to NULL for %s\n", name);
874 RTE_ETH_FOREACH_VALID_DEV(pid)
875 if (!strcmp(name, eth_dev_shared_data->data[pid].name)) {
884 eth_err(uint16_t port_id, int ret)
888 if (rte_eth_dev_is_removed(port_id))
894 eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
896 uint16_t old_nb_queues = dev->data->nb_rx_queues;
900 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
901 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
902 sizeof(dev->data->rx_queues[0]) * nb_queues,
903 RTE_CACHE_LINE_SIZE);
904 if (dev->data->rx_queues == NULL) {
905 dev->data->nb_rx_queues = 0;
908 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
909 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
911 rxq = dev->data->rx_queues;
913 for (i = nb_queues; i < old_nb_queues; i++)
914 (*dev->dev_ops->rx_queue_release)(rxq[i]);
915 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
916 RTE_CACHE_LINE_SIZE);
919 if (nb_queues > old_nb_queues) {
920 uint16_t new_qs = nb_queues - old_nb_queues;
922 memset(rxq + old_nb_queues, 0,
923 sizeof(rxq[0]) * new_qs);
926 dev->data->rx_queues = rxq;
928 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
929 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
931 rxq = dev->data->rx_queues;
933 for (i = nb_queues; i < old_nb_queues; i++)
934 (*dev->dev_ops->rx_queue_release)(rxq[i]);
936 rte_free(dev->data->rx_queues);
937 dev->data->rx_queues = NULL;
939 dev->data->nb_rx_queues = nb_queues;
944 eth_dev_validate_rx_queue(const struct rte_eth_dev *dev, uint16_t rx_queue_id)
948 if (rx_queue_id >= dev->data->nb_rx_queues) {
949 port_id = dev->data->port_id;
951 "Invalid Rx queue_id=%u of device with port_id=%u\n",
952 rx_queue_id, port_id);
956 if (dev->data->rx_queues[rx_queue_id] == NULL) {
957 port_id = dev->data->port_id;
959 "Queue %u of device with port_id=%u has not been setup\n",
960 rx_queue_id, port_id);
968 eth_dev_validate_tx_queue(const struct rte_eth_dev *dev, uint16_t tx_queue_id)
972 if (tx_queue_id >= dev->data->nb_tx_queues) {
973 port_id = dev->data->port_id;
975 "Invalid Tx queue_id=%u of device with port_id=%u\n",
976 tx_queue_id, port_id);
980 if (dev->data->tx_queues[tx_queue_id] == NULL) {
981 port_id = dev->data->port_id;
983 "Queue %u of device with port_id=%u has not been setup\n",
984 tx_queue_id, port_id);
992 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
994 struct rte_eth_dev *dev;
997 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
998 dev = &rte_eth_devices[port_id];
1000 if (!dev->data->dev_started) {
1002 "Port %u must be started before start any queue\n",
1007 ret = eth_dev_validate_rx_queue(dev, rx_queue_id);
1011 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
1013 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
1014 RTE_ETHDEV_LOG(INFO,
1015 "Can't start Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1016 rx_queue_id, port_id);
1020 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
1021 RTE_ETHDEV_LOG(INFO,
1022 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
1023 rx_queue_id, port_id);
1027 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev, rx_queue_id));
1031 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
1033 struct rte_eth_dev *dev;
1036 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1037 dev = &rte_eth_devices[port_id];
1039 ret = eth_dev_validate_rx_queue(dev, rx_queue_id);
1043 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
1045 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
1046 RTE_ETHDEV_LOG(INFO,
1047 "Can't stop Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1048 rx_queue_id, port_id);
1052 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
1053 RTE_ETHDEV_LOG(INFO,
1054 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
1055 rx_queue_id, port_id);
1059 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
1063 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
1065 struct rte_eth_dev *dev;
1068 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1069 dev = &rte_eth_devices[port_id];
1071 if (!dev->data->dev_started) {
1073 "Port %u must be started before start any queue\n",
1078 ret = eth_dev_validate_tx_queue(dev, tx_queue_id);
1082 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
1084 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
1085 RTE_ETHDEV_LOG(INFO,
1086 "Can't start Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1087 tx_queue_id, port_id);
1091 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
1092 RTE_ETHDEV_LOG(INFO,
1093 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
1094 tx_queue_id, port_id);
1098 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
1102 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
1104 struct rte_eth_dev *dev;
1107 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1108 dev = &rte_eth_devices[port_id];
1110 ret = eth_dev_validate_tx_queue(dev, tx_queue_id);
1114 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
1116 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
1117 RTE_ETHDEV_LOG(INFO,
1118 "Can't stop Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1119 tx_queue_id, port_id);
1123 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
1124 RTE_ETHDEV_LOG(INFO,
1125 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
1126 tx_queue_id, port_id);
1130 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
1134 eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
1136 uint16_t old_nb_queues = dev->data->nb_tx_queues;
1140 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
1141 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
1142 sizeof(dev->data->tx_queues[0]) * nb_queues,
1143 RTE_CACHE_LINE_SIZE);
1144 if (dev->data->tx_queues == NULL) {
1145 dev->data->nb_tx_queues = 0;
1148 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
1149 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1151 txq = dev->data->tx_queues;
1153 for (i = nb_queues; i < old_nb_queues; i++)
1154 (*dev->dev_ops->tx_queue_release)(txq[i]);
1155 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
1156 RTE_CACHE_LINE_SIZE);
1159 if (nb_queues > old_nb_queues) {
1160 uint16_t new_qs = nb_queues - old_nb_queues;
1162 memset(txq + old_nb_queues, 0,
1163 sizeof(txq[0]) * new_qs);
1166 dev->data->tx_queues = txq;
1168 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1169 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1171 txq = dev->data->tx_queues;
1173 for (i = nb_queues; i < old_nb_queues; i++)
1174 (*dev->dev_ops->tx_queue_release)(txq[i]);
1176 rte_free(dev->data->tx_queues);
1177 dev->data->tx_queues = NULL;
1179 dev->data->nb_tx_queues = nb_queues;
1184 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1187 case ETH_SPEED_NUM_10M:
1188 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1189 case ETH_SPEED_NUM_100M:
1190 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1191 case ETH_SPEED_NUM_1G:
1192 return ETH_LINK_SPEED_1G;
1193 case ETH_SPEED_NUM_2_5G:
1194 return ETH_LINK_SPEED_2_5G;
1195 case ETH_SPEED_NUM_5G:
1196 return ETH_LINK_SPEED_5G;
1197 case ETH_SPEED_NUM_10G:
1198 return ETH_LINK_SPEED_10G;
1199 case ETH_SPEED_NUM_20G:
1200 return ETH_LINK_SPEED_20G;
1201 case ETH_SPEED_NUM_25G:
1202 return ETH_LINK_SPEED_25G;
1203 case ETH_SPEED_NUM_40G:
1204 return ETH_LINK_SPEED_40G;
1205 case ETH_SPEED_NUM_50G:
1206 return ETH_LINK_SPEED_50G;
1207 case ETH_SPEED_NUM_56G:
1208 return ETH_LINK_SPEED_56G;
1209 case ETH_SPEED_NUM_100G:
1210 return ETH_LINK_SPEED_100G;
1211 case ETH_SPEED_NUM_200G:
1212 return ETH_LINK_SPEED_200G;
1219 rte_eth_dev_rx_offload_name(uint64_t offload)
1221 const char *name = "UNKNOWN";
1224 for (i = 0; i < RTE_DIM(eth_dev_rx_offload_names); ++i) {
1225 if (offload == eth_dev_rx_offload_names[i].offload) {
1226 name = eth_dev_rx_offload_names[i].name;
1235 rte_eth_dev_tx_offload_name(uint64_t offload)
1237 const char *name = "UNKNOWN";
1240 for (i = 0; i < RTE_DIM(eth_dev_tx_offload_names); ++i) {
1241 if (offload == eth_dev_tx_offload_names[i].offload) {
1242 name = eth_dev_tx_offload_names[i].name;
1251 eth_dev_check_lro_pkt_size(uint16_t port_id, uint32_t config_size,
1252 uint32_t max_rx_pkt_len, uint32_t dev_info_size)
1256 if (dev_info_size == 0) {
1257 if (config_size != max_rx_pkt_len) {
1258 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size"
1259 " %u != %u is not allowed\n",
1260 port_id, config_size, max_rx_pkt_len);
1263 } else if (config_size > dev_info_size) {
1264 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1265 "> max allowed value %u\n", port_id, config_size,
1268 } else if (config_size < RTE_ETHER_MIN_LEN) {
1269 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1270 "< min allowed value %u\n", port_id, config_size,
1271 (unsigned int)RTE_ETHER_MIN_LEN);
1278 * Validate offloads that are requested through rte_eth_dev_configure against
1279 * the offloads successfully set by the ethernet device.
1282 * The port identifier of the Ethernet device.
1283 * @param req_offloads
1284 * The offloads that have been requested through `rte_eth_dev_configure`.
1285 * @param set_offloads
1286 * The offloads successfully set by the ethernet device.
1287 * @param offload_type
1288 * The offload type i.e. Rx/Tx string.
1289 * @param offload_name
1290 * The function that prints the offload name.
1292 * - (0) if validation successful.
1293 * - (-EINVAL) if requested offload has been silently disabled.
1297 eth_dev_validate_offloads(uint16_t port_id, uint64_t req_offloads,
1298 uint64_t set_offloads, const char *offload_type,
1299 const char *(*offload_name)(uint64_t))
1301 uint64_t offloads_diff = req_offloads ^ set_offloads;
1305 while (offloads_diff != 0) {
1306 /* Check if any offload is requested but not enabled. */
1307 offload = 1ULL << __builtin_ctzll(offloads_diff);
1308 if (offload & req_offloads) {
1310 "Port %u failed to enable %s offload %s\n",
1311 port_id, offload_type, offload_name(offload));
1315 /* Check if offload couldn't be disabled. */
1316 if (offload & set_offloads) {
1317 RTE_ETHDEV_LOG(DEBUG,
1318 "Port %u %s offload %s is not requested but enabled\n",
1319 port_id, offload_type, offload_name(offload));
1322 offloads_diff &= ~offload;
1329 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1330 const struct rte_eth_conf *dev_conf)
1332 struct rte_eth_dev *dev;
1333 struct rte_eth_dev_info dev_info;
1334 struct rte_eth_conf orig_conf;
1335 uint16_t overhead_len;
1340 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1341 dev = &rte_eth_devices[port_id];
1343 if (dev_conf == NULL) {
1345 "Cannot configure ethdev port %u from NULL config\n",
1350 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1352 if (dev->data->dev_started) {
1354 "Port %u must be stopped to allow configuration\n",
1359 /* Store original config, as rollback required on failure */
1360 memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1363 * Copy the dev_conf parameter into the dev structure.
1364 * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1366 if (dev_conf != &dev->data->dev_conf)
1367 memcpy(&dev->data->dev_conf, dev_conf,
1368 sizeof(dev->data->dev_conf));
1370 /* Backup mtu for rollback */
1371 old_mtu = dev->data->mtu;
1373 ret = rte_eth_dev_info_get(port_id, &dev_info);
1377 /* Get the real Ethernet overhead length */
1378 if (dev_info.max_mtu != UINT16_MAX &&
1379 dev_info.max_rx_pktlen > dev_info.max_mtu)
1380 overhead_len = dev_info.max_rx_pktlen - dev_info.max_mtu;
1382 overhead_len = RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN;
1384 /* If number of queues specified by application for both Rx and Tx is
1385 * zero, use driver preferred values. This cannot be done individually
1386 * as it is valid for either Tx or Rx (but not both) to be zero.
1387 * If driver does not provide any preferred valued, fall back on
1390 if (nb_rx_q == 0 && nb_tx_q == 0) {
1391 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1393 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1394 nb_tx_q = dev_info.default_txportconf.nb_queues;
1396 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1399 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1401 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1402 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1407 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1409 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1410 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1416 * Check that the numbers of RX and TX queues are not greater
1417 * than the maximum number of RX and TX queues supported by the
1418 * configured device.
1420 if (nb_rx_q > dev_info.max_rx_queues) {
1421 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1422 port_id, nb_rx_q, dev_info.max_rx_queues);
1427 if (nb_tx_q > dev_info.max_tx_queues) {
1428 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1429 port_id, nb_tx_q, dev_info.max_tx_queues);
1434 /* Check that the device supports requested interrupts */
1435 if ((dev_conf->intr_conf.lsc == 1) &&
1436 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1437 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1438 dev->device->driver->name);
1442 if ((dev_conf->intr_conf.rmv == 1) &&
1443 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1444 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1445 dev->device->driver->name);
1451 * If jumbo frames are enabled, check that the maximum RX packet
1452 * length is supported by the configured device.
1454 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1455 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1457 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1458 port_id, dev_conf->rxmode.max_rx_pkt_len,
1459 dev_info.max_rx_pktlen);
1462 } else if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN) {
1464 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1465 port_id, dev_conf->rxmode.max_rx_pkt_len,
1466 (unsigned int)RTE_ETHER_MIN_LEN);
1471 /* Scale the MTU size to adapt max_rx_pkt_len */
1472 dev->data->mtu = dev->data->dev_conf.rxmode.max_rx_pkt_len -
1475 uint16_t pktlen = dev_conf->rxmode.max_rx_pkt_len;
1476 if (pktlen < RTE_ETHER_MIN_MTU + overhead_len ||
1477 pktlen > RTE_ETHER_MTU + overhead_len)
1478 /* Use default value */
1479 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1480 RTE_ETHER_MTU + overhead_len;
1484 * If LRO is enabled, check that the maximum aggregated packet
1485 * size is supported by the configured device.
1487 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
1488 if (dev_conf->rxmode.max_lro_pkt_size == 0)
1489 dev->data->dev_conf.rxmode.max_lro_pkt_size =
1490 dev->data->dev_conf.rxmode.max_rx_pkt_len;
1491 ret = eth_dev_check_lro_pkt_size(port_id,
1492 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1493 dev->data->dev_conf.rxmode.max_rx_pkt_len,
1494 dev_info.max_lro_pkt_size);
1499 /* Any requested offloading must be within its device capabilities */
1500 if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1501 dev_conf->rxmode.offloads) {
1503 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1504 "capabilities 0x%"PRIx64" in %s()\n",
1505 port_id, dev_conf->rxmode.offloads,
1506 dev_info.rx_offload_capa,
1511 if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1512 dev_conf->txmode.offloads) {
1514 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1515 "capabilities 0x%"PRIx64" in %s()\n",
1516 port_id, dev_conf->txmode.offloads,
1517 dev_info.tx_offload_capa,
1523 dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf =
1524 rte_eth_rss_hf_refine(dev_conf->rx_adv_conf.rss_conf.rss_hf);
1526 /* Check that device supports requested rss hash functions. */
1527 if ((dev_info.flow_type_rss_offloads |
1528 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1529 dev_info.flow_type_rss_offloads) {
1531 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1532 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1533 dev_info.flow_type_rss_offloads);
1538 /* Check if Rx RSS distribution is disabled but RSS hash is enabled. */
1539 if (((dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) == 0) &&
1540 (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_RSS_HASH)) {
1542 "Ethdev port_id=%u config invalid Rx mq_mode without RSS but %s offload is requested\n",
1544 rte_eth_dev_rx_offload_name(DEV_RX_OFFLOAD_RSS_HASH));
1550 * Setup new number of RX/TX queues and reconfigure device.
1552 diag = eth_dev_rx_queue_config(dev, nb_rx_q);
1555 "Port%u eth_dev_rx_queue_config = %d\n",
1561 diag = eth_dev_tx_queue_config(dev, nb_tx_q);
1564 "Port%u eth_dev_tx_queue_config = %d\n",
1566 eth_dev_rx_queue_config(dev, 0);
1571 diag = (*dev->dev_ops->dev_configure)(dev);
1573 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1575 ret = eth_err(port_id, diag);
1579 /* Initialize Rx profiling if enabled at compilation time. */
1580 diag = __rte_eth_dev_profile_init(port_id, dev);
1582 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1584 ret = eth_err(port_id, diag);
1588 /* Validate Rx offloads. */
1589 diag = eth_dev_validate_offloads(port_id,
1590 dev_conf->rxmode.offloads,
1591 dev->data->dev_conf.rxmode.offloads, "Rx",
1592 rte_eth_dev_rx_offload_name);
1598 /* Validate Tx offloads. */
1599 diag = eth_dev_validate_offloads(port_id,
1600 dev_conf->txmode.offloads,
1601 dev->data->dev_conf.txmode.offloads, "Tx",
1602 rte_eth_dev_tx_offload_name);
1608 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, 0);
1611 eth_dev_rx_queue_config(dev, 0);
1612 eth_dev_tx_queue_config(dev, 0);
1614 memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1615 if (old_mtu != dev->data->mtu)
1616 dev->data->mtu = old_mtu;
1618 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, ret);
1623 rte_eth_dev_internal_reset(struct rte_eth_dev *dev)
1625 if (dev->data->dev_started) {
1626 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1627 dev->data->port_id);
1631 eth_dev_rx_queue_config(dev, 0);
1632 eth_dev_tx_queue_config(dev, 0);
1634 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1638 eth_dev_mac_restore(struct rte_eth_dev *dev,
1639 struct rte_eth_dev_info *dev_info)
1641 struct rte_ether_addr *addr;
1646 /* replay MAC address configuration including default MAC */
1647 addr = &dev->data->mac_addrs[0];
1648 if (*dev->dev_ops->mac_addr_set != NULL)
1649 (*dev->dev_ops->mac_addr_set)(dev, addr);
1650 else if (*dev->dev_ops->mac_addr_add != NULL)
1651 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1653 if (*dev->dev_ops->mac_addr_add != NULL) {
1654 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1655 addr = &dev->data->mac_addrs[i];
1657 /* skip zero address */
1658 if (rte_is_zero_ether_addr(addr))
1662 pool_mask = dev->data->mac_pool_sel[i];
1665 if (pool_mask & 1ULL)
1666 (*dev->dev_ops->mac_addr_add)(dev,
1670 } while (pool_mask);
1676 eth_dev_config_restore(struct rte_eth_dev *dev,
1677 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1681 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1682 eth_dev_mac_restore(dev, dev_info);
1684 /* replay promiscuous configuration */
1686 * use callbacks directly since we don't need port_id check and
1687 * would like to bypass the same value set
1689 if (rte_eth_promiscuous_get(port_id) == 1 &&
1690 *dev->dev_ops->promiscuous_enable != NULL) {
1691 ret = eth_err(port_id,
1692 (*dev->dev_ops->promiscuous_enable)(dev));
1693 if (ret != 0 && ret != -ENOTSUP) {
1695 "Failed to enable promiscuous mode for device (port %u): %s\n",
1696 port_id, rte_strerror(-ret));
1699 } else if (rte_eth_promiscuous_get(port_id) == 0 &&
1700 *dev->dev_ops->promiscuous_disable != NULL) {
1701 ret = eth_err(port_id,
1702 (*dev->dev_ops->promiscuous_disable)(dev));
1703 if (ret != 0 && ret != -ENOTSUP) {
1705 "Failed to disable promiscuous mode for device (port %u): %s\n",
1706 port_id, rte_strerror(-ret));
1711 /* replay all multicast configuration */
1713 * use callbacks directly since we don't need port_id check and
1714 * would like to bypass the same value set
1716 if (rte_eth_allmulticast_get(port_id) == 1 &&
1717 *dev->dev_ops->allmulticast_enable != NULL) {
1718 ret = eth_err(port_id,
1719 (*dev->dev_ops->allmulticast_enable)(dev));
1720 if (ret != 0 && ret != -ENOTSUP) {
1722 "Failed to enable allmulticast mode for device (port %u): %s\n",
1723 port_id, rte_strerror(-ret));
1726 } else if (rte_eth_allmulticast_get(port_id) == 0 &&
1727 *dev->dev_ops->allmulticast_disable != NULL) {
1728 ret = eth_err(port_id,
1729 (*dev->dev_ops->allmulticast_disable)(dev));
1730 if (ret != 0 && ret != -ENOTSUP) {
1732 "Failed to disable allmulticast mode for device (port %u): %s\n",
1733 port_id, rte_strerror(-ret));
1742 rte_eth_dev_start(uint16_t port_id)
1744 struct rte_eth_dev *dev;
1745 struct rte_eth_dev_info dev_info;
1749 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1750 dev = &rte_eth_devices[port_id];
1752 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1754 if (dev->data->dev_started != 0) {
1755 RTE_ETHDEV_LOG(INFO,
1756 "Device with port_id=%"PRIu16" already started\n",
1761 ret = rte_eth_dev_info_get(port_id, &dev_info);
1765 /* Lets restore MAC now if device does not support live change */
1766 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1767 eth_dev_mac_restore(dev, &dev_info);
1769 diag = (*dev->dev_ops->dev_start)(dev);
1771 dev->data->dev_started = 1;
1773 return eth_err(port_id, diag);
1775 ret = eth_dev_config_restore(dev, &dev_info, port_id);
1778 "Error during restoring configuration for device (port %u): %s\n",
1779 port_id, rte_strerror(-ret));
1780 ret_stop = rte_eth_dev_stop(port_id);
1781 if (ret_stop != 0) {
1783 "Failed to stop device (port %u): %s\n",
1784 port_id, rte_strerror(-ret_stop));
1790 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1791 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1792 (*dev->dev_ops->link_update)(dev, 0);
1795 rte_ethdev_trace_start(port_id);
1800 rte_eth_dev_stop(uint16_t port_id)
1802 struct rte_eth_dev *dev;
1805 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1806 dev = &rte_eth_devices[port_id];
1808 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_stop, -ENOTSUP);
1810 if (dev->data->dev_started == 0) {
1811 RTE_ETHDEV_LOG(INFO,
1812 "Device with port_id=%"PRIu16" already stopped\n",
1817 dev->data->dev_started = 0;
1818 ret = (*dev->dev_ops->dev_stop)(dev);
1819 rte_ethdev_trace_stop(port_id, ret);
1825 rte_eth_dev_set_link_up(uint16_t port_id)
1827 struct rte_eth_dev *dev;
1829 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1830 dev = &rte_eth_devices[port_id];
1832 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1833 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1837 rte_eth_dev_set_link_down(uint16_t port_id)
1839 struct rte_eth_dev *dev;
1841 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1842 dev = &rte_eth_devices[port_id];
1844 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1845 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1849 rte_eth_dev_close(uint16_t port_id)
1851 struct rte_eth_dev *dev;
1852 int firsterr, binerr;
1853 int *lasterr = &firsterr;
1855 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1856 dev = &rte_eth_devices[port_id];
1858 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_close, -ENOTSUP);
1859 *lasterr = (*dev->dev_ops->dev_close)(dev);
1863 rte_ethdev_trace_close(port_id);
1864 *lasterr = rte_eth_dev_release_port(dev);
1870 rte_eth_dev_reset(uint16_t port_id)
1872 struct rte_eth_dev *dev;
1875 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1876 dev = &rte_eth_devices[port_id];
1878 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1880 ret = rte_eth_dev_stop(port_id);
1883 "Failed to stop device (port %u) before reset: %s - ignore\n",
1884 port_id, rte_strerror(-ret));
1886 ret = dev->dev_ops->dev_reset(dev);
1888 return eth_err(port_id, ret);
1892 rte_eth_dev_is_removed(uint16_t port_id)
1894 struct rte_eth_dev *dev;
1897 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1898 dev = &rte_eth_devices[port_id];
1900 if (dev->state == RTE_ETH_DEV_REMOVED)
1903 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1905 ret = dev->dev_ops->is_removed(dev);
1907 /* Device is physically removed. */
1908 dev->state = RTE_ETH_DEV_REMOVED;
1914 rte_eth_rx_queue_check_split(const struct rte_eth_rxseg_split *rx_seg,
1915 uint16_t n_seg, uint32_t *mbp_buf_size,
1916 const struct rte_eth_dev_info *dev_info)
1918 const struct rte_eth_rxseg_capa *seg_capa = &dev_info->rx_seg_capa;
1919 struct rte_mempool *mp_first;
1920 uint32_t offset_mask;
1923 if (n_seg > seg_capa->max_nseg) {
1925 "Requested Rx segments %u exceed supported %u\n",
1926 n_seg, seg_capa->max_nseg);
1930 * Check the sizes and offsets against buffer sizes
1931 * for each segment specified in extended configuration.
1933 mp_first = rx_seg[0].mp;
1934 offset_mask = (1u << seg_capa->offset_align_log2) - 1;
1935 for (seg_idx = 0; seg_idx < n_seg; seg_idx++) {
1936 struct rte_mempool *mpl = rx_seg[seg_idx].mp;
1937 uint32_t length = rx_seg[seg_idx].length;
1938 uint32_t offset = rx_seg[seg_idx].offset;
1941 RTE_ETHDEV_LOG(ERR, "null mempool pointer\n");
1944 if (seg_idx != 0 && mp_first != mpl &&
1945 seg_capa->multi_pools == 0) {
1946 RTE_ETHDEV_LOG(ERR, "Receiving to multiple pools is not supported\n");
1950 if (seg_capa->offset_allowed == 0) {
1951 RTE_ETHDEV_LOG(ERR, "Rx segmentation with offset is not supported\n");
1954 if (offset & offset_mask) {
1955 RTE_ETHDEV_LOG(ERR, "Rx segmentation invalid offset alignment %u, %u\n",
1957 seg_capa->offset_align_log2);
1961 if (mpl->private_data_size <
1962 sizeof(struct rte_pktmbuf_pool_private)) {
1964 "%s private_data_size %u < %u\n",
1965 mpl->name, mpl->private_data_size,
1966 (unsigned int)sizeof
1967 (struct rte_pktmbuf_pool_private));
1970 offset += seg_idx != 0 ? 0 : RTE_PKTMBUF_HEADROOM;
1971 *mbp_buf_size = rte_pktmbuf_data_room_size(mpl);
1972 length = length != 0 ? length : *mbp_buf_size;
1973 if (*mbp_buf_size < length + offset) {
1975 "%s mbuf_data_room_size %u < %u (segment length=%u + segment offset=%u)\n",
1976 mpl->name, *mbp_buf_size,
1977 length + offset, length, offset);
1985 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1986 uint16_t nb_rx_desc, unsigned int socket_id,
1987 const struct rte_eth_rxconf *rx_conf,
1988 struct rte_mempool *mp)
1991 uint32_t mbp_buf_size;
1992 struct rte_eth_dev *dev;
1993 struct rte_eth_dev_info dev_info;
1994 struct rte_eth_rxconf local_conf;
1997 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1998 dev = &rte_eth_devices[port_id];
2000 if (rx_queue_id >= dev->data->nb_rx_queues) {
2001 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
2005 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
2007 ret = rte_eth_dev_info_get(port_id, &dev_info);
2012 /* Single pool configuration check. */
2013 if (rx_conf != NULL && rx_conf->rx_nseg != 0) {
2015 "Ambiguous segment configuration\n");
2019 * Check the size of the mbuf data buffer, this value
2020 * must be provided in the private data of the memory pool.
2021 * First check that the memory pool(s) has a valid private data.
2023 if (mp->private_data_size <
2024 sizeof(struct rte_pktmbuf_pool_private)) {
2025 RTE_ETHDEV_LOG(ERR, "%s private_data_size %u < %u\n",
2026 mp->name, mp->private_data_size,
2028 sizeof(struct rte_pktmbuf_pool_private));
2031 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
2032 if (mbp_buf_size < dev_info.min_rx_bufsize +
2033 RTE_PKTMBUF_HEADROOM) {
2035 "%s mbuf_data_room_size %u < %u (RTE_PKTMBUF_HEADROOM=%u + min_rx_bufsize(dev)=%u)\n",
2036 mp->name, mbp_buf_size,
2037 RTE_PKTMBUF_HEADROOM +
2038 dev_info.min_rx_bufsize,
2039 RTE_PKTMBUF_HEADROOM,
2040 dev_info.min_rx_bufsize);
2044 const struct rte_eth_rxseg_split *rx_seg;
2047 /* Extended multi-segment configuration check. */
2048 if (rx_conf == NULL || rx_conf->rx_seg == NULL || rx_conf->rx_nseg == 0) {
2050 "Memory pool is null and no extended configuration provided\n");
2054 rx_seg = (const struct rte_eth_rxseg_split *)rx_conf->rx_seg;
2055 n_seg = rx_conf->rx_nseg;
2057 if (rx_conf->offloads & RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT) {
2058 ret = rte_eth_rx_queue_check_split(rx_seg, n_seg,
2064 RTE_ETHDEV_LOG(ERR, "No Rx segmentation offload configured\n");
2069 /* Use default specified by driver, if nb_rx_desc is zero */
2070 if (nb_rx_desc == 0) {
2071 nb_rx_desc = dev_info.default_rxportconf.ring_size;
2072 /* If driver default is also zero, fall back on EAL default */
2073 if (nb_rx_desc == 0)
2074 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
2077 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
2078 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
2079 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
2082 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
2083 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
2084 dev_info.rx_desc_lim.nb_min,
2085 dev_info.rx_desc_lim.nb_align);
2089 if (dev->data->dev_started &&
2090 !(dev_info.dev_capa &
2091 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
2094 if (dev->data->dev_started &&
2095 (dev->data->rx_queue_state[rx_queue_id] !=
2096 RTE_ETH_QUEUE_STATE_STOPPED))
2099 rxq = dev->data->rx_queues;
2100 if (rxq[rx_queue_id]) {
2101 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
2103 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
2104 rxq[rx_queue_id] = NULL;
2107 if (rx_conf == NULL)
2108 rx_conf = &dev_info.default_rxconf;
2110 local_conf = *rx_conf;
2113 * If an offloading has already been enabled in
2114 * rte_eth_dev_configure(), it has been enabled on all queues,
2115 * so there is no need to enable it in this queue again.
2116 * The local_conf.offloads input to underlying PMD only carries
2117 * those offloadings which are only enabled on this queue and
2118 * not enabled on all queues.
2120 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
2123 * New added offloadings for this queue are those not enabled in
2124 * rte_eth_dev_configure() and they must be per-queue type.
2125 * A pure per-port offloading can't be enabled on a queue while
2126 * disabled on another queue. A pure per-port offloading can't
2127 * be enabled for any queue as new added one if it hasn't been
2128 * enabled in rte_eth_dev_configure().
2130 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
2131 local_conf.offloads) {
2133 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
2134 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
2135 port_id, rx_queue_id, local_conf.offloads,
2136 dev_info.rx_queue_offload_capa,
2142 * If LRO is enabled, check that the maximum aggregated packet
2143 * size is supported by the configured device.
2145 if (local_conf.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
2146 if (dev->data->dev_conf.rxmode.max_lro_pkt_size == 0)
2147 dev->data->dev_conf.rxmode.max_lro_pkt_size =
2148 dev->data->dev_conf.rxmode.max_rx_pkt_len;
2149 int ret = eth_dev_check_lro_pkt_size(port_id,
2150 dev->data->dev_conf.rxmode.max_lro_pkt_size,
2151 dev->data->dev_conf.rxmode.max_rx_pkt_len,
2152 dev_info.max_lro_pkt_size);
2157 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
2158 socket_id, &local_conf, mp);
2160 if (!dev->data->min_rx_buf_size ||
2161 dev->data->min_rx_buf_size > mbp_buf_size)
2162 dev->data->min_rx_buf_size = mbp_buf_size;
2165 rte_ethdev_trace_rxq_setup(port_id, rx_queue_id, nb_rx_desc, mp,
2167 return eth_err(port_id, ret);
2171 rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
2172 uint16_t nb_rx_desc,
2173 const struct rte_eth_hairpin_conf *conf)
2176 struct rte_eth_dev *dev;
2177 struct rte_eth_hairpin_cap cap;
2182 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2183 dev = &rte_eth_devices[port_id];
2185 if (rx_queue_id >= dev->data->nb_rx_queues) {
2186 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
2192 "Cannot setup ethdev port %u Rx hairpin queue from NULL config\n",
2197 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
2200 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_hairpin_queue_setup,
2202 /* if nb_rx_desc is zero use max number of desc from the driver. */
2203 if (nb_rx_desc == 0)
2204 nb_rx_desc = cap.max_nb_desc;
2205 if (nb_rx_desc > cap.max_nb_desc) {
2207 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu",
2208 nb_rx_desc, cap.max_nb_desc);
2211 if (conf->peer_count > cap.max_rx_2_tx) {
2213 "Invalid value for number of peers for Rx queue(=%u), should be: <= %hu",
2214 conf->peer_count, cap.max_rx_2_tx);
2217 if (conf->peer_count == 0) {
2219 "Invalid value for number of peers for Rx queue(=%u), should be: > 0",
2223 for (i = 0, count = 0; i < dev->data->nb_rx_queues &&
2224 cap.max_nb_queues != UINT16_MAX; i++) {
2225 if (i == rx_queue_id || rte_eth_dev_is_rx_hairpin_queue(dev, i))
2228 if (count > cap.max_nb_queues) {
2229 RTE_ETHDEV_LOG(ERR, "To many Rx hairpin queues max is %d",
2233 if (dev->data->dev_started)
2235 rxq = dev->data->rx_queues;
2236 if (rxq[rx_queue_id] != NULL) {
2237 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
2239 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
2240 rxq[rx_queue_id] = NULL;
2242 ret = (*dev->dev_ops->rx_hairpin_queue_setup)(dev, rx_queue_id,
2245 dev->data->rx_queue_state[rx_queue_id] =
2246 RTE_ETH_QUEUE_STATE_HAIRPIN;
2247 return eth_err(port_id, ret);
2251 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2252 uint16_t nb_tx_desc, unsigned int socket_id,
2253 const struct rte_eth_txconf *tx_conf)
2255 struct rte_eth_dev *dev;
2256 struct rte_eth_dev_info dev_info;
2257 struct rte_eth_txconf local_conf;
2261 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2262 dev = &rte_eth_devices[port_id];
2264 if (tx_queue_id >= dev->data->nb_tx_queues) {
2265 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2269 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
2271 ret = rte_eth_dev_info_get(port_id, &dev_info);
2275 /* Use default specified by driver, if nb_tx_desc is zero */
2276 if (nb_tx_desc == 0) {
2277 nb_tx_desc = dev_info.default_txportconf.ring_size;
2278 /* If driver default is zero, fall back on EAL default */
2279 if (nb_tx_desc == 0)
2280 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
2282 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
2283 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
2284 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
2286 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
2287 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
2288 dev_info.tx_desc_lim.nb_min,
2289 dev_info.tx_desc_lim.nb_align);
2293 if (dev->data->dev_started &&
2294 !(dev_info.dev_capa &
2295 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
2298 if (dev->data->dev_started &&
2299 (dev->data->tx_queue_state[tx_queue_id] !=
2300 RTE_ETH_QUEUE_STATE_STOPPED))
2303 txq = dev->data->tx_queues;
2304 if (txq[tx_queue_id]) {
2305 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2307 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2308 txq[tx_queue_id] = NULL;
2311 if (tx_conf == NULL)
2312 tx_conf = &dev_info.default_txconf;
2314 local_conf = *tx_conf;
2317 * If an offloading has already been enabled in
2318 * rte_eth_dev_configure(), it has been enabled on all queues,
2319 * so there is no need to enable it in this queue again.
2320 * The local_conf.offloads input to underlying PMD only carries
2321 * those offloadings which are only enabled on this queue and
2322 * not enabled on all queues.
2324 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
2327 * New added offloadings for this queue are those not enabled in
2328 * rte_eth_dev_configure() and they must be per-queue type.
2329 * A pure per-port offloading can't be enabled on a queue while
2330 * disabled on another queue. A pure per-port offloading can't
2331 * be enabled for any queue as new added one if it hasn't been
2332 * enabled in rte_eth_dev_configure().
2334 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
2335 local_conf.offloads) {
2337 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
2338 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
2339 port_id, tx_queue_id, local_conf.offloads,
2340 dev_info.tx_queue_offload_capa,
2345 rte_ethdev_trace_txq_setup(port_id, tx_queue_id, nb_tx_desc, tx_conf);
2346 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
2347 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
2351 rte_eth_tx_hairpin_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2352 uint16_t nb_tx_desc,
2353 const struct rte_eth_hairpin_conf *conf)
2355 struct rte_eth_dev *dev;
2356 struct rte_eth_hairpin_cap cap;
2362 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2363 dev = &rte_eth_devices[port_id];
2365 if (tx_queue_id >= dev->data->nb_tx_queues) {
2366 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2372 "Cannot setup ethdev port %u Tx hairpin queue from NULL config\n",
2377 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
2380 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_hairpin_queue_setup,
2382 /* if nb_rx_desc is zero use max number of desc from the driver. */
2383 if (nb_tx_desc == 0)
2384 nb_tx_desc = cap.max_nb_desc;
2385 if (nb_tx_desc > cap.max_nb_desc) {
2387 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu",
2388 nb_tx_desc, cap.max_nb_desc);
2391 if (conf->peer_count > cap.max_tx_2_rx) {
2393 "Invalid value for number of peers for Tx queue(=%u), should be: <= %hu",
2394 conf->peer_count, cap.max_tx_2_rx);
2397 if (conf->peer_count == 0) {
2399 "Invalid value for number of peers for Tx queue(=%u), should be: > 0",
2403 for (i = 0, count = 0; i < dev->data->nb_tx_queues &&
2404 cap.max_nb_queues != UINT16_MAX; i++) {
2405 if (i == tx_queue_id || rte_eth_dev_is_tx_hairpin_queue(dev, i))
2408 if (count > cap.max_nb_queues) {
2409 RTE_ETHDEV_LOG(ERR, "To many Tx hairpin queues max is %d",
2413 if (dev->data->dev_started)
2415 txq = dev->data->tx_queues;
2416 if (txq[tx_queue_id] != NULL) {
2417 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2419 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2420 txq[tx_queue_id] = NULL;
2422 ret = (*dev->dev_ops->tx_hairpin_queue_setup)
2423 (dev, tx_queue_id, nb_tx_desc, conf);
2425 dev->data->tx_queue_state[tx_queue_id] =
2426 RTE_ETH_QUEUE_STATE_HAIRPIN;
2427 return eth_err(port_id, ret);
2431 rte_eth_hairpin_bind(uint16_t tx_port, uint16_t rx_port)
2433 struct rte_eth_dev *dev;
2436 RTE_ETH_VALID_PORTID_OR_ERR_RET(tx_port, -ENODEV);
2437 dev = &rte_eth_devices[tx_port];
2439 if (dev->data->dev_started == 0) {
2440 RTE_ETHDEV_LOG(ERR, "Tx port %d is not started\n", tx_port);
2444 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_bind, -ENOTSUP);
2445 ret = (*dev->dev_ops->hairpin_bind)(dev, rx_port);
2447 RTE_ETHDEV_LOG(ERR, "Failed to bind hairpin Tx %d"
2448 " to Rx %d (%d - all ports)\n",
2449 tx_port, rx_port, RTE_MAX_ETHPORTS);
2455 rte_eth_hairpin_unbind(uint16_t tx_port, uint16_t rx_port)
2457 struct rte_eth_dev *dev;
2460 RTE_ETH_VALID_PORTID_OR_ERR_RET(tx_port, -ENODEV);
2461 dev = &rte_eth_devices[tx_port];
2463 if (dev->data->dev_started == 0) {
2464 RTE_ETHDEV_LOG(ERR, "Tx port %d is already stopped\n", tx_port);
2468 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_unbind, -ENOTSUP);
2469 ret = (*dev->dev_ops->hairpin_unbind)(dev, rx_port);
2471 RTE_ETHDEV_LOG(ERR, "Failed to unbind hairpin Tx %d"
2472 " from Rx %d (%d - all ports)\n",
2473 tx_port, rx_port, RTE_MAX_ETHPORTS);
2479 rte_eth_hairpin_get_peer_ports(uint16_t port_id, uint16_t *peer_ports,
2480 size_t len, uint32_t direction)
2482 struct rte_eth_dev *dev;
2485 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2486 dev = &rte_eth_devices[port_id];
2488 if (peer_ports == NULL) {
2490 "Cannot get ethdev port %u hairpin peer ports to NULL\n",
2497 "Cannot get ethdev port %u hairpin peer ports to array with zero size\n",
2502 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_get_peer_ports,
2505 ret = (*dev->dev_ops->hairpin_get_peer_ports)(dev, peer_ports,
2508 RTE_ETHDEV_LOG(ERR, "Failed to get %d hairpin peer %s ports\n",
2509 port_id, direction ? "Rx" : "Tx");
2515 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
2516 void *userdata __rte_unused)
2518 rte_pktmbuf_free_bulk(pkts, unsent);
2522 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
2525 uint64_t *count = userdata;
2527 rte_pktmbuf_free_bulk(pkts, unsent);
2532 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
2533 buffer_tx_error_fn cbfn, void *userdata)
2535 if (buffer == NULL) {
2537 "Cannot set Tx buffer error callback to NULL buffer\n");
2541 buffer->error_callback = cbfn;
2542 buffer->error_userdata = userdata;
2547 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
2551 if (buffer == NULL) {
2552 RTE_ETHDEV_LOG(ERR, "Cannot initialize NULL buffer\n");
2556 buffer->size = size;
2557 if (buffer->error_callback == NULL) {
2558 ret = rte_eth_tx_buffer_set_err_callback(
2559 buffer, rte_eth_tx_buffer_drop_callback, NULL);
2566 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
2568 struct rte_eth_dev *dev;
2571 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2572 dev = &rte_eth_devices[port_id];
2574 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
2576 /* Call driver to free pending mbufs. */
2577 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
2579 return eth_err(port_id, ret);
2583 rte_eth_promiscuous_enable(uint16_t port_id)
2585 struct rte_eth_dev *dev;
2588 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2589 dev = &rte_eth_devices[port_id];
2591 if (dev->data->promiscuous == 1)
2594 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_enable, -ENOTSUP);
2596 diag = (*dev->dev_ops->promiscuous_enable)(dev);
2597 dev->data->promiscuous = (diag == 0) ? 1 : 0;
2599 return eth_err(port_id, diag);
2603 rte_eth_promiscuous_disable(uint16_t port_id)
2605 struct rte_eth_dev *dev;
2608 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2609 dev = &rte_eth_devices[port_id];
2611 if (dev->data->promiscuous == 0)
2614 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_disable, -ENOTSUP);
2616 dev->data->promiscuous = 0;
2617 diag = (*dev->dev_ops->promiscuous_disable)(dev);
2619 dev->data->promiscuous = 1;
2621 return eth_err(port_id, diag);
2625 rte_eth_promiscuous_get(uint16_t port_id)
2627 struct rte_eth_dev *dev;
2629 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2630 dev = &rte_eth_devices[port_id];
2632 return dev->data->promiscuous;
2636 rte_eth_allmulticast_enable(uint16_t port_id)
2638 struct rte_eth_dev *dev;
2641 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2642 dev = &rte_eth_devices[port_id];
2644 if (dev->data->all_multicast == 1)
2647 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_enable, -ENOTSUP);
2648 diag = (*dev->dev_ops->allmulticast_enable)(dev);
2649 dev->data->all_multicast = (diag == 0) ? 1 : 0;
2651 return eth_err(port_id, diag);
2655 rte_eth_allmulticast_disable(uint16_t port_id)
2657 struct rte_eth_dev *dev;
2660 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2661 dev = &rte_eth_devices[port_id];
2663 if (dev->data->all_multicast == 0)
2666 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_disable, -ENOTSUP);
2667 dev->data->all_multicast = 0;
2668 diag = (*dev->dev_ops->allmulticast_disable)(dev);
2670 dev->data->all_multicast = 1;
2672 return eth_err(port_id, diag);
2676 rte_eth_allmulticast_get(uint16_t port_id)
2678 struct rte_eth_dev *dev;
2680 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2681 dev = &rte_eth_devices[port_id];
2683 return dev->data->all_multicast;
2687 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
2689 struct rte_eth_dev *dev;
2691 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2692 dev = &rte_eth_devices[port_id];
2694 if (eth_link == NULL) {
2695 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u link to NULL\n",
2700 if (dev->data->dev_conf.intr_conf.lsc && dev->data->dev_started)
2701 rte_eth_linkstatus_get(dev, eth_link);
2703 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2704 (*dev->dev_ops->link_update)(dev, 1);
2705 *eth_link = dev->data->dev_link;
2712 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
2714 struct rte_eth_dev *dev;
2716 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2717 dev = &rte_eth_devices[port_id];
2719 if (eth_link == NULL) {
2720 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u link to NULL\n",
2725 if (dev->data->dev_conf.intr_conf.lsc && dev->data->dev_started)
2726 rte_eth_linkstatus_get(dev, eth_link);
2728 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2729 (*dev->dev_ops->link_update)(dev, 0);
2730 *eth_link = dev->data->dev_link;
2737 rte_eth_link_speed_to_str(uint32_t link_speed)
2739 switch (link_speed) {
2740 case ETH_SPEED_NUM_NONE: return "None";
2741 case ETH_SPEED_NUM_10M: return "10 Mbps";
2742 case ETH_SPEED_NUM_100M: return "100 Mbps";
2743 case ETH_SPEED_NUM_1G: return "1 Gbps";
2744 case ETH_SPEED_NUM_2_5G: return "2.5 Gbps";
2745 case ETH_SPEED_NUM_5G: return "5 Gbps";
2746 case ETH_SPEED_NUM_10G: return "10 Gbps";
2747 case ETH_SPEED_NUM_20G: return "20 Gbps";
2748 case ETH_SPEED_NUM_25G: return "25 Gbps";
2749 case ETH_SPEED_NUM_40G: return "40 Gbps";
2750 case ETH_SPEED_NUM_50G: return "50 Gbps";
2751 case ETH_SPEED_NUM_56G: return "56 Gbps";
2752 case ETH_SPEED_NUM_100G: return "100 Gbps";
2753 case ETH_SPEED_NUM_200G: return "200 Gbps";
2754 case ETH_SPEED_NUM_UNKNOWN: return "Unknown";
2755 default: return "Invalid";
2760 rte_eth_link_to_str(char *str, size_t len, const struct rte_eth_link *eth_link)
2763 RTE_ETHDEV_LOG(ERR, "Cannot convert link to NULL string\n");
2769 "Cannot convert link to string with zero size\n");
2773 if (eth_link == NULL) {
2774 RTE_ETHDEV_LOG(ERR, "Cannot convert to string from NULL link\n");
2778 if (eth_link->link_status == ETH_LINK_DOWN)
2779 return snprintf(str, len, "Link down");
2781 return snprintf(str, len, "Link up at %s %s %s",
2782 rte_eth_link_speed_to_str(eth_link->link_speed),
2783 (eth_link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
2785 (eth_link->link_autoneg == ETH_LINK_AUTONEG) ?
2786 "Autoneg" : "Fixed");
2790 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
2792 struct rte_eth_dev *dev;
2794 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2795 dev = &rte_eth_devices[port_id];
2797 if (stats == NULL) {
2798 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u stats to NULL\n",
2803 memset(stats, 0, sizeof(*stats));
2805 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
2806 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
2807 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
2811 rte_eth_stats_reset(uint16_t port_id)
2813 struct rte_eth_dev *dev;
2816 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2817 dev = &rte_eth_devices[port_id];
2819 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
2820 ret = (*dev->dev_ops->stats_reset)(dev);
2822 return eth_err(port_id, ret);
2824 dev->data->rx_mbuf_alloc_failed = 0;
2830 eth_dev_get_xstats_basic_count(struct rte_eth_dev *dev)
2832 uint16_t nb_rxqs, nb_txqs;
2835 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2836 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2838 count = RTE_NB_STATS;
2839 if (dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS) {
2840 count += nb_rxqs * RTE_NB_RXQ_STATS;
2841 count += nb_txqs * RTE_NB_TXQ_STATS;
2848 eth_dev_get_xstats_count(uint16_t port_id)
2850 struct rte_eth_dev *dev;
2853 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2854 dev = &rte_eth_devices[port_id];
2855 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
2856 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
2859 return eth_err(port_id, count);
2861 if (dev->dev_ops->xstats_get_names != NULL) {
2862 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2864 return eth_err(port_id, count);
2869 count += eth_dev_get_xstats_basic_count(dev);
2875 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2878 int cnt_xstats, idx_xstat;
2880 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2882 if (xstat_name == NULL) {
2884 "Cannot get ethdev port %u xstats ID from NULL xstat name\n",
2891 "Cannot get ethdev port %u xstats ID to NULL\n",
2897 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2898 if (cnt_xstats < 0) {
2899 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2903 /* Get id-name lookup table */
2904 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2906 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2907 port_id, xstats_names, cnt_xstats, NULL)) {
2908 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2912 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2913 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2922 /* retrieve basic stats names */
2924 eth_basic_stats_get_names(struct rte_eth_dev *dev,
2925 struct rte_eth_xstat_name *xstats_names)
2927 int cnt_used_entries = 0;
2928 uint32_t idx, id_queue;
2931 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2932 strlcpy(xstats_names[cnt_used_entries].name,
2933 eth_dev_stats_strings[idx].name,
2934 sizeof(xstats_names[0].name));
2938 if ((dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS) == 0)
2939 return cnt_used_entries;
2941 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2942 for (id_queue = 0; id_queue < num_q; id_queue++) {
2943 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2944 snprintf(xstats_names[cnt_used_entries].name,
2945 sizeof(xstats_names[0].name),
2947 id_queue, eth_dev_rxq_stats_strings[idx].name);
2952 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2953 for (id_queue = 0; id_queue < num_q; id_queue++) {
2954 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2955 snprintf(xstats_names[cnt_used_entries].name,
2956 sizeof(xstats_names[0].name),
2958 id_queue, eth_dev_txq_stats_strings[idx].name);
2962 return cnt_used_entries;
2965 /* retrieve ethdev extended statistics names */
2967 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2968 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2971 struct rte_eth_xstat_name *xstats_names_copy;
2972 unsigned int no_basic_stat_requested = 1;
2973 unsigned int no_ext_stat_requested = 1;
2974 unsigned int expected_entries;
2975 unsigned int basic_count;
2976 struct rte_eth_dev *dev;
2980 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2981 dev = &rte_eth_devices[port_id];
2983 basic_count = eth_dev_get_xstats_basic_count(dev);
2984 ret = eth_dev_get_xstats_count(port_id);
2987 expected_entries = (unsigned int)ret;
2989 /* Return max number of stats if no ids given */
2992 return expected_entries;
2993 else if (xstats_names && size < expected_entries)
2994 return expected_entries;
2997 if (ids && !xstats_names)
3000 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
3001 uint64_t ids_copy[size];
3003 for (i = 0; i < size; i++) {
3004 if (ids[i] < basic_count) {
3005 no_basic_stat_requested = 0;
3010 * Convert ids to xstats ids that PMD knows.
3011 * ids known by user are basic + extended stats.
3013 ids_copy[i] = ids[i] - basic_count;
3016 if (no_basic_stat_requested)
3017 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
3018 xstats_names, ids_copy, size);
3021 /* Retrieve all stats */
3023 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
3025 if (num_stats < 0 || num_stats > (int)expected_entries)
3028 return expected_entries;
3031 xstats_names_copy = calloc(expected_entries,
3032 sizeof(struct rte_eth_xstat_name));
3034 if (!xstats_names_copy) {
3035 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
3040 for (i = 0; i < size; i++) {
3041 if (ids[i] >= basic_count) {
3042 no_ext_stat_requested = 0;
3048 /* Fill xstats_names_copy structure */
3049 if (ids && no_ext_stat_requested) {
3050 eth_basic_stats_get_names(dev, xstats_names_copy);
3052 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
3055 free(xstats_names_copy);
3061 for (i = 0; i < size; i++) {
3062 if (ids[i] >= expected_entries) {
3063 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
3064 free(xstats_names_copy);
3067 xstats_names[i] = xstats_names_copy[ids[i]];
3070 free(xstats_names_copy);
3075 rte_eth_xstats_get_names(uint16_t port_id,
3076 struct rte_eth_xstat_name *xstats_names,
3079 struct rte_eth_dev *dev;
3080 int cnt_used_entries;
3081 int cnt_expected_entries;
3082 int cnt_driver_entries;
3084 cnt_expected_entries = eth_dev_get_xstats_count(port_id);
3085 if (xstats_names == NULL || cnt_expected_entries < 0 ||
3086 (int)size < cnt_expected_entries)
3087 return cnt_expected_entries;
3089 /* port_id checked in eth_dev_get_xstats_count() */
3090 dev = &rte_eth_devices[port_id];
3092 cnt_used_entries = eth_basic_stats_get_names(dev, xstats_names);
3094 if (dev->dev_ops->xstats_get_names != NULL) {
3095 /* If there are any driver-specific xstats, append them
3098 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
3100 xstats_names + cnt_used_entries,
3101 size - cnt_used_entries);
3102 if (cnt_driver_entries < 0)
3103 return eth_err(port_id, cnt_driver_entries);
3104 cnt_used_entries += cnt_driver_entries;
3107 return cnt_used_entries;
3112 eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
3114 struct rte_eth_dev *dev;
3115 struct rte_eth_stats eth_stats;
3116 unsigned int count = 0, i, q;
3117 uint64_t val, *stats_ptr;
3118 uint16_t nb_rxqs, nb_txqs;
3121 ret = rte_eth_stats_get(port_id, ð_stats);
3125 dev = &rte_eth_devices[port_id];
3127 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
3128 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
3131 for (i = 0; i < RTE_NB_STATS; i++) {
3132 stats_ptr = RTE_PTR_ADD(ð_stats,
3133 eth_dev_stats_strings[i].offset);
3135 xstats[count++].value = val;
3138 if ((dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS) == 0)
3142 for (q = 0; q < nb_rxqs; q++) {
3143 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
3144 stats_ptr = RTE_PTR_ADD(ð_stats,
3145 eth_dev_rxq_stats_strings[i].offset +
3146 q * sizeof(uint64_t));
3148 xstats[count++].value = val;
3153 for (q = 0; q < nb_txqs; q++) {
3154 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
3155 stats_ptr = RTE_PTR_ADD(ð_stats,
3156 eth_dev_txq_stats_strings[i].offset +
3157 q * sizeof(uint64_t));
3159 xstats[count++].value = val;
3165 /* retrieve ethdev extended statistics */
3167 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
3168 uint64_t *values, unsigned int size)
3170 unsigned int no_basic_stat_requested = 1;
3171 unsigned int no_ext_stat_requested = 1;
3172 unsigned int num_xstats_filled;
3173 unsigned int basic_count;
3174 uint16_t expected_entries;
3175 struct rte_eth_dev *dev;
3179 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3180 dev = &rte_eth_devices[port_id];
3182 ret = eth_dev_get_xstats_count(port_id);
3185 expected_entries = (uint16_t)ret;
3186 struct rte_eth_xstat xstats[expected_entries];
3187 basic_count = eth_dev_get_xstats_basic_count(dev);
3189 /* Return max number of stats if no ids given */
3192 return expected_entries;
3193 else if (values && size < expected_entries)
3194 return expected_entries;
3200 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
3201 unsigned int basic_count = eth_dev_get_xstats_basic_count(dev);
3202 uint64_t ids_copy[size];
3204 for (i = 0; i < size; i++) {
3205 if (ids[i] < basic_count) {
3206 no_basic_stat_requested = 0;
3211 * Convert ids to xstats ids that PMD knows.
3212 * ids known by user are basic + extended stats.
3214 ids_copy[i] = ids[i] - basic_count;
3217 if (no_basic_stat_requested)
3218 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
3223 for (i = 0; i < size; i++) {
3224 if (ids[i] >= basic_count) {
3225 no_ext_stat_requested = 0;
3231 /* Fill the xstats structure */
3232 if (ids && no_ext_stat_requested)
3233 ret = eth_basic_stats_get(port_id, xstats);
3235 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
3239 num_xstats_filled = (unsigned int)ret;
3241 /* Return all stats */
3243 for (i = 0; i < num_xstats_filled; i++)
3244 values[i] = xstats[i].value;
3245 return expected_entries;
3249 for (i = 0; i < size; i++) {
3250 if (ids[i] >= expected_entries) {
3251 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
3254 values[i] = xstats[ids[i]].value;
3260 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
3263 struct rte_eth_dev *dev;
3264 unsigned int count = 0, i;
3265 signed int xcount = 0;
3266 uint16_t nb_rxqs, nb_txqs;
3269 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3270 dev = &rte_eth_devices[port_id];
3272 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
3273 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
3275 /* Return generic statistics */
3276 count = RTE_NB_STATS;
3277 if (dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS)
3278 count += (nb_rxqs * RTE_NB_RXQ_STATS) + (nb_txqs * RTE_NB_TXQ_STATS);
3280 /* implemented by the driver */
3281 if (dev->dev_ops->xstats_get != NULL) {
3282 /* Retrieve the xstats from the driver at the end of the
3285 xcount = (*dev->dev_ops->xstats_get)(dev,
3286 xstats ? xstats + count : NULL,
3287 (n > count) ? n - count : 0);
3290 return eth_err(port_id, xcount);
3293 if (n < count + xcount || xstats == NULL)
3294 return count + xcount;
3296 /* now fill the xstats structure */
3297 ret = eth_basic_stats_get(port_id, xstats);
3302 for (i = 0; i < count; i++)
3304 /* add an offset to driver-specific stats */
3305 for ( ; i < count + xcount; i++)
3306 xstats[i].id += count;
3308 return count + xcount;
3311 /* reset ethdev extended statistics */
3313 rte_eth_xstats_reset(uint16_t port_id)
3315 struct rte_eth_dev *dev;
3317 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3318 dev = &rte_eth_devices[port_id];
3320 /* implemented by the driver */
3321 if (dev->dev_ops->xstats_reset != NULL)
3322 return eth_err(port_id, (*dev->dev_ops->xstats_reset)(dev));
3324 /* fallback to default */
3325 return rte_eth_stats_reset(port_id);
3329 eth_dev_set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id,
3330 uint8_t stat_idx, uint8_t is_rx)
3332 struct rte_eth_dev *dev;
3334 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3335 dev = &rte_eth_devices[port_id];
3337 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
3340 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
3343 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
3346 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
3347 return (*dev->dev_ops->queue_stats_mapping_set) (dev, queue_id, stat_idx, is_rx);
3351 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
3354 return eth_err(port_id, eth_dev_set_queue_stats_mapping(port_id,
3356 stat_idx, STAT_QMAP_TX));
3360 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
3363 return eth_err(port_id, eth_dev_set_queue_stats_mapping(port_id,
3365 stat_idx, STAT_QMAP_RX));
3369 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
3371 struct rte_eth_dev *dev;
3373 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3374 dev = &rte_eth_devices[port_id];
3376 if (fw_version == NULL && fw_size > 0) {
3378 "Cannot get ethdev port %u FW version to NULL when string size is non zero\n",
3383 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
3384 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
3385 fw_version, fw_size));
3389 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
3391 struct rte_eth_dev *dev;
3392 const struct rte_eth_desc_lim lim = {
3393 .nb_max = UINT16_MAX,
3396 .nb_seg_max = UINT16_MAX,
3397 .nb_mtu_seg_max = UINT16_MAX,
3401 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3402 dev = &rte_eth_devices[port_id];
3404 if (dev_info == NULL) {
3405 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u info to NULL\n",
3411 * Init dev_info before port_id check since caller does not have
3412 * return status and does not know if get is successful or not.
3414 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
3415 dev_info->switch_info.domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
3417 dev_info->rx_desc_lim = lim;
3418 dev_info->tx_desc_lim = lim;
3419 dev_info->device = dev->device;
3420 dev_info->min_mtu = RTE_ETHER_MIN_MTU;
3421 dev_info->max_mtu = UINT16_MAX;
3423 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
3424 diag = (*dev->dev_ops->dev_infos_get)(dev, dev_info);
3426 /* Cleanup already filled in device information */
3427 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
3428 return eth_err(port_id, diag);
3431 /* Maximum number of queues should be <= RTE_MAX_QUEUES_PER_PORT */
3432 dev_info->max_rx_queues = RTE_MIN(dev_info->max_rx_queues,
3433 RTE_MAX_QUEUES_PER_PORT);
3434 dev_info->max_tx_queues = RTE_MIN(dev_info->max_tx_queues,
3435 RTE_MAX_QUEUES_PER_PORT);
3437 dev_info->driver_name = dev->device->driver->name;
3438 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
3439 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
3441 dev_info->dev_flags = &dev->data->dev_flags;
3447 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
3448 uint32_t *ptypes, int num)
3451 struct rte_eth_dev *dev;
3452 const uint32_t *all_ptypes;
3454 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3455 dev = &rte_eth_devices[port_id];
3457 if (ptypes == NULL && num > 0) {
3459 "Cannot get ethdev port %u supported packet types to NULL when array size is non zero\n",
3464 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
3465 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3470 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
3471 if (all_ptypes[i] & ptype_mask) {
3473 ptypes[j] = all_ptypes[i];
3481 rte_eth_dev_set_ptypes(uint16_t port_id, uint32_t ptype_mask,
3482 uint32_t *set_ptypes, unsigned int num)
3484 const uint32_t valid_ptype_masks[] = {
3488 RTE_PTYPE_TUNNEL_MASK,
3489 RTE_PTYPE_INNER_L2_MASK,
3490 RTE_PTYPE_INNER_L3_MASK,
3491 RTE_PTYPE_INNER_L4_MASK,
3493 const uint32_t *all_ptypes;
3494 struct rte_eth_dev *dev;
3495 uint32_t unused_mask;
3499 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3500 dev = &rte_eth_devices[port_id];
3502 if (num > 0 && set_ptypes == NULL) {
3504 "Cannot get ethdev port %u set packet types to NULL when array size is non zero\n",
3509 if (*dev->dev_ops->dev_supported_ptypes_get == NULL ||
3510 *dev->dev_ops->dev_ptypes_set == NULL) {
3515 if (ptype_mask == 0) {
3516 ret = (*dev->dev_ops->dev_ptypes_set)(dev,
3521 unused_mask = ptype_mask;
3522 for (i = 0; i < RTE_DIM(valid_ptype_masks); i++) {
3523 uint32_t mask = ptype_mask & valid_ptype_masks[i];
3524 if (mask && mask != valid_ptype_masks[i]) {
3528 unused_mask &= ~valid_ptype_masks[i];
3536 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3537 if (all_ptypes == NULL) {
3543 * Accommodate as many set_ptypes as possible. If the supplied
3544 * set_ptypes array is insufficient fill it partially.
3546 for (i = 0, j = 0; set_ptypes != NULL &&
3547 (all_ptypes[i] != RTE_PTYPE_UNKNOWN); ++i) {
3548 if (ptype_mask & all_ptypes[i]) {
3550 set_ptypes[j] = all_ptypes[i];
3558 if (set_ptypes != NULL && j < num)
3559 set_ptypes[j] = RTE_PTYPE_UNKNOWN;
3561 return (*dev->dev_ops->dev_ptypes_set)(dev, ptype_mask);
3565 set_ptypes[0] = RTE_PTYPE_UNKNOWN;
3571 rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
3573 struct rte_eth_dev *dev;
3575 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3576 dev = &rte_eth_devices[port_id];
3578 if (mac_addr == NULL) {
3580 "Cannot get ethdev port %u MAC address to NULL\n",
3585 rte_ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
3591 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
3593 struct rte_eth_dev *dev;
3595 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3596 dev = &rte_eth_devices[port_id];
3599 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u MTU to NULL\n",
3604 *mtu = dev->data->mtu;
3609 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
3612 struct rte_eth_dev_info dev_info;
3613 struct rte_eth_dev *dev;
3615 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3616 dev = &rte_eth_devices[port_id];
3617 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
3620 * Check if the device supports dev_infos_get, if it does not
3621 * skip min_mtu/max_mtu validation here as this requires values
3622 * that are populated within the call to rte_eth_dev_info_get()
3623 * which relies on dev->dev_ops->dev_infos_get.
3625 if (*dev->dev_ops->dev_infos_get != NULL) {
3626 ret = rte_eth_dev_info_get(port_id, &dev_info);
3630 if (mtu < dev_info.min_mtu || mtu > dev_info.max_mtu)
3634 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
3636 dev->data->mtu = mtu;
3638 return eth_err(port_id, ret);
3642 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
3644 struct rte_eth_dev *dev;
3647 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3648 dev = &rte_eth_devices[port_id];
3650 if (!(dev->data->dev_conf.rxmode.offloads &
3651 DEV_RX_OFFLOAD_VLAN_FILTER)) {
3652 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
3657 if (vlan_id > 4095) {
3658 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
3662 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
3664 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
3666 struct rte_vlan_filter_conf *vfc;
3670 vfc = &dev->data->vlan_filter_conf;
3671 vidx = vlan_id / 64;
3672 vbit = vlan_id % 64;
3675 vfc->ids[vidx] |= UINT64_C(1) << vbit;
3677 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
3680 return eth_err(port_id, ret);
3684 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
3687 struct rte_eth_dev *dev;
3689 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3690 dev = &rte_eth_devices[port_id];
3692 if (rx_queue_id >= dev->data->nb_rx_queues) {
3693 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
3697 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
3698 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
3704 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
3705 enum rte_vlan_type vlan_type,
3708 struct rte_eth_dev *dev;
3710 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3711 dev = &rte_eth_devices[port_id];
3713 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
3714 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
3719 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
3721 struct rte_eth_dev_info dev_info;
3722 struct rte_eth_dev *dev;
3726 uint64_t orig_offloads;
3727 uint64_t dev_offloads;
3728 uint64_t new_offloads;
3730 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3731 dev = &rte_eth_devices[port_id];
3733 /* save original values in case of failure */
3734 orig_offloads = dev->data->dev_conf.rxmode.offloads;
3735 dev_offloads = orig_offloads;
3737 /* check which option changed by application */
3738 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
3739 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
3742 dev_offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
3744 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
3745 mask |= ETH_VLAN_STRIP_MASK;
3748 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
3749 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER);
3752 dev_offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
3754 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_FILTER;
3755 mask |= ETH_VLAN_FILTER_MASK;
3758 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
3759 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND);
3762 dev_offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
3764 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_EXTEND;
3765 mask |= ETH_VLAN_EXTEND_MASK;
3768 cur = !!(offload_mask & ETH_QINQ_STRIP_OFFLOAD);
3769 org = !!(dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP);
3772 dev_offloads |= DEV_RX_OFFLOAD_QINQ_STRIP;
3774 dev_offloads &= ~DEV_RX_OFFLOAD_QINQ_STRIP;
3775 mask |= ETH_QINQ_STRIP_MASK;
3782 ret = rte_eth_dev_info_get(port_id, &dev_info);
3786 /* Rx VLAN offloading must be within its device capabilities */
3787 if ((dev_offloads & dev_info.rx_offload_capa) != dev_offloads) {
3788 new_offloads = dev_offloads & ~orig_offloads;
3790 "Ethdev port_id=%u requested new added VLAN offloads "
3791 "0x%" PRIx64 " must be within Rx offloads capabilities "
3792 "0x%" PRIx64 " in %s()\n",
3793 port_id, new_offloads, dev_info.rx_offload_capa,
3798 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
3799 dev->data->dev_conf.rxmode.offloads = dev_offloads;
3800 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
3802 /* hit an error restore original values */
3803 dev->data->dev_conf.rxmode.offloads = orig_offloads;
3806 return eth_err(port_id, ret);
3810 rte_eth_dev_get_vlan_offload(uint16_t port_id)
3812 struct rte_eth_dev *dev;
3813 uint64_t *dev_offloads;
3816 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3817 dev = &rte_eth_devices[port_id];
3818 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
3820 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
3821 ret |= ETH_VLAN_STRIP_OFFLOAD;
3823 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
3824 ret |= ETH_VLAN_FILTER_OFFLOAD;
3826 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
3827 ret |= ETH_VLAN_EXTEND_OFFLOAD;
3829 if (*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP)
3830 ret |= ETH_QINQ_STRIP_OFFLOAD;
3836 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
3838 struct rte_eth_dev *dev;
3840 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3841 dev = &rte_eth_devices[port_id];
3843 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
3844 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
3848 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3850 struct rte_eth_dev *dev;
3852 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3853 dev = &rte_eth_devices[port_id];
3855 if (fc_conf == NULL) {
3857 "Cannot get ethdev port %u flow control config to NULL\n",
3862 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
3863 memset(fc_conf, 0, sizeof(*fc_conf));
3864 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
3868 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3870 struct rte_eth_dev *dev;
3872 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3873 dev = &rte_eth_devices[port_id];
3875 if (fc_conf == NULL) {
3877 "Cannot set ethdev port %u flow control from NULL config\n",
3882 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
3883 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
3887 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
3888 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
3892 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
3893 struct rte_eth_pfc_conf *pfc_conf)
3895 struct rte_eth_dev *dev;
3897 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3898 dev = &rte_eth_devices[port_id];
3900 if (pfc_conf == NULL) {
3902 "Cannot set ethdev port %u priority flow control from NULL config\n",
3907 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
3908 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
3912 /* High water, low water validation are device specific */
3913 if (*dev->dev_ops->priority_flow_ctrl_set)
3914 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
3920 eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
3925 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
3926 for (i = 0; i < num; i++) {
3927 if (reta_conf[i].mask)
3935 eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
3939 uint16_t i, idx, shift;
3942 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
3946 for (i = 0; i < reta_size; i++) {
3947 idx = i / RTE_RETA_GROUP_SIZE;
3948 shift = i % RTE_RETA_GROUP_SIZE;
3949 if ((reta_conf[idx].mask & (1ULL << shift)) &&
3950 (reta_conf[idx].reta[shift] >= max_rxq)) {
3952 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
3954 reta_conf[idx].reta[shift], max_rxq);
3963 rte_eth_dev_rss_reta_update(uint16_t port_id,
3964 struct rte_eth_rss_reta_entry64 *reta_conf,
3967 struct rte_eth_dev *dev;
3970 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3971 dev = &rte_eth_devices[port_id];
3973 if (reta_conf == NULL) {
3975 "Cannot update ethdev port %u RSS RETA to NULL\n",
3980 if (reta_size == 0) {
3982 "Cannot update ethdev port %u RSS RETA with zero size\n",
3987 /* Check mask bits */
3988 ret = eth_check_reta_mask(reta_conf, reta_size);
3992 /* Check entry value */
3993 ret = eth_check_reta_entry(reta_conf, reta_size,
3994 dev->data->nb_rx_queues);
3998 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
3999 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
4004 rte_eth_dev_rss_reta_query(uint16_t port_id,
4005 struct rte_eth_rss_reta_entry64 *reta_conf,
4008 struct rte_eth_dev *dev;
4011 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4012 dev = &rte_eth_devices[port_id];
4014 if (reta_conf == NULL) {
4016 "Cannot query ethdev port %u RSS RETA from NULL config\n",
4021 /* Check mask bits */
4022 ret = eth_check_reta_mask(reta_conf, reta_size);
4026 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
4027 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
4032 rte_eth_dev_rss_hash_update(uint16_t port_id,
4033 struct rte_eth_rss_conf *rss_conf)
4035 struct rte_eth_dev *dev;
4036 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
4039 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4040 dev = &rte_eth_devices[port_id];
4042 if (rss_conf == NULL) {
4044 "Cannot update ethdev port %u RSS hash from NULL config\n",
4049 ret = rte_eth_dev_info_get(port_id, &dev_info);
4053 rss_conf->rss_hf = rte_eth_rss_hf_refine(rss_conf->rss_hf);
4054 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
4055 dev_info.flow_type_rss_offloads) {
4057 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
4058 port_id, rss_conf->rss_hf,
4059 dev_info.flow_type_rss_offloads);
4062 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
4063 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
4068 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
4069 struct rte_eth_rss_conf *rss_conf)
4071 struct rte_eth_dev *dev;
4073 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4074 dev = &rte_eth_devices[port_id];
4076 if (rss_conf == NULL) {
4078 "Cannot get ethdev port %u RSS hash config to NULL\n",
4083 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
4084 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
4089 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
4090 struct rte_eth_udp_tunnel *udp_tunnel)
4092 struct rte_eth_dev *dev;
4094 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4095 dev = &rte_eth_devices[port_id];
4097 if (udp_tunnel == NULL) {
4099 "Cannot add ethdev port %u UDP tunnel port from NULL UDP tunnel\n",
4104 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
4105 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4109 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
4110 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
4115 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
4116 struct rte_eth_udp_tunnel *udp_tunnel)
4118 struct rte_eth_dev *dev;
4120 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4121 dev = &rte_eth_devices[port_id];
4123 if (udp_tunnel == NULL) {
4125 "Cannot delete ethdev port %u UDP tunnel port from NULL UDP tunnel\n",
4130 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
4131 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4135 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
4136 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
4141 rte_eth_led_on(uint16_t port_id)
4143 struct rte_eth_dev *dev;
4145 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4146 dev = &rte_eth_devices[port_id];
4148 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
4149 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
4153 rte_eth_led_off(uint16_t port_id)
4155 struct rte_eth_dev *dev;
4157 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4158 dev = &rte_eth_devices[port_id];
4160 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
4161 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
4165 rte_eth_fec_get_capability(uint16_t port_id,
4166 struct rte_eth_fec_capa *speed_fec_capa,
4169 struct rte_eth_dev *dev;
4172 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4173 dev = &rte_eth_devices[port_id];
4175 if (speed_fec_capa == NULL && num > 0) {
4177 "Cannot get ethdev port %u FEC capability to NULL when array size is non zero\n",
4182 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_get_capability, -ENOTSUP);
4183 ret = (*dev->dev_ops->fec_get_capability)(dev, speed_fec_capa, num);
4189 rte_eth_fec_get(uint16_t port_id, uint32_t *fec_capa)
4191 struct rte_eth_dev *dev;
4193 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4194 dev = &rte_eth_devices[port_id];
4196 if (fec_capa == NULL) {
4198 "Cannot get ethdev port %u current FEC mode to NULL\n",
4203 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_get, -ENOTSUP);
4204 return eth_err(port_id, (*dev->dev_ops->fec_get)(dev, fec_capa));
4208 rte_eth_fec_set(uint16_t port_id, uint32_t fec_capa)
4210 struct rte_eth_dev *dev;
4212 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4213 dev = &rte_eth_devices[port_id];
4215 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_set, -ENOTSUP);
4216 return eth_err(port_id, (*dev->dev_ops->fec_set)(dev, fec_capa));
4220 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
4224 eth_dev_get_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
4226 struct rte_eth_dev_info dev_info;
4227 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4231 ret = rte_eth_dev_info_get(port_id, &dev_info);
4235 for (i = 0; i < dev_info.max_mac_addrs; i++)
4236 if (memcmp(addr, &dev->data->mac_addrs[i],
4237 RTE_ETHER_ADDR_LEN) == 0)
4243 static const struct rte_ether_addr null_mac_addr;
4246 rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr,
4249 struct rte_eth_dev *dev;
4254 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4255 dev = &rte_eth_devices[port_id];
4259 "Cannot add ethdev port %u MAC address from NULL address\n",
4264 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
4266 if (rte_is_zero_ether_addr(addr)) {
4267 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
4271 if (pool >= ETH_64_POOLS) {
4272 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
4276 index = eth_dev_get_mac_addr_index(port_id, addr);
4278 index = eth_dev_get_mac_addr_index(port_id, &null_mac_addr);
4280 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
4285 pool_mask = dev->data->mac_pool_sel[index];
4287 /* Check if both MAC address and pool is already there, and do nothing */
4288 if (pool_mask & (1ULL << pool))
4293 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
4296 /* Update address in NIC data structure */
4297 rte_ether_addr_copy(addr, &dev->data->mac_addrs[index]);
4299 /* Update pool bitmap in NIC data structure */
4300 dev->data->mac_pool_sel[index] |= (1ULL << pool);
4303 return eth_err(port_id, ret);
4307 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *addr)
4309 struct rte_eth_dev *dev;
4312 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4313 dev = &rte_eth_devices[port_id];
4317 "Cannot remove ethdev port %u MAC address from NULL address\n",
4322 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
4324 index = eth_dev_get_mac_addr_index(port_id, addr);
4327 "Port %u: Cannot remove default MAC address\n",
4330 } else if (index < 0)
4331 return 0; /* Do nothing if address wasn't found */
4334 (*dev->dev_ops->mac_addr_remove)(dev, index);
4336 /* Update address in NIC data structure */
4337 rte_ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
4339 /* reset pool bitmap */
4340 dev->data->mac_pool_sel[index] = 0;
4346 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *addr)
4348 struct rte_eth_dev *dev;
4351 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4352 dev = &rte_eth_devices[port_id];
4356 "Cannot set ethdev port %u default MAC address from NULL address\n",
4361 if (!rte_is_valid_assigned_ether_addr(addr))
4364 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
4366 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
4370 /* Update default address in NIC data structure */
4371 rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]);
4378 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
4382 eth_dev_get_hash_mac_addr_index(uint16_t port_id,
4383 const struct rte_ether_addr *addr)
4385 struct rte_eth_dev_info dev_info;
4386 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4390 ret = rte_eth_dev_info_get(port_id, &dev_info);
4394 if (!dev->data->hash_mac_addrs)
4397 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
4398 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
4399 RTE_ETHER_ADDR_LEN) == 0)
4406 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
4411 struct rte_eth_dev *dev;
4413 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4414 dev = &rte_eth_devices[port_id];
4418 "Cannot set ethdev port %u unicast hash table from NULL address\n",
4423 if (rte_is_zero_ether_addr(addr)) {
4424 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
4429 index = eth_dev_get_hash_mac_addr_index(port_id, addr);
4430 /* Check if it's already there, and do nothing */
4431 if ((index >= 0) && on)
4437 "Port %u: the MAC address was not set in UTA\n",
4442 index = eth_dev_get_hash_mac_addr_index(port_id, &null_mac_addr);
4444 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
4450 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
4451 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
4453 /* Update address in NIC data structure */
4455 rte_ether_addr_copy(addr,
4456 &dev->data->hash_mac_addrs[index]);
4458 rte_ether_addr_copy(&null_mac_addr,
4459 &dev->data->hash_mac_addrs[index]);
4462 return eth_err(port_id, ret);
4466 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
4468 struct rte_eth_dev *dev;
4470 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4471 dev = &rte_eth_devices[port_id];
4473 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
4474 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
4478 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
4481 struct rte_eth_dev *dev;
4482 struct rte_eth_dev_info dev_info;
4483 struct rte_eth_link link;
4486 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4487 dev = &rte_eth_devices[port_id];
4489 ret = rte_eth_dev_info_get(port_id, &dev_info);
4493 link = dev->data->dev_link;
4495 if (queue_idx > dev_info.max_tx_queues) {
4497 "Set queue rate limit:port %u: invalid queue id=%u\n",
4498 port_id, queue_idx);
4502 if (tx_rate > link.link_speed) {
4504 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
4505 tx_rate, link.link_speed);
4509 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
4510 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
4511 queue_idx, tx_rate));
4515 rte_eth_mirror_rule_set(uint16_t port_id,
4516 struct rte_eth_mirror_conf *mirror_conf,
4517 uint8_t rule_id, uint8_t on)
4519 struct rte_eth_dev *dev;
4521 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4522 dev = &rte_eth_devices[port_id];
4524 if (mirror_conf == NULL) {
4526 "Cannot set ethdev port %u mirror rule from NULL config\n",
4531 if (mirror_conf->rule_type == 0) {
4532 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
4536 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
4537 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
4542 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
4543 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
4544 (mirror_conf->pool_mask == 0)) {
4546 "Invalid mirror pool, pool mask can not be 0\n");
4550 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
4551 mirror_conf->vlan.vlan_mask == 0) {
4553 "Invalid vlan mask, vlan mask can not be 0\n");
4557 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
4559 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
4560 mirror_conf, rule_id, on));
4564 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
4566 struct rte_eth_dev *dev;
4568 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4569 dev = &rte_eth_devices[port_id];
4571 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
4572 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev, rule_id));
4575 RTE_INIT(eth_dev_init_cb_lists)
4579 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
4580 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
4584 rte_eth_dev_callback_register(uint16_t port_id,
4585 enum rte_eth_event_type event,
4586 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4588 struct rte_eth_dev *dev;
4589 struct rte_eth_dev_callback *user_cb;
4593 if (cb_fn == NULL) {
4595 "Cannot register ethdev port %u callback from NULL\n",
4600 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4601 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4605 if (port_id == RTE_ETH_ALL) {
4607 last_port = RTE_MAX_ETHPORTS - 1;
4609 next_port = last_port = port_id;
4612 rte_spinlock_lock(ð_dev_cb_lock);
4615 dev = &rte_eth_devices[next_port];
4617 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
4618 if (user_cb->cb_fn == cb_fn &&
4619 user_cb->cb_arg == cb_arg &&
4620 user_cb->event == event) {
4625 /* create a new callback. */
4626 if (user_cb == NULL) {
4627 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
4628 sizeof(struct rte_eth_dev_callback), 0);
4629 if (user_cb != NULL) {
4630 user_cb->cb_fn = cb_fn;
4631 user_cb->cb_arg = cb_arg;
4632 user_cb->event = event;
4633 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
4636 rte_spinlock_unlock(ð_dev_cb_lock);
4637 rte_eth_dev_callback_unregister(port_id, event,
4643 } while (++next_port <= last_port);
4645 rte_spinlock_unlock(ð_dev_cb_lock);
4650 rte_eth_dev_callback_unregister(uint16_t port_id,
4651 enum rte_eth_event_type event,
4652 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4655 struct rte_eth_dev *dev;
4656 struct rte_eth_dev_callback *cb, *next;
4660 if (cb_fn == NULL) {
4662 "Cannot unregister ethdev port %u callback from NULL\n",
4667 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4668 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4672 if (port_id == RTE_ETH_ALL) {
4674 last_port = RTE_MAX_ETHPORTS - 1;
4676 next_port = last_port = port_id;
4679 rte_spinlock_lock(ð_dev_cb_lock);
4682 dev = &rte_eth_devices[next_port];
4684 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
4687 next = TAILQ_NEXT(cb, next);
4689 if (cb->cb_fn != cb_fn || cb->event != event ||
4690 (cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
4694 * if this callback is not executing right now,
4697 if (cb->active == 0) {
4698 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
4704 } while (++next_port <= last_port);
4706 rte_spinlock_unlock(ð_dev_cb_lock);
4711 rte_eth_dev_callback_process(struct rte_eth_dev *dev,
4712 enum rte_eth_event_type event, void *ret_param)
4714 struct rte_eth_dev_callback *cb_lst;
4715 struct rte_eth_dev_callback dev_cb;
4718 rte_spinlock_lock(ð_dev_cb_lock);
4719 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
4720 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
4724 if (ret_param != NULL)
4725 dev_cb.ret_param = ret_param;
4727 rte_spinlock_unlock(ð_dev_cb_lock);
4728 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
4729 dev_cb.cb_arg, dev_cb.ret_param);
4730 rte_spinlock_lock(ð_dev_cb_lock);
4733 rte_spinlock_unlock(ð_dev_cb_lock);
4738 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
4743 rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
4745 dev->state = RTE_ETH_DEV_ATTACHED;
4749 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
4752 struct rte_eth_dev *dev;
4753 struct rte_intr_handle *intr_handle;
4757 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4758 dev = &rte_eth_devices[port_id];
4760 if (!dev->intr_handle) {
4761 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4765 intr_handle = dev->intr_handle;
4766 if (!intr_handle->intr_vec) {
4767 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4771 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
4772 vec = intr_handle->intr_vec[qid];
4773 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4774 if (rc && rc != -EEXIST) {
4776 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4777 port_id, qid, op, epfd, vec);
4785 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
4787 struct rte_intr_handle *intr_handle;
4788 struct rte_eth_dev *dev;
4789 unsigned int efd_idx;
4793 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
4794 dev = &rte_eth_devices[port_id];
4796 if (queue_id >= dev->data->nb_rx_queues) {
4797 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4801 if (!dev->intr_handle) {
4802 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4806 intr_handle = dev->intr_handle;
4807 if (!intr_handle->intr_vec) {
4808 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4812 vec = intr_handle->intr_vec[queue_id];
4813 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
4814 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
4815 fd = intr_handle->efds[efd_idx];
4821 eth_dev_dma_mzone_name(char *name, size_t len, uint16_t port_id, uint16_t queue_id,
4822 const char *ring_name)
4824 return snprintf(name, len, "eth_p%d_q%d_%s",
4825 port_id, queue_id, ring_name);
4828 const struct rte_memzone *
4829 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
4830 uint16_t queue_id, size_t size, unsigned align,
4833 char z_name[RTE_MEMZONE_NAMESIZE];
4834 const struct rte_memzone *mz;
4837 rc = eth_dev_dma_mzone_name(z_name, sizeof(z_name), dev->data->port_id,
4838 queue_id, ring_name);
4839 if (rc >= RTE_MEMZONE_NAMESIZE) {
4840 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4841 rte_errno = ENAMETOOLONG;
4845 mz = rte_memzone_lookup(z_name);
4847 if ((socket_id != SOCKET_ID_ANY && socket_id != mz->socket_id) ||
4849 ((uintptr_t)mz->addr & (align - 1)) != 0) {
4851 "memzone %s does not justify the requested attributes\n",
4859 return rte_memzone_reserve_aligned(z_name, size, socket_id,
4860 RTE_MEMZONE_IOVA_CONTIG, align);
4864 rte_eth_dma_zone_free(const struct rte_eth_dev *dev, const char *ring_name,
4867 char z_name[RTE_MEMZONE_NAMESIZE];
4868 const struct rte_memzone *mz;
4871 rc = eth_dev_dma_mzone_name(z_name, sizeof(z_name), dev->data->port_id,
4872 queue_id, ring_name);
4873 if (rc >= RTE_MEMZONE_NAMESIZE) {
4874 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4875 return -ENAMETOOLONG;
4878 mz = rte_memzone_lookup(z_name);
4880 rc = rte_memzone_free(mz);
4888 rte_eth_dev_create(struct rte_device *device, const char *name,
4889 size_t priv_data_size,
4890 ethdev_bus_specific_init ethdev_bus_specific_init,
4891 void *bus_init_params,
4892 ethdev_init_t ethdev_init, void *init_params)
4894 struct rte_eth_dev *ethdev;
4897 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
4899 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
4900 ethdev = rte_eth_dev_allocate(name);
4904 if (priv_data_size) {
4905 ethdev->data->dev_private = rte_zmalloc_socket(
4906 name, priv_data_size, RTE_CACHE_LINE_SIZE,
4909 if (!ethdev->data->dev_private) {
4911 "failed to allocate private data\n");
4917 ethdev = rte_eth_dev_attach_secondary(name);
4920 "secondary process attach failed, ethdev doesn't exist\n");
4925 ethdev->device = device;
4927 if (ethdev_bus_specific_init) {
4928 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
4931 "ethdev bus specific initialisation failed\n");
4936 retval = ethdev_init(ethdev, init_params);
4938 RTE_ETHDEV_LOG(ERR, "ethdev initialisation failed\n");
4942 rte_eth_dev_probing_finish(ethdev);
4947 rte_eth_dev_release_port(ethdev);
4952 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
4953 ethdev_uninit_t ethdev_uninit)
4957 ethdev = rte_eth_dev_allocated(ethdev->data->name);
4961 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
4963 ret = ethdev_uninit(ethdev);
4967 return rte_eth_dev_release_port(ethdev);
4971 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
4972 int epfd, int op, void *data)
4975 struct rte_eth_dev *dev;
4976 struct rte_intr_handle *intr_handle;
4979 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4980 dev = &rte_eth_devices[port_id];
4982 if (queue_id >= dev->data->nb_rx_queues) {
4983 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4987 if (!dev->intr_handle) {
4988 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4992 intr_handle = dev->intr_handle;
4993 if (!intr_handle->intr_vec) {
4994 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4998 vec = intr_handle->intr_vec[queue_id];
4999 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
5000 if (rc && rc != -EEXIST) {
5002 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
5003 port_id, queue_id, op, epfd, vec);
5011 rte_eth_dev_rx_intr_enable(uint16_t port_id,
5014 struct rte_eth_dev *dev;
5017 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5018 dev = &rte_eth_devices[port_id];
5020 ret = eth_dev_validate_rx_queue(dev, queue_id);
5024 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
5025 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id));
5029 rte_eth_dev_rx_intr_disable(uint16_t port_id,
5032 struct rte_eth_dev *dev;
5035 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5036 dev = &rte_eth_devices[port_id];
5038 ret = eth_dev_validate_rx_queue(dev, queue_id);
5042 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
5043 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id));
5047 const struct rte_eth_rxtx_callback *
5048 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
5049 rte_rx_callback_fn fn, void *user_param)
5051 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
5052 rte_errno = ENOTSUP;
5055 struct rte_eth_dev *dev;
5057 /* check input parameters */
5058 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
5059 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
5063 dev = &rte_eth_devices[port_id];
5064 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
5068 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
5076 cb->param = user_param;
5078 rte_spinlock_lock(ð_dev_rx_cb_lock);
5079 /* Add the callbacks in fifo order. */
5080 struct rte_eth_rxtx_callback *tail =
5081 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
5084 /* Stores to cb->fn and cb->param should complete before
5085 * cb is visible to data plane.
5088 &rte_eth_devices[port_id].post_rx_burst_cbs[queue_id],
5089 cb, __ATOMIC_RELEASE);
5094 /* Stores to cb->fn and cb->param should complete before
5095 * cb is visible to data plane.
5097 __atomic_store_n(&tail->next, cb, __ATOMIC_RELEASE);
5099 rte_spinlock_unlock(ð_dev_rx_cb_lock);
5104 const struct rte_eth_rxtx_callback *
5105 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
5106 rte_rx_callback_fn fn, void *user_param)
5108 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
5109 rte_errno = ENOTSUP;
5112 /* check input parameters */
5113 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
5114 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
5119 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
5127 cb->param = user_param;
5129 rte_spinlock_lock(ð_dev_rx_cb_lock);
5130 /* Add the callbacks at first position */
5131 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
5132 /* Stores to cb->fn, cb->param and cb->next should complete before
5133 * cb is visible to data plane threads.
5136 &rte_eth_devices[port_id].post_rx_burst_cbs[queue_id],
5137 cb, __ATOMIC_RELEASE);
5138 rte_spinlock_unlock(ð_dev_rx_cb_lock);
5143 const struct rte_eth_rxtx_callback *
5144 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
5145 rte_tx_callback_fn fn, void *user_param)
5147 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
5148 rte_errno = ENOTSUP;
5151 struct rte_eth_dev *dev;
5153 /* check input parameters */
5154 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
5155 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
5160 dev = &rte_eth_devices[port_id];
5161 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
5166 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
5174 cb->param = user_param;
5176 rte_spinlock_lock(ð_dev_tx_cb_lock);
5177 /* Add the callbacks in fifo order. */
5178 struct rte_eth_rxtx_callback *tail =
5179 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
5182 /* Stores to cb->fn and cb->param should complete before
5183 * cb is visible to data plane.
5186 &rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id],
5187 cb, __ATOMIC_RELEASE);
5192 /* Stores to cb->fn and cb->param should complete before
5193 * cb is visible to data plane.
5195 __atomic_store_n(&tail->next, cb, __ATOMIC_RELEASE);
5197 rte_spinlock_unlock(ð_dev_tx_cb_lock);
5203 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
5204 const struct rte_eth_rxtx_callback *user_cb)
5206 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
5209 /* Check input parameters. */
5210 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5211 if (user_cb == NULL ||
5212 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
5215 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
5216 struct rte_eth_rxtx_callback *cb;
5217 struct rte_eth_rxtx_callback **prev_cb;
5220 rte_spinlock_lock(ð_dev_rx_cb_lock);
5221 prev_cb = &dev->post_rx_burst_cbs[queue_id];
5222 for (; *prev_cb != NULL; prev_cb = &cb->next) {
5224 if (cb == user_cb) {
5225 /* Remove the user cb from the callback list. */
5226 __atomic_store_n(prev_cb, cb->next, __ATOMIC_RELAXED);
5231 rte_spinlock_unlock(ð_dev_rx_cb_lock);
5237 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
5238 const struct rte_eth_rxtx_callback *user_cb)
5240 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
5243 /* Check input parameters. */
5244 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5245 if (user_cb == NULL ||
5246 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
5249 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
5251 struct rte_eth_rxtx_callback *cb;
5252 struct rte_eth_rxtx_callback **prev_cb;
5254 rte_spinlock_lock(ð_dev_tx_cb_lock);
5255 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
5256 for (; *prev_cb != NULL; prev_cb = &cb->next) {
5258 if (cb == user_cb) {
5259 /* Remove the user cb from the callback list. */
5260 __atomic_store_n(prev_cb, cb->next, __ATOMIC_RELAXED);
5265 rte_spinlock_unlock(ð_dev_tx_cb_lock);
5271 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
5272 struct rte_eth_rxq_info *qinfo)
5274 struct rte_eth_dev *dev;
5276 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5277 dev = &rte_eth_devices[port_id];
5279 if (queue_id >= dev->data->nb_rx_queues) {
5280 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
5284 if (qinfo == NULL) {
5285 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u Rx queue %u info to NULL\n",
5290 if (dev->data->rx_queues == NULL ||
5291 dev->data->rx_queues[queue_id] == NULL) {
5293 "Rx queue %"PRIu16" of device with port_id=%"
5294 PRIu16" has not been setup\n",
5299 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
5300 RTE_ETHDEV_LOG(INFO,
5301 "Can't get hairpin Rx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
5306 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
5308 memset(qinfo, 0, sizeof(*qinfo));
5309 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
5310 qinfo->queue_state = dev->data->rx_queue_state[queue_id];
5316 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
5317 struct rte_eth_txq_info *qinfo)
5319 struct rte_eth_dev *dev;
5321 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5322 dev = &rte_eth_devices[port_id];
5324 if (queue_id >= dev->data->nb_tx_queues) {
5325 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
5329 if (qinfo == NULL) {
5330 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u Tx queue %u info to NULL\n",
5335 if (dev->data->tx_queues == NULL ||
5336 dev->data->tx_queues[queue_id] == NULL) {
5338 "Tx queue %"PRIu16" of device with port_id=%"
5339 PRIu16" has not been setup\n",
5344 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
5345 RTE_ETHDEV_LOG(INFO,
5346 "Can't get hairpin Tx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
5351 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
5353 memset(qinfo, 0, sizeof(*qinfo));
5354 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
5355 qinfo->queue_state = dev->data->tx_queue_state[queue_id];
5361 rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
5362 struct rte_eth_burst_mode *mode)
5364 struct rte_eth_dev *dev;
5366 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5367 dev = &rte_eth_devices[port_id];
5369 if (queue_id >= dev->data->nb_rx_queues) {
5370 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
5376 "Cannot get ethdev port %u Rx queue %u burst mode to NULL\n",
5381 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_burst_mode_get, -ENOTSUP);
5382 memset(mode, 0, sizeof(*mode));
5383 return eth_err(port_id,
5384 dev->dev_ops->rx_burst_mode_get(dev, queue_id, mode));
5388 rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
5389 struct rte_eth_burst_mode *mode)
5391 struct rte_eth_dev *dev;
5393 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5394 dev = &rte_eth_devices[port_id];
5396 if (queue_id >= dev->data->nb_tx_queues) {
5397 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
5403 "Cannot get ethdev port %u Tx queue %u burst mode to NULL\n",
5408 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_burst_mode_get, -ENOTSUP);
5409 memset(mode, 0, sizeof(*mode));
5410 return eth_err(port_id,
5411 dev->dev_ops->tx_burst_mode_get(dev, queue_id, mode));
5415 rte_eth_get_monitor_addr(uint16_t port_id, uint16_t queue_id,
5416 struct rte_power_monitor_cond *pmc)
5418 struct rte_eth_dev *dev;
5420 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5421 dev = &rte_eth_devices[port_id];
5423 if (queue_id >= dev->data->nb_rx_queues) {
5424 RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u\n", queue_id);
5430 "Cannot get ethdev port %u Rx queue %u power monitor condition to NULL\n",
5435 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_monitor_addr, -ENOTSUP);
5436 return eth_err(port_id,
5437 dev->dev_ops->get_monitor_addr(dev->data->rx_queues[queue_id], pmc));
5441 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
5442 struct rte_ether_addr *mc_addr_set,
5443 uint32_t nb_mc_addr)
5445 struct rte_eth_dev *dev;
5447 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5448 dev = &rte_eth_devices[port_id];
5450 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
5451 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
5452 mc_addr_set, nb_mc_addr));
5456 rte_eth_timesync_enable(uint16_t port_id)
5458 struct rte_eth_dev *dev;
5460 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5461 dev = &rte_eth_devices[port_id];
5463 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
5464 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
5468 rte_eth_timesync_disable(uint16_t port_id)
5470 struct rte_eth_dev *dev;
5472 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5473 dev = &rte_eth_devices[port_id];
5475 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
5476 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
5480 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
5483 struct rte_eth_dev *dev;
5485 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5486 dev = &rte_eth_devices[port_id];
5488 if (timestamp == NULL) {
5490 "Cannot read ethdev port %u Rx timestamp to NULL\n",
5495 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
5496 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
5497 (dev, timestamp, flags));
5501 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
5502 struct timespec *timestamp)
5504 struct rte_eth_dev *dev;
5506 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5507 dev = &rte_eth_devices[port_id];
5509 if (timestamp == NULL) {
5511 "Cannot read ethdev port %u Tx timestamp to NULL\n",
5516 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
5517 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
5522 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
5524 struct rte_eth_dev *dev;
5526 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5527 dev = &rte_eth_devices[port_id];
5529 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
5530 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev, delta));
5534 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
5536 struct rte_eth_dev *dev;
5538 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5539 dev = &rte_eth_devices[port_id];
5541 if (timestamp == NULL) {
5543 "Cannot read ethdev port %u timesync time to NULL\n",
5548 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
5549 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
5554 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
5556 struct rte_eth_dev *dev;
5558 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5559 dev = &rte_eth_devices[port_id];
5561 if (timestamp == NULL) {
5563 "Cannot write ethdev port %u timesync from NULL time\n",
5568 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
5569 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
5574 rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
5576 struct rte_eth_dev *dev;
5578 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5579 dev = &rte_eth_devices[port_id];
5581 if (clock == NULL) {
5582 RTE_ETHDEV_LOG(ERR, "Cannot read ethdev port %u clock to NULL\n",
5587 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->read_clock, -ENOTSUP);
5588 return eth_err(port_id, (*dev->dev_ops->read_clock)(dev, clock));
5592 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
5594 struct rte_eth_dev *dev;
5596 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5597 dev = &rte_eth_devices[port_id];
5601 "Cannot get ethdev port %u register info to NULL\n",
5606 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
5607 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
5611 rte_eth_dev_get_eeprom_length(uint16_t port_id)
5613 struct rte_eth_dev *dev;
5615 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5616 dev = &rte_eth_devices[port_id];
5618 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
5619 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
5623 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
5625 struct rte_eth_dev *dev;
5627 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5628 dev = &rte_eth_devices[port_id];
5632 "Cannot get ethdev port %u EEPROM info to NULL\n",
5637 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
5638 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
5642 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
5644 struct rte_eth_dev *dev;
5646 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5647 dev = &rte_eth_devices[port_id];
5651 "Cannot set ethdev port %u EEPROM from NULL info\n",
5656 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
5657 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
5661 rte_eth_dev_get_module_info(uint16_t port_id,
5662 struct rte_eth_dev_module_info *modinfo)
5664 struct rte_eth_dev *dev;
5666 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5667 dev = &rte_eth_devices[port_id];
5669 if (modinfo == NULL) {
5671 "Cannot get ethdev port %u EEPROM module info to NULL\n",
5676 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
5677 return (*dev->dev_ops->get_module_info)(dev, modinfo);
5681 rte_eth_dev_get_module_eeprom(uint16_t port_id,
5682 struct rte_dev_eeprom_info *info)
5684 struct rte_eth_dev *dev;
5686 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5687 dev = &rte_eth_devices[port_id];
5691 "Cannot get ethdev port %u module EEPROM info to NULL\n",
5696 if (info->data == NULL) {
5698 "Cannot get ethdev port %u module EEPROM data to NULL\n",
5703 if (info->length == 0) {
5705 "Cannot get ethdev port %u module EEPROM to data with zero size\n",
5710 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
5711 return (*dev->dev_ops->get_module_eeprom)(dev, info);
5715 rte_eth_dev_get_dcb_info(uint16_t port_id,
5716 struct rte_eth_dcb_info *dcb_info)
5718 struct rte_eth_dev *dev;
5720 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5721 dev = &rte_eth_devices[port_id];
5723 if (dcb_info == NULL) {
5725 "Cannot get ethdev port %u DCB info to NULL\n",
5730 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
5732 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
5733 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
5737 eth_dev_adjust_nb_desc(uint16_t *nb_desc,
5738 const struct rte_eth_desc_lim *desc_lim)
5740 if (desc_lim->nb_align != 0)
5741 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
5743 if (desc_lim->nb_max != 0)
5744 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
5746 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
5750 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
5751 uint16_t *nb_rx_desc,
5752 uint16_t *nb_tx_desc)
5754 struct rte_eth_dev_info dev_info;
5757 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5759 ret = rte_eth_dev_info_get(port_id, &dev_info);
5763 if (nb_rx_desc != NULL)
5764 eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
5766 if (nb_tx_desc != NULL)
5767 eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
5773 rte_eth_dev_hairpin_capability_get(uint16_t port_id,
5774 struct rte_eth_hairpin_cap *cap)
5776 struct rte_eth_dev *dev;
5778 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5779 dev = &rte_eth_devices[port_id];
5783 "Cannot get ethdev port %u hairpin capability to NULL\n",
5788 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_cap_get, -ENOTSUP);
5789 memset(cap, 0, sizeof(*cap));
5790 return eth_err(port_id, (*dev->dev_ops->hairpin_cap_get)(dev, cap));
5794 rte_eth_dev_is_rx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5796 if (dev->data->rx_queue_state[queue_id] == RTE_ETH_QUEUE_STATE_HAIRPIN)
5802 rte_eth_dev_is_tx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5804 if (dev->data->tx_queue_state[queue_id] == RTE_ETH_QUEUE_STATE_HAIRPIN)
5810 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
5812 struct rte_eth_dev *dev;
5814 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5815 dev = &rte_eth_devices[port_id];
5819 "Cannot test ethdev port %u mempool operation from NULL pool\n",
5824 if (*dev->dev_ops->pool_ops_supported == NULL)
5825 return 1; /* all pools are supported */
5827 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
5831 * A set of values to describe the possible states of a switch domain.
5833 enum rte_eth_switch_domain_state {
5834 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
5835 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
5839 * Array of switch domains available for allocation. Array is sized to
5840 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
5841 * ethdev ports in a single process.
5843 static struct rte_eth_dev_switch {
5844 enum rte_eth_switch_domain_state state;
5845 } eth_dev_switch_domains[RTE_MAX_ETHPORTS];
5848 rte_eth_switch_domain_alloc(uint16_t *domain_id)
5852 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
5854 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
5855 if (eth_dev_switch_domains[i].state ==
5856 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
5857 eth_dev_switch_domains[i].state =
5858 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
5868 rte_eth_switch_domain_free(uint16_t domain_id)
5870 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
5871 domain_id >= RTE_MAX_ETHPORTS)
5874 if (eth_dev_switch_domains[domain_id].state !=
5875 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
5878 eth_dev_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
5884 eth_dev_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
5887 struct rte_kvargs_pair *pair;
5890 arglist->str = strdup(str_in);
5891 if (arglist->str == NULL)
5894 letter = arglist->str;
5897 pair = &arglist->pairs[0];
5900 case 0: /* Initial */
5903 else if (*letter == '\0')
5910 case 1: /* Parsing key */
5911 if (*letter == '=') {
5913 pair->value = letter + 1;
5915 } else if (*letter == ',' || *letter == '\0')
5920 case 2: /* Parsing value */
5923 else if (*letter == ',') {
5926 pair = &arglist->pairs[arglist->count];
5928 } else if (*letter == '\0') {
5931 pair = &arglist->pairs[arglist->count];
5936 case 3: /* Parsing list */
5939 else if (*letter == '\0')
5948 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
5950 struct rte_kvargs args;
5951 struct rte_kvargs_pair *pair;
5955 memset(eth_da, 0, sizeof(*eth_da));
5957 result = eth_dev_devargs_tokenise(&args, dargs);
5961 for (i = 0; i < args.count; i++) {
5962 pair = &args.pairs[i];
5963 if (strcmp("representor", pair->key) == 0) {
5964 if (eth_da->type != RTE_ETH_REPRESENTOR_NONE) {
5965 RTE_LOG(ERR, EAL, "duplicated representor key: %s\n",
5970 result = rte_eth_devargs_parse_representor_ports(
5971 pair->value, eth_da);
5985 rte_eth_representor_id_get(const struct rte_eth_dev *ethdev,
5986 enum rte_eth_representor_type type,
5987 int controller, int pf, int representor_port,
5990 int ret, n, i, count;
5991 struct rte_eth_representor_info *info = NULL;
5994 if (type == RTE_ETH_REPRESENTOR_NONE)
5996 if (repr_id == NULL)
5999 /* Get PMD representor range info. */
6000 ret = rte_eth_representor_info_get(ethdev->data->port_id, NULL);
6001 if (ret == -ENOTSUP && type == RTE_ETH_REPRESENTOR_VF &&
6002 controller == -1 && pf == -1) {
6003 /* Direct mapping for legacy VF representor. */
6004 *repr_id = representor_port;
6006 } else if (ret < 0) {
6010 size = sizeof(*info) + n * sizeof(info->ranges[0]);
6011 info = calloc(1, size);
6014 ret = rte_eth_representor_info_get(ethdev->data->port_id, info);
6018 /* Default controller and pf to caller. */
6019 if (controller == -1)
6020 controller = info->controller;
6024 /* Locate representor ID. */
6026 for (i = 0; i < n; ++i) {
6027 if (info->ranges[i].type != type)
6029 if (info->ranges[i].controller != controller)
6031 if (info->ranges[i].id_end < info->ranges[i].id_base) {
6032 RTE_LOG(WARNING, EAL, "Port %hu invalid representor ID Range %u - %u, entry %d\n",
6033 ethdev->data->port_id, info->ranges[i].id_base,
6034 info->ranges[i].id_end, i);
6038 count = info->ranges[i].id_end - info->ranges[i].id_base + 1;
6039 switch (info->ranges[i].type) {
6040 case RTE_ETH_REPRESENTOR_PF:
6041 if (pf < info->ranges[i].pf ||
6042 pf >= info->ranges[i].pf + count)
6044 *repr_id = info->ranges[i].id_base +
6045 (pf - info->ranges[i].pf);
6048 case RTE_ETH_REPRESENTOR_VF:
6049 if (info->ranges[i].pf != pf)
6051 if (representor_port < info->ranges[i].vf ||
6052 representor_port >= info->ranges[i].vf + count)
6054 *repr_id = info->ranges[i].id_base +
6055 (representor_port - info->ranges[i].vf);
6058 case RTE_ETH_REPRESENTOR_SF:
6059 if (info->ranges[i].pf != pf)
6061 if (representor_port < info->ranges[i].sf ||
6062 representor_port >= info->ranges[i].sf + count)
6064 *repr_id = info->ranges[i].id_base +
6065 (representor_port - info->ranges[i].sf);
6078 eth_dev_handle_port_list(const char *cmd __rte_unused,
6079 const char *params __rte_unused,
6080 struct rte_tel_data *d)
6084 rte_tel_data_start_array(d, RTE_TEL_INT_VAL);
6085 RTE_ETH_FOREACH_DEV(port_id)
6086 rte_tel_data_add_array_int(d, port_id);
6091 eth_dev_add_port_queue_stats(struct rte_tel_data *d, uint64_t *q_stats,
6092 const char *stat_name)
6095 struct rte_tel_data *q_data = rte_tel_data_alloc();
6096 rte_tel_data_start_array(q_data, RTE_TEL_U64_VAL);
6097 for (q = 0; q < RTE_ETHDEV_QUEUE_STAT_CNTRS; q++)
6098 rte_tel_data_add_array_u64(q_data, q_stats[q]);
6099 rte_tel_data_add_dict_container(d, stat_name, q_data, 0);
6102 #define ADD_DICT_STAT(stats, s) rte_tel_data_add_dict_u64(d, #s, stats.s)
6105 eth_dev_handle_port_stats(const char *cmd __rte_unused,
6107 struct rte_tel_data *d)
6109 struct rte_eth_stats stats;
6112 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
6115 port_id = atoi(params);
6116 if (!rte_eth_dev_is_valid_port(port_id))
6119 ret = rte_eth_stats_get(port_id, &stats);
6123 rte_tel_data_start_dict(d);
6124 ADD_DICT_STAT(stats, ipackets);
6125 ADD_DICT_STAT(stats, opackets);
6126 ADD_DICT_STAT(stats, ibytes);
6127 ADD_DICT_STAT(stats, obytes);
6128 ADD_DICT_STAT(stats, imissed);
6129 ADD_DICT_STAT(stats, ierrors);
6130 ADD_DICT_STAT(stats, oerrors);
6131 ADD_DICT_STAT(stats, rx_nombuf);
6132 eth_dev_add_port_queue_stats(d, stats.q_ipackets, "q_ipackets");
6133 eth_dev_add_port_queue_stats(d, stats.q_opackets, "q_opackets");
6134 eth_dev_add_port_queue_stats(d, stats.q_ibytes, "q_ibytes");
6135 eth_dev_add_port_queue_stats(d, stats.q_obytes, "q_obytes");
6136 eth_dev_add_port_queue_stats(d, stats.q_errors, "q_errors");
6142 eth_dev_handle_port_xstats(const char *cmd __rte_unused,
6144 struct rte_tel_data *d)
6146 struct rte_eth_xstat *eth_xstats;
6147 struct rte_eth_xstat_name *xstat_names;
6148 int port_id, num_xstats;
6152 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
6155 port_id = strtoul(params, &end_param, 0);
6156 if (*end_param != '\0')
6157 RTE_ETHDEV_LOG(NOTICE,
6158 "Extra parameters passed to ethdev telemetry command, ignoring");
6159 if (!rte_eth_dev_is_valid_port(port_id))
6162 num_xstats = rte_eth_xstats_get(port_id, NULL, 0);
6166 /* use one malloc for both names and stats */
6167 eth_xstats = malloc((sizeof(struct rte_eth_xstat) +
6168 sizeof(struct rte_eth_xstat_name)) * num_xstats);
6169 if (eth_xstats == NULL)
6171 xstat_names = (void *)ð_xstats[num_xstats];
6173 ret = rte_eth_xstats_get_names(port_id, xstat_names, num_xstats);
6174 if (ret < 0 || ret > num_xstats) {
6179 ret = rte_eth_xstats_get(port_id, eth_xstats, num_xstats);
6180 if (ret < 0 || ret > num_xstats) {
6185 rte_tel_data_start_dict(d);
6186 for (i = 0; i < num_xstats; i++)
6187 rte_tel_data_add_dict_u64(d, xstat_names[i].name,
6188 eth_xstats[i].value);
6193 eth_dev_handle_port_link_status(const char *cmd __rte_unused,
6195 struct rte_tel_data *d)
6197 static const char *status_str = "status";
6199 struct rte_eth_link link;
6202 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
6205 port_id = strtoul(params, &end_param, 0);
6206 if (*end_param != '\0')
6207 RTE_ETHDEV_LOG(NOTICE,
6208 "Extra parameters passed to ethdev telemetry command, ignoring");
6209 if (!rte_eth_dev_is_valid_port(port_id))
6212 ret = rte_eth_link_get_nowait(port_id, &link);
6216 rte_tel_data_start_dict(d);
6217 if (!link.link_status) {
6218 rte_tel_data_add_dict_string(d, status_str, "DOWN");
6221 rte_tel_data_add_dict_string(d, status_str, "UP");
6222 rte_tel_data_add_dict_u64(d, "speed", link.link_speed);
6223 rte_tel_data_add_dict_string(d, "duplex",
6224 (link.link_duplex == ETH_LINK_FULL_DUPLEX) ?
6225 "full-duplex" : "half-duplex");
6230 rte_eth_hairpin_queue_peer_update(uint16_t peer_port, uint16_t peer_queue,
6231 struct rte_hairpin_peer_info *cur_info,
6232 struct rte_hairpin_peer_info *peer_info,
6235 struct rte_eth_dev *dev;
6237 /* Current queue information is not mandatory. */
6238 if (peer_info == NULL)
6241 /* No need to check the validity again. */
6242 dev = &rte_eth_devices[peer_port];
6243 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_queue_peer_update,
6246 return (*dev->dev_ops->hairpin_queue_peer_update)(dev, peer_queue,
6247 cur_info, peer_info, direction);
6251 rte_eth_hairpin_queue_peer_bind(uint16_t cur_port, uint16_t cur_queue,
6252 struct rte_hairpin_peer_info *peer_info,
6255 struct rte_eth_dev *dev;
6257 if (peer_info == NULL)
6260 /* No need to check the validity again. */
6261 dev = &rte_eth_devices[cur_port];
6262 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_queue_peer_bind,
6265 return (*dev->dev_ops->hairpin_queue_peer_bind)(dev, cur_queue,
6266 peer_info, direction);
6270 rte_eth_hairpin_queue_peer_unbind(uint16_t cur_port, uint16_t cur_queue,
6273 struct rte_eth_dev *dev;
6275 /* No need to check the validity again. */
6276 dev = &rte_eth_devices[cur_port];
6277 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_queue_peer_unbind,
6280 return (*dev->dev_ops->hairpin_queue_peer_unbind)(dev, cur_queue,
6285 rte_eth_representor_info_get(uint16_t port_id,
6286 struct rte_eth_representor_info *info)
6288 struct rte_eth_dev *dev;
6290 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
6291 dev = &rte_eth_devices[port_id];
6293 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->representor_info_get, -ENOTSUP);
6294 return eth_err(port_id, (*dev->dev_ops->representor_info_get)(dev, info));
6297 RTE_LOG_REGISTER(rte_eth_dev_logtype, lib.ethdev, INFO);
6299 RTE_INIT(ethdev_init_telemetry)
6301 rte_telemetry_register_cmd("/ethdev/list", eth_dev_handle_port_list,
6302 "Returns list of available ethdev ports. Takes no parameters");
6303 rte_telemetry_register_cmd("/ethdev/stats", eth_dev_handle_port_stats,
6304 "Returns the common stats for a port. Parameters: int port_id");
6305 rte_telemetry_register_cmd("/ethdev/xstats", eth_dev_handle_port_xstats,
6306 "Returns the extended stats for a port. Parameters: int port_id");
6307 rte_telemetry_register_cmd("/ethdev/link_status",
6308 eth_dev_handle_port_link_status,
6309 "Returns the link status for a port. Parameters: int port_id");