1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
12 #include <sys/queue.h>
14 #include <rte_byteorder.h>
16 #include <rte_debug.h>
17 #include <rte_interrupts.h>
18 #include <rte_memory.h>
19 #include <rte_memcpy.h>
20 #include <rte_memzone.h>
21 #include <rte_launch.h>
23 #include <rte_per_lcore.h>
24 #include <rte_lcore.h>
25 #include <rte_branch_prediction.h>
26 #include <rte_common.h>
27 #include <rte_mempool.h>
28 #include <rte_malloc.h>
30 #include <rte_errno.h>
31 #include <rte_spinlock.h>
32 #include <rte_string_fns.h>
33 #include <rte_class.h>
34 #include <rte_ether.h>
35 #include <rte_telemetry.h>
37 #include "rte_ethdev_trace.h"
38 #include "rte_ethdev.h"
39 #include "ethdev_driver.h"
40 #include "ethdev_profile.h"
41 #include "ethdev_private.h"
43 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
45 /* public fast-path API */
46 struct rte_eth_fp_ops rte_eth_fp_ops[RTE_MAX_ETHPORTS];
48 /* spinlock for add/remove Rx callbacks */
49 static rte_spinlock_t eth_dev_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
51 /* spinlock for add/remove Tx callbacks */
52 static rte_spinlock_t eth_dev_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
54 /* store statistics names and its offset in stats structure */
55 struct rte_eth_xstats_name_off {
56 char name[RTE_ETH_XSTATS_NAME_SIZE];
60 static const struct rte_eth_xstats_name_off eth_dev_stats_strings[] = {
61 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
62 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
63 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
64 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
65 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
66 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
67 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
68 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
72 #define RTE_NB_STATS RTE_DIM(eth_dev_stats_strings)
74 static const struct rte_eth_xstats_name_off eth_dev_rxq_stats_strings[] = {
75 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
76 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
77 {"errors", offsetof(struct rte_eth_stats, q_errors)},
80 #define RTE_NB_RXQ_STATS RTE_DIM(eth_dev_rxq_stats_strings)
82 static const struct rte_eth_xstats_name_off eth_dev_txq_stats_strings[] = {
83 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
84 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
86 #define RTE_NB_TXQ_STATS RTE_DIM(eth_dev_txq_stats_strings)
88 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
89 { RTE_ETH_RX_OFFLOAD_##_name, #_name }
94 } eth_dev_rx_offload_names[] = {
95 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
96 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
97 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
98 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
99 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
100 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
101 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
102 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
103 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
104 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
105 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
106 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
107 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
108 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
109 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
110 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
111 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
112 RTE_RX_OFFLOAD_BIT2STR(RSS_HASH),
113 RTE_RX_OFFLOAD_BIT2STR(BUFFER_SPLIT),
116 #undef RTE_RX_OFFLOAD_BIT2STR
117 #undef RTE_ETH_RX_OFFLOAD_BIT2STR
119 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
120 { RTE_ETH_TX_OFFLOAD_##_name, #_name }
122 static const struct {
125 } eth_dev_tx_offload_names[] = {
126 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
127 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
128 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
129 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
130 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
131 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
132 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
133 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
134 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
135 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
136 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
137 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
138 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
139 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
140 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
141 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
142 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
143 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
144 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
145 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
146 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(SEND_ON_TIMESTAMP),
150 #undef RTE_TX_OFFLOAD_BIT2STR
152 static const struct {
155 } rte_eth_dev_capa_names[] = {
156 {RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP, "RUNTIME_RX_QUEUE_SETUP"},
157 {RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP, "RUNTIME_TX_QUEUE_SETUP"},
158 {RTE_ETH_DEV_CAPA_RXQ_SHARE, "RXQ_SHARE"},
159 {RTE_ETH_DEV_CAPA_FLOW_RULE_KEEP, "FLOW_RULE_KEEP"},
160 {RTE_ETH_DEV_CAPA_FLOW_SHARED_OBJECT_KEEP, "FLOW_SHARED_OBJECT_KEEP"},
169 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
172 struct rte_devargs devargs;
173 const char *bus_param_key;
174 char *bus_str = NULL;
175 char *cls_str = NULL;
179 RTE_ETHDEV_LOG(ERR, "Cannot initialize NULL iterator\n");
183 if (devargs_str == NULL) {
185 "Cannot initialize iterator from NULL device description string\n");
189 memset(iter, 0, sizeof(*iter));
190 memset(&devargs, 0, sizeof(devargs));
193 * The devargs string may use various syntaxes:
194 * - 0000:08:00.0,representor=[1-3]
195 * - pci:0000:06:00.0,representor=[0,5]
196 * - class=eth,mac=00:11:22:33:44:55
197 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
201 * Handle pure class filter (i.e. without any bus-level argument),
202 * from future new syntax.
203 * rte_devargs_parse() is not yet supporting the new syntax,
204 * that's why this simple case is temporarily parsed here.
206 #define iter_anybus_str "class=eth,"
207 if (strncmp(devargs_str, iter_anybus_str,
208 strlen(iter_anybus_str)) == 0) {
209 iter->cls_str = devargs_str + strlen(iter_anybus_str);
213 /* Split bus, device and parameters. */
214 ret = rte_devargs_parse(&devargs, devargs_str);
219 * Assume parameters of old syntax can match only at ethdev level.
220 * Extra parameters will be ignored, thanks to "+" prefix.
222 str_size = strlen(devargs.args) + 2;
223 cls_str = malloc(str_size);
224 if (cls_str == NULL) {
228 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
229 if (ret != str_size - 1) {
233 iter->cls_str = cls_str;
235 iter->bus = devargs.bus;
236 if (iter->bus->dev_iterate == NULL) {
241 /* Convert bus args to new syntax for use with new API dev_iterate. */
242 if ((strcmp(iter->bus->name, "vdev") == 0) ||
243 (strcmp(iter->bus->name, "fslmc") == 0) ||
244 (strcmp(iter->bus->name, "dpaa_bus") == 0)) {
245 bus_param_key = "name";
246 } else if (strcmp(iter->bus->name, "pci") == 0) {
247 bus_param_key = "addr";
252 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
253 bus_str = malloc(str_size);
254 if (bus_str == NULL) {
258 ret = snprintf(bus_str, str_size, "%s=%s",
259 bus_param_key, devargs.name);
260 if (ret != str_size - 1) {
264 iter->bus_str = bus_str;
267 iter->cls = rte_class_find_by_name("eth");
268 rte_devargs_reset(&devargs);
273 RTE_ETHDEV_LOG(ERR, "Bus %s does not support iterating.\n",
275 rte_devargs_reset(&devargs);
282 rte_eth_iterator_next(struct rte_dev_iterator *iter)
286 "Cannot get next device from NULL iterator\n");
287 return RTE_MAX_ETHPORTS;
290 if (iter->cls == NULL) /* invalid ethdev iterator */
291 return RTE_MAX_ETHPORTS;
293 do { /* loop to try all matching rte_device */
294 /* If not pure ethdev filter and */
295 if (iter->bus != NULL &&
296 /* not in middle of rte_eth_dev iteration, */
297 iter->class_device == NULL) {
298 /* get next rte_device to try. */
299 iter->device = iter->bus->dev_iterate(
300 iter->device, iter->bus_str, iter);
301 if (iter->device == NULL)
302 break; /* no more rte_device candidate */
304 /* A device is matching bus part, need to check ethdev part. */
305 iter->class_device = iter->cls->dev_iterate(
306 iter->class_device, iter->cls_str, iter);
307 if (iter->class_device != NULL)
308 return eth_dev_to_id(iter->class_device); /* match */
309 } while (iter->bus != NULL); /* need to try next rte_device */
311 /* No more ethdev port to iterate. */
312 rte_eth_iterator_cleanup(iter);
313 return RTE_MAX_ETHPORTS;
317 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
320 RTE_ETHDEV_LOG(ERR, "Cannot do clean up from NULL iterator\n");
324 if (iter->bus_str == NULL)
325 return; /* nothing to free in pure class filter */
326 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
327 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
328 memset(iter, 0, sizeof(*iter));
332 rte_eth_find_next(uint16_t port_id)
334 while (port_id < RTE_MAX_ETHPORTS &&
335 rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED)
338 if (port_id >= RTE_MAX_ETHPORTS)
339 return RTE_MAX_ETHPORTS;
345 * Macro to iterate over all valid ports for internal usage.
346 * Note: RTE_ETH_FOREACH_DEV is different because filtering owned ports.
348 #define RTE_ETH_FOREACH_VALID_DEV(port_id) \
349 for (port_id = rte_eth_find_next(0); \
350 port_id < RTE_MAX_ETHPORTS; \
351 port_id = rte_eth_find_next(port_id + 1))
354 rte_eth_find_next_of(uint16_t port_id, const struct rte_device *parent)
356 port_id = rte_eth_find_next(port_id);
357 while (port_id < RTE_MAX_ETHPORTS &&
358 rte_eth_devices[port_id].device != parent)
359 port_id = rte_eth_find_next(port_id + 1);
365 rte_eth_find_next_sibling(uint16_t port_id, uint16_t ref_port_id)
367 RTE_ETH_VALID_PORTID_OR_ERR_RET(ref_port_id, RTE_MAX_ETHPORTS);
368 return rte_eth_find_next_of(port_id,
369 rte_eth_devices[ref_port_id].device);
373 eth_dev_is_allocated(const struct rte_eth_dev *ethdev)
375 return ethdev->data->name[0] != '\0';
379 rte_eth_dev_is_valid_port(uint16_t port_id)
381 if (port_id >= RTE_MAX_ETHPORTS ||
382 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
389 eth_is_valid_owner_id(uint64_t owner_id)
391 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
392 eth_dev_shared_data->next_owner_id <= owner_id)
398 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
400 port_id = rte_eth_find_next(port_id);
401 while (port_id < RTE_MAX_ETHPORTS &&
402 rte_eth_devices[port_id].data->owner.id != owner_id)
403 port_id = rte_eth_find_next(port_id + 1);
409 rte_eth_dev_owner_new(uint64_t *owner_id)
411 if (owner_id == NULL) {
412 RTE_ETHDEV_LOG(ERR, "Cannot get new owner ID to NULL\n");
416 eth_dev_shared_data_prepare();
418 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
420 *owner_id = eth_dev_shared_data->next_owner_id++;
422 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
427 eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
428 const struct rte_eth_dev_owner *new_owner)
430 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
431 struct rte_eth_dev_owner *port_owner;
433 if (port_id >= RTE_MAX_ETHPORTS || !eth_dev_is_allocated(ethdev)) {
434 RTE_ETHDEV_LOG(ERR, "Port ID %"PRIu16" is not allocated\n",
439 if (new_owner == NULL) {
441 "Cannot set ethdev port %u owner from NULL owner\n",
446 if (!eth_is_valid_owner_id(new_owner->id) &&
447 !eth_is_valid_owner_id(old_owner_id)) {
449 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
450 old_owner_id, new_owner->id);
454 port_owner = &rte_eth_devices[port_id].data->owner;
455 if (port_owner->id != old_owner_id) {
457 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
458 port_id, port_owner->name, port_owner->id);
462 /* can not truncate (same structure) */
463 strlcpy(port_owner->name, new_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN);
465 port_owner->id = new_owner->id;
467 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
468 port_id, new_owner->name, new_owner->id);
474 rte_eth_dev_owner_set(const uint16_t port_id,
475 const struct rte_eth_dev_owner *owner)
479 eth_dev_shared_data_prepare();
481 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
483 ret = eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
485 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
490 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
492 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
493 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
496 eth_dev_shared_data_prepare();
498 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
500 ret = eth_dev_owner_set(port_id, owner_id, &new_owner);
502 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
507 rte_eth_dev_owner_delete(const uint64_t owner_id)
512 eth_dev_shared_data_prepare();
514 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
516 if (eth_is_valid_owner_id(owner_id)) {
517 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++) {
518 struct rte_eth_dev_data *data =
519 rte_eth_devices[port_id].data;
520 if (data != NULL && data->owner.id == owner_id)
521 memset(&data->owner, 0,
522 sizeof(struct rte_eth_dev_owner));
524 RTE_ETHDEV_LOG(NOTICE,
525 "All port owners owned by %016"PRIx64" identifier have removed\n",
529 "Invalid owner ID=%016"PRIx64"\n",
534 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
540 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
542 struct rte_eth_dev *ethdev;
544 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
545 ethdev = &rte_eth_devices[port_id];
547 if (!eth_dev_is_allocated(ethdev)) {
548 RTE_ETHDEV_LOG(ERR, "Port ID %"PRIu16" is not allocated\n",
554 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u owner to NULL\n",
559 eth_dev_shared_data_prepare();
561 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
562 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
563 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
569 rte_eth_dev_socket_id(uint16_t port_id)
571 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
572 return rte_eth_devices[port_id].data->numa_node;
576 rte_eth_dev_get_sec_ctx(uint16_t port_id)
578 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
579 return rte_eth_devices[port_id].security_ctx;
583 rte_eth_dev_count_avail(void)
590 RTE_ETH_FOREACH_DEV(p)
597 rte_eth_dev_count_total(void)
599 uint16_t port, count = 0;
601 RTE_ETH_FOREACH_VALID_DEV(port)
608 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
612 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
615 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u name to NULL\n",
620 /* shouldn't check 'rte_eth_devices[i].data',
621 * because it might be overwritten by VDEV PMD */
622 tmp = eth_dev_shared_data->data[port_id].name;
628 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
633 RTE_ETHDEV_LOG(ERR, "Cannot get port ID from NULL name");
637 if (port_id == NULL) {
639 "Cannot get port ID to NULL for %s\n", name);
643 RTE_ETH_FOREACH_VALID_DEV(pid)
644 if (!strcmp(name, eth_dev_shared_data->data[pid].name)) {
653 eth_err(uint16_t port_id, int ret)
657 if (rte_eth_dev_is_removed(port_id))
663 eth_dev_validate_rx_queue(const struct rte_eth_dev *dev, uint16_t rx_queue_id)
667 if (rx_queue_id >= dev->data->nb_rx_queues) {
668 port_id = dev->data->port_id;
670 "Invalid Rx queue_id=%u of device with port_id=%u\n",
671 rx_queue_id, port_id);
675 if (dev->data->rx_queues[rx_queue_id] == NULL) {
676 port_id = dev->data->port_id;
678 "Queue %u of device with port_id=%u has not been setup\n",
679 rx_queue_id, port_id);
687 eth_dev_validate_tx_queue(const struct rte_eth_dev *dev, uint16_t tx_queue_id)
691 if (tx_queue_id >= dev->data->nb_tx_queues) {
692 port_id = dev->data->port_id;
694 "Invalid Tx queue_id=%u of device with port_id=%u\n",
695 tx_queue_id, port_id);
699 if (dev->data->tx_queues[tx_queue_id] == NULL) {
700 port_id = dev->data->port_id;
702 "Queue %u of device with port_id=%u has not been setup\n",
703 tx_queue_id, port_id);
711 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
713 struct rte_eth_dev *dev;
716 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
717 dev = &rte_eth_devices[port_id];
719 if (!dev->data->dev_started) {
721 "Port %u must be started before start any queue\n",
726 ret = eth_dev_validate_rx_queue(dev, rx_queue_id);
730 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
732 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
734 "Can't start Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
735 rx_queue_id, port_id);
739 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
741 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
742 rx_queue_id, port_id);
746 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev, rx_queue_id));
750 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
752 struct rte_eth_dev *dev;
755 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
756 dev = &rte_eth_devices[port_id];
758 ret = eth_dev_validate_rx_queue(dev, rx_queue_id);
762 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
764 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
766 "Can't stop Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
767 rx_queue_id, port_id);
771 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
773 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
774 rx_queue_id, port_id);
778 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
782 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
784 struct rte_eth_dev *dev;
787 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
788 dev = &rte_eth_devices[port_id];
790 if (!dev->data->dev_started) {
792 "Port %u must be started before start any queue\n",
797 ret = eth_dev_validate_tx_queue(dev, tx_queue_id);
801 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
803 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
805 "Can't start Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
806 tx_queue_id, port_id);
810 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
812 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
813 tx_queue_id, port_id);
817 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
821 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
823 struct rte_eth_dev *dev;
826 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
827 dev = &rte_eth_devices[port_id];
829 ret = eth_dev_validate_tx_queue(dev, tx_queue_id);
833 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
835 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
837 "Can't stop Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
838 tx_queue_id, port_id);
842 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
844 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
845 tx_queue_id, port_id);
849 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
853 rte_eth_speed_bitflag(uint32_t speed, int duplex)
856 case RTE_ETH_SPEED_NUM_10M:
857 return duplex ? RTE_ETH_LINK_SPEED_10M : RTE_ETH_LINK_SPEED_10M_HD;
858 case RTE_ETH_SPEED_NUM_100M:
859 return duplex ? RTE_ETH_LINK_SPEED_100M : RTE_ETH_LINK_SPEED_100M_HD;
860 case RTE_ETH_SPEED_NUM_1G:
861 return RTE_ETH_LINK_SPEED_1G;
862 case RTE_ETH_SPEED_NUM_2_5G:
863 return RTE_ETH_LINK_SPEED_2_5G;
864 case RTE_ETH_SPEED_NUM_5G:
865 return RTE_ETH_LINK_SPEED_5G;
866 case RTE_ETH_SPEED_NUM_10G:
867 return RTE_ETH_LINK_SPEED_10G;
868 case RTE_ETH_SPEED_NUM_20G:
869 return RTE_ETH_LINK_SPEED_20G;
870 case RTE_ETH_SPEED_NUM_25G:
871 return RTE_ETH_LINK_SPEED_25G;
872 case RTE_ETH_SPEED_NUM_40G:
873 return RTE_ETH_LINK_SPEED_40G;
874 case RTE_ETH_SPEED_NUM_50G:
875 return RTE_ETH_LINK_SPEED_50G;
876 case RTE_ETH_SPEED_NUM_56G:
877 return RTE_ETH_LINK_SPEED_56G;
878 case RTE_ETH_SPEED_NUM_100G:
879 return RTE_ETH_LINK_SPEED_100G;
880 case RTE_ETH_SPEED_NUM_200G:
881 return RTE_ETH_LINK_SPEED_200G;
888 rte_eth_dev_rx_offload_name(uint64_t offload)
890 const char *name = "UNKNOWN";
893 for (i = 0; i < RTE_DIM(eth_dev_rx_offload_names); ++i) {
894 if (offload == eth_dev_rx_offload_names[i].offload) {
895 name = eth_dev_rx_offload_names[i].name;
904 rte_eth_dev_tx_offload_name(uint64_t offload)
906 const char *name = "UNKNOWN";
909 for (i = 0; i < RTE_DIM(eth_dev_tx_offload_names); ++i) {
910 if (offload == eth_dev_tx_offload_names[i].offload) {
911 name = eth_dev_tx_offload_names[i].name;
920 rte_eth_dev_capability_name(uint64_t capability)
922 const char *name = "UNKNOWN";
925 for (i = 0; i < RTE_DIM(rte_eth_dev_capa_names); ++i) {
926 if (capability == rte_eth_dev_capa_names[i].offload) {
927 name = rte_eth_dev_capa_names[i].name;
936 eth_dev_check_lro_pkt_size(uint16_t port_id, uint32_t config_size,
937 uint32_t max_rx_pkt_len, uint32_t dev_info_size)
941 if (dev_info_size == 0) {
942 if (config_size != max_rx_pkt_len) {
943 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size"
944 " %u != %u is not allowed\n",
945 port_id, config_size, max_rx_pkt_len);
948 } else if (config_size > dev_info_size) {
949 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
950 "> max allowed value %u\n", port_id, config_size,
953 } else if (config_size < RTE_ETHER_MIN_LEN) {
954 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
955 "< min allowed value %u\n", port_id, config_size,
956 (unsigned int)RTE_ETHER_MIN_LEN);
963 * Validate offloads that are requested through rte_eth_dev_configure against
964 * the offloads successfully set by the Ethernet device.
967 * The port identifier of the Ethernet device.
968 * @param req_offloads
969 * The offloads that have been requested through `rte_eth_dev_configure`.
970 * @param set_offloads
971 * The offloads successfully set by the Ethernet device.
972 * @param offload_type
973 * The offload type i.e. Rx/Tx string.
974 * @param offload_name
975 * The function that prints the offload name.
977 * - (0) if validation successful.
978 * - (-EINVAL) if requested offload has been silently disabled.
982 eth_dev_validate_offloads(uint16_t port_id, uint64_t req_offloads,
983 uint64_t set_offloads, const char *offload_type,
984 const char *(*offload_name)(uint64_t))
986 uint64_t offloads_diff = req_offloads ^ set_offloads;
990 while (offloads_diff != 0) {
991 /* Check if any offload is requested but not enabled. */
992 offload = RTE_BIT64(__builtin_ctzll(offloads_diff));
993 if (offload & req_offloads) {
995 "Port %u failed to enable %s offload %s\n",
996 port_id, offload_type, offload_name(offload));
1000 /* Check if offload couldn't be disabled. */
1001 if (offload & set_offloads) {
1002 RTE_ETHDEV_LOG(DEBUG,
1003 "Port %u %s offload %s is not requested but enabled\n",
1004 port_id, offload_type, offload_name(offload));
1007 offloads_diff &= ~offload;
1014 eth_dev_get_overhead_len(uint32_t max_rx_pktlen, uint16_t max_mtu)
1016 uint32_t overhead_len;
1018 if (max_mtu != UINT16_MAX && max_rx_pktlen > max_mtu)
1019 overhead_len = max_rx_pktlen - max_mtu;
1021 overhead_len = RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN;
1023 return overhead_len;
1026 /* rte_eth_dev_info_get() should be called prior to this function */
1028 eth_dev_validate_mtu(uint16_t port_id, struct rte_eth_dev_info *dev_info,
1031 uint32_t overhead_len;
1032 uint32_t frame_size;
1034 if (mtu < dev_info->min_mtu) {
1036 "MTU (%u) < device min MTU (%u) for port_id %u\n",
1037 mtu, dev_info->min_mtu, port_id);
1040 if (mtu > dev_info->max_mtu) {
1042 "MTU (%u) > device max MTU (%u) for port_id %u\n",
1043 mtu, dev_info->max_mtu, port_id);
1047 overhead_len = eth_dev_get_overhead_len(dev_info->max_rx_pktlen,
1049 frame_size = mtu + overhead_len;
1050 if (frame_size < RTE_ETHER_MIN_LEN) {
1052 "Frame size (%u) < min frame size (%u) for port_id %u\n",
1053 frame_size, RTE_ETHER_MIN_LEN, port_id);
1057 if (frame_size > dev_info->max_rx_pktlen) {
1059 "Frame size (%u) > device max frame size (%u) for port_id %u\n",
1060 frame_size, dev_info->max_rx_pktlen, port_id);
1068 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1069 const struct rte_eth_conf *dev_conf)
1071 struct rte_eth_dev *dev;
1072 struct rte_eth_dev_info dev_info;
1073 struct rte_eth_conf orig_conf;
1078 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1079 dev = &rte_eth_devices[port_id];
1081 if (dev_conf == NULL) {
1083 "Cannot configure ethdev port %u from NULL config\n",
1088 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1090 if (dev->data->dev_started) {
1092 "Port %u must be stopped to allow configuration\n",
1098 * Ensure that "dev_configured" is always 0 each time prepare to do
1099 * dev_configure() to avoid any non-anticipated behaviour.
1100 * And set to 1 when dev_configure() is executed successfully.
1102 dev->data->dev_configured = 0;
1104 /* Store original config, as rollback required on failure */
1105 memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1108 * Copy the dev_conf parameter into the dev structure.
1109 * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1111 if (dev_conf != &dev->data->dev_conf)
1112 memcpy(&dev->data->dev_conf, dev_conf,
1113 sizeof(dev->data->dev_conf));
1115 /* Backup mtu for rollback */
1116 old_mtu = dev->data->mtu;
1118 ret = rte_eth_dev_info_get(port_id, &dev_info);
1122 /* If number of queues specified by application for both Rx and Tx is
1123 * zero, use driver preferred values. This cannot be done individually
1124 * as it is valid for either Tx or Rx (but not both) to be zero.
1125 * If driver does not provide any preferred valued, fall back on
1128 if (nb_rx_q == 0 && nb_tx_q == 0) {
1129 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1131 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1132 nb_tx_q = dev_info.default_txportconf.nb_queues;
1134 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1137 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1139 "Number of Rx queues requested (%u) is greater than max supported(%d)\n",
1140 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1145 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1147 "Number of Tx queues requested (%u) is greater than max supported(%d)\n",
1148 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1154 * Check that the numbers of Rx and Tx queues are not greater
1155 * than the maximum number of Rx and Tx queues supported by the
1156 * configured device.
1158 if (nb_rx_q > dev_info.max_rx_queues) {
1159 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1160 port_id, nb_rx_q, dev_info.max_rx_queues);
1165 if (nb_tx_q > dev_info.max_tx_queues) {
1166 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1167 port_id, nb_tx_q, dev_info.max_tx_queues);
1172 /* Check that the device supports requested interrupts */
1173 if ((dev_conf->intr_conf.lsc == 1) &&
1174 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1175 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1176 dev->device->driver->name);
1180 if ((dev_conf->intr_conf.rmv == 1) &&
1181 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1182 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1183 dev->device->driver->name);
1188 if (dev_conf->rxmode.mtu == 0)
1189 dev->data->dev_conf.rxmode.mtu = RTE_ETHER_MTU;
1191 ret = eth_dev_validate_mtu(port_id, &dev_info,
1192 dev->data->dev_conf.rxmode.mtu);
1196 dev->data->mtu = dev->data->dev_conf.rxmode.mtu;
1199 * If LRO is enabled, check that the maximum aggregated packet
1200 * size is supported by the configured device.
1202 if (dev_conf->rxmode.offloads & RTE_ETH_RX_OFFLOAD_TCP_LRO) {
1203 uint32_t max_rx_pktlen;
1204 uint32_t overhead_len;
1206 overhead_len = eth_dev_get_overhead_len(dev_info.max_rx_pktlen,
1208 max_rx_pktlen = dev->data->dev_conf.rxmode.mtu + overhead_len;
1209 if (dev_conf->rxmode.max_lro_pkt_size == 0)
1210 dev->data->dev_conf.rxmode.max_lro_pkt_size = max_rx_pktlen;
1211 ret = eth_dev_check_lro_pkt_size(port_id,
1212 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1214 dev_info.max_lro_pkt_size);
1219 /* Any requested offloading must be within its device capabilities */
1220 if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1221 dev_conf->rxmode.offloads) {
1223 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1224 "capabilities 0x%"PRIx64" in %s()\n",
1225 port_id, dev_conf->rxmode.offloads,
1226 dev_info.rx_offload_capa,
1231 if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1232 dev_conf->txmode.offloads) {
1234 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1235 "capabilities 0x%"PRIx64" in %s()\n",
1236 port_id, dev_conf->txmode.offloads,
1237 dev_info.tx_offload_capa,
1243 dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf =
1244 rte_eth_rss_hf_refine(dev_conf->rx_adv_conf.rss_conf.rss_hf);
1246 /* Check that device supports requested rss hash functions. */
1247 if ((dev_info.flow_type_rss_offloads |
1248 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1249 dev_info.flow_type_rss_offloads) {
1251 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1252 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1253 dev_info.flow_type_rss_offloads);
1258 /* Check if Rx RSS distribution is disabled but RSS hash is enabled. */
1259 if (((dev_conf->rxmode.mq_mode & RTE_ETH_MQ_RX_RSS_FLAG) == 0) &&
1260 (dev_conf->rxmode.offloads & RTE_ETH_RX_OFFLOAD_RSS_HASH)) {
1262 "Ethdev port_id=%u config invalid Rx mq_mode without RSS but %s offload is requested\n",
1264 rte_eth_dev_rx_offload_name(RTE_ETH_RX_OFFLOAD_RSS_HASH));
1270 * Setup new number of Rx/Tx queues and reconfigure device.
1272 diag = eth_dev_rx_queue_config(dev, nb_rx_q);
1275 "Port%u eth_dev_rx_queue_config = %d\n",
1281 diag = eth_dev_tx_queue_config(dev, nb_tx_q);
1284 "Port%u eth_dev_tx_queue_config = %d\n",
1286 eth_dev_rx_queue_config(dev, 0);
1291 diag = (*dev->dev_ops->dev_configure)(dev);
1293 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1295 ret = eth_err(port_id, diag);
1299 /* Initialize Rx profiling if enabled at compilation time. */
1300 diag = __rte_eth_dev_profile_init(port_id, dev);
1302 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1304 ret = eth_err(port_id, diag);
1308 /* Validate Rx offloads. */
1309 diag = eth_dev_validate_offloads(port_id,
1310 dev_conf->rxmode.offloads,
1311 dev->data->dev_conf.rxmode.offloads, "Rx",
1312 rte_eth_dev_rx_offload_name);
1318 /* Validate Tx offloads. */
1319 diag = eth_dev_validate_offloads(port_id,
1320 dev_conf->txmode.offloads,
1321 dev->data->dev_conf.txmode.offloads, "Tx",
1322 rte_eth_dev_tx_offload_name);
1328 dev->data->dev_configured = 1;
1329 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, 0);
1332 eth_dev_rx_queue_config(dev, 0);
1333 eth_dev_tx_queue_config(dev, 0);
1335 memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1336 if (old_mtu != dev->data->mtu)
1337 dev->data->mtu = old_mtu;
1339 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, ret);
1344 eth_dev_mac_restore(struct rte_eth_dev *dev,
1345 struct rte_eth_dev_info *dev_info)
1347 struct rte_ether_addr *addr;
1352 /* replay MAC address configuration including default MAC */
1353 addr = &dev->data->mac_addrs[0];
1354 if (*dev->dev_ops->mac_addr_set != NULL)
1355 (*dev->dev_ops->mac_addr_set)(dev, addr);
1356 else if (*dev->dev_ops->mac_addr_add != NULL)
1357 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1359 if (*dev->dev_ops->mac_addr_add != NULL) {
1360 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1361 addr = &dev->data->mac_addrs[i];
1363 /* skip zero address */
1364 if (rte_is_zero_ether_addr(addr))
1368 pool_mask = dev->data->mac_pool_sel[i];
1371 if (pool_mask & UINT64_C(1))
1372 (*dev->dev_ops->mac_addr_add)(dev,
1376 } while (pool_mask);
1382 eth_dev_config_restore(struct rte_eth_dev *dev,
1383 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1387 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1388 eth_dev_mac_restore(dev, dev_info);
1390 /* replay promiscuous configuration */
1392 * use callbacks directly since we don't need port_id check and
1393 * would like to bypass the same value set
1395 if (rte_eth_promiscuous_get(port_id) == 1 &&
1396 *dev->dev_ops->promiscuous_enable != NULL) {
1397 ret = eth_err(port_id,
1398 (*dev->dev_ops->promiscuous_enable)(dev));
1399 if (ret != 0 && ret != -ENOTSUP) {
1401 "Failed to enable promiscuous mode for device (port %u): %s\n",
1402 port_id, rte_strerror(-ret));
1405 } else if (rte_eth_promiscuous_get(port_id) == 0 &&
1406 *dev->dev_ops->promiscuous_disable != NULL) {
1407 ret = eth_err(port_id,
1408 (*dev->dev_ops->promiscuous_disable)(dev));
1409 if (ret != 0 && ret != -ENOTSUP) {
1411 "Failed to disable promiscuous mode for device (port %u): %s\n",
1412 port_id, rte_strerror(-ret));
1417 /* replay all multicast configuration */
1419 * use callbacks directly since we don't need port_id check and
1420 * would like to bypass the same value set
1422 if (rte_eth_allmulticast_get(port_id) == 1 &&
1423 *dev->dev_ops->allmulticast_enable != NULL) {
1424 ret = eth_err(port_id,
1425 (*dev->dev_ops->allmulticast_enable)(dev));
1426 if (ret != 0 && ret != -ENOTSUP) {
1428 "Failed to enable allmulticast mode for device (port %u): %s\n",
1429 port_id, rte_strerror(-ret));
1432 } else if (rte_eth_allmulticast_get(port_id) == 0 &&
1433 *dev->dev_ops->allmulticast_disable != NULL) {
1434 ret = eth_err(port_id,
1435 (*dev->dev_ops->allmulticast_disable)(dev));
1436 if (ret != 0 && ret != -ENOTSUP) {
1438 "Failed to disable allmulticast mode for device (port %u): %s\n",
1439 port_id, rte_strerror(-ret));
1448 rte_eth_dev_start(uint16_t port_id)
1450 struct rte_eth_dev *dev;
1451 struct rte_eth_dev_info dev_info;
1455 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1456 dev = &rte_eth_devices[port_id];
1458 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1460 if (dev->data->dev_configured == 0) {
1461 RTE_ETHDEV_LOG(INFO,
1462 "Device with port_id=%"PRIu16" is not configured.\n",
1467 if (dev->data->dev_started != 0) {
1468 RTE_ETHDEV_LOG(INFO,
1469 "Device with port_id=%"PRIu16" already started\n",
1474 ret = rte_eth_dev_info_get(port_id, &dev_info);
1478 /* Lets restore MAC now if device does not support live change */
1479 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1480 eth_dev_mac_restore(dev, &dev_info);
1482 diag = (*dev->dev_ops->dev_start)(dev);
1484 dev->data->dev_started = 1;
1486 return eth_err(port_id, diag);
1488 ret = eth_dev_config_restore(dev, &dev_info, port_id);
1491 "Error during restoring configuration for device (port %u): %s\n",
1492 port_id, rte_strerror(-ret));
1493 ret_stop = rte_eth_dev_stop(port_id);
1494 if (ret_stop != 0) {
1496 "Failed to stop device (port %u): %s\n",
1497 port_id, rte_strerror(-ret_stop));
1503 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1504 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1505 (*dev->dev_ops->link_update)(dev, 0);
1508 /* expose selection of PMD fast-path functions */
1509 eth_dev_fp_ops_setup(rte_eth_fp_ops + port_id, dev);
1511 rte_ethdev_trace_start(port_id);
1516 rte_eth_dev_stop(uint16_t port_id)
1518 struct rte_eth_dev *dev;
1521 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1522 dev = &rte_eth_devices[port_id];
1524 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_stop, -ENOTSUP);
1526 if (dev->data->dev_started == 0) {
1527 RTE_ETHDEV_LOG(INFO,
1528 "Device with port_id=%"PRIu16" already stopped\n",
1533 /* point fast-path functions to dummy ones */
1534 eth_dev_fp_ops_reset(rte_eth_fp_ops + port_id);
1536 dev->data->dev_started = 0;
1537 ret = (*dev->dev_ops->dev_stop)(dev);
1538 rte_ethdev_trace_stop(port_id, ret);
1544 rte_eth_dev_set_link_up(uint16_t port_id)
1546 struct rte_eth_dev *dev;
1548 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1549 dev = &rte_eth_devices[port_id];
1551 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1552 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1556 rte_eth_dev_set_link_down(uint16_t port_id)
1558 struct rte_eth_dev *dev;
1560 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1561 dev = &rte_eth_devices[port_id];
1563 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1564 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1568 rte_eth_dev_close(uint16_t port_id)
1570 struct rte_eth_dev *dev;
1571 int firsterr, binerr;
1572 int *lasterr = &firsterr;
1574 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1575 dev = &rte_eth_devices[port_id];
1577 if (dev->data->dev_started) {
1578 RTE_ETHDEV_LOG(ERR, "Cannot close started device (port %u)\n",
1583 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_close, -ENOTSUP);
1584 *lasterr = (*dev->dev_ops->dev_close)(dev);
1588 rte_ethdev_trace_close(port_id);
1589 *lasterr = rte_eth_dev_release_port(dev);
1595 rte_eth_dev_reset(uint16_t port_id)
1597 struct rte_eth_dev *dev;
1600 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1601 dev = &rte_eth_devices[port_id];
1603 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1605 ret = rte_eth_dev_stop(port_id);
1608 "Failed to stop device (port %u) before reset: %s - ignore\n",
1609 port_id, rte_strerror(-ret));
1611 ret = dev->dev_ops->dev_reset(dev);
1613 return eth_err(port_id, ret);
1617 rte_eth_dev_is_removed(uint16_t port_id)
1619 struct rte_eth_dev *dev;
1622 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1623 dev = &rte_eth_devices[port_id];
1625 if (dev->state == RTE_ETH_DEV_REMOVED)
1628 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1630 ret = dev->dev_ops->is_removed(dev);
1632 /* Device is physically removed. */
1633 dev->state = RTE_ETH_DEV_REMOVED;
1639 rte_eth_rx_queue_check_split(const struct rte_eth_rxseg_split *rx_seg,
1640 uint16_t n_seg, uint32_t *mbp_buf_size,
1641 const struct rte_eth_dev_info *dev_info)
1643 const struct rte_eth_rxseg_capa *seg_capa = &dev_info->rx_seg_capa;
1644 struct rte_mempool *mp_first;
1645 uint32_t offset_mask;
1648 if (n_seg > seg_capa->max_nseg) {
1650 "Requested Rx segments %u exceed supported %u\n",
1651 n_seg, seg_capa->max_nseg);
1655 * Check the sizes and offsets against buffer sizes
1656 * for each segment specified in extended configuration.
1658 mp_first = rx_seg[0].mp;
1659 offset_mask = RTE_BIT32(seg_capa->offset_align_log2) - 1;
1660 for (seg_idx = 0; seg_idx < n_seg; seg_idx++) {
1661 struct rte_mempool *mpl = rx_seg[seg_idx].mp;
1662 uint32_t length = rx_seg[seg_idx].length;
1663 uint32_t offset = rx_seg[seg_idx].offset;
1666 RTE_ETHDEV_LOG(ERR, "null mempool pointer\n");
1669 if (seg_idx != 0 && mp_first != mpl &&
1670 seg_capa->multi_pools == 0) {
1671 RTE_ETHDEV_LOG(ERR, "Receiving to multiple pools is not supported\n");
1675 if (seg_capa->offset_allowed == 0) {
1676 RTE_ETHDEV_LOG(ERR, "Rx segmentation with offset is not supported\n");
1679 if (offset & offset_mask) {
1680 RTE_ETHDEV_LOG(ERR, "Rx segmentation invalid offset alignment %u, %u\n",
1682 seg_capa->offset_align_log2);
1686 if (mpl->private_data_size <
1687 sizeof(struct rte_pktmbuf_pool_private)) {
1689 "%s private_data_size %u < %u\n",
1690 mpl->name, mpl->private_data_size,
1691 (unsigned int)sizeof
1692 (struct rte_pktmbuf_pool_private));
1695 offset += seg_idx != 0 ? 0 : RTE_PKTMBUF_HEADROOM;
1696 *mbp_buf_size = rte_pktmbuf_data_room_size(mpl);
1697 length = length != 0 ? length : *mbp_buf_size;
1698 if (*mbp_buf_size < length + offset) {
1700 "%s mbuf_data_room_size %u < %u (segment length=%u + segment offset=%u)\n",
1701 mpl->name, *mbp_buf_size,
1702 length + offset, length, offset);
1710 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1711 uint16_t nb_rx_desc, unsigned int socket_id,
1712 const struct rte_eth_rxconf *rx_conf,
1713 struct rte_mempool *mp)
1716 uint32_t mbp_buf_size;
1717 struct rte_eth_dev *dev;
1718 struct rte_eth_dev_info dev_info;
1719 struct rte_eth_rxconf local_conf;
1721 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1722 dev = &rte_eth_devices[port_id];
1724 if (rx_queue_id >= dev->data->nb_rx_queues) {
1725 RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u\n", rx_queue_id);
1729 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1731 ret = rte_eth_dev_info_get(port_id, &dev_info);
1736 /* Single pool configuration check. */
1737 if (rx_conf != NULL && rx_conf->rx_nseg != 0) {
1739 "Ambiguous segment configuration\n");
1743 * Check the size of the mbuf data buffer, this value
1744 * must be provided in the private data of the memory pool.
1745 * First check that the memory pool(s) has a valid private data.
1747 if (mp->private_data_size <
1748 sizeof(struct rte_pktmbuf_pool_private)) {
1749 RTE_ETHDEV_LOG(ERR, "%s private_data_size %u < %u\n",
1750 mp->name, mp->private_data_size,
1752 sizeof(struct rte_pktmbuf_pool_private));
1755 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1756 if (mbp_buf_size < dev_info.min_rx_bufsize +
1757 RTE_PKTMBUF_HEADROOM) {
1759 "%s mbuf_data_room_size %u < %u (RTE_PKTMBUF_HEADROOM=%u + min_rx_bufsize(dev)=%u)\n",
1760 mp->name, mbp_buf_size,
1761 RTE_PKTMBUF_HEADROOM +
1762 dev_info.min_rx_bufsize,
1763 RTE_PKTMBUF_HEADROOM,
1764 dev_info.min_rx_bufsize);
1768 const struct rte_eth_rxseg_split *rx_seg;
1771 /* Extended multi-segment configuration check. */
1772 if (rx_conf == NULL || rx_conf->rx_seg == NULL || rx_conf->rx_nseg == 0) {
1774 "Memory pool is null and no extended configuration provided\n");
1778 rx_seg = (const struct rte_eth_rxseg_split *)rx_conf->rx_seg;
1779 n_seg = rx_conf->rx_nseg;
1781 if (rx_conf->offloads & RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT) {
1782 ret = rte_eth_rx_queue_check_split(rx_seg, n_seg,
1788 RTE_ETHDEV_LOG(ERR, "No Rx segmentation offload configured\n");
1793 /* Use default specified by driver, if nb_rx_desc is zero */
1794 if (nb_rx_desc == 0) {
1795 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1796 /* If driver default is also zero, fall back on EAL default */
1797 if (nb_rx_desc == 0)
1798 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1801 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1802 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1803 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1806 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1807 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1808 dev_info.rx_desc_lim.nb_min,
1809 dev_info.rx_desc_lim.nb_align);
1813 if (dev->data->dev_started &&
1814 !(dev_info.dev_capa &
1815 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1818 if (dev->data->dev_started &&
1819 (dev->data->rx_queue_state[rx_queue_id] !=
1820 RTE_ETH_QUEUE_STATE_STOPPED))
1823 eth_dev_rxq_release(dev, rx_queue_id);
1825 if (rx_conf == NULL)
1826 rx_conf = &dev_info.default_rxconf;
1828 local_conf = *rx_conf;
1831 * If an offloading has already been enabled in
1832 * rte_eth_dev_configure(), it has been enabled on all queues,
1833 * so there is no need to enable it in this queue again.
1834 * The local_conf.offloads input to underlying PMD only carries
1835 * those offloadings which are only enabled on this queue and
1836 * not enabled on all queues.
1838 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1841 * New added offloadings for this queue are those not enabled in
1842 * rte_eth_dev_configure() and they must be per-queue type.
1843 * A pure per-port offloading can't be enabled on a queue while
1844 * disabled on another queue. A pure per-port offloading can't
1845 * be enabled for any queue as new added one if it hasn't been
1846 * enabled in rte_eth_dev_configure().
1848 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1849 local_conf.offloads) {
1851 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1852 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
1853 port_id, rx_queue_id, local_conf.offloads,
1854 dev_info.rx_queue_offload_capa,
1859 if (local_conf.share_group > 0 &&
1860 (dev_info.dev_capa & RTE_ETH_DEV_CAPA_RXQ_SHARE) == 0) {
1862 "Ethdev port_id=%d rx_queue_id=%d, enabled share_group=%hu while device doesn't support Rx queue share\n",
1863 port_id, rx_queue_id, local_conf.share_group);
1868 * If LRO is enabled, check that the maximum aggregated packet
1869 * size is supported by the configured device.
1871 /* Get the real Ethernet overhead length */
1872 if (local_conf.offloads & RTE_ETH_RX_OFFLOAD_TCP_LRO) {
1873 uint32_t overhead_len;
1874 uint32_t max_rx_pktlen;
1877 overhead_len = eth_dev_get_overhead_len(dev_info.max_rx_pktlen,
1879 max_rx_pktlen = dev->data->mtu + overhead_len;
1880 if (dev->data->dev_conf.rxmode.max_lro_pkt_size == 0)
1881 dev->data->dev_conf.rxmode.max_lro_pkt_size = max_rx_pktlen;
1882 ret = eth_dev_check_lro_pkt_size(port_id,
1883 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1885 dev_info.max_lro_pkt_size);
1890 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1891 socket_id, &local_conf, mp);
1893 if (!dev->data->min_rx_buf_size ||
1894 dev->data->min_rx_buf_size > mbp_buf_size)
1895 dev->data->min_rx_buf_size = mbp_buf_size;
1898 rte_ethdev_trace_rxq_setup(port_id, rx_queue_id, nb_rx_desc, mp,
1900 return eth_err(port_id, ret);
1904 rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1905 uint16_t nb_rx_desc,
1906 const struct rte_eth_hairpin_conf *conf)
1909 struct rte_eth_dev *dev;
1910 struct rte_eth_hairpin_cap cap;
1914 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1915 dev = &rte_eth_devices[port_id];
1917 if (rx_queue_id >= dev->data->nb_rx_queues) {
1918 RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u\n", rx_queue_id);
1924 "Cannot setup ethdev port %u Rx hairpin queue from NULL config\n",
1929 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
1932 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_hairpin_queue_setup,
1934 /* if nb_rx_desc is zero use max number of desc from the driver. */
1935 if (nb_rx_desc == 0)
1936 nb_rx_desc = cap.max_nb_desc;
1937 if (nb_rx_desc > cap.max_nb_desc) {
1939 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu",
1940 nb_rx_desc, cap.max_nb_desc);
1943 if (conf->peer_count > cap.max_rx_2_tx) {
1945 "Invalid value for number of peers for Rx queue(=%u), should be: <= %hu",
1946 conf->peer_count, cap.max_rx_2_tx);
1949 if (conf->peer_count == 0) {
1951 "Invalid value for number of peers for Rx queue(=%u), should be: > 0",
1955 for (i = 0, count = 0; i < dev->data->nb_rx_queues &&
1956 cap.max_nb_queues != UINT16_MAX; i++) {
1957 if (i == rx_queue_id || rte_eth_dev_is_rx_hairpin_queue(dev, i))
1960 if (count > cap.max_nb_queues) {
1961 RTE_ETHDEV_LOG(ERR, "To many Rx hairpin queues max is %d",
1965 if (dev->data->dev_started)
1967 eth_dev_rxq_release(dev, rx_queue_id);
1968 ret = (*dev->dev_ops->rx_hairpin_queue_setup)(dev, rx_queue_id,
1971 dev->data->rx_queue_state[rx_queue_id] =
1972 RTE_ETH_QUEUE_STATE_HAIRPIN;
1973 return eth_err(port_id, ret);
1977 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1978 uint16_t nb_tx_desc, unsigned int socket_id,
1979 const struct rte_eth_txconf *tx_conf)
1981 struct rte_eth_dev *dev;
1982 struct rte_eth_dev_info dev_info;
1983 struct rte_eth_txconf local_conf;
1986 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1987 dev = &rte_eth_devices[port_id];
1989 if (tx_queue_id >= dev->data->nb_tx_queues) {
1990 RTE_ETHDEV_LOG(ERR, "Invalid Tx queue_id=%u\n", tx_queue_id);
1994 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1996 ret = rte_eth_dev_info_get(port_id, &dev_info);
2000 /* Use default specified by driver, if nb_tx_desc is zero */
2001 if (nb_tx_desc == 0) {
2002 nb_tx_desc = dev_info.default_txportconf.ring_size;
2003 /* If driver default is zero, fall back on EAL default */
2004 if (nb_tx_desc == 0)
2005 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
2007 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
2008 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
2009 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
2011 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
2012 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
2013 dev_info.tx_desc_lim.nb_min,
2014 dev_info.tx_desc_lim.nb_align);
2018 if (dev->data->dev_started &&
2019 !(dev_info.dev_capa &
2020 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
2023 if (dev->data->dev_started &&
2024 (dev->data->tx_queue_state[tx_queue_id] !=
2025 RTE_ETH_QUEUE_STATE_STOPPED))
2028 eth_dev_txq_release(dev, tx_queue_id);
2030 if (tx_conf == NULL)
2031 tx_conf = &dev_info.default_txconf;
2033 local_conf = *tx_conf;
2036 * If an offloading has already been enabled in
2037 * rte_eth_dev_configure(), it has been enabled on all queues,
2038 * so there is no need to enable it in this queue again.
2039 * The local_conf.offloads input to underlying PMD only carries
2040 * those offloadings which are only enabled on this queue and
2041 * not enabled on all queues.
2043 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
2046 * New added offloadings for this queue are those not enabled in
2047 * rte_eth_dev_configure() and they must be per-queue type.
2048 * A pure per-port offloading can't be enabled on a queue while
2049 * disabled on another queue. A pure per-port offloading can't
2050 * be enabled for any queue as new added one if it hasn't been
2051 * enabled in rte_eth_dev_configure().
2053 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
2054 local_conf.offloads) {
2056 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
2057 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
2058 port_id, tx_queue_id, local_conf.offloads,
2059 dev_info.tx_queue_offload_capa,
2064 rte_ethdev_trace_txq_setup(port_id, tx_queue_id, nb_tx_desc, tx_conf);
2065 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
2066 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
2070 rte_eth_tx_hairpin_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2071 uint16_t nb_tx_desc,
2072 const struct rte_eth_hairpin_conf *conf)
2074 struct rte_eth_dev *dev;
2075 struct rte_eth_hairpin_cap cap;
2080 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2081 dev = &rte_eth_devices[port_id];
2083 if (tx_queue_id >= dev->data->nb_tx_queues) {
2084 RTE_ETHDEV_LOG(ERR, "Invalid Tx queue_id=%u\n", tx_queue_id);
2090 "Cannot setup ethdev port %u Tx hairpin queue from NULL config\n",
2095 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
2098 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_hairpin_queue_setup,
2100 /* if nb_rx_desc is zero use max number of desc from the driver. */
2101 if (nb_tx_desc == 0)
2102 nb_tx_desc = cap.max_nb_desc;
2103 if (nb_tx_desc > cap.max_nb_desc) {
2105 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu",
2106 nb_tx_desc, cap.max_nb_desc);
2109 if (conf->peer_count > cap.max_tx_2_rx) {
2111 "Invalid value for number of peers for Tx queue(=%u), should be: <= %hu",
2112 conf->peer_count, cap.max_tx_2_rx);
2115 if (conf->peer_count == 0) {
2117 "Invalid value for number of peers for Tx queue(=%u), should be: > 0",
2121 for (i = 0, count = 0; i < dev->data->nb_tx_queues &&
2122 cap.max_nb_queues != UINT16_MAX; i++) {
2123 if (i == tx_queue_id || rte_eth_dev_is_tx_hairpin_queue(dev, i))
2126 if (count > cap.max_nb_queues) {
2127 RTE_ETHDEV_LOG(ERR, "To many Tx hairpin queues max is %d",
2131 if (dev->data->dev_started)
2133 eth_dev_txq_release(dev, tx_queue_id);
2134 ret = (*dev->dev_ops->tx_hairpin_queue_setup)
2135 (dev, tx_queue_id, nb_tx_desc, conf);
2137 dev->data->tx_queue_state[tx_queue_id] =
2138 RTE_ETH_QUEUE_STATE_HAIRPIN;
2139 return eth_err(port_id, ret);
2143 rte_eth_hairpin_bind(uint16_t tx_port, uint16_t rx_port)
2145 struct rte_eth_dev *dev;
2148 RTE_ETH_VALID_PORTID_OR_ERR_RET(tx_port, -ENODEV);
2149 dev = &rte_eth_devices[tx_port];
2151 if (dev->data->dev_started == 0) {
2152 RTE_ETHDEV_LOG(ERR, "Tx port %d is not started\n", tx_port);
2156 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_bind, -ENOTSUP);
2157 ret = (*dev->dev_ops->hairpin_bind)(dev, rx_port);
2159 RTE_ETHDEV_LOG(ERR, "Failed to bind hairpin Tx %d"
2160 " to Rx %d (%d - all ports)\n",
2161 tx_port, rx_port, RTE_MAX_ETHPORTS);
2167 rte_eth_hairpin_unbind(uint16_t tx_port, uint16_t rx_port)
2169 struct rte_eth_dev *dev;
2172 RTE_ETH_VALID_PORTID_OR_ERR_RET(tx_port, -ENODEV);
2173 dev = &rte_eth_devices[tx_port];
2175 if (dev->data->dev_started == 0) {
2176 RTE_ETHDEV_LOG(ERR, "Tx port %d is already stopped\n", tx_port);
2180 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_unbind, -ENOTSUP);
2181 ret = (*dev->dev_ops->hairpin_unbind)(dev, rx_port);
2183 RTE_ETHDEV_LOG(ERR, "Failed to unbind hairpin Tx %d"
2184 " from Rx %d (%d - all ports)\n",
2185 tx_port, rx_port, RTE_MAX_ETHPORTS);
2191 rte_eth_hairpin_get_peer_ports(uint16_t port_id, uint16_t *peer_ports,
2192 size_t len, uint32_t direction)
2194 struct rte_eth_dev *dev;
2197 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2198 dev = &rte_eth_devices[port_id];
2200 if (peer_ports == NULL) {
2202 "Cannot get ethdev port %u hairpin peer ports to NULL\n",
2209 "Cannot get ethdev port %u hairpin peer ports to array with zero size\n",
2214 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_get_peer_ports,
2217 ret = (*dev->dev_ops->hairpin_get_peer_ports)(dev, peer_ports,
2220 RTE_ETHDEV_LOG(ERR, "Failed to get %d hairpin peer %s ports\n",
2221 port_id, direction ? "Rx" : "Tx");
2227 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
2228 void *userdata __rte_unused)
2230 rte_pktmbuf_free_bulk(pkts, unsent);
2234 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
2237 uint64_t *count = userdata;
2239 rte_pktmbuf_free_bulk(pkts, unsent);
2244 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
2245 buffer_tx_error_fn cbfn, void *userdata)
2247 if (buffer == NULL) {
2249 "Cannot set Tx buffer error callback to NULL buffer\n");
2253 buffer->error_callback = cbfn;
2254 buffer->error_userdata = userdata;
2259 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
2263 if (buffer == NULL) {
2264 RTE_ETHDEV_LOG(ERR, "Cannot initialize NULL buffer\n");
2268 buffer->size = size;
2269 if (buffer->error_callback == NULL) {
2270 ret = rte_eth_tx_buffer_set_err_callback(
2271 buffer, rte_eth_tx_buffer_drop_callback, NULL);
2278 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
2280 struct rte_eth_dev *dev;
2283 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2284 dev = &rte_eth_devices[port_id];
2286 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
2288 /* Call driver to free pending mbufs. */
2289 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
2291 return eth_err(port_id, ret);
2295 rte_eth_promiscuous_enable(uint16_t port_id)
2297 struct rte_eth_dev *dev;
2300 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2301 dev = &rte_eth_devices[port_id];
2303 if (dev->data->promiscuous == 1)
2306 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_enable, -ENOTSUP);
2308 diag = (*dev->dev_ops->promiscuous_enable)(dev);
2309 dev->data->promiscuous = (diag == 0) ? 1 : 0;
2311 return eth_err(port_id, diag);
2315 rte_eth_promiscuous_disable(uint16_t port_id)
2317 struct rte_eth_dev *dev;
2320 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2321 dev = &rte_eth_devices[port_id];
2323 if (dev->data->promiscuous == 0)
2326 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_disable, -ENOTSUP);
2328 dev->data->promiscuous = 0;
2329 diag = (*dev->dev_ops->promiscuous_disable)(dev);
2331 dev->data->promiscuous = 1;
2333 return eth_err(port_id, diag);
2337 rte_eth_promiscuous_get(uint16_t port_id)
2339 struct rte_eth_dev *dev;
2341 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2342 dev = &rte_eth_devices[port_id];
2344 return dev->data->promiscuous;
2348 rte_eth_allmulticast_enable(uint16_t port_id)
2350 struct rte_eth_dev *dev;
2353 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2354 dev = &rte_eth_devices[port_id];
2356 if (dev->data->all_multicast == 1)
2359 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_enable, -ENOTSUP);
2360 diag = (*dev->dev_ops->allmulticast_enable)(dev);
2361 dev->data->all_multicast = (diag == 0) ? 1 : 0;
2363 return eth_err(port_id, diag);
2367 rte_eth_allmulticast_disable(uint16_t port_id)
2369 struct rte_eth_dev *dev;
2372 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2373 dev = &rte_eth_devices[port_id];
2375 if (dev->data->all_multicast == 0)
2378 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_disable, -ENOTSUP);
2379 dev->data->all_multicast = 0;
2380 diag = (*dev->dev_ops->allmulticast_disable)(dev);
2382 dev->data->all_multicast = 1;
2384 return eth_err(port_id, diag);
2388 rte_eth_allmulticast_get(uint16_t port_id)
2390 struct rte_eth_dev *dev;
2392 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2393 dev = &rte_eth_devices[port_id];
2395 return dev->data->all_multicast;
2399 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
2401 struct rte_eth_dev *dev;
2403 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2404 dev = &rte_eth_devices[port_id];
2406 if (eth_link == NULL) {
2407 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u link to NULL\n",
2412 if (dev->data->dev_conf.intr_conf.lsc && dev->data->dev_started)
2413 rte_eth_linkstatus_get(dev, eth_link);
2415 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2416 (*dev->dev_ops->link_update)(dev, 1);
2417 *eth_link = dev->data->dev_link;
2424 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
2426 struct rte_eth_dev *dev;
2428 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2429 dev = &rte_eth_devices[port_id];
2431 if (eth_link == NULL) {
2432 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u link to NULL\n",
2437 if (dev->data->dev_conf.intr_conf.lsc && dev->data->dev_started)
2438 rte_eth_linkstatus_get(dev, eth_link);
2440 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2441 (*dev->dev_ops->link_update)(dev, 0);
2442 *eth_link = dev->data->dev_link;
2449 rte_eth_link_speed_to_str(uint32_t link_speed)
2451 switch (link_speed) {
2452 case RTE_ETH_SPEED_NUM_NONE: return "None";
2453 case RTE_ETH_SPEED_NUM_10M: return "10 Mbps";
2454 case RTE_ETH_SPEED_NUM_100M: return "100 Mbps";
2455 case RTE_ETH_SPEED_NUM_1G: return "1 Gbps";
2456 case RTE_ETH_SPEED_NUM_2_5G: return "2.5 Gbps";
2457 case RTE_ETH_SPEED_NUM_5G: return "5 Gbps";
2458 case RTE_ETH_SPEED_NUM_10G: return "10 Gbps";
2459 case RTE_ETH_SPEED_NUM_20G: return "20 Gbps";
2460 case RTE_ETH_SPEED_NUM_25G: return "25 Gbps";
2461 case RTE_ETH_SPEED_NUM_40G: return "40 Gbps";
2462 case RTE_ETH_SPEED_NUM_50G: return "50 Gbps";
2463 case RTE_ETH_SPEED_NUM_56G: return "56 Gbps";
2464 case RTE_ETH_SPEED_NUM_100G: return "100 Gbps";
2465 case RTE_ETH_SPEED_NUM_200G: return "200 Gbps";
2466 case RTE_ETH_SPEED_NUM_UNKNOWN: return "Unknown";
2467 default: return "Invalid";
2472 rte_eth_link_to_str(char *str, size_t len, const struct rte_eth_link *eth_link)
2475 RTE_ETHDEV_LOG(ERR, "Cannot convert link to NULL string\n");
2481 "Cannot convert link to string with zero size\n");
2485 if (eth_link == NULL) {
2486 RTE_ETHDEV_LOG(ERR, "Cannot convert to string from NULL link\n");
2490 if (eth_link->link_status == RTE_ETH_LINK_DOWN)
2491 return snprintf(str, len, "Link down");
2493 return snprintf(str, len, "Link up at %s %s %s",
2494 rte_eth_link_speed_to_str(eth_link->link_speed),
2495 (eth_link->link_duplex == RTE_ETH_LINK_FULL_DUPLEX) ?
2497 (eth_link->link_autoneg == RTE_ETH_LINK_AUTONEG) ?
2498 "Autoneg" : "Fixed");
2502 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
2504 struct rte_eth_dev *dev;
2506 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2507 dev = &rte_eth_devices[port_id];
2509 if (stats == NULL) {
2510 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u stats to NULL\n",
2515 memset(stats, 0, sizeof(*stats));
2517 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
2518 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
2519 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
2523 rte_eth_stats_reset(uint16_t port_id)
2525 struct rte_eth_dev *dev;
2528 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2529 dev = &rte_eth_devices[port_id];
2531 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
2532 ret = (*dev->dev_ops->stats_reset)(dev);
2534 return eth_err(port_id, ret);
2536 dev->data->rx_mbuf_alloc_failed = 0;
2542 eth_dev_get_xstats_basic_count(struct rte_eth_dev *dev)
2544 uint16_t nb_rxqs, nb_txqs;
2547 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2548 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2550 count = RTE_NB_STATS;
2551 if (dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS) {
2552 count += nb_rxqs * RTE_NB_RXQ_STATS;
2553 count += nb_txqs * RTE_NB_TXQ_STATS;
2560 eth_dev_get_xstats_count(uint16_t port_id)
2562 struct rte_eth_dev *dev;
2565 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2566 dev = &rte_eth_devices[port_id];
2567 if (dev->dev_ops->xstats_get_names != NULL) {
2568 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2570 return eth_err(port_id, count);
2575 count += eth_dev_get_xstats_basic_count(dev);
2581 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2584 int cnt_xstats, idx_xstat;
2586 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2588 if (xstat_name == NULL) {
2590 "Cannot get ethdev port %u xstats ID from NULL xstat name\n",
2597 "Cannot get ethdev port %u xstats ID to NULL\n",
2603 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2604 if (cnt_xstats < 0) {
2605 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2609 /* Get id-name lookup table */
2610 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2612 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2613 port_id, xstats_names, cnt_xstats, NULL)) {
2614 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2618 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2619 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2628 /* retrieve basic stats names */
2630 eth_basic_stats_get_names(struct rte_eth_dev *dev,
2631 struct rte_eth_xstat_name *xstats_names)
2633 int cnt_used_entries = 0;
2634 uint32_t idx, id_queue;
2637 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2638 strlcpy(xstats_names[cnt_used_entries].name,
2639 eth_dev_stats_strings[idx].name,
2640 sizeof(xstats_names[0].name));
2644 if ((dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS) == 0)
2645 return cnt_used_entries;
2647 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2648 for (id_queue = 0; id_queue < num_q; id_queue++) {
2649 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2650 snprintf(xstats_names[cnt_used_entries].name,
2651 sizeof(xstats_names[0].name),
2653 id_queue, eth_dev_rxq_stats_strings[idx].name);
2658 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2659 for (id_queue = 0; id_queue < num_q; id_queue++) {
2660 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2661 snprintf(xstats_names[cnt_used_entries].name,
2662 sizeof(xstats_names[0].name),
2664 id_queue, eth_dev_txq_stats_strings[idx].name);
2668 return cnt_used_entries;
2671 /* retrieve ethdev extended statistics names */
2673 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2674 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2677 struct rte_eth_xstat_name *xstats_names_copy;
2678 unsigned int no_basic_stat_requested = 1;
2679 unsigned int no_ext_stat_requested = 1;
2680 unsigned int expected_entries;
2681 unsigned int basic_count;
2682 struct rte_eth_dev *dev;
2686 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2687 dev = &rte_eth_devices[port_id];
2689 basic_count = eth_dev_get_xstats_basic_count(dev);
2690 ret = eth_dev_get_xstats_count(port_id);
2693 expected_entries = (unsigned int)ret;
2695 /* Return max number of stats if no ids given */
2698 return expected_entries;
2699 else if (xstats_names && size < expected_entries)
2700 return expected_entries;
2703 if (ids && !xstats_names)
2706 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2707 uint64_t ids_copy[size];
2709 for (i = 0; i < size; i++) {
2710 if (ids[i] < basic_count) {
2711 no_basic_stat_requested = 0;
2716 * Convert ids to xstats ids that PMD knows.
2717 * ids known by user are basic + extended stats.
2719 ids_copy[i] = ids[i] - basic_count;
2722 if (no_basic_stat_requested)
2723 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2724 ids_copy, xstats_names, size);
2727 /* Retrieve all stats */
2729 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2731 if (num_stats < 0 || num_stats > (int)expected_entries)
2734 return expected_entries;
2737 xstats_names_copy = calloc(expected_entries,
2738 sizeof(struct rte_eth_xstat_name));
2740 if (!xstats_names_copy) {
2741 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2746 for (i = 0; i < size; i++) {
2747 if (ids[i] >= basic_count) {
2748 no_ext_stat_requested = 0;
2754 /* Fill xstats_names_copy structure */
2755 if (ids && no_ext_stat_requested) {
2756 eth_basic_stats_get_names(dev, xstats_names_copy);
2758 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2761 free(xstats_names_copy);
2767 for (i = 0; i < size; i++) {
2768 if (ids[i] >= expected_entries) {
2769 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2770 free(xstats_names_copy);
2773 xstats_names[i] = xstats_names_copy[ids[i]];
2776 free(xstats_names_copy);
2781 rte_eth_xstats_get_names(uint16_t port_id,
2782 struct rte_eth_xstat_name *xstats_names,
2785 struct rte_eth_dev *dev;
2786 int cnt_used_entries;
2787 int cnt_expected_entries;
2788 int cnt_driver_entries;
2790 cnt_expected_entries = eth_dev_get_xstats_count(port_id);
2791 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2792 (int)size < cnt_expected_entries)
2793 return cnt_expected_entries;
2795 /* port_id checked in eth_dev_get_xstats_count() */
2796 dev = &rte_eth_devices[port_id];
2798 cnt_used_entries = eth_basic_stats_get_names(dev, xstats_names);
2800 if (dev->dev_ops->xstats_get_names != NULL) {
2801 /* If there are any driver-specific xstats, append them
2804 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2806 xstats_names + cnt_used_entries,
2807 size - cnt_used_entries);
2808 if (cnt_driver_entries < 0)
2809 return eth_err(port_id, cnt_driver_entries);
2810 cnt_used_entries += cnt_driver_entries;
2813 return cnt_used_entries;
2818 eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2820 struct rte_eth_dev *dev;
2821 struct rte_eth_stats eth_stats;
2822 unsigned int count = 0, i, q;
2823 uint64_t val, *stats_ptr;
2824 uint16_t nb_rxqs, nb_txqs;
2827 ret = rte_eth_stats_get(port_id, ð_stats);
2831 dev = &rte_eth_devices[port_id];
2833 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2834 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2837 for (i = 0; i < RTE_NB_STATS; i++) {
2838 stats_ptr = RTE_PTR_ADD(ð_stats,
2839 eth_dev_stats_strings[i].offset);
2841 xstats[count++].value = val;
2844 if ((dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS) == 0)
2848 for (q = 0; q < nb_rxqs; q++) {
2849 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2850 stats_ptr = RTE_PTR_ADD(ð_stats,
2851 eth_dev_rxq_stats_strings[i].offset +
2852 q * sizeof(uint64_t));
2854 xstats[count++].value = val;
2859 for (q = 0; q < nb_txqs; q++) {
2860 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2861 stats_ptr = RTE_PTR_ADD(ð_stats,
2862 eth_dev_txq_stats_strings[i].offset +
2863 q * sizeof(uint64_t));
2865 xstats[count++].value = val;
2871 /* retrieve ethdev extended statistics */
2873 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2874 uint64_t *values, unsigned int size)
2876 unsigned int no_basic_stat_requested = 1;
2877 unsigned int no_ext_stat_requested = 1;
2878 unsigned int num_xstats_filled;
2879 unsigned int basic_count;
2880 uint16_t expected_entries;
2881 struct rte_eth_dev *dev;
2885 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2886 dev = &rte_eth_devices[port_id];
2888 ret = eth_dev_get_xstats_count(port_id);
2891 expected_entries = (uint16_t)ret;
2892 struct rte_eth_xstat xstats[expected_entries];
2893 basic_count = eth_dev_get_xstats_basic_count(dev);
2895 /* Return max number of stats if no ids given */
2898 return expected_entries;
2899 else if (values && size < expected_entries)
2900 return expected_entries;
2906 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2907 unsigned int basic_count = eth_dev_get_xstats_basic_count(dev);
2908 uint64_t ids_copy[size];
2910 for (i = 0; i < size; i++) {
2911 if (ids[i] < basic_count) {
2912 no_basic_stat_requested = 0;
2917 * Convert ids to xstats ids that PMD knows.
2918 * ids known by user are basic + extended stats.
2920 ids_copy[i] = ids[i] - basic_count;
2923 if (no_basic_stat_requested)
2924 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2929 for (i = 0; i < size; i++) {
2930 if (ids[i] >= basic_count) {
2931 no_ext_stat_requested = 0;
2937 /* Fill the xstats structure */
2938 if (ids && no_ext_stat_requested)
2939 ret = eth_basic_stats_get(port_id, xstats);
2941 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2945 num_xstats_filled = (unsigned int)ret;
2947 /* Return all stats */
2949 for (i = 0; i < num_xstats_filled; i++)
2950 values[i] = xstats[i].value;
2951 return expected_entries;
2955 for (i = 0; i < size; i++) {
2956 if (ids[i] >= expected_entries) {
2957 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2960 values[i] = xstats[ids[i]].value;
2966 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2969 struct rte_eth_dev *dev;
2970 unsigned int count = 0, i;
2971 signed int xcount = 0;
2972 uint16_t nb_rxqs, nb_txqs;
2975 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2976 dev = &rte_eth_devices[port_id];
2978 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2979 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2981 /* Return generic statistics */
2982 count = RTE_NB_STATS;
2983 if (dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS)
2984 count += (nb_rxqs * RTE_NB_RXQ_STATS) + (nb_txqs * RTE_NB_TXQ_STATS);
2986 /* implemented by the driver */
2987 if (dev->dev_ops->xstats_get != NULL) {
2988 /* Retrieve the xstats from the driver at the end of the
2991 xcount = (*dev->dev_ops->xstats_get)(dev,
2992 xstats ? xstats + count : NULL,
2993 (n > count) ? n - count : 0);
2996 return eth_err(port_id, xcount);
2999 if (n < count + xcount || xstats == NULL)
3000 return count + xcount;
3002 /* now fill the xstats structure */
3003 ret = eth_basic_stats_get(port_id, xstats);
3008 for (i = 0; i < count; i++)
3010 /* add an offset to driver-specific stats */
3011 for ( ; i < count + xcount; i++)
3012 xstats[i].id += count;
3014 return count + xcount;
3017 /* reset ethdev extended statistics */
3019 rte_eth_xstats_reset(uint16_t port_id)
3021 struct rte_eth_dev *dev;
3023 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3024 dev = &rte_eth_devices[port_id];
3026 /* implemented by the driver */
3027 if (dev->dev_ops->xstats_reset != NULL)
3028 return eth_err(port_id, (*dev->dev_ops->xstats_reset)(dev));
3030 /* fallback to default */
3031 return rte_eth_stats_reset(port_id);
3035 eth_dev_set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id,
3036 uint8_t stat_idx, uint8_t is_rx)
3038 struct rte_eth_dev *dev;
3040 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3041 dev = &rte_eth_devices[port_id];
3043 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
3046 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
3049 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
3052 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
3053 return (*dev->dev_ops->queue_stats_mapping_set) (dev, queue_id, stat_idx, is_rx);
3057 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
3060 return eth_err(port_id, eth_dev_set_queue_stats_mapping(port_id,
3062 stat_idx, STAT_QMAP_TX));
3066 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
3069 return eth_err(port_id, eth_dev_set_queue_stats_mapping(port_id,
3071 stat_idx, STAT_QMAP_RX));
3075 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
3077 struct rte_eth_dev *dev;
3079 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3080 dev = &rte_eth_devices[port_id];
3082 if (fw_version == NULL && fw_size > 0) {
3084 "Cannot get ethdev port %u FW version to NULL when string size is non zero\n",
3089 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
3090 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
3091 fw_version, fw_size));
3095 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
3097 struct rte_eth_dev *dev;
3098 const struct rte_eth_desc_lim lim = {
3099 .nb_max = UINT16_MAX,
3102 .nb_seg_max = UINT16_MAX,
3103 .nb_mtu_seg_max = UINT16_MAX,
3107 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3108 dev = &rte_eth_devices[port_id];
3110 if (dev_info == NULL) {
3111 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u info to NULL\n",
3117 * Init dev_info before port_id check since caller does not have
3118 * return status and does not know if get is successful or not.
3120 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
3121 dev_info->switch_info.domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
3123 dev_info->rx_desc_lim = lim;
3124 dev_info->tx_desc_lim = lim;
3125 dev_info->device = dev->device;
3126 dev_info->min_mtu = RTE_ETHER_MIN_LEN - RTE_ETHER_HDR_LEN -
3128 dev_info->max_mtu = UINT16_MAX;
3130 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
3131 diag = (*dev->dev_ops->dev_infos_get)(dev, dev_info);
3133 /* Cleanup already filled in device information */
3134 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
3135 return eth_err(port_id, diag);
3138 /* Maximum number of queues should be <= RTE_MAX_QUEUES_PER_PORT */
3139 dev_info->max_rx_queues = RTE_MIN(dev_info->max_rx_queues,
3140 RTE_MAX_QUEUES_PER_PORT);
3141 dev_info->max_tx_queues = RTE_MIN(dev_info->max_tx_queues,
3142 RTE_MAX_QUEUES_PER_PORT);
3144 dev_info->driver_name = dev->device->driver->name;
3145 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
3146 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
3148 dev_info->dev_flags = &dev->data->dev_flags;
3154 rte_eth_dev_conf_get(uint16_t port_id, struct rte_eth_conf *dev_conf)
3156 struct rte_eth_dev *dev;
3158 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3159 dev = &rte_eth_devices[port_id];
3161 if (dev_conf == NULL) {
3163 "Cannot get ethdev port %u configuration to NULL\n",
3168 memcpy(dev_conf, &dev->data->dev_conf, sizeof(struct rte_eth_conf));
3174 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
3175 uint32_t *ptypes, int num)
3178 struct rte_eth_dev *dev;
3179 const uint32_t *all_ptypes;
3181 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3182 dev = &rte_eth_devices[port_id];
3184 if (ptypes == NULL && num > 0) {
3186 "Cannot get ethdev port %u supported packet types to NULL when array size is non zero\n",
3191 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
3192 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3197 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
3198 if (all_ptypes[i] & ptype_mask) {
3200 ptypes[j] = all_ptypes[i];
3208 rte_eth_dev_set_ptypes(uint16_t port_id, uint32_t ptype_mask,
3209 uint32_t *set_ptypes, unsigned int num)
3211 const uint32_t valid_ptype_masks[] = {
3215 RTE_PTYPE_TUNNEL_MASK,
3216 RTE_PTYPE_INNER_L2_MASK,
3217 RTE_PTYPE_INNER_L3_MASK,
3218 RTE_PTYPE_INNER_L4_MASK,
3220 const uint32_t *all_ptypes;
3221 struct rte_eth_dev *dev;
3222 uint32_t unused_mask;
3226 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3227 dev = &rte_eth_devices[port_id];
3229 if (num > 0 && set_ptypes == NULL) {
3231 "Cannot get ethdev port %u set packet types to NULL when array size is non zero\n",
3236 if (*dev->dev_ops->dev_supported_ptypes_get == NULL ||
3237 *dev->dev_ops->dev_ptypes_set == NULL) {
3242 if (ptype_mask == 0) {
3243 ret = (*dev->dev_ops->dev_ptypes_set)(dev,
3248 unused_mask = ptype_mask;
3249 for (i = 0; i < RTE_DIM(valid_ptype_masks); i++) {
3250 uint32_t mask = ptype_mask & valid_ptype_masks[i];
3251 if (mask && mask != valid_ptype_masks[i]) {
3255 unused_mask &= ~valid_ptype_masks[i];
3263 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3264 if (all_ptypes == NULL) {
3270 * Accommodate as many set_ptypes as possible. If the supplied
3271 * set_ptypes array is insufficient fill it partially.
3273 for (i = 0, j = 0; set_ptypes != NULL &&
3274 (all_ptypes[i] != RTE_PTYPE_UNKNOWN); ++i) {
3275 if (ptype_mask & all_ptypes[i]) {
3277 set_ptypes[j] = all_ptypes[i];
3285 if (set_ptypes != NULL && j < num)
3286 set_ptypes[j] = RTE_PTYPE_UNKNOWN;
3288 return (*dev->dev_ops->dev_ptypes_set)(dev, ptype_mask);
3292 set_ptypes[0] = RTE_PTYPE_UNKNOWN;
3298 rte_eth_macaddrs_get(uint16_t port_id, struct rte_ether_addr *ma,
3302 struct rte_eth_dev *dev;
3303 struct rte_eth_dev_info dev_info;
3306 RTE_ETHDEV_LOG(ERR, "%s: invalid parameters\n", __func__);
3310 /* will check for us that port_id is a valid one */
3311 ret = rte_eth_dev_info_get(port_id, &dev_info);
3315 dev = &rte_eth_devices[port_id];
3316 num = RTE_MIN(dev_info.max_mac_addrs, num);
3317 memcpy(ma, dev->data->mac_addrs, num * sizeof(ma[0]));
3323 rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
3325 struct rte_eth_dev *dev;
3327 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3328 dev = &rte_eth_devices[port_id];
3330 if (mac_addr == NULL) {
3332 "Cannot get ethdev port %u MAC address to NULL\n",
3337 rte_ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
3343 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
3345 struct rte_eth_dev *dev;
3347 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3348 dev = &rte_eth_devices[port_id];
3351 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u MTU to NULL\n",
3356 *mtu = dev->data->mtu;
3361 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
3364 struct rte_eth_dev_info dev_info;
3365 struct rte_eth_dev *dev;
3367 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3368 dev = &rte_eth_devices[port_id];
3369 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
3372 * Check if the device supports dev_infos_get, if it does not
3373 * skip min_mtu/max_mtu validation here as this requires values
3374 * that are populated within the call to rte_eth_dev_info_get()
3375 * which relies on dev->dev_ops->dev_infos_get.
3377 if (*dev->dev_ops->dev_infos_get != NULL) {
3378 ret = rte_eth_dev_info_get(port_id, &dev_info);
3382 ret = eth_dev_validate_mtu(port_id, &dev_info, mtu);
3387 if (dev->data->dev_configured == 0) {
3389 "Port %u must be configured before MTU set\n",
3394 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
3396 dev->data->mtu = mtu;
3398 return eth_err(port_id, ret);
3402 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
3404 struct rte_eth_dev *dev;
3407 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3408 dev = &rte_eth_devices[port_id];
3410 if (!(dev->data->dev_conf.rxmode.offloads &
3411 RTE_ETH_RX_OFFLOAD_VLAN_FILTER)) {
3412 RTE_ETHDEV_LOG(ERR, "Port %u: VLAN-filtering disabled\n",
3417 if (vlan_id > 4095) {
3418 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
3422 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
3424 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
3426 struct rte_vlan_filter_conf *vfc;
3430 vfc = &dev->data->vlan_filter_conf;
3431 vidx = vlan_id / 64;
3432 vbit = vlan_id % 64;
3435 vfc->ids[vidx] |= RTE_BIT64(vbit);
3437 vfc->ids[vidx] &= ~RTE_BIT64(vbit);
3440 return eth_err(port_id, ret);
3444 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
3447 struct rte_eth_dev *dev;
3449 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3450 dev = &rte_eth_devices[port_id];
3452 if (rx_queue_id >= dev->data->nb_rx_queues) {
3453 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
3457 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
3458 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
3464 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
3465 enum rte_vlan_type vlan_type,
3468 struct rte_eth_dev *dev;
3470 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3471 dev = &rte_eth_devices[port_id];
3473 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
3474 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
3479 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
3481 struct rte_eth_dev_info dev_info;
3482 struct rte_eth_dev *dev;
3486 uint64_t orig_offloads;
3487 uint64_t dev_offloads;
3488 uint64_t new_offloads;
3490 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3491 dev = &rte_eth_devices[port_id];
3493 /* save original values in case of failure */
3494 orig_offloads = dev->data->dev_conf.rxmode.offloads;
3495 dev_offloads = orig_offloads;
3497 /* check which option changed by application */
3498 cur = !!(offload_mask & RTE_ETH_VLAN_STRIP_OFFLOAD);
3499 org = !!(dev_offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP);
3502 dev_offloads |= RTE_ETH_RX_OFFLOAD_VLAN_STRIP;
3504 dev_offloads &= ~RTE_ETH_RX_OFFLOAD_VLAN_STRIP;
3505 mask |= RTE_ETH_VLAN_STRIP_MASK;
3508 cur = !!(offload_mask & RTE_ETH_VLAN_FILTER_OFFLOAD);
3509 org = !!(dev_offloads & RTE_ETH_RX_OFFLOAD_VLAN_FILTER);
3512 dev_offloads |= RTE_ETH_RX_OFFLOAD_VLAN_FILTER;
3514 dev_offloads &= ~RTE_ETH_RX_OFFLOAD_VLAN_FILTER;
3515 mask |= RTE_ETH_VLAN_FILTER_MASK;
3518 cur = !!(offload_mask & RTE_ETH_VLAN_EXTEND_OFFLOAD);
3519 org = !!(dev_offloads & RTE_ETH_RX_OFFLOAD_VLAN_EXTEND);
3522 dev_offloads |= RTE_ETH_RX_OFFLOAD_VLAN_EXTEND;
3524 dev_offloads &= ~RTE_ETH_RX_OFFLOAD_VLAN_EXTEND;
3525 mask |= RTE_ETH_VLAN_EXTEND_MASK;
3528 cur = !!(offload_mask & RTE_ETH_QINQ_STRIP_OFFLOAD);
3529 org = !!(dev_offloads & RTE_ETH_RX_OFFLOAD_QINQ_STRIP);
3532 dev_offloads |= RTE_ETH_RX_OFFLOAD_QINQ_STRIP;
3534 dev_offloads &= ~RTE_ETH_RX_OFFLOAD_QINQ_STRIP;
3535 mask |= RTE_ETH_QINQ_STRIP_MASK;
3542 ret = rte_eth_dev_info_get(port_id, &dev_info);
3546 /* Rx VLAN offloading must be within its device capabilities */
3547 if ((dev_offloads & dev_info.rx_offload_capa) != dev_offloads) {
3548 new_offloads = dev_offloads & ~orig_offloads;
3550 "Ethdev port_id=%u requested new added VLAN offloads "
3551 "0x%" PRIx64 " must be within Rx offloads capabilities "
3552 "0x%" PRIx64 " in %s()\n",
3553 port_id, new_offloads, dev_info.rx_offload_capa,
3558 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
3559 dev->data->dev_conf.rxmode.offloads = dev_offloads;
3560 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
3562 /* hit an error restore original values */
3563 dev->data->dev_conf.rxmode.offloads = orig_offloads;
3566 return eth_err(port_id, ret);
3570 rte_eth_dev_get_vlan_offload(uint16_t port_id)
3572 struct rte_eth_dev *dev;
3573 uint64_t *dev_offloads;
3576 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3577 dev = &rte_eth_devices[port_id];
3578 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
3580 if (*dev_offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP)
3581 ret |= RTE_ETH_VLAN_STRIP_OFFLOAD;
3583 if (*dev_offloads & RTE_ETH_RX_OFFLOAD_VLAN_FILTER)
3584 ret |= RTE_ETH_VLAN_FILTER_OFFLOAD;
3586 if (*dev_offloads & RTE_ETH_RX_OFFLOAD_VLAN_EXTEND)
3587 ret |= RTE_ETH_VLAN_EXTEND_OFFLOAD;
3589 if (*dev_offloads & RTE_ETH_RX_OFFLOAD_QINQ_STRIP)
3590 ret |= RTE_ETH_QINQ_STRIP_OFFLOAD;
3596 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
3598 struct rte_eth_dev *dev;
3600 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3601 dev = &rte_eth_devices[port_id];
3603 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
3604 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
3608 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3610 struct rte_eth_dev *dev;
3612 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3613 dev = &rte_eth_devices[port_id];
3615 if (fc_conf == NULL) {
3617 "Cannot get ethdev port %u flow control config to NULL\n",
3622 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
3623 memset(fc_conf, 0, sizeof(*fc_conf));
3624 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
3628 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3630 struct rte_eth_dev *dev;
3632 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3633 dev = &rte_eth_devices[port_id];
3635 if (fc_conf == NULL) {
3637 "Cannot set ethdev port %u flow control from NULL config\n",
3642 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
3643 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
3647 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
3648 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
3652 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
3653 struct rte_eth_pfc_conf *pfc_conf)
3655 struct rte_eth_dev *dev;
3657 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3658 dev = &rte_eth_devices[port_id];
3660 if (pfc_conf == NULL) {
3662 "Cannot set ethdev port %u priority flow control from NULL config\n",
3667 if (pfc_conf->priority > (RTE_ETH_DCB_NUM_USER_PRIORITIES - 1)) {
3668 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
3672 /* High water, low water validation are device specific */
3673 if (*dev->dev_ops->priority_flow_ctrl_set)
3674 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
3680 validate_rx_pause_config(struct rte_eth_dev_info *dev_info, uint8_t tc_max,
3681 struct rte_eth_pfc_queue_conf *pfc_queue_conf)
3683 if ((pfc_queue_conf->mode == RTE_ETH_FC_RX_PAUSE) ||
3684 (pfc_queue_conf->mode == RTE_ETH_FC_FULL)) {
3685 if (pfc_queue_conf->rx_pause.tx_qid >= dev_info->nb_tx_queues) {
3687 "PFC Tx queue not in range for Rx pause requested:%d configured:%d\n",
3688 pfc_queue_conf->rx_pause.tx_qid,
3689 dev_info->nb_tx_queues);
3693 if (pfc_queue_conf->rx_pause.tc >= tc_max) {
3695 "PFC TC not in range for Rx pause requested:%d max:%d\n",
3696 pfc_queue_conf->rx_pause.tc, tc_max);
3705 validate_tx_pause_config(struct rte_eth_dev_info *dev_info, uint8_t tc_max,
3706 struct rte_eth_pfc_queue_conf *pfc_queue_conf)
3708 if ((pfc_queue_conf->mode == RTE_ETH_FC_TX_PAUSE) ||
3709 (pfc_queue_conf->mode == RTE_ETH_FC_FULL)) {
3710 if (pfc_queue_conf->tx_pause.rx_qid >= dev_info->nb_rx_queues) {
3712 "PFC Rx queue not in range for Tx pause requested:%d configured:%d\n",
3713 pfc_queue_conf->tx_pause.rx_qid,
3714 dev_info->nb_rx_queues);
3718 if (pfc_queue_conf->tx_pause.tc >= tc_max) {
3720 "PFC TC not in range for Tx pause requested:%d max:%d\n",
3721 pfc_queue_conf->tx_pause.tc, tc_max);
3730 rte_eth_dev_priority_flow_ctrl_queue_info_get(uint16_t port_id,
3731 struct rte_eth_pfc_queue_info *pfc_queue_info)
3733 struct rte_eth_dev *dev;
3735 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3736 dev = &rte_eth_devices[port_id];
3738 if (pfc_queue_info == NULL) {
3739 RTE_ETHDEV_LOG(ERR, "PFC info param is NULL for port (%u)\n",
3744 if (*dev->dev_ops->priority_flow_ctrl_queue_info_get)
3745 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_queue_info_get)
3746 (dev, pfc_queue_info));
3751 rte_eth_dev_priority_flow_ctrl_queue_configure(uint16_t port_id,
3752 struct rte_eth_pfc_queue_conf *pfc_queue_conf)
3754 struct rte_eth_pfc_queue_info pfc_info;
3755 struct rte_eth_dev_info dev_info;
3756 struct rte_eth_dev *dev;
3759 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3760 dev = &rte_eth_devices[port_id];
3762 if (pfc_queue_conf == NULL) {
3763 RTE_ETHDEV_LOG(ERR, "PFC parameters are NULL for port (%u)\n",
3768 ret = rte_eth_dev_info_get(port_id, &dev_info);
3772 ret = rte_eth_dev_priority_flow_ctrl_queue_info_get(port_id, &pfc_info);
3776 if (pfc_info.tc_max == 0) {
3777 RTE_ETHDEV_LOG(ERR, "Ethdev port %u does not support PFC TC values\n",
3782 /* Check requested mode supported or not */
3783 if (pfc_info.mode_capa == RTE_ETH_FC_RX_PAUSE &&
3784 pfc_queue_conf->mode == RTE_ETH_FC_TX_PAUSE) {
3785 RTE_ETHDEV_LOG(ERR, "PFC Tx pause unsupported for port (%d)\n",
3790 if (pfc_info.mode_capa == RTE_ETH_FC_TX_PAUSE &&
3791 pfc_queue_conf->mode == RTE_ETH_FC_RX_PAUSE) {
3792 RTE_ETHDEV_LOG(ERR, "PFC Rx pause unsupported for port (%d)\n",
3797 /* Validate Rx pause parameters */
3798 if (pfc_info.mode_capa == RTE_ETH_FC_FULL ||
3799 pfc_info.mode_capa == RTE_ETH_FC_RX_PAUSE) {
3800 ret = validate_rx_pause_config(&dev_info, pfc_info.tc_max,
3806 /* Validate Tx pause parameters */
3807 if (pfc_info.mode_capa == RTE_ETH_FC_FULL ||
3808 pfc_info.mode_capa == RTE_ETH_FC_TX_PAUSE) {
3809 ret = validate_tx_pause_config(&dev_info, pfc_info.tc_max,
3815 if (*dev->dev_ops->priority_flow_ctrl_queue_config)
3816 return eth_err(port_id,
3817 (*dev->dev_ops->priority_flow_ctrl_queue_config)(
3818 dev, pfc_queue_conf));
3823 eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
3828 num = (reta_size + RTE_ETH_RETA_GROUP_SIZE - 1) / RTE_ETH_RETA_GROUP_SIZE;
3829 for (i = 0; i < num; i++) {
3830 if (reta_conf[i].mask)
3838 eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
3842 uint16_t i, idx, shift;
3845 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
3849 for (i = 0; i < reta_size; i++) {
3850 idx = i / RTE_ETH_RETA_GROUP_SIZE;
3851 shift = i % RTE_ETH_RETA_GROUP_SIZE;
3852 if ((reta_conf[idx].mask & RTE_BIT64(shift)) &&
3853 (reta_conf[idx].reta[shift] >= max_rxq)) {
3855 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
3857 reta_conf[idx].reta[shift], max_rxq);
3866 rte_eth_dev_rss_reta_update(uint16_t port_id,
3867 struct rte_eth_rss_reta_entry64 *reta_conf,
3870 enum rte_eth_rx_mq_mode mq_mode;
3871 struct rte_eth_dev *dev;
3874 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3875 dev = &rte_eth_devices[port_id];
3877 if (reta_conf == NULL) {
3879 "Cannot update ethdev port %u RSS RETA to NULL\n",
3884 if (reta_size == 0) {
3886 "Cannot update ethdev port %u RSS RETA with zero size\n",
3891 /* Check mask bits */
3892 ret = eth_check_reta_mask(reta_conf, reta_size);
3896 /* Check entry value */
3897 ret = eth_check_reta_entry(reta_conf, reta_size,
3898 dev->data->nb_rx_queues);
3902 mq_mode = dev->data->dev_conf.rxmode.mq_mode;
3903 if (!(mq_mode & RTE_ETH_MQ_RX_RSS_FLAG)) {
3904 RTE_ETHDEV_LOG(ERR, "Multi-queue RSS mode isn't enabled.\n");
3908 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
3909 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
3914 rte_eth_dev_rss_reta_query(uint16_t port_id,
3915 struct rte_eth_rss_reta_entry64 *reta_conf,
3918 struct rte_eth_dev *dev;
3921 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3922 dev = &rte_eth_devices[port_id];
3924 if (reta_conf == NULL) {
3926 "Cannot query ethdev port %u RSS RETA from NULL config\n",
3931 /* Check mask bits */
3932 ret = eth_check_reta_mask(reta_conf, reta_size);
3936 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
3937 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
3942 rte_eth_dev_rss_hash_update(uint16_t port_id,
3943 struct rte_eth_rss_conf *rss_conf)
3945 struct rte_eth_dev *dev;
3946 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
3947 enum rte_eth_rx_mq_mode mq_mode;
3950 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3951 dev = &rte_eth_devices[port_id];
3953 if (rss_conf == NULL) {
3955 "Cannot update ethdev port %u RSS hash from NULL config\n",
3960 ret = rte_eth_dev_info_get(port_id, &dev_info);
3964 rss_conf->rss_hf = rte_eth_rss_hf_refine(rss_conf->rss_hf);
3965 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
3966 dev_info.flow_type_rss_offloads) {
3968 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
3969 port_id, rss_conf->rss_hf,
3970 dev_info.flow_type_rss_offloads);
3974 mq_mode = dev->data->dev_conf.rxmode.mq_mode;
3975 if (!(mq_mode & RTE_ETH_MQ_RX_RSS_FLAG)) {
3976 RTE_ETHDEV_LOG(ERR, "Multi-queue RSS mode isn't enabled.\n");
3980 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
3981 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
3986 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
3987 struct rte_eth_rss_conf *rss_conf)
3989 struct rte_eth_dev *dev;
3991 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3992 dev = &rte_eth_devices[port_id];
3994 if (rss_conf == NULL) {
3996 "Cannot get ethdev port %u RSS hash config to NULL\n",
4001 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
4002 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
4007 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
4008 struct rte_eth_udp_tunnel *udp_tunnel)
4010 struct rte_eth_dev *dev;
4012 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4013 dev = &rte_eth_devices[port_id];
4015 if (udp_tunnel == NULL) {
4017 "Cannot add ethdev port %u UDP tunnel port from NULL UDP tunnel\n",
4022 if (udp_tunnel->prot_type >= RTE_ETH_TUNNEL_TYPE_MAX) {
4023 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4027 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
4028 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
4033 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
4034 struct rte_eth_udp_tunnel *udp_tunnel)
4036 struct rte_eth_dev *dev;
4038 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4039 dev = &rte_eth_devices[port_id];
4041 if (udp_tunnel == NULL) {
4043 "Cannot delete ethdev port %u UDP tunnel port from NULL UDP tunnel\n",
4048 if (udp_tunnel->prot_type >= RTE_ETH_TUNNEL_TYPE_MAX) {
4049 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4053 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
4054 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
4059 rte_eth_led_on(uint16_t port_id)
4061 struct rte_eth_dev *dev;
4063 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4064 dev = &rte_eth_devices[port_id];
4066 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
4067 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
4071 rte_eth_led_off(uint16_t port_id)
4073 struct rte_eth_dev *dev;
4075 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4076 dev = &rte_eth_devices[port_id];
4078 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
4079 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
4083 rte_eth_fec_get_capability(uint16_t port_id,
4084 struct rte_eth_fec_capa *speed_fec_capa,
4087 struct rte_eth_dev *dev;
4090 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4091 dev = &rte_eth_devices[port_id];
4093 if (speed_fec_capa == NULL && num > 0) {
4095 "Cannot get ethdev port %u FEC capability to NULL when array size is non zero\n",
4100 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_get_capability, -ENOTSUP);
4101 ret = (*dev->dev_ops->fec_get_capability)(dev, speed_fec_capa, num);
4107 rte_eth_fec_get(uint16_t port_id, uint32_t *fec_capa)
4109 struct rte_eth_dev *dev;
4111 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4112 dev = &rte_eth_devices[port_id];
4114 if (fec_capa == NULL) {
4116 "Cannot get ethdev port %u current FEC mode to NULL\n",
4121 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_get, -ENOTSUP);
4122 return eth_err(port_id, (*dev->dev_ops->fec_get)(dev, fec_capa));
4126 rte_eth_fec_set(uint16_t port_id, uint32_t fec_capa)
4128 struct rte_eth_dev *dev;
4130 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4131 dev = &rte_eth_devices[port_id];
4133 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_set, -ENOTSUP);
4134 return eth_err(port_id, (*dev->dev_ops->fec_set)(dev, fec_capa));
4138 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
4142 eth_dev_get_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
4144 struct rte_eth_dev_info dev_info;
4145 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4149 ret = rte_eth_dev_info_get(port_id, &dev_info);
4153 for (i = 0; i < dev_info.max_mac_addrs; i++)
4154 if (memcmp(addr, &dev->data->mac_addrs[i],
4155 RTE_ETHER_ADDR_LEN) == 0)
4161 static const struct rte_ether_addr null_mac_addr;
4164 rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr,
4167 struct rte_eth_dev *dev;
4172 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4173 dev = &rte_eth_devices[port_id];
4177 "Cannot add ethdev port %u MAC address from NULL address\n",
4182 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
4184 if (rte_is_zero_ether_addr(addr)) {
4185 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
4189 if (pool >= RTE_ETH_64_POOLS) {
4190 RTE_ETHDEV_LOG(ERR, "Pool ID must be 0-%d\n", RTE_ETH_64_POOLS - 1);
4194 index = eth_dev_get_mac_addr_index(port_id, addr);
4196 index = eth_dev_get_mac_addr_index(port_id, &null_mac_addr);
4198 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
4203 pool_mask = dev->data->mac_pool_sel[index];
4205 /* Check if both MAC address and pool is already there, and do nothing */
4206 if (pool_mask & RTE_BIT64(pool))
4211 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
4214 /* Update address in NIC data structure */
4215 rte_ether_addr_copy(addr, &dev->data->mac_addrs[index]);
4217 /* Update pool bitmap in NIC data structure */
4218 dev->data->mac_pool_sel[index] |= RTE_BIT64(pool);
4221 return eth_err(port_id, ret);
4225 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *addr)
4227 struct rte_eth_dev *dev;
4230 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4231 dev = &rte_eth_devices[port_id];
4235 "Cannot remove ethdev port %u MAC address from NULL address\n",
4240 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
4242 index = eth_dev_get_mac_addr_index(port_id, addr);
4245 "Port %u: Cannot remove default MAC address\n",
4248 } else if (index < 0)
4249 return 0; /* Do nothing if address wasn't found */
4252 (*dev->dev_ops->mac_addr_remove)(dev, index);
4254 /* Update address in NIC data structure */
4255 rte_ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
4257 /* reset pool bitmap */
4258 dev->data->mac_pool_sel[index] = 0;
4264 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *addr)
4266 struct rte_eth_dev *dev;
4269 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4270 dev = &rte_eth_devices[port_id];
4274 "Cannot set ethdev port %u default MAC address from NULL address\n",
4279 if (!rte_is_valid_assigned_ether_addr(addr))
4282 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
4284 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
4288 /* Update default address in NIC data structure */
4289 rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]);
4296 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
4300 eth_dev_get_hash_mac_addr_index(uint16_t port_id,
4301 const struct rte_ether_addr *addr)
4303 struct rte_eth_dev_info dev_info;
4304 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4308 ret = rte_eth_dev_info_get(port_id, &dev_info);
4312 if (!dev->data->hash_mac_addrs)
4315 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
4316 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
4317 RTE_ETHER_ADDR_LEN) == 0)
4324 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
4329 struct rte_eth_dev *dev;
4331 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4332 dev = &rte_eth_devices[port_id];
4336 "Cannot set ethdev port %u unicast hash table from NULL address\n",
4341 if (rte_is_zero_ether_addr(addr)) {
4342 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
4347 index = eth_dev_get_hash_mac_addr_index(port_id, addr);
4348 /* Check if it's already there, and do nothing */
4349 if ((index >= 0) && on)
4355 "Port %u: the MAC address was not set in UTA\n",
4360 index = eth_dev_get_hash_mac_addr_index(port_id, &null_mac_addr);
4362 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
4368 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
4369 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
4371 /* Update address in NIC data structure */
4373 rte_ether_addr_copy(addr,
4374 &dev->data->hash_mac_addrs[index]);
4376 rte_ether_addr_copy(&null_mac_addr,
4377 &dev->data->hash_mac_addrs[index]);
4380 return eth_err(port_id, ret);
4384 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
4386 struct rte_eth_dev *dev;
4388 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4389 dev = &rte_eth_devices[port_id];
4391 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
4392 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
4396 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
4399 struct rte_eth_dev *dev;
4400 struct rte_eth_dev_info dev_info;
4401 struct rte_eth_link link;
4404 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4405 dev = &rte_eth_devices[port_id];
4407 ret = rte_eth_dev_info_get(port_id, &dev_info);
4411 link = dev->data->dev_link;
4413 if (queue_idx > dev_info.max_tx_queues) {
4415 "Set queue rate limit:port %u: invalid queue ID=%u\n",
4416 port_id, queue_idx);
4420 if (tx_rate > link.link_speed) {
4422 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
4423 tx_rate, link.link_speed);
4427 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
4428 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
4429 queue_idx, tx_rate));
4432 RTE_INIT(eth_dev_init_fp_ops)
4436 for (i = 0; i != RTE_DIM(rte_eth_fp_ops); i++)
4437 eth_dev_fp_ops_reset(rte_eth_fp_ops + i);
4440 RTE_INIT(eth_dev_init_cb_lists)
4444 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
4445 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
4449 rte_eth_dev_callback_register(uint16_t port_id,
4450 enum rte_eth_event_type event,
4451 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4453 struct rte_eth_dev *dev;
4454 struct rte_eth_dev_callback *user_cb;
4458 if (cb_fn == NULL) {
4460 "Cannot register ethdev port %u callback from NULL\n",
4465 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4466 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4470 if (port_id == RTE_ETH_ALL) {
4472 last_port = RTE_MAX_ETHPORTS - 1;
4474 next_port = last_port = port_id;
4477 rte_spinlock_lock(ð_dev_cb_lock);
4480 dev = &rte_eth_devices[next_port];
4482 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
4483 if (user_cb->cb_fn == cb_fn &&
4484 user_cb->cb_arg == cb_arg &&
4485 user_cb->event == event) {
4490 /* create a new callback. */
4491 if (user_cb == NULL) {
4492 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
4493 sizeof(struct rte_eth_dev_callback), 0);
4494 if (user_cb != NULL) {
4495 user_cb->cb_fn = cb_fn;
4496 user_cb->cb_arg = cb_arg;
4497 user_cb->event = event;
4498 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
4501 rte_spinlock_unlock(ð_dev_cb_lock);
4502 rte_eth_dev_callback_unregister(port_id, event,
4508 } while (++next_port <= last_port);
4510 rte_spinlock_unlock(ð_dev_cb_lock);
4515 rte_eth_dev_callback_unregister(uint16_t port_id,
4516 enum rte_eth_event_type event,
4517 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4520 struct rte_eth_dev *dev;
4521 struct rte_eth_dev_callback *cb, *next;
4525 if (cb_fn == NULL) {
4527 "Cannot unregister ethdev port %u callback from NULL\n",
4532 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4533 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4537 if (port_id == RTE_ETH_ALL) {
4539 last_port = RTE_MAX_ETHPORTS - 1;
4541 next_port = last_port = port_id;
4544 rte_spinlock_lock(ð_dev_cb_lock);
4547 dev = &rte_eth_devices[next_port];
4549 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
4552 next = TAILQ_NEXT(cb, next);
4554 if (cb->cb_fn != cb_fn || cb->event != event ||
4555 (cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
4559 * if this callback is not executing right now,
4562 if (cb->active == 0) {
4563 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
4569 } while (++next_port <= last_port);
4571 rte_spinlock_unlock(ð_dev_cb_lock);
4576 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
4579 struct rte_eth_dev *dev;
4580 struct rte_intr_handle *intr_handle;
4584 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4585 dev = &rte_eth_devices[port_id];
4587 if (!dev->intr_handle) {
4588 RTE_ETHDEV_LOG(ERR, "Rx Intr handle unset\n");
4592 intr_handle = dev->intr_handle;
4593 if (rte_intr_vec_list_index_get(intr_handle, 0) < 0) {
4594 RTE_ETHDEV_LOG(ERR, "Rx Intr vector unset\n");
4598 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
4599 vec = rte_intr_vec_list_index_get(intr_handle, qid);
4600 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4601 if (rc && rc != -EEXIST) {
4603 "p %u q %u Rx ctl error op %d epfd %d vec %u\n",
4604 port_id, qid, op, epfd, vec);
4612 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
4614 struct rte_intr_handle *intr_handle;
4615 struct rte_eth_dev *dev;
4616 unsigned int efd_idx;
4620 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
4621 dev = &rte_eth_devices[port_id];
4623 if (queue_id >= dev->data->nb_rx_queues) {
4624 RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u\n", queue_id);
4628 if (!dev->intr_handle) {
4629 RTE_ETHDEV_LOG(ERR, "Rx Intr handle unset\n");
4633 intr_handle = dev->intr_handle;
4634 if (rte_intr_vec_list_index_get(intr_handle, 0) < 0) {
4635 RTE_ETHDEV_LOG(ERR, "Rx Intr vector unset\n");
4639 vec = rte_intr_vec_list_index_get(intr_handle, queue_id);
4640 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
4641 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
4642 fd = rte_intr_efds_index_get(intr_handle, efd_idx);
4648 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
4649 int epfd, int op, void *data)
4652 struct rte_eth_dev *dev;
4653 struct rte_intr_handle *intr_handle;
4656 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4657 dev = &rte_eth_devices[port_id];
4659 if (queue_id >= dev->data->nb_rx_queues) {
4660 RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u\n", queue_id);
4664 if (!dev->intr_handle) {
4665 RTE_ETHDEV_LOG(ERR, "Rx Intr handle unset\n");
4669 intr_handle = dev->intr_handle;
4670 if (rte_intr_vec_list_index_get(intr_handle, 0) < 0) {
4671 RTE_ETHDEV_LOG(ERR, "Rx Intr vector unset\n");
4675 vec = rte_intr_vec_list_index_get(intr_handle, queue_id);
4676 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4677 if (rc && rc != -EEXIST) {
4679 "p %u q %u Rx ctl error op %d epfd %d vec %u\n",
4680 port_id, queue_id, op, epfd, vec);
4688 rte_eth_dev_rx_intr_enable(uint16_t port_id,
4691 struct rte_eth_dev *dev;
4694 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4695 dev = &rte_eth_devices[port_id];
4697 ret = eth_dev_validate_rx_queue(dev, queue_id);
4701 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
4702 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id));
4706 rte_eth_dev_rx_intr_disable(uint16_t port_id,
4709 struct rte_eth_dev *dev;
4712 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4713 dev = &rte_eth_devices[port_id];
4715 ret = eth_dev_validate_rx_queue(dev, queue_id);
4719 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
4720 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id));
4724 const struct rte_eth_rxtx_callback *
4725 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
4726 rte_rx_callback_fn fn, void *user_param)
4728 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4729 rte_errno = ENOTSUP;
4732 struct rte_eth_dev *dev;
4734 /* check input parameters */
4735 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4736 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4740 dev = &rte_eth_devices[port_id];
4741 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
4745 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4753 cb->param = user_param;
4755 rte_spinlock_lock(ð_dev_rx_cb_lock);
4756 /* Add the callbacks in fifo order. */
4757 struct rte_eth_rxtx_callback *tail =
4758 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4761 /* Stores to cb->fn and cb->param should complete before
4762 * cb is visible to data plane.
4765 &rte_eth_devices[port_id].post_rx_burst_cbs[queue_id],
4766 cb, __ATOMIC_RELEASE);
4771 /* Stores to cb->fn and cb->param should complete before
4772 * cb is visible to data plane.
4774 __atomic_store_n(&tail->next, cb, __ATOMIC_RELEASE);
4776 rte_spinlock_unlock(ð_dev_rx_cb_lock);
4781 const struct rte_eth_rxtx_callback *
4782 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
4783 rte_rx_callback_fn fn, void *user_param)
4785 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4786 rte_errno = ENOTSUP;
4789 /* check input parameters */
4790 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4791 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4796 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4804 cb->param = user_param;
4806 rte_spinlock_lock(ð_dev_rx_cb_lock);
4807 /* Add the callbacks at first position */
4808 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4809 /* Stores to cb->fn, cb->param and cb->next should complete before
4810 * cb is visible to data plane threads.
4813 &rte_eth_devices[port_id].post_rx_burst_cbs[queue_id],
4814 cb, __ATOMIC_RELEASE);
4815 rte_spinlock_unlock(ð_dev_rx_cb_lock);
4820 const struct rte_eth_rxtx_callback *
4821 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
4822 rte_tx_callback_fn fn, void *user_param)
4824 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4825 rte_errno = ENOTSUP;
4828 struct rte_eth_dev *dev;
4830 /* check input parameters */
4831 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4832 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
4837 dev = &rte_eth_devices[port_id];
4838 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
4843 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4851 cb->param = user_param;
4853 rte_spinlock_lock(ð_dev_tx_cb_lock);
4854 /* Add the callbacks in fifo order. */
4855 struct rte_eth_rxtx_callback *tail =
4856 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
4859 /* Stores to cb->fn and cb->param should complete before
4860 * cb is visible to data plane.
4863 &rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id],
4864 cb, __ATOMIC_RELEASE);
4869 /* Stores to cb->fn and cb->param should complete before
4870 * cb is visible to data plane.
4872 __atomic_store_n(&tail->next, cb, __ATOMIC_RELEASE);
4874 rte_spinlock_unlock(ð_dev_tx_cb_lock);
4880 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
4881 const struct rte_eth_rxtx_callback *user_cb)
4883 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4886 /* Check input parameters. */
4887 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4888 if (user_cb == NULL ||
4889 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
4892 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4893 struct rte_eth_rxtx_callback *cb;
4894 struct rte_eth_rxtx_callback **prev_cb;
4897 rte_spinlock_lock(ð_dev_rx_cb_lock);
4898 prev_cb = &dev->post_rx_burst_cbs[queue_id];
4899 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4901 if (cb == user_cb) {
4902 /* Remove the user cb from the callback list. */
4903 __atomic_store_n(prev_cb, cb->next, __ATOMIC_RELAXED);
4908 rte_spinlock_unlock(ð_dev_rx_cb_lock);
4914 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
4915 const struct rte_eth_rxtx_callback *user_cb)
4917 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4920 /* Check input parameters. */
4921 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4922 if (user_cb == NULL ||
4923 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
4926 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4928 struct rte_eth_rxtx_callback *cb;
4929 struct rte_eth_rxtx_callback **prev_cb;
4931 rte_spinlock_lock(ð_dev_tx_cb_lock);
4932 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
4933 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4935 if (cb == user_cb) {
4936 /* Remove the user cb from the callback list. */
4937 __atomic_store_n(prev_cb, cb->next, __ATOMIC_RELAXED);
4942 rte_spinlock_unlock(ð_dev_tx_cb_lock);
4948 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4949 struct rte_eth_rxq_info *qinfo)
4951 struct rte_eth_dev *dev;
4953 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4954 dev = &rte_eth_devices[port_id];
4956 if (queue_id >= dev->data->nb_rx_queues) {
4957 RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u\n", queue_id);
4961 if (qinfo == NULL) {
4962 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u Rx queue %u info to NULL\n",
4967 if (dev->data->rx_queues == NULL ||
4968 dev->data->rx_queues[queue_id] == NULL) {
4970 "Rx queue %"PRIu16" of device with port_id=%"
4971 PRIu16" has not been setup\n",
4976 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
4977 RTE_ETHDEV_LOG(INFO,
4978 "Can't get hairpin Rx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
4983 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
4985 memset(qinfo, 0, sizeof(*qinfo));
4986 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
4987 qinfo->queue_state = dev->data->rx_queue_state[queue_id];
4993 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4994 struct rte_eth_txq_info *qinfo)
4996 struct rte_eth_dev *dev;
4998 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4999 dev = &rte_eth_devices[port_id];
5001 if (queue_id >= dev->data->nb_tx_queues) {
5002 RTE_ETHDEV_LOG(ERR, "Invalid Tx queue_id=%u\n", queue_id);
5006 if (qinfo == NULL) {
5007 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u Tx queue %u info to NULL\n",
5012 if (dev->data->tx_queues == NULL ||
5013 dev->data->tx_queues[queue_id] == NULL) {
5015 "Tx queue %"PRIu16" of device with port_id=%"
5016 PRIu16" has not been setup\n",
5021 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
5022 RTE_ETHDEV_LOG(INFO,
5023 "Can't get hairpin Tx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
5028 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
5030 memset(qinfo, 0, sizeof(*qinfo));
5031 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
5032 qinfo->queue_state = dev->data->tx_queue_state[queue_id];
5038 rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
5039 struct rte_eth_burst_mode *mode)
5041 struct rte_eth_dev *dev;
5043 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5044 dev = &rte_eth_devices[port_id];
5046 if (queue_id >= dev->data->nb_rx_queues) {
5047 RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u\n", queue_id);
5053 "Cannot get ethdev port %u Rx queue %u burst mode to NULL\n",
5058 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_burst_mode_get, -ENOTSUP);
5059 memset(mode, 0, sizeof(*mode));
5060 return eth_err(port_id,
5061 dev->dev_ops->rx_burst_mode_get(dev, queue_id, mode));
5065 rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
5066 struct rte_eth_burst_mode *mode)
5068 struct rte_eth_dev *dev;
5070 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5071 dev = &rte_eth_devices[port_id];
5073 if (queue_id >= dev->data->nb_tx_queues) {
5074 RTE_ETHDEV_LOG(ERR, "Invalid Tx queue_id=%u\n", queue_id);
5080 "Cannot get ethdev port %u Tx queue %u burst mode to NULL\n",
5085 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_burst_mode_get, -ENOTSUP);
5086 memset(mode, 0, sizeof(*mode));
5087 return eth_err(port_id,
5088 dev->dev_ops->tx_burst_mode_get(dev, queue_id, mode));
5092 rte_eth_get_monitor_addr(uint16_t port_id, uint16_t queue_id,
5093 struct rte_power_monitor_cond *pmc)
5095 struct rte_eth_dev *dev;
5097 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5098 dev = &rte_eth_devices[port_id];
5100 if (queue_id >= dev->data->nb_rx_queues) {
5101 RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u\n", queue_id);
5107 "Cannot get ethdev port %u Rx queue %u power monitor condition to NULL\n",
5112 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_monitor_addr, -ENOTSUP);
5113 return eth_err(port_id,
5114 dev->dev_ops->get_monitor_addr(dev->data->rx_queues[queue_id], pmc));
5118 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
5119 struct rte_ether_addr *mc_addr_set,
5120 uint32_t nb_mc_addr)
5122 struct rte_eth_dev *dev;
5124 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5125 dev = &rte_eth_devices[port_id];
5127 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
5128 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
5129 mc_addr_set, nb_mc_addr));
5133 rte_eth_timesync_enable(uint16_t port_id)
5135 struct rte_eth_dev *dev;
5137 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5138 dev = &rte_eth_devices[port_id];
5140 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
5141 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
5145 rte_eth_timesync_disable(uint16_t port_id)
5147 struct rte_eth_dev *dev;
5149 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5150 dev = &rte_eth_devices[port_id];
5152 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
5153 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
5157 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
5160 struct rte_eth_dev *dev;
5162 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5163 dev = &rte_eth_devices[port_id];
5165 if (timestamp == NULL) {
5167 "Cannot read ethdev port %u Rx timestamp to NULL\n",
5172 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
5173 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
5174 (dev, timestamp, flags));
5178 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
5179 struct timespec *timestamp)
5181 struct rte_eth_dev *dev;
5183 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5184 dev = &rte_eth_devices[port_id];
5186 if (timestamp == NULL) {
5188 "Cannot read ethdev port %u Tx timestamp to NULL\n",
5193 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
5194 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
5199 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
5201 struct rte_eth_dev *dev;
5203 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5204 dev = &rte_eth_devices[port_id];
5206 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
5207 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev, delta));
5211 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
5213 struct rte_eth_dev *dev;
5215 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5216 dev = &rte_eth_devices[port_id];
5218 if (timestamp == NULL) {
5220 "Cannot read ethdev port %u timesync time to NULL\n",
5225 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
5226 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
5231 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
5233 struct rte_eth_dev *dev;
5235 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5236 dev = &rte_eth_devices[port_id];
5238 if (timestamp == NULL) {
5240 "Cannot write ethdev port %u timesync from NULL time\n",
5245 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
5246 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
5251 rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
5253 struct rte_eth_dev *dev;
5255 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5256 dev = &rte_eth_devices[port_id];
5258 if (clock == NULL) {
5259 RTE_ETHDEV_LOG(ERR, "Cannot read ethdev port %u clock to NULL\n",
5264 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->read_clock, -ENOTSUP);
5265 return eth_err(port_id, (*dev->dev_ops->read_clock)(dev, clock));
5269 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
5271 struct rte_eth_dev *dev;
5273 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5274 dev = &rte_eth_devices[port_id];
5278 "Cannot get ethdev port %u register info to NULL\n",
5283 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
5284 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
5288 rte_eth_dev_get_eeprom_length(uint16_t port_id)
5290 struct rte_eth_dev *dev;
5292 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5293 dev = &rte_eth_devices[port_id];
5295 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
5296 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
5300 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
5302 struct rte_eth_dev *dev;
5304 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5305 dev = &rte_eth_devices[port_id];
5309 "Cannot get ethdev port %u EEPROM info to NULL\n",
5314 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
5315 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
5319 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
5321 struct rte_eth_dev *dev;
5323 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5324 dev = &rte_eth_devices[port_id];
5328 "Cannot set ethdev port %u EEPROM from NULL info\n",
5333 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
5334 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
5338 rte_eth_dev_get_module_info(uint16_t port_id,
5339 struct rte_eth_dev_module_info *modinfo)
5341 struct rte_eth_dev *dev;
5343 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5344 dev = &rte_eth_devices[port_id];
5346 if (modinfo == NULL) {
5348 "Cannot get ethdev port %u EEPROM module info to NULL\n",
5353 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
5354 return (*dev->dev_ops->get_module_info)(dev, modinfo);
5358 rte_eth_dev_get_module_eeprom(uint16_t port_id,
5359 struct rte_dev_eeprom_info *info)
5361 struct rte_eth_dev *dev;
5363 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5364 dev = &rte_eth_devices[port_id];
5368 "Cannot get ethdev port %u module EEPROM info to NULL\n",
5373 if (info->data == NULL) {
5375 "Cannot get ethdev port %u module EEPROM data to NULL\n",
5380 if (info->length == 0) {
5382 "Cannot get ethdev port %u module EEPROM to data with zero size\n",
5387 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
5388 return (*dev->dev_ops->get_module_eeprom)(dev, info);
5392 rte_eth_dev_get_dcb_info(uint16_t port_id,
5393 struct rte_eth_dcb_info *dcb_info)
5395 struct rte_eth_dev *dev;
5397 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5398 dev = &rte_eth_devices[port_id];
5400 if (dcb_info == NULL) {
5402 "Cannot get ethdev port %u DCB info to NULL\n",
5407 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
5409 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
5410 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
5414 eth_dev_adjust_nb_desc(uint16_t *nb_desc,
5415 const struct rte_eth_desc_lim *desc_lim)
5417 if (desc_lim->nb_align != 0)
5418 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
5420 if (desc_lim->nb_max != 0)
5421 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
5423 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
5427 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
5428 uint16_t *nb_rx_desc,
5429 uint16_t *nb_tx_desc)
5431 struct rte_eth_dev_info dev_info;
5434 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5436 ret = rte_eth_dev_info_get(port_id, &dev_info);
5440 if (nb_rx_desc != NULL)
5441 eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
5443 if (nb_tx_desc != NULL)
5444 eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
5450 rte_eth_dev_hairpin_capability_get(uint16_t port_id,
5451 struct rte_eth_hairpin_cap *cap)
5453 struct rte_eth_dev *dev;
5455 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5456 dev = &rte_eth_devices[port_id];
5460 "Cannot get ethdev port %u hairpin capability to NULL\n",
5465 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_cap_get, -ENOTSUP);
5466 memset(cap, 0, sizeof(*cap));
5467 return eth_err(port_id, (*dev->dev_ops->hairpin_cap_get)(dev, cap));
5471 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
5473 struct rte_eth_dev *dev;
5475 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5476 dev = &rte_eth_devices[port_id];
5480 "Cannot test ethdev port %u mempool operation from NULL pool\n",
5485 if (*dev->dev_ops->pool_ops_supported == NULL)
5486 return 1; /* all pools are supported */
5488 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
5492 eth_dev_handle_port_list(const char *cmd __rte_unused,
5493 const char *params __rte_unused,
5494 struct rte_tel_data *d)
5498 rte_tel_data_start_array(d, RTE_TEL_INT_VAL);
5499 RTE_ETH_FOREACH_DEV(port_id)
5500 rte_tel_data_add_array_int(d, port_id);
5505 eth_dev_add_port_queue_stats(struct rte_tel_data *d, uint64_t *q_stats,
5506 const char *stat_name)
5509 struct rte_tel_data *q_data = rte_tel_data_alloc();
5510 rte_tel_data_start_array(q_data, RTE_TEL_U64_VAL);
5511 for (q = 0; q < RTE_ETHDEV_QUEUE_STAT_CNTRS; q++)
5512 rte_tel_data_add_array_u64(q_data, q_stats[q]);
5513 rte_tel_data_add_dict_container(d, stat_name, q_data, 0);
5516 #define ADD_DICT_STAT(stats, s) rte_tel_data_add_dict_u64(d, #s, stats.s)
5519 eth_dev_handle_port_stats(const char *cmd __rte_unused,
5521 struct rte_tel_data *d)
5523 struct rte_eth_stats stats;
5526 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
5529 port_id = atoi(params);
5530 if (!rte_eth_dev_is_valid_port(port_id))
5533 ret = rte_eth_stats_get(port_id, &stats);
5537 rte_tel_data_start_dict(d);
5538 ADD_DICT_STAT(stats, ipackets);
5539 ADD_DICT_STAT(stats, opackets);
5540 ADD_DICT_STAT(stats, ibytes);
5541 ADD_DICT_STAT(stats, obytes);
5542 ADD_DICT_STAT(stats, imissed);
5543 ADD_DICT_STAT(stats, ierrors);
5544 ADD_DICT_STAT(stats, oerrors);
5545 ADD_DICT_STAT(stats, rx_nombuf);
5546 eth_dev_add_port_queue_stats(d, stats.q_ipackets, "q_ipackets");
5547 eth_dev_add_port_queue_stats(d, stats.q_opackets, "q_opackets");
5548 eth_dev_add_port_queue_stats(d, stats.q_ibytes, "q_ibytes");
5549 eth_dev_add_port_queue_stats(d, stats.q_obytes, "q_obytes");
5550 eth_dev_add_port_queue_stats(d, stats.q_errors, "q_errors");
5556 eth_dev_handle_port_xstats(const char *cmd __rte_unused,
5558 struct rte_tel_data *d)
5560 struct rte_eth_xstat *eth_xstats;
5561 struct rte_eth_xstat_name *xstat_names;
5562 int port_id, num_xstats;
5566 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
5569 port_id = strtoul(params, &end_param, 0);
5570 if (*end_param != '\0')
5571 RTE_ETHDEV_LOG(NOTICE,
5572 "Extra parameters passed to ethdev telemetry command, ignoring");
5573 if (!rte_eth_dev_is_valid_port(port_id))
5576 num_xstats = rte_eth_xstats_get(port_id, NULL, 0);
5580 /* use one malloc for both names and stats */
5581 eth_xstats = malloc((sizeof(struct rte_eth_xstat) +
5582 sizeof(struct rte_eth_xstat_name)) * num_xstats);
5583 if (eth_xstats == NULL)
5585 xstat_names = (void *)ð_xstats[num_xstats];
5587 ret = rte_eth_xstats_get_names(port_id, xstat_names, num_xstats);
5588 if (ret < 0 || ret > num_xstats) {
5593 ret = rte_eth_xstats_get(port_id, eth_xstats, num_xstats);
5594 if (ret < 0 || ret > num_xstats) {
5599 rte_tel_data_start_dict(d);
5600 for (i = 0; i < num_xstats; i++)
5601 rte_tel_data_add_dict_u64(d, xstat_names[i].name,
5602 eth_xstats[i].value);
5607 eth_dev_handle_port_link_status(const char *cmd __rte_unused,
5609 struct rte_tel_data *d)
5611 static const char *status_str = "status";
5613 struct rte_eth_link link;
5616 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
5619 port_id = strtoul(params, &end_param, 0);
5620 if (*end_param != '\0')
5621 RTE_ETHDEV_LOG(NOTICE,
5622 "Extra parameters passed to ethdev telemetry command, ignoring");
5623 if (!rte_eth_dev_is_valid_port(port_id))
5626 ret = rte_eth_link_get_nowait(port_id, &link);
5630 rte_tel_data_start_dict(d);
5631 if (!link.link_status) {
5632 rte_tel_data_add_dict_string(d, status_str, "DOWN");
5635 rte_tel_data_add_dict_string(d, status_str, "UP");
5636 rte_tel_data_add_dict_u64(d, "speed", link.link_speed);
5637 rte_tel_data_add_dict_string(d, "duplex",
5638 (link.link_duplex == RTE_ETH_LINK_FULL_DUPLEX) ?
5639 "full-duplex" : "half-duplex");
5644 eth_dev_handle_port_info(const char *cmd __rte_unused,
5646 struct rte_tel_data *d)
5648 struct rte_tel_data *rxq_state, *txq_state;
5649 char mac_addr[RTE_ETHER_ADDR_FMT_SIZE];
5650 struct rte_eth_dev *eth_dev;
5654 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
5657 port_id = strtoul(params, &end_param, 0);
5658 if (*end_param != '\0')
5659 RTE_ETHDEV_LOG(NOTICE,
5660 "Extra parameters passed to ethdev telemetry command, ignoring");
5662 if (!rte_eth_dev_is_valid_port(port_id))
5665 eth_dev = &rte_eth_devices[port_id];
5667 rxq_state = rte_tel_data_alloc();
5671 txq_state = rte_tel_data_alloc();
5673 rte_tel_data_free(rxq_state);
5677 rte_tel_data_start_dict(d);
5678 rte_tel_data_add_dict_string(d, "name", eth_dev->data->name);
5679 rte_tel_data_add_dict_int(d, "state", eth_dev->state);
5680 rte_tel_data_add_dict_int(d, "nb_rx_queues",
5681 eth_dev->data->nb_rx_queues);
5682 rte_tel_data_add_dict_int(d, "nb_tx_queues",
5683 eth_dev->data->nb_tx_queues);
5684 rte_tel_data_add_dict_int(d, "port_id", eth_dev->data->port_id);
5685 rte_tel_data_add_dict_int(d, "mtu", eth_dev->data->mtu);
5686 rte_tel_data_add_dict_int(d, "rx_mbuf_size_min",
5687 eth_dev->data->min_rx_buf_size);
5688 rte_tel_data_add_dict_int(d, "rx_mbuf_alloc_fail",
5689 eth_dev->data->rx_mbuf_alloc_failed);
5690 rte_ether_format_addr(mac_addr, sizeof(mac_addr),
5691 eth_dev->data->mac_addrs);
5692 rte_tel_data_add_dict_string(d, "mac_addr", mac_addr);
5693 rte_tel_data_add_dict_int(d, "promiscuous",
5694 eth_dev->data->promiscuous);
5695 rte_tel_data_add_dict_int(d, "scattered_rx",
5696 eth_dev->data->scattered_rx);
5697 rte_tel_data_add_dict_int(d, "all_multicast",
5698 eth_dev->data->all_multicast);
5699 rte_tel_data_add_dict_int(d, "dev_started", eth_dev->data->dev_started);
5700 rte_tel_data_add_dict_int(d, "lro", eth_dev->data->lro);
5701 rte_tel_data_add_dict_int(d, "dev_configured",
5702 eth_dev->data->dev_configured);
5704 rte_tel_data_start_array(rxq_state, RTE_TEL_INT_VAL);
5705 for (i = 0; i < eth_dev->data->nb_rx_queues; i++)
5706 rte_tel_data_add_array_int(rxq_state,
5707 eth_dev->data->rx_queue_state[i]);
5709 rte_tel_data_start_array(txq_state, RTE_TEL_INT_VAL);
5710 for (i = 0; i < eth_dev->data->nb_tx_queues; i++)
5711 rte_tel_data_add_array_int(txq_state,
5712 eth_dev->data->tx_queue_state[i]);
5714 rte_tel_data_add_dict_container(d, "rxq_state", rxq_state, 0);
5715 rte_tel_data_add_dict_container(d, "txq_state", txq_state, 0);
5716 rte_tel_data_add_dict_int(d, "numa_node", eth_dev->data->numa_node);
5717 rte_tel_data_add_dict_int(d, "dev_flags", eth_dev->data->dev_flags);
5718 rte_tel_data_add_dict_int(d, "rx_offloads",
5719 eth_dev->data->dev_conf.rxmode.offloads);
5720 rte_tel_data_add_dict_int(d, "tx_offloads",
5721 eth_dev->data->dev_conf.txmode.offloads);
5722 rte_tel_data_add_dict_int(d, "ethdev_rss_hf",
5723 eth_dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf);
5729 rte_eth_representor_info_get(uint16_t port_id,
5730 struct rte_eth_representor_info *info)
5732 struct rte_eth_dev *dev;
5734 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5735 dev = &rte_eth_devices[port_id];
5737 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->representor_info_get, -ENOTSUP);
5738 return eth_err(port_id, (*dev->dev_ops->representor_info_get)(dev, info));
5742 rte_eth_rx_metadata_negotiate(uint16_t port_id, uint64_t *features)
5744 struct rte_eth_dev *dev;
5746 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5747 dev = &rte_eth_devices[port_id];
5749 if (dev->data->dev_configured != 0) {
5751 "The port (ID=%"PRIu16") is already configured\n",
5756 if (features == NULL) {
5757 RTE_ETHDEV_LOG(ERR, "Invalid features (NULL)\n");
5761 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_metadata_negotiate, -ENOTSUP);
5762 return eth_err(port_id,
5763 (*dev->dev_ops->rx_metadata_negotiate)(dev, features));
5767 rte_eth_ip_reassembly_capability_get(uint16_t port_id,
5768 struct rte_eth_ip_reassembly_params *reassembly_capa)
5770 struct rte_eth_dev *dev;
5772 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5773 dev = &rte_eth_devices[port_id];
5775 if (dev->data->dev_configured == 0) {
5777 "Device with port_id=%u is not configured.\n"
5778 "Cannot get IP reassembly capability\n",
5783 if (reassembly_capa == NULL) {
5784 RTE_ETHDEV_LOG(ERR, "Cannot get reassembly capability to NULL");
5788 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->ip_reassembly_capability_get,
5790 memset(reassembly_capa, 0, sizeof(struct rte_eth_ip_reassembly_params));
5792 return eth_err(port_id, (*dev->dev_ops->ip_reassembly_capability_get)
5793 (dev, reassembly_capa));
5797 rte_eth_ip_reassembly_conf_get(uint16_t port_id,
5798 struct rte_eth_ip_reassembly_params *conf)
5800 struct rte_eth_dev *dev;
5802 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5803 dev = &rte_eth_devices[port_id];
5805 if (dev->data->dev_configured == 0) {
5807 "Device with port_id=%u is not configured.\n"
5808 "Cannot get IP reassembly configuration\n",
5814 RTE_ETHDEV_LOG(ERR, "Cannot get reassembly info to NULL");
5818 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->ip_reassembly_conf_get,
5820 memset(conf, 0, sizeof(struct rte_eth_ip_reassembly_params));
5821 return eth_err(port_id,
5822 (*dev->dev_ops->ip_reassembly_conf_get)(dev, conf));
5826 rte_eth_ip_reassembly_conf_set(uint16_t port_id,
5827 const struct rte_eth_ip_reassembly_params *conf)
5829 struct rte_eth_dev *dev;
5831 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5832 dev = &rte_eth_devices[port_id];
5834 if (dev->data->dev_configured == 0) {
5836 "Device with port_id=%u is not configured.\n"
5837 "Cannot set IP reassembly configuration",
5842 if (dev->data->dev_started != 0) {
5844 "Device with port_id=%u started,\n"
5845 "cannot configure IP reassembly params.\n",
5852 "Invalid IP reassembly configuration (NULL)\n");
5856 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->ip_reassembly_conf_set,
5858 return eth_err(port_id,
5859 (*dev->dev_ops->ip_reassembly_conf_set)(dev, conf));
5863 rte_eth_dev_priv_dump(uint16_t port_id, FILE *file)
5865 struct rte_eth_dev *dev;
5867 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5868 dev = &rte_eth_devices[port_id];
5871 RTE_ETHDEV_LOG(ERR, "Invalid file (NULL)\n");
5875 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->eth_dev_priv_dump, -ENOTSUP);
5876 return eth_err(port_id, (*dev->dev_ops->eth_dev_priv_dump)(dev, file));
5879 RTE_LOG_REGISTER_DEFAULT(rte_eth_dev_logtype, INFO);
5881 RTE_INIT(ethdev_init_telemetry)
5883 rte_telemetry_register_cmd("/ethdev/list", eth_dev_handle_port_list,
5884 "Returns list of available ethdev ports. Takes no parameters");
5885 rte_telemetry_register_cmd("/ethdev/stats", eth_dev_handle_port_stats,
5886 "Returns the common stats for a port. Parameters: int port_id");
5887 rte_telemetry_register_cmd("/ethdev/xstats", eth_dev_handle_port_xstats,
5888 "Returns the extended stats for a port. Parameters: int port_id");
5889 rte_telemetry_register_cmd("/ethdev/link_status",
5890 eth_dev_handle_port_link_status,
5891 "Returns the link status for a port. Parameters: int port_id");
5892 rte_telemetry_register_cmd("/ethdev/info", eth_dev_handle_port_info,
5893 "Returns the device info for a port. Parameters: int port_id");