1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
12 #include <sys/queue.h>
14 #include <rte_byteorder.h>
16 #include <rte_debug.h>
17 #include <rte_interrupts.h>
18 #include <rte_memory.h>
19 #include <rte_memcpy.h>
20 #include <rte_memzone.h>
21 #include <rte_launch.h>
23 #include <rte_per_lcore.h>
24 #include <rte_lcore.h>
25 #include <rte_branch_prediction.h>
26 #include <rte_common.h>
27 #include <rte_mempool.h>
28 #include <rte_malloc.h>
30 #include <rte_errno.h>
31 #include <rte_spinlock.h>
32 #include <rte_string_fns.h>
33 #include <rte_kvargs.h>
34 #include <rte_class.h>
35 #include <rte_ether.h>
36 #include <rte_telemetry.h>
38 #include "rte_ethdev_trace.h"
39 #include "rte_ethdev.h"
40 #include "ethdev_driver.h"
41 #include "ethdev_profile.h"
42 #include "ethdev_private.h"
44 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
45 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
47 /* public fast-path API */
48 struct rte_eth_fp_ops rte_eth_fp_ops[RTE_MAX_ETHPORTS];
50 /* spinlock for eth device callbacks */
51 static rte_spinlock_t eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
53 /* spinlock for add/remove Rx callbacks */
54 static rte_spinlock_t eth_dev_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
56 /* spinlock for add/remove Tx callbacks */
57 static rte_spinlock_t eth_dev_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
59 /* spinlock for shared data allocation */
60 static rte_spinlock_t eth_dev_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
62 /* store statistics names and its offset in stats structure */
63 struct rte_eth_xstats_name_off {
64 char name[RTE_ETH_XSTATS_NAME_SIZE];
68 /* Shared memory between primary and secondary processes. */
70 uint64_t next_owner_id;
71 rte_spinlock_t ownership_lock;
72 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
73 } *eth_dev_shared_data;
75 static const struct rte_eth_xstats_name_off eth_dev_stats_strings[] = {
76 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
77 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
78 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
79 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
80 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
81 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
82 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
83 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
87 #define RTE_NB_STATS RTE_DIM(eth_dev_stats_strings)
89 static const struct rte_eth_xstats_name_off eth_dev_rxq_stats_strings[] = {
90 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
91 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
92 {"errors", offsetof(struct rte_eth_stats, q_errors)},
95 #define RTE_NB_RXQ_STATS RTE_DIM(eth_dev_rxq_stats_strings)
97 static const struct rte_eth_xstats_name_off eth_dev_txq_stats_strings[] = {
98 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
99 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
101 #define RTE_NB_TXQ_STATS RTE_DIM(eth_dev_txq_stats_strings)
103 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
104 { RTE_ETH_RX_OFFLOAD_##_name, #_name }
106 static const struct {
109 } eth_dev_rx_offload_names[] = {
110 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
111 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
112 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
113 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
114 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
115 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
116 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
118 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
119 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
120 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
121 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
122 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
123 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
124 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
125 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
126 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
127 RTE_RX_OFFLOAD_BIT2STR(RSS_HASH),
128 RTE_RX_OFFLOAD_BIT2STR(BUFFER_SPLIT),
131 #undef RTE_RX_OFFLOAD_BIT2STR
132 #undef RTE_ETH_RX_OFFLOAD_BIT2STR
134 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
135 { RTE_ETH_TX_OFFLOAD_##_name, #_name }
137 static const struct {
140 } eth_dev_tx_offload_names[] = {
141 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
142 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
143 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
144 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
147 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
148 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
149 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
150 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
151 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
152 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
155 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
156 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
157 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
158 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
159 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
160 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
161 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
162 RTE_TX_OFFLOAD_BIT2STR(SEND_ON_TIMESTAMP),
165 #undef RTE_TX_OFFLOAD_BIT2STR
167 static const struct {
170 } rte_eth_dev_capa_names[] = {
171 {RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP, "RUNTIME_RX_QUEUE_SETUP"},
172 {RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP, "RUNTIME_TX_QUEUE_SETUP"},
173 {RTE_ETH_DEV_CAPA_RXQ_SHARE, "RXQ_SHARE"},
177 * The user application callback description.
179 * It contains callback address to be registered by user application,
180 * the pointer to the parameters for callback, and the event type.
182 struct rte_eth_dev_callback {
183 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
184 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
185 void *cb_arg; /**< Parameter for callback */
186 void *ret_param; /**< Return parameter */
187 enum rte_eth_event_type event; /**< Interrupt event type */
188 uint32_t active; /**< Callback is executing */
197 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
200 struct rte_devargs devargs;
201 const char *bus_param_key;
202 char *bus_str = NULL;
203 char *cls_str = NULL;
207 RTE_ETHDEV_LOG(ERR, "Cannot initialize NULL iterator\n");
211 if (devargs_str == NULL) {
213 "Cannot initialize iterator from NULL device description string\n");
217 memset(iter, 0, sizeof(*iter));
218 memset(&devargs, 0, sizeof(devargs));
221 * The devargs string may use various syntaxes:
222 * - 0000:08:00.0,representor=[1-3]
223 * - pci:0000:06:00.0,representor=[0,5]
224 * - class=eth,mac=00:11:22:33:44:55
225 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
229 * Handle pure class filter (i.e. without any bus-level argument),
230 * from future new syntax.
231 * rte_devargs_parse() is not yet supporting the new syntax,
232 * that's why this simple case is temporarily parsed here.
234 #define iter_anybus_str "class=eth,"
235 if (strncmp(devargs_str, iter_anybus_str,
236 strlen(iter_anybus_str)) == 0) {
237 iter->cls_str = devargs_str + strlen(iter_anybus_str);
241 /* Split bus, device and parameters. */
242 ret = rte_devargs_parse(&devargs, devargs_str);
247 * Assume parameters of old syntax can match only at ethdev level.
248 * Extra parameters will be ignored, thanks to "+" prefix.
250 str_size = strlen(devargs.args) + 2;
251 cls_str = malloc(str_size);
252 if (cls_str == NULL) {
256 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
257 if (ret != str_size - 1) {
261 iter->cls_str = cls_str;
263 iter->bus = devargs.bus;
264 if (iter->bus->dev_iterate == NULL) {
269 /* Convert bus args to new syntax for use with new API dev_iterate. */
270 if ((strcmp(iter->bus->name, "vdev") == 0) ||
271 (strcmp(iter->bus->name, "fslmc") == 0) ||
272 (strcmp(iter->bus->name, "dpaa_bus") == 0)) {
273 bus_param_key = "name";
274 } else if (strcmp(iter->bus->name, "pci") == 0) {
275 bus_param_key = "addr";
280 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
281 bus_str = malloc(str_size);
282 if (bus_str == NULL) {
286 ret = snprintf(bus_str, str_size, "%s=%s",
287 bus_param_key, devargs.name);
288 if (ret != str_size - 1) {
292 iter->bus_str = bus_str;
295 iter->cls = rte_class_find_by_name("eth");
296 rte_devargs_reset(&devargs);
301 RTE_ETHDEV_LOG(ERR, "Bus %s does not support iterating.\n",
303 rte_devargs_reset(&devargs);
310 rte_eth_iterator_next(struct rte_dev_iterator *iter)
314 "Cannot get next device from NULL iterator\n");
315 return RTE_MAX_ETHPORTS;
318 if (iter->cls == NULL) /* invalid ethdev iterator */
319 return RTE_MAX_ETHPORTS;
321 do { /* loop to try all matching rte_device */
322 /* If not pure ethdev filter and */
323 if (iter->bus != NULL &&
324 /* not in middle of rte_eth_dev iteration, */
325 iter->class_device == NULL) {
326 /* get next rte_device to try. */
327 iter->device = iter->bus->dev_iterate(
328 iter->device, iter->bus_str, iter);
329 if (iter->device == NULL)
330 break; /* no more rte_device candidate */
332 /* A device is matching bus part, need to check ethdev part. */
333 iter->class_device = iter->cls->dev_iterate(
334 iter->class_device, iter->cls_str, iter);
335 if (iter->class_device != NULL)
336 return eth_dev_to_id(iter->class_device); /* match */
337 } while (iter->bus != NULL); /* need to try next rte_device */
339 /* No more ethdev port to iterate. */
340 rte_eth_iterator_cleanup(iter);
341 return RTE_MAX_ETHPORTS;
345 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
348 RTE_ETHDEV_LOG(ERR, "Cannot do clean up from NULL iterator\n");
352 if (iter->bus_str == NULL)
353 return; /* nothing to free in pure class filter */
354 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
355 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
356 memset(iter, 0, sizeof(*iter));
360 rte_eth_find_next(uint16_t port_id)
362 while (port_id < RTE_MAX_ETHPORTS &&
363 rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED)
366 if (port_id >= RTE_MAX_ETHPORTS)
367 return RTE_MAX_ETHPORTS;
373 * Macro to iterate over all valid ports for internal usage.
374 * Note: RTE_ETH_FOREACH_DEV is different because filtering owned ports.
376 #define RTE_ETH_FOREACH_VALID_DEV(port_id) \
377 for (port_id = rte_eth_find_next(0); \
378 port_id < RTE_MAX_ETHPORTS; \
379 port_id = rte_eth_find_next(port_id + 1))
382 rte_eth_find_next_of(uint16_t port_id, const struct rte_device *parent)
384 port_id = rte_eth_find_next(port_id);
385 while (port_id < RTE_MAX_ETHPORTS &&
386 rte_eth_devices[port_id].device != parent)
387 port_id = rte_eth_find_next(port_id + 1);
393 rte_eth_find_next_sibling(uint16_t port_id, uint16_t ref_port_id)
395 RTE_ETH_VALID_PORTID_OR_ERR_RET(ref_port_id, RTE_MAX_ETHPORTS);
396 return rte_eth_find_next_of(port_id,
397 rte_eth_devices[ref_port_id].device);
401 eth_dev_shared_data_prepare(void)
403 const unsigned flags = 0;
404 const struct rte_memzone *mz;
406 rte_spinlock_lock(ð_dev_shared_data_lock);
408 if (eth_dev_shared_data == NULL) {
409 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
410 /* Allocate port data and ownership shared memory. */
411 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
412 sizeof(*eth_dev_shared_data),
413 rte_socket_id(), flags);
415 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
417 rte_panic("Cannot allocate ethdev shared data\n");
419 eth_dev_shared_data = mz->addr;
420 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
421 eth_dev_shared_data->next_owner_id =
422 RTE_ETH_DEV_NO_OWNER + 1;
423 rte_spinlock_init(ð_dev_shared_data->ownership_lock);
424 memset(eth_dev_shared_data->data, 0,
425 sizeof(eth_dev_shared_data->data));
429 rte_spinlock_unlock(ð_dev_shared_data_lock);
433 eth_dev_is_allocated(const struct rte_eth_dev *ethdev)
435 return ethdev->data->name[0] != '\0';
438 static struct rte_eth_dev *
439 eth_dev_allocated(const char *name)
443 RTE_BUILD_BUG_ON(RTE_MAX_ETHPORTS >= UINT16_MAX);
445 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
446 if (rte_eth_devices[i].data != NULL &&
447 strcmp(rte_eth_devices[i].data->name, name) == 0)
448 return &rte_eth_devices[i];
454 rte_eth_dev_allocated(const char *name)
456 struct rte_eth_dev *ethdev;
458 eth_dev_shared_data_prepare();
460 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
462 ethdev = eth_dev_allocated(name);
464 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
470 eth_dev_find_free_port(void)
474 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
475 /* Using shared name field to find a free port. */
476 if (eth_dev_shared_data->data[i].name[0] == '\0') {
477 RTE_ASSERT(rte_eth_devices[i].state ==
482 return RTE_MAX_ETHPORTS;
485 static struct rte_eth_dev *
486 eth_dev_get(uint16_t port_id)
488 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
490 eth_dev->data = ð_dev_shared_data->data[port_id];
496 rte_eth_dev_allocate(const char *name)
499 struct rte_eth_dev *eth_dev = NULL;
502 name_len = strnlen(name, RTE_ETH_NAME_MAX_LEN);
504 RTE_ETHDEV_LOG(ERR, "Zero length Ethernet device name\n");
508 if (name_len >= RTE_ETH_NAME_MAX_LEN) {
509 RTE_ETHDEV_LOG(ERR, "Ethernet device name is too long\n");
513 eth_dev_shared_data_prepare();
515 /* Synchronize port creation between primary and secondary threads. */
516 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
518 if (eth_dev_allocated(name) != NULL) {
520 "Ethernet device with name %s already allocated\n",
525 port_id = eth_dev_find_free_port();
526 if (port_id == RTE_MAX_ETHPORTS) {
528 "Reached maximum number of Ethernet ports\n");
532 eth_dev = eth_dev_get(port_id);
533 strlcpy(eth_dev->data->name, name, sizeof(eth_dev->data->name));
534 eth_dev->data->port_id = port_id;
535 eth_dev->data->backer_port_id = RTE_MAX_ETHPORTS;
536 eth_dev->data->mtu = RTE_ETHER_MTU;
537 pthread_mutex_init(ð_dev->data->flow_ops_mutex, NULL);
540 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
546 * Attach to a port already registered by the primary process, which
547 * makes sure that the same device would have the same port ID both
548 * in the primary and secondary process.
551 rte_eth_dev_attach_secondary(const char *name)
554 struct rte_eth_dev *eth_dev = NULL;
556 eth_dev_shared_data_prepare();
558 /* Synchronize port attachment to primary port creation and release. */
559 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
561 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
562 if (strcmp(eth_dev_shared_data->data[i].name, name) == 0)
565 if (i == RTE_MAX_ETHPORTS) {
567 "Device %s is not driven by the primary process\n",
570 eth_dev = eth_dev_get(i);
571 RTE_ASSERT(eth_dev->data->port_id == i);
574 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
579 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
584 eth_dev_shared_data_prepare();
586 if (eth_dev->state != RTE_ETH_DEV_UNUSED)
587 rte_eth_dev_callback_process(eth_dev,
588 RTE_ETH_EVENT_DESTROY, NULL);
590 eth_dev_fp_ops_reset(rte_eth_fp_ops + eth_dev->data->port_id);
592 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
594 eth_dev->state = RTE_ETH_DEV_UNUSED;
595 eth_dev->device = NULL;
596 eth_dev->process_private = NULL;
597 eth_dev->intr_handle = NULL;
598 eth_dev->rx_pkt_burst = NULL;
599 eth_dev->tx_pkt_burst = NULL;
600 eth_dev->tx_pkt_prepare = NULL;
601 eth_dev->rx_queue_count = NULL;
602 eth_dev->rx_descriptor_status = NULL;
603 eth_dev->tx_descriptor_status = NULL;
604 eth_dev->dev_ops = NULL;
606 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
607 rte_free(eth_dev->data->rx_queues);
608 rte_free(eth_dev->data->tx_queues);
609 rte_free(eth_dev->data->mac_addrs);
610 rte_free(eth_dev->data->hash_mac_addrs);
611 rte_free(eth_dev->data->dev_private);
612 pthread_mutex_destroy(ð_dev->data->flow_ops_mutex);
613 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
616 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
622 rte_eth_dev_is_valid_port(uint16_t port_id)
624 if (port_id >= RTE_MAX_ETHPORTS ||
625 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
632 eth_is_valid_owner_id(uint64_t owner_id)
634 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
635 eth_dev_shared_data->next_owner_id <= owner_id)
641 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
643 port_id = rte_eth_find_next(port_id);
644 while (port_id < RTE_MAX_ETHPORTS &&
645 rte_eth_devices[port_id].data->owner.id != owner_id)
646 port_id = rte_eth_find_next(port_id + 1);
652 rte_eth_dev_owner_new(uint64_t *owner_id)
654 if (owner_id == NULL) {
655 RTE_ETHDEV_LOG(ERR, "Cannot get new owner ID to NULL\n");
659 eth_dev_shared_data_prepare();
661 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
663 *owner_id = eth_dev_shared_data->next_owner_id++;
665 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
670 eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
671 const struct rte_eth_dev_owner *new_owner)
673 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
674 struct rte_eth_dev_owner *port_owner;
676 if (port_id >= RTE_MAX_ETHPORTS || !eth_dev_is_allocated(ethdev)) {
677 RTE_ETHDEV_LOG(ERR, "Port ID %"PRIu16" is not allocated\n",
682 if (new_owner == NULL) {
684 "Cannot set ethdev port %u owner from NULL owner\n",
689 if (!eth_is_valid_owner_id(new_owner->id) &&
690 !eth_is_valid_owner_id(old_owner_id)) {
692 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
693 old_owner_id, new_owner->id);
697 port_owner = &rte_eth_devices[port_id].data->owner;
698 if (port_owner->id != old_owner_id) {
700 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
701 port_id, port_owner->name, port_owner->id);
705 /* can not truncate (same structure) */
706 strlcpy(port_owner->name, new_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN);
708 port_owner->id = new_owner->id;
710 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
711 port_id, new_owner->name, new_owner->id);
717 rte_eth_dev_owner_set(const uint16_t port_id,
718 const struct rte_eth_dev_owner *owner)
722 eth_dev_shared_data_prepare();
724 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
726 ret = eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
728 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
733 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
735 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
736 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
739 eth_dev_shared_data_prepare();
741 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
743 ret = eth_dev_owner_set(port_id, owner_id, &new_owner);
745 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
750 rte_eth_dev_owner_delete(const uint64_t owner_id)
755 eth_dev_shared_data_prepare();
757 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
759 if (eth_is_valid_owner_id(owner_id)) {
760 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++) {
761 struct rte_eth_dev_data *data =
762 rte_eth_devices[port_id].data;
763 if (data != NULL && data->owner.id == owner_id)
764 memset(&data->owner, 0,
765 sizeof(struct rte_eth_dev_owner));
767 RTE_ETHDEV_LOG(NOTICE,
768 "All port owners owned by %016"PRIx64" identifier have removed\n",
772 "Invalid owner ID=%016"PRIx64"\n",
777 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
783 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
785 struct rte_eth_dev *ethdev;
787 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
788 ethdev = &rte_eth_devices[port_id];
790 if (!eth_dev_is_allocated(ethdev)) {
791 RTE_ETHDEV_LOG(ERR, "Port ID %"PRIu16" is not allocated\n",
797 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u owner to NULL\n",
802 eth_dev_shared_data_prepare();
804 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
805 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
806 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
812 rte_eth_dev_socket_id(uint16_t port_id)
814 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
815 return rte_eth_devices[port_id].data->numa_node;
819 rte_eth_dev_get_sec_ctx(uint16_t port_id)
821 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
822 return rte_eth_devices[port_id].security_ctx;
826 rte_eth_dev_count_avail(void)
833 RTE_ETH_FOREACH_DEV(p)
840 rte_eth_dev_count_total(void)
842 uint16_t port, count = 0;
844 RTE_ETH_FOREACH_VALID_DEV(port)
851 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
855 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
858 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u name to NULL\n",
863 /* shouldn't check 'rte_eth_devices[i].data',
864 * because it might be overwritten by VDEV PMD */
865 tmp = eth_dev_shared_data->data[port_id].name;
871 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
876 RTE_ETHDEV_LOG(ERR, "Cannot get port ID from NULL name");
880 if (port_id == NULL) {
882 "Cannot get port ID to NULL for %s\n", name);
886 RTE_ETH_FOREACH_VALID_DEV(pid)
887 if (!strcmp(name, eth_dev_shared_data->data[pid].name)) {
896 eth_err(uint16_t port_id, int ret)
900 if (rte_eth_dev_is_removed(port_id))
906 eth_dev_rxq_release(struct rte_eth_dev *dev, uint16_t qid)
908 void **rxq = dev->data->rx_queues;
910 if (rxq[qid] == NULL)
913 if (dev->dev_ops->rx_queue_release != NULL)
914 (*dev->dev_ops->rx_queue_release)(dev, qid);
919 eth_dev_txq_release(struct rte_eth_dev *dev, uint16_t qid)
921 void **txq = dev->data->tx_queues;
923 if (txq[qid] == NULL)
926 if (dev->dev_ops->tx_queue_release != NULL)
927 (*dev->dev_ops->tx_queue_release)(dev, qid);
932 eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
934 uint16_t old_nb_queues = dev->data->nb_rx_queues;
937 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
938 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
939 sizeof(dev->data->rx_queues[0]) *
940 RTE_MAX_QUEUES_PER_PORT,
941 RTE_CACHE_LINE_SIZE);
942 if (dev->data->rx_queues == NULL) {
943 dev->data->nb_rx_queues = 0;
946 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
947 for (i = nb_queues; i < old_nb_queues; i++)
948 eth_dev_rxq_release(dev, i);
950 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
951 for (i = nb_queues; i < old_nb_queues; i++)
952 eth_dev_rxq_release(dev, i);
954 rte_free(dev->data->rx_queues);
955 dev->data->rx_queues = NULL;
957 dev->data->nb_rx_queues = nb_queues;
962 eth_dev_validate_rx_queue(const struct rte_eth_dev *dev, uint16_t rx_queue_id)
966 if (rx_queue_id >= dev->data->nb_rx_queues) {
967 port_id = dev->data->port_id;
969 "Invalid Rx queue_id=%u of device with port_id=%u\n",
970 rx_queue_id, port_id);
974 if (dev->data->rx_queues[rx_queue_id] == NULL) {
975 port_id = dev->data->port_id;
977 "Queue %u of device with port_id=%u has not been setup\n",
978 rx_queue_id, port_id);
986 eth_dev_validate_tx_queue(const struct rte_eth_dev *dev, uint16_t tx_queue_id)
990 if (tx_queue_id >= dev->data->nb_tx_queues) {
991 port_id = dev->data->port_id;
993 "Invalid Tx queue_id=%u of device with port_id=%u\n",
994 tx_queue_id, port_id);
998 if (dev->data->tx_queues[tx_queue_id] == NULL) {
999 port_id = dev->data->port_id;
1001 "Queue %u of device with port_id=%u has not been setup\n",
1002 tx_queue_id, port_id);
1010 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
1012 struct rte_eth_dev *dev;
1015 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1016 dev = &rte_eth_devices[port_id];
1018 if (!dev->data->dev_started) {
1020 "Port %u must be started before start any queue\n",
1025 ret = eth_dev_validate_rx_queue(dev, rx_queue_id);
1029 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
1031 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
1032 RTE_ETHDEV_LOG(INFO,
1033 "Can't start Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1034 rx_queue_id, port_id);
1038 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
1039 RTE_ETHDEV_LOG(INFO,
1040 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
1041 rx_queue_id, port_id);
1045 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev, rx_queue_id));
1049 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
1051 struct rte_eth_dev *dev;
1054 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1055 dev = &rte_eth_devices[port_id];
1057 ret = eth_dev_validate_rx_queue(dev, rx_queue_id);
1061 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
1063 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
1064 RTE_ETHDEV_LOG(INFO,
1065 "Can't stop Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1066 rx_queue_id, port_id);
1070 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
1071 RTE_ETHDEV_LOG(INFO,
1072 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
1073 rx_queue_id, port_id);
1077 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
1081 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
1083 struct rte_eth_dev *dev;
1086 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1087 dev = &rte_eth_devices[port_id];
1089 if (!dev->data->dev_started) {
1091 "Port %u must be started before start any queue\n",
1096 ret = eth_dev_validate_tx_queue(dev, tx_queue_id);
1100 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
1102 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
1103 RTE_ETHDEV_LOG(INFO,
1104 "Can't start Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1105 tx_queue_id, port_id);
1109 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
1110 RTE_ETHDEV_LOG(INFO,
1111 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
1112 tx_queue_id, port_id);
1116 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
1120 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
1122 struct rte_eth_dev *dev;
1125 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1126 dev = &rte_eth_devices[port_id];
1128 ret = eth_dev_validate_tx_queue(dev, tx_queue_id);
1132 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
1134 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
1135 RTE_ETHDEV_LOG(INFO,
1136 "Can't stop Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1137 tx_queue_id, port_id);
1141 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
1142 RTE_ETHDEV_LOG(INFO,
1143 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
1144 tx_queue_id, port_id);
1148 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
1152 eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
1154 uint16_t old_nb_queues = dev->data->nb_tx_queues;
1157 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
1158 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
1159 sizeof(dev->data->tx_queues[0]) *
1160 RTE_MAX_QUEUES_PER_PORT,
1161 RTE_CACHE_LINE_SIZE);
1162 if (dev->data->tx_queues == NULL) {
1163 dev->data->nb_tx_queues = 0;
1166 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
1167 for (i = nb_queues; i < old_nb_queues; i++)
1168 eth_dev_txq_release(dev, i);
1170 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1171 for (i = nb_queues; i < old_nb_queues; i++)
1172 eth_dev_txq_release(dev, i);
1174 rte_free(dev->data->tx_queues);
1175 dev->data->tx_queues = NULL;
1177 dev->data->nb_tx_queues = nb_queues;
1182 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1185 case RTE_ETH_SPEED_NUM_10M:
1186 return duplex ? RTE_ETH_LINK_SPEED_10M : RTE_ETH_LINK_SPEED_10M_HD;
1187 case RTE_ETH_SPEED_NUM_100M:
1188 return duplex ? RTE_ETH_LINK_SPEED_100M : RTE_ETH_LINK_SPEED_100M_HD;
1189 case RTE_ETH_SPEED_NUM_1G:
1190 return RTE_ETH_LINK_SPEED_1G;
1191 case RTE_ETH_SPEED_NUM_2_5G:
1192 return RTE_ETH_LINK_SPEED_2_5G;
1193 case RTE_ETH_SPEED_NUM_5G:
1194 return RTE_ETH_LINK_SPEED_5G;
1195 case RTE_ETH_SPEED_NUM_10G:
1196 return RTE_ETH_LINK_SPEED_10G;
1197 case RTE_ETH_SPEED_NUM_20G:
1198 return RTE_ETH_LINK_SPEED_20G;
1199 case RTE_ETH_SPEED_NUM_25G:
1200 return RTE_ETH_LINK_SPEED_25G;
1201 case RTE_ETH_SPEED_NUM_40G:
1202 return RTE_ETH_LINK_SPEED_40G;
1203 case RTE_ETH_SPEED_NUM_50G:
1204 return RTE_ETH_LINK_SPEED_50G;
1205 case RTE_ETH_SPEED_NUM_56G:
1206 return RTE_ETH_LINK_SPEED_56G;
1207 case RTE_ETH_SPEED_NUM_100G:
1208 return RTE_ETH_LINK_SPEED_100G;
1209 case RTE_ETH_SPEED_NUM_200G:
1210 return RTE_ETH_LINK_SPEED_200G;
1217 rte_eth_dev_rx_offload_name(uint64_t offload)
1219 const char *name = "UNKNOWN";
1222 for (i = 0; i < RTE_DIM(eth_dev_rx_offload_names); ++i) {
1223 if (offload == eth_dev_rx_offload_names[i].offload) {
1224 name = eth_dev_rx_offload_names[i].name;
1233 rte_eth_dev_tx_offload_name(uint64_t offload)
1235 const char *name = "UNKNOWN";
1238 for (i = 0; i < RTE_DIM(eth_dev_tx_offload_names); ++i) {
1239 if (offload == eth_dev_tx_offload_names[i].offload) {
1240 name = eth_dev_tx_offload_names[i].name;
1249 rte_eth_dev_capability_name(uint64_t capability)
1251 const char *name = "UNKNOWN";
1254 for (i = 0; i < RTE_DIM(rte_eth_dev_capa_names); ++i) {
1255 if (capability == rte_eth_dev_capa_names[i].offload) {
1256 name = rte_eth_dev_capa_names[i].name;
1265 eth_dev_check_lro_pkt_size(uint16_t port_id, uint32_t config_size,
1266 uint32_t max_rx_pkt_len, uint32_t dev_info_size)
1270 if (dev_info_size == 0) {
1271 if (config_size != max_rx_pkt_len) {
1272 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size"
1273 " %u != %u is not allowed\n",
1274 port_id, config_size, max_rx_pkt_len);
1277 } else if (config_size > dev_info_size) {
1278 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1279 "> max allowed value %u\n", port_id, config_size,
1282 } else if (config_size < RTE_ETHER_MIN_LEN) {
1283 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1284 "< min allowed value %u\n", port_id, config_size,
1285 (unsigned int)RTE_ETHER_MIN_LEN);
1292 * Validate offloads that are requested through rte_eth_dev_configure against
1293 * the offloads successfully set by the Ethernet device.
1296 * The port identifier of the Ethernet device.
1297 * @param req_offloads
1298 * The offloads that have been requested through `rte_eth_dev_configure`.
1299 * @param set_offloads
1300 * The offloads successfully set by the Ethernet device.
1301 * @param offload_type
1302 * The offload type i.e. Rx/Tx string.
1303 * @param offload_name
1304 * The function that prints the offload name.
1306 * - (0) if validation successful.
1307 * - (-EINVAL) if requested offload has been silently disabled.
1311 eth_dev_validate_offloads(uint16_t port_id, uint64_t req_offloads,
1312 uint64_t set_offloads, const char *offload_type,
1313 const char *(*offload_name)(uint64_t))
1315 uint64_t offloads_diff = req_offloads ^ set_offloads;
1319 while (offloads_diff != 0) {
1320 /* Check if any offload is requested but not enabled. */
1321 offload = RTE_BIT64(__builtin_ctzll(offloads_diff));
1322 if (offload & req_offloads) {
1324 "Port %u failed to enable %s offload %s\n",
1325 port_id, offload_type, offload_name(offload));
1329 /* Check if offload couldn't be disabled. */
1330 if (offload & set_offloads) {
1331 RTE_ETHDEV_LOG(DEBUG,
1332 "Port %u %s offload %s is not requested but enabled\n",
1333 port_id, offload_type, offload_name(offload));
1336 offloads_diff &= ~offload;
1343 eth_dev_get_overhead_len(uint32_t max_rx_pktlen, uint16_t max_mtu)
1345 uint32_t overhead_len;
1347 if (max_mtu != UINT16_MAX && max_rx_pktlen > max_mtu)
1348 overhead_len = max_rx_pktlen - max_mtu;
1350 overhead_len = RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN;
1352 return overhead_len;
1355 /* rte_eth_dev_info_get() should be called prior to this function */
1357 eth_dev_validate_mtu(uint16_t port_id, struct rte_eth_dev_info *dev_info,
1360 uint32_t overhead_len;
1361 uint32_t frame_size;
1363 if (mtu < dev_info->min_mtu) {
1365 "MTU (%u) < device min MTU (%u) for port_id %u\n",
1366 mtu, dev_info->min_mtu, port_id);
1369 if (mtu > dev_info->max_mtu) {
1371 "MTU (%u) > device max MTU (%u) for port_id %u\n",
1372 mtu, dev_info->max_mtu, port_id);
1376 overhead_len = eth_dev_get_overhead_len(dev_info->max_rx_pktlen,
1378 frame_size = mtu + overhead_len;
1379 if (frame_size < RTE_ETHER_MIN_LEN) {
1381 "Frame size (%u) < min frame size (%u) for port_id %u\n",
1382 frame_size, RTE_ETHER_MIN_LEN, port_id);
1386 if (frame_size > dev_info->max_rx_pktlen) {
1388 "Frame size (%u) > device max frame size (%u) for port_id %u\n",
1389 frame_size, dev_info->max_rx_pktlen, port_id);
1397 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1398 const struct rte_eth_conf *dev_conf)
1400 struct rte_eth_dev *dev;
1401 struct rte_eth_dev_info dev_info;
1402 struct rte_eth_conf orig_conf;
1407 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1408 dev = &rte_eth_devices[port_id];
1410 if (dev_conf == NULL) {
1412 "Cannot configure ethdev port %u from NULL config\n",
1417 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1419 if (dev->data->dev_started) {
1421 "Port %u must be stopped to allow configuration\n",
1427 * Ensure that "dev_configured" is always 0 each time prepare to do
1428 * dev_configure() to avoid any non-anticipated behaviour.
1429 * And set to 1 when dev_configure() is executed successfully.
1431 dev->data->dev_configured = 0;
1433 /* Store original config, as rollback required on failure */
1434 memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1437 * Copy the dev_conf parameter into the dev structure.
1438 * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1440 if (dev_conf != &dev->data->dev_conf)
1441 memcpy(&dev->data->dev_conf, dev_conf,
1442 sizeof(dev->data->dev_conf));
1444 /* Backup mtu for rollback */
1445 old_mtu = dev->data->mtu;
1447 ret = rte_eth_dev_info_get(port_id, &dev_info);
1451 /* If number of queues specified by application for both Rx and Tx is
1452 * zero, use driver preferred values. This cannot be done individually
1453 * as it is valid for either Tx or Rx (but not both) to be zero.
1454 * If driver does not provide any preferred valued, fall back on
1457 if (nb_rx_q == 0 && nb_tx_q == 0) {
1458 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1460 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1461 nb_tx_q = dev_info.default_txportconf.nb_queues;
1463 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1466 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1468 "Number of Rx queues requested (%u) is greater than max supported(%d)\n",
1469 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1474 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1476 "Number of Tx queues requested (%u) is greater than max supported(%d)\n",
1477 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1483 * Check that the numbers of Rx and Tx queues are not greater
1484 * than the maximum number of Rx and Tx queues supported by the
1485 * configured device.
1487 if (nb_rx_q > dev_info.max_rx_queues) {
1488 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1489 port_id, nb_rx_q, dev_info.max_rx_queues);
1494 if (nb_tx_q > dev_info.max_tx_queues) {
1495 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1496 port_id, nb_tx_q, dev_info.max_tx_queues);
1501 /* Check that the device supports requested interrupts */
1502 if ((dev_conf->intr_conf.lsc == 1) &&
1503 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1504 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1505 dev->device->driver->name);
1509 if ((dev_conf->intr_conf.rmv == 1) &&
1510 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1511 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1512 dev->device->driver->name);
1517 if (dev_conf->rxmode.mtu == 0)
1518 dev->data->dev_conf.rxmode.mtu = RTE_ETHER_MTU;
1520 ret = eth_dev_validate_mtu(port_id, &dev_info,
1521 dev->data->dev_conf.rxmode.mtu);
1525 dev->data->mtu = dev->data->dev_conf.rxmode.mtu;
1528 * If LRO is enabled, check that the maximum aggregated packet
1529 * size is supported by the configured device.
1531 if (dev_conf->rxmode.offloads & RTE_ETH_RX_OFFLOAD_TCP_LRO) {
1532 uint32_t max_rx_pktlen;
1533 uint32_t overhead_len;
1535 overhead_len = eth_dev_get_overhead_len(dev_info.max_rx_pktlen,
1537 max_rx_pktlen = dev->data->dev_conf.rxmode.mtu + overhead_len;
1538 if (dev_conf->rxmode.max_lro_pkt_size == 0)
1539 dev->data->dev_conf.rxmode.max_lro_pkt_size = max_rx_pktlen;
1540 ret = eth_dev_check_lro_pkt_size(port_id,
1541 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1543 dev_info.max_lro_pkt_size);
1548 /* Any requested offloading must be within its device capabilities */
1549 if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1550 dev_conf->rxmode.offloads) {
1552 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1553 "capabilities 0x%"PRIx64" in %s()\n",
1554 port_id, dev_conf->rxmode.offloads,
1555 dev_info.rx_offload_capa,
1560 if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1561 dev_conf->txmode.offloads) {
1563 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1564 "capabilities 0x%"PRIx64" in %s()\n",
1565 port_id, dev_conf->txmode.offloads,
1566 dev_info.tx_offload_capa,
1572 dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf =
1573 rte_eth_rss_hf_refine(dev_conf->rx_adv_conf.rss_conf.rss_hf);
1575 /* Check that device supports requested rss hash functions. */
1576 if ((dev_info.flow_type_rss_offloads |
1577 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1578 dev_info.flow_type_rss_offloads) {
1580 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1581 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1582 dev_info.flow_type_rss_offloads);
1587 /* Check if Rx RSS distribution is disabled but RSS hash is enabled. */
1588 if (((dev_conf->rxmode.mq_mode & RTE_ETH_MQ_RX_RSS_FLAG) == 0) &&
1589 (dev_conf->rxmode.offloads & RTE_ETH_RX_OFFLOAD_RSS_HASH)) {
1591 "Ethdev port_id=%u config invalid Rx mq_mode without RSS but %s offload is requested\n",
1593 rte_eth_dev_rx_offload_name(RTE_ETH_RX_OFFLOAD_RSS_HASH));
1599 * Setup new number of Rx/Tx queues and reconfigure device.
1601 diag = eth_dev_rx_queue_config(dev, nb_rx_q);
1604 "Port%u eth_dev_rx_queue_config = %d\n",
1610 diag = eth_dev_tx_queue_config(dev, nb_tx_q);
1613 "Port%u eth_dev_tx_queue_config = %d\n",
1615 eth_dev_rx_queue_config(dev, 0);
1620 diag = (*dev->dev_ops->dev_configure)(dev);
1622 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1624 ret = eth_err(port_id, diag);
1628 /* Initialize Rx profiling if enabled at compilation time. */
1629 diag = __rte_eth_dev_profile_init(port_id, dev);
1631 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1633 ret = eth_err(port_id, diag);
1637 /* Validate Rx offloads. */
1638 diag = eth_dev_validate_offloads(port_id,
1639 dev_conf->rxmode.offloads,
1640 dev->data->dev_conf.rxmode.offloads, "Rx",
1641 rte_eth_dev_rx_offload_name);
1647 /* Validate Tx offloads. */
1648 diag = eth_dev_validate_offloads(port_id,
1649 dev_conf->txmode.offloads,
1650 dev->data->dev_conf.txmode.offloads, "Tx",
1651 rte_eth_dev_tx_offload_name);
1657 dev->data->dev_configured = 1;
1658 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, 0);
1661 eth_dev_rx_queue_config(dev, 0);
1662 eth_dev_tx_queue_config(dev, 0);
1664 memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1665 if (old_mtu != dev->data->mtu)
1666 dev->data->mtu = old_mtu;
1668 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, ret);
1673 rte_eth_dev_internal_reset(struct rte_eth_dev *dev)
1675 if (dev->data->dev_started) {
1676 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1677 dev->data->port_id);
1681 eth_dev_rx_queue_config(dev, 0);
1682 eth_dev_tx_queue_config(dev, 0);
1684 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1688 eth_dev_mac_restore(struct rte_eth_dev *dev,
1689 struct rte_eth_dev_info *dev_info)
1691 struct rte_ether_addr *addr;
1696 /* replay MAC address configuration including default MAC */
1697 addr = &dev->data->mac_addrs[0];
1698 if (*dev->dev_ops->mac_addr_set != NULL)
1699 (*dev->dev_ops->mac_addr_set)(dev, addr);
1700 else if (*dev->dev_ops->mac_addr_add != NULL)
1701 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1703 if (*dev->dev_ops->mac_addr_add != NULL) {
1704 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1705 addr = &dev->data->mac_addrs[i];
1707 /* skip zero address */
1708 if (rte_is_zero_ether_addr(addr))
1712 pool_mask = dev->data->mac_pool_sel[i];
1715 if (pool_mask & UINT64_C(1))
1716 (*dev->dev_ops->mac_addr_add)(dev,
1720 } while (pool_mask);
1726 eth_dev_config_restore(struct rte_eth_dev *dev,
1727 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1731 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1732 eth_dev_mac_restore(dev, dev_info);
1734 /* replay promiscuous configuration */
1736 * use callbacks directly since we don't need port_id check and
1737 * would like to bypass the same value set
1739 if (rte_eth_promiscuous_get(port_id) == 1 &&
1740 *dev->dev_ops->promiscuous_enable != NULL) {
1741 ret = eth_err(port_id,
1742 (*dev->dev_ops->promiscuous_enable)(dev));
1743 if (ret != 0 && ret != -ENOTSUP) {
1745 "Failed to enable promiscuous mode for device (port %u): %s\n",
1746 port_id, rte_strerror(-ret));
1749 } else if (rte_eth_promiscuous_get(port_id) == 0 &&
1750 *dev->dev_ops->promiscuous_disable != NULL) {
1751 ret = eth_err(port_id,
1752 (*dev->dev_ops->promiscuous_disable)(dev));
1753 if (ret != 0 && ret != -ENOTSUP) {
1755 "Failed to disable promiscuous mode for device (port %u): %s\n",
1756 port_id, rte_strerror(-ret));
1761 /* replay all multicast configuration */
1763 * use callbacks directly since we don't need port_id check and
1764 * would like to bypass the same value set
1766 if (rte_eth_allmulticast_get(port_id) == 1 &&
1767 *dev->dev_ops->allmulticast_enable != NULL) {
1768 ret = eth_err(port_id,
1769 (*dev->dev_ops->allmulticast_enable)(dev));
1770 if (ret != 0 && ret != -ENOTSUP) {
1772 "Failed to enable allmulticast mode for device (port %u): %s\n",
1773 port_id, rte_strerror(-ret));
1776 } else if (rte_eth_allmulticast_get(port_id) == 0 &&
1777 *dev->dev_ops->allmulticast_disable != NULL) {
1778 ret = eth_err(port_id,
1779 (*dev->dev_ops->allmulticast_disable)(dev));
1780 if (ret != 0 && ret != -ENOTSUP) {
1782 "Failed to disable allmulticast mode for device (port %u): %s\n",
1783 port_id, rte_strerror(-ret));
1792 rte_eth_dev_start(uint16_t port_id)
1794 struct rte_eth_dev *dev;
1795 struct rte_eth_dev_info dev_info;
1799 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1800 dev = &rte_eth_devices[port_id];
1802 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1804 if (dev->data->dev_configured == 0) {
1805 RTE_ETHDEV_LOG(INFO,
1806 "Device with port_id=%"PRIu16" is not configured.\n",
1811 if (dev->data->dev_started != 0) {
1812 RTE_ETHDEV_LOG(INFO,
1813 "Device with port_id=%"PRIu16" already started\n",
1818 ret = rte_eth_dev_info_get(port_id, &dev_info);
1822 /* Lets restore MAC now if device does not support live change */
1823 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1824 eth_dev_mac_restore(dev, &dev_info);
1826 diag = (*dev->dev_ops->dev_start)(dev);
1828 dev->data->dev_started = 1;
1830 return eth_err(port_id, diag);
1832 ret = eth_dev_config_restore(dev, &dev_info, port_id);
1835 "Error during restoring configuration for device (port %u): %s\n",
1836 port_id, rte_strerror(-ret));
1837 ret_stop = rte_eth_dev_stop(port_id);
1838 if (ret_stop != 0) {
1840 "Failed to stop device (port %u): %s\n",
1841 port_id, rte_strerror(-ret_stop));
1847 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1848 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1849 (*dev->dev_ops->link_update)(dev, 0);
1852 /* expose selection of PMD fast-path functions */
1853 eth_dev_fp_ops_setup(rte_eth_fp_ops + port_id, dev);
1855 rte_ethdev_trace_start(port_id);
1860 rte_eth_dev_stop(uint16_t port_id)
1862 struct rte_eth_dev *dev;
1865 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1866 dev = &rte_eth_devices[port_id];
1868 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_stop, -ENOTSUP);
1870 if (dev->data->dev_started == 0) {
1871 RTE_ETHDEV_LOG(INFO,
1872 "Device with port_id=%"PRIu16" already stopped\n",
1877 /* point fast-path functions to dummy ones */
1878 eth_dev_fp_ops_reset(rte_eth_fp_ops + port_id);
1880 dev->data->dev_started = 0;
1881 ret = (*dev->dev_ops->dev_stop)(dev);
1882 rte_ethdev_trace_stop(port_id, ret);
1888 rte_eth_dev_set_link_up(uint16_t port_id)
1890 struct rte_eth_dev *dev;
1892 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1893 dev = &rte_eth_devices[port_id];
1895 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1896 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1900 rte_eth_dev_set_link_down(uint16_t port_id)
1902 struct rte_eth_dev *dev;
1904 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1905 dev = &rte_eth_devices[port_id];
1907 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1908 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1912 rte_eth_dev_close(uint16_t port_id)
1914 struct rte_eth_dev *dev;
1915 int firsterr, binerr;
1916 int *lasterr = &firsterr;
1918 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1919 dev = &rte_eth_devices[port_id];
1921 if (dev->data->dev_started) {
1922 RTE_ETHDEV_LOG(ERR, "Cannot close started device (port %u)\n",
1927 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_close, -ENOTSUP);
1928 *lasterr = (*dev->dev_ops->dev_close)(dev);
1932 rte_ethdev_trace_close(port_id);
1933 *lasterr = rte_eth_dev_release_port(dev);
1939 rte_eth_dev_reset(uint16_t port_id)
1941 struct rte_eth_dev *dev;
1944 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1945 dev = &rte_eth_devices[port_id];
1947 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1949 ret = rte_eth_dev_stop(port_id);
1952 "Failed to stop device (port %u) before reset: %s - ignore\n",
1953 port_id, rte_strerror(-ret));
1955 ret = dev->dev_ops->dev_reset(dev);
1957 return eth_err(port_id, ret);
1961 rte_eth_dev_is_removed(uint16_t port_id)
1963 struct rte_eth_dev *dev;
1966 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1967 dev = &rte_eth_devices[port_id];
1969 if (dev->state == RTE_ETH_DEV_REMOVED)
1972 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1974 ret = dev->dev_ops->is_removed(dev);
1976 /* Device is physically removed. */
1977 dev->state = RTE_ETH_DEV_REMOVED;
1983 rte_eth_rx_queue_check_split(const struct rte_eth_rxseg_split *rx_seg,
1984 uint16_t n_seg, uint32_t *mbp_buf_size,
1985 const struct rte_eth_dev_info *dev_info)
1987 const struct rte_eth_rxseg_capa *seg_capa = &dev_info->rx_seg_capa;
1988 struct rte_mempool *mp_first;
1989 uint32_t offset_mask;
1992 if (n_seg > seg_capa->max_nseg) {
1994 "Requested Rx segments %u exceed supported %u\n",
1995 n_seg, seg_capa->max_nseg);
1999 * Check the sizes and offsets against buffer sizes
2000 * for each segment specified in extended configuration.
2002 mp_first = rx_seg[0].mp;
2003 offset_mask = RTE_BIT32(seg_capa->offset_align_log2) - 1;
2004 for (seg_idx = 0; seg_idx < n_seg; seg_idx++) {
2005 struct rte_mempool *mpl = rx_seg[seg_idx].mp;
2006 uint32_t length = rx_seg[seg_idx].length;
2007 uint32_t offset = rx_seg[seg_idx].offset;
2010 RTE_ETHDEV_LOG(ERR, "null mempool pointer\n");
2013 if (seg_idx != 0 && mp_first != mpl &&
2014 seg_capa->multi_pools == 0) {
2015 RTE_ETHDEV_LOG(ERR, "Receiving to multiple pools is not supported\n");
2019 if (seg_capa->offset_allowed == 0) {
2020 RTE_ETHDEV_LOG(ERR, "Rx segmentation with offset is not supported\n");
2023 if (offset & offset_mask) {
2024 RTE_ETHDEV_LOG(ERR, "Rx segmentation invalid offset alignment %u, %u\n",
2026 seg_capa->offset_align_log2);
2030 if (mpl->private_data_size <
2031 sizeof(struct rte_pktmbuf_pool_private)) {
2033 "%s private_data_size %u < %u\n",
2034 mpl->name, mpl->private_data_size,
2035 (unsigned int)sizeof
2036 (struct rte_pktmbuf_pool_private));
2039 offset += seg_idx != 0 ? 0 : RTE_PKTMBUF_HEADROOM;
2040 *mbp_buf_size = rte_pktmbuf_data_room_size(mpl);
2041 length = length != 0 ? length : *mbp_buf_size;
2042 if (*mbp_buf_size < length + offset) {
2044 "%s mbuf_data_room_size %u < %u (segment length=%u + segment offset=%u)\n",
2045 mpl->name, *mbp_buf_size,
2046 length + offset, length, offset);
2054 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
2055 uint16_t nb_rx_desc, unsigned int socket_id,
2056 const struct rte_eth_rxconf *rx_conf,
2057 struct rte_mempool *mp)
2060 uint32_t mbp_buf_size;
2061 struct rte_eth_dev *dev;
2062 struct rte_eth_dev_info dev_info;
2063 struct rte_eth_rxconf local_conf;
2065 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2066 dev = &rte_eth_devices[port_id];
2068 if (rx_queue_id >= dev->data->nb_rx_queues) {
2069 RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u\n", rx_queue_id);
2073 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
2075 ret = rte_eth_dev_info_get(port_id, &dev_info);
2080 /* Single pool configuration check. */
2081 if (rx_conf != NULL && rx_conf->rx_nseg != 0) {
2083 "Ambiguous segment configuration\n");
2087 * Check the size of the mbuf data buffer, this value
2088 * must be provided in the private data of the memory pool.
2089 * First check that the memory pool(s) has a valid private data.
2091 if (mp->private_data_size <
2092 sizeof(struct rte_pktmbuf_pool_private)) {
2093 RTE_ETHDEV_LOG(ERR, "%s private_data_size %u < %u\n",
2094 mp->name, mp->private_data_size,
2096 sizeof(struct rte_pktmbuf_pool_private));
2099 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
2100 if (mbp_buf_size < dev_info.min_rx_bufsize +
2101 RTE_PKTMBUF_HEADROOM) {
2103 "%s mbuf_data_room_size %u < %u (RTE_PKTMBUF_HEADROOM=%u + min_rx_bufsize(dev)=%u)\n",
2104 mp->name, mbp_buf_size,
2105 RTE_PKTMBUF_HEADROOM +
2106 dev_info.min_rx_bufsize,
2107 RTE_PKTMBUF_HEADROOM,
2108 dev_info.min_rx_bufsize);
2112 const struct rte_eth_rxseg_split *rx_seg;
2115 /* Extended multi-segment configuration check. */
2116 if (rx_conf == NULL || rx_conf->rx_seg == NULL || rx_conf->rx_nseg == 0) {
2118 "Memory pool is null and no extended configuration provided\n");
2122 rx_seg = (const struct rte_eth_rxseg_split *)rx_conf->rx_seg;
2123 n_seg = rx_conf->rx_nseg;
2125 if (rx_conf->offloads & RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT) {
2126 ret = rte_eth_rx_queue_check_split(rx_seg, n_seg,
2132 RTE_ETHDEV_LOG(ERR, "No Rx segmentation offload configured\n");
2137 /* Use default specified by driver, if nb_rx_desc is zero */
2138 if (nb_rx_desc == 0) {
2139 nb_rx_desc = dev_info.default_rxportconf.ring_size;
2140 /* If driver default is also zero, fall back on EAL default */
2141 if (nb_rx_desc == 0)
2142 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
2145 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
2146 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
2147 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
2150 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
2151 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
2152 dev_info.rx_desc_lim.nb_min,
2153 dev_info.rx_desc_lim.nb_align);
2157 if (dev->data->dev_started &&
2158 !(dev_info.dev_capa &
2159 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
2162 if (dev->data->dev_started &&
2163 (dev->data->rx_queue_state[rx_queue_id] !=
2164 RTE_ETH_QUEUE_STATE_STOPPED))
2167 eth_dev_rxq_release(dev, rx_queue_id);
2169 if (rx_conf == NULL)
2170 rx_conf = &dev_info.default_rxconf;
2172 local_conf = *rx_conf;
2175 * If an offloading has already been enabled in
2176 * rte_eth_dev_configure(), it has been enabled on all queues,
2177 * so there is no need to enable it in this queue again.
2178 * The local_conf.offloads input to underlying PMD only carries
2179 * those offloadings which are only enabled on this queue and
2180 * not enabled on all queues.
2182 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
2185 * New added offloadings for this queue are those not enabled in
2186 * rte_eth_dev_configure() and they must be per-queue type.
2187 * A pure per-port offloading can't be enabled on a queue while
2188 * disabled on another queue. A pure per-port offloading can't
2189 * be enabled for any queue as new added one if it hasn't been
2190 * enabled in rte_eth_dev_configure().
2192 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
2193 local_conf.offloads) {
2195 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
2196 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
2197 port_id, rx_queue_id, local_conf.offloads,
2198 dev_info.rx_queue_offload_capa,
2203 if (local_conf.share_group > 0 &&
2204 (dev_info.dev_capa & RTE_ETH_DEV_CAPA_RXQ_SHARE) == 0) {
2206 "Ethdev port_id=%d rx_queue_id=%d, enabled share_group=%hu while device doesn't support Rx queue share\n",
2207 port_id, rx_queue_id, local_conf.share_group);
2212 * If LRO is enabled, check that the maximum aggregated packet
2213 * size is supported by the configured device.
2215 /* Get the real Ethernet overhead length */
2216 if (local_conf.offloads & RTE_ETH_RX_OFFLOAD_TCP_LRO) {
2217 uint32_t overhead_len;
2218 uint32_t max_rx_pktlen;
2221 overhead_len = eth_dev_get_overhead_len(dev_info.max_rx_pktlen,
2223 max_rx_pktlen = dev->data->mtu + overhead_len;
2224 if (dev->data->dev_conf.rxmode.max_lro_pkt_size == 0)
2225 dev->data->dev_conf.rxmode.max_lro_pkt_size = max_rx_pktlen;
2226 ret = eth_dev_check_lro_pkt_size(port_id,
2227 dev->data->dev_conf.rxmode.max_lro_pkt_size,
2229 dev_info.max_lro_pkt_size);
2234 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
2235 socket_id, &local_conf, mp);
2237 if (!dev->data->min_rx_buf_size ||
2238 dev->data->min_rx_buf_size > mbp_buf_size)
2239 dev->data->min_rx_buf_size = mbp_buf_size;
2242 rte_ethdev_trace_rxq_setup(port_id, rx_queue_id, nb_rx_desc, mp,
2244 return eth_err(port_id, ret);
2248 rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
2249 uint16_t nb_rx_desc,
2250 const struct rte_eth_hairpin_conf *conf)
2253 struct rte_eth_dev *dev;
2254 struct rte_eth_hairpin_cap cap;
2258 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2259 dev = &rte_eth_devices[port_id];
2261 if (rx_queue_id >= dev->data->nb_rx_queues) {
2262 RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u\n", rx_queue_id);
2268 "Cannot setup ethdev port %u Rx hairpin queue from NULL config\n",
2273 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
2276 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_hairpin_queue_setup,
2278 /* if nb_rx_desc is zero use max number of desc from the driver. */
2279 if (nb_rx_desc == 0)
2280 nb_rx_desc = cap.max_nb_desc;
2281 if (nb_rx_desc > cap.max_nb_desc) {
2283 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu",
2284 nb_rx_desc, cap.max_nb_desc);
2287 if (conf->peer_count > cap.max_rx_2_tx) {
2289 "Invalid value for number of peers for Rx queue(=%u), should be: <= %hu",
2290 conf->peer_count, cap.max_rx_2_tx);
2293 if (conf->peer_count == 0) {
2295 "Invalid value for number of peers for Rx queue(=%u), should be: > 0",
2299 for (i = 0, count = 0; i < dev->data->nb_rx_queues &&
2300 cap.max_nb_queues != UINT16_MAX; i++) {
2301 if (i == rx_queue_id || rte_eth_dev_is_rx_hairpin_queue(dev, i))
2304 if (count > cap.max_nb_queues) {
2305 RTE_ETHDEV_LOG(ERR, "To many Rx hairpin queues max is %d",
2309 if (dev->data->dev_started)
2311 eth_dev_rxq_release(dev, rx_queue_id);
2312 ret = (*dev->dev_ops->rx_hairpin_queue_setup)(dev, rx_queue_id,
2315 dev->data->rx_queue_state[rx_queue_id] =
2316 RTE_ETH_QUEUE_STATE_HAIRPIN;
2317 return eth_err(port_id, ret);
2321 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2322 uint16_t nb_tx_desc, unsigned int socket_id,
2323 const struct rte_eth_txconf *tx_conf)
2325 struct rte_eth_dev *dev;
2326 struct rte_eth_dev_info dev_info;
2327 struct rte_eth_txconf local_conf;
2330 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2331 dev = &rte_eth_devices[port_id];
2333 if (tx_queue_id >= dev->data->nb_tx_queues) {
2334 RTE_ETHDEV_LOG(ERR, "Invalid Tx queue_id=%u\n", tx_queue_id);
2338 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
2340 ret = rte_eth_dev_info_get(port_id, &dev_info);
2344 /* Use default specified by driver, if nb_tx_desc is zero */
2345 if (nb_tx_desc == 0) {
2346 nb_tx_desc = dev_info.default_txportconf.ring_size;
2347 /* If driver default is zero, fall back on EAL default */
2348 if (nb_tx_desc == 0)
2349 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
2351 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
2352 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
2353 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
2355 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
2356 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
2357 dev_info.tx_desc_lim.nb_min,
2358 dev_info.tx_desc_lim.nb_align);
2362 if (dev->data->dev_started &&
2363 !(dev_info.dev_capa &
2364 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
2367 if (dev->data->dev_started &&
2368 (dev->data->tx_queue_state[tx_queue_id] !=
2369 RTE_ETH_QUEUE_STATE_STOPPED))
2372 eth_dev_txq_release(dev, tx_queue_id);
2374 if (tx_conf == NULL)
2375 tx_conf = &dev_info.default_txconf;
2377 local_conf = *tx_conf;
2380 * If an offloading has already been enabled in
2381 * rte_eth_dev_configure(), it has been enabled on all queues,
2382 * so there is no need to enable it in this queue again.
2383 * The local_conf.offloads input to underlying PMD only carries
2384 * those offloadings which are only enabled on this queue and
2385 * not enabled on all queues.
2387 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
2390 * New added offloadings for this queue are those not enabled in
2391 * rte_eth_dev_configure() and they must be per-queue type.
2392 * A pure per-port offloading can't be enabled on a queue while
2393 * disabled on another queue. A pure per-port offloading can't
2394 * be enabled for any queue as new added one if it hasn't been
2395 * enabled in rte_eth_dev_configure().
2397 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
2398 local_conf.offloads) {
2400 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
2401 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
2402 port_id, tx_queue_id, local_conf.offloads,
2403 dev_info.tx_queue_offload_capa,
2408 rte_ethdev_trace_txq_setup(port_id, tx_queue_id, nb_tx_desc, tx_conf);
2409 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
2410 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
2414 rte_eth_tx_hairpin_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2415 uint16_t nb_tx_desc,
2416 const struct rte_eth_hairpin_conf *conf)
2418 struct rte_eth_dev *dev;
2419 struct rte_eth_hairpin_cap cap;
2424 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2425 dev = &rte_eth_devices[port_id];
2427 if (tx_queue_id >= dev->data->nb_tx_queues) {
2428 RTE_ETHDEV_LOG(ERR, "Invalid Tx queue_id=%u\n", tx_queue_id);
2434 "Cannot setup ethdev port %u Tx hairpin queue from NULL config\n",
2439 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
2442 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_hairpin_queue_setup,
2444 /* if nb_rx_desc is zero use max number of desc from the driver. */
2445 if (nb_tx_desc == 0)
2446 nb_tx_desc = cap.max_nb_desc;
2447 if (nb_tx_desc > cap.max_nb_desc) {
2449 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu",
2450 nb_tx_desc, cap.max_nb_desc);
2453 if (conf->peer_count > cap.max_tx_2_rx) {
2455 "Invalid value for number of peers for Tx queue(=%u), should be: <= %hu",
2456 conf->peer_count, cap.max_tx_2_rx);
2459 if (conf->peer_count == 0) {
2461 "Invalid value for number of peers for Tx queue(=%u), should be: > 0",
2465 for (i = 0, count = 0; i < dev->data->nb_tx_queues &&
2466 cap.max_nb_queues != UINT16_MAX; i++) {
2467 if (i == tx_queue_id || rte_eth_dev_is_tx_hairpin_queue(dev, i))
2470 if (count > cap.max_nb_queues) {
2471 RTE_ETHDEV_LOG(ERR, "To many Tx hairpin queues max is %d",
2475 if (dev->data->dev_started)
2477 eth_dev_txq_release(dev, tx_queue_id);
2478 ret = (*dev->dev_ops->tx_hairpin_queue_setup)
2479 (dev, tx_queue_id, nb_tx_desc, conf);
2481 dev->data->tx_queue_state[tx_queue_id] =
2482 RTE_ETH_QUEUE_STATE_HAIRPIN;
2483 return eth_err(port_id, ret);
2487 rte_eth_hairpin_bind(uint16_t tx_port, uint16_t rx_port)
2489 struct rte_eth_dev *dev;
2492 RTE_ETH_VALID_PORTID_OR_ERR_RET(tx_port, -ENODEV);
2493 dev = &rte_eth_devices[tx_port];
2495 if (dev->data->dev_started == 0) {
2496 RTE_ETHDEV_LOG(ERR, "Tx port %d is not started\n", tx_port);
2500 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_bind, -ENOTSUP);
2501 ret = (*dev->dev_ops->hairpin_bind)(dev, rx_port);
2503 RTE_ETHDEV_LOG(ERR, "Failed to bind hairpin Tx %d"
2504 " to Rx %d (%d - all ports)\n",
2505 tx_port, rx_port, RTE_MAX_ETHPORTS);
2511 rte_eth_hairpin_unbind(uint16_t tx_port, uint16_t rx_port)
2513 struct rte_eth_dev *dev;
2516 RTE_ETH_VALID_PORTID_OR_ERR_RET(tx_port, -ENODEV);
2517 dev = &rte_eth_devices[tx_port];
2519 if (dev->data->dev_started == 0) {
2520 RTE_ETHDEV_LOG(ERR, "Tx port %d is already stopped\n", tx_port);
2524 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_unbind, -ENOTSUP);
2525 ret = (*dev->dev_ops->hairpin_unbind)(dev, rx_port);
2527 RTE_ETHDEV_LOG(ERR, "Failed to unbind hairpin Tx %d"
2528 " from Rx %d (%d - all ports)\n",
2529 tx_port, rx_port, RTE_MAX_ETHPORTS);
2535 rte_eth_hairpin_get_peer_ports(uint16_t port_id, uint16_t *peer_ports,
2536 size_t len, uint32_t direction)
2538 struct rte_eth_dev *dev;
2541 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2542 dev = &rte_eth_devices[port_id];
2544 if (peer_ports == NULL) {
2546 "Cannot get ethdev port %u hairpin peer ports to NULL\n",
2553 "Cannot get ethdev port %u hairpin peer ports to array with zero size\n",
2558 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_get_peer_ports,
2561 ret = (*dev->dev_ops->hairpin_get_peer_ports)(dev, peer_ports,
2564 RTE_ETHDEV_LOG(ERR, "Failed to get %d hairpin peer %s ports\n",
2565 port_id, direction ? "Rx" : "Tx");
2571 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
2572 void *userdata __rte_unused)
2574 rte_pktmbuf_free_bulk(pkts, unsent);
2578 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
2581 uint64_t *count = userdata;
2583 rte_pktmbuf_free_bulk(pkts, unsent);
2588 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
2589 buffer_tx_error_fn cbfn, void *userdata)
2591 if (buffer == NULL) {
2593 "Cannot set Tx buffer error callback to NULL buffer\n");
2597 buffer->error_callback = cbfn;
2598 buffer->error_userdata = userdata;
2603 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
2607 if (buffer == NULL) {
2608 RTE_ETHDEV_LOG(ERR, "Cannot initialize NULL buffer\n");
2612 buffer->size = size;
2613 if (buffer->error_callback == NULL) {
2614 ret = rte_eth_tx_buffer_set_err_callback(
2615 buffer, rte_eth_tx_buffer_drop_callback, NULL);
2622 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
2624 struct rte_eth_dev *dev;
2627 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2628 dev = &rte_eth_devices[port_id];
2630 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
2632 /* Call driver to free pending mbufs. */
2633 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
2635 return eth_err(port_id, ret);
2639 rte_eth_promiscuous_enable(uint16_t port_id)
2641 struct rte_eth_dev *dev;
2644 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2645 dev = &rte_eth_devices[port_id];
2647 if (dev->data->promiscuous == 1)
2650 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_enable, -ENOTSUP);
2652 diag = (*dev->dev_ops->promiscuous_enable)(dev);
2653 dev->data->promiscuous = (diag == 0) ? 1 : 0;
2655 return eth_err(port_id, diag);
2659 rte_eth_promiscuous_disable(uint16_t port_id)
2661 struct rte_eth_dev *dev;
2664 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2665 dev = &rte_eth_devices[port_id];
2667 if (dev->data->promiscuous == 0)
2670 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_disable, -ENOTSUP);
2672 dev->data->promiscuous = 0;
2673 diag = (*dev->dev_ops->promiscuous_disable)(dev);
2675 dev->data->promiscuous = 1;
2677 return eth_err(port_id, diag);
2681 rte_eth_promiscuous_get(uint16_t port_id)
2683 struct rte_eth_dev *dev;
2685 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2686 dev = &rte_eth_devices[port_id];
2688 return dev->data->promiscuous;
2692 rte_eth_allmulticast_enable(uint16_t port_id)
2694 struct rte_eth_dev *dev;
2697 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2698 dev = &rte_eth_devices[port_id];
2700 if (dev->data->all_multicast == 1)
2703 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_enable, -ENOTSUP);
2704 diag = (*dev->dev_ops->allmulticast_enable)(dev);
2705 dev->data->all_multicast = (diag == 0) ? 1 : 0;
2707 return eth_err(port_id, diag);
2711 rte_eth_allmulticast_disable(uint16_t port_id)
2713 struct rte_eth_dev *dev;
2716 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2717 dev = &rte_eth_devices[port_id];
2719 if (dev->data->all_multicast == 0)
2722 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_disable, -ENOTSUP);
2723 dev->data->all_multicast = 0;
2724 diag = (*dev->dev_ops->allmulticast_disable)(dev);
2726 dev->data->all_multicast = 1;
2728 return eth_err(port_id, diag);
2732 rte_eth_allmulticast_get(uint16_t port_id)
2734 struct rte_eth_dev *dev;
2736 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2737 dev = &rte_eth_devices[port_id];
2739 return dev->data->all_multicast;
2743 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
2745 struct rte_eth_dev *dev;
2747 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2748 dev = &rte_eth_devices[port_id];
2750 if (eth_link == NULL) {
2751 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u link to NULL\n",
2756 if (dev->data->dev_conf.intr_conf.lsc && dev->data->dev_started)
2757 rte_eth_linkstatus_get(dev, eth_link);
2759 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2760 (*dev->dev_ops->link_update)(dev, 1);
2761 *eth_link = dev->data->dev_link;
2768 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
2770 struct rte_eth_dev *dev;
2772 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2773 dev = &rte_eth_devices[port_id];
2775 if (eth_link == NULL) {
2776 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u link to NULL\n",
2781 if (dev->data->dev_conf.intr_conf.lsc && dev->data->dev_started)
2782 rte_eth_linkstatus_get(dev, eth_link);
2784 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2785 (*dev->dev_ops->link_update)(dev, 0);
2786 *eth_link = dev->data->dev_link;
2793 rte_eth_link_speed_to_str(uint32_t link_speed)
2795 switch (link_speed) {
2796 case RTE_ETH_SPEED_NUM_NONE: return "None";
2797 case RTE_ETH_SPEED_NUM_10M: return "10 Mbps";
2798 case RTE_ETH_SPEED_NUM_100M: return "100 Mbps";
2799 case RTE_ETH_SPEED_NUM_1G: return "1 Gbps";
2800 case RTE_ETH_SPEED_NUM_2_5G: return "2.5 Gbps";
2801 case RTE_ETH_SPEED_NUM_5G: return "5 Gbps";
2802 case RTE_ETH_SPEED_NUM_10G: return "10 Gbps";
2803 case RTE_ETH_SPEED_NUM_20G: return "20 Gbps";
2804 case RTE_ETH_SPEED_NUM_25G: return "25 Gbps";
2805 case RTE_ETH_SPEED_NUM_40G: return "40 Gbps";
2806 case RTE_ETH_SPEED_NUM_50G: return "50 Gbps";
2807 case RTE_ETH_SPEED_NUM_56G: return "56 Gbps";
2808 case RTE_ETH_SPEED_NUM_100G: return "100 Gbps";
2809 case RTE_ETH_SPEED_NUM_200G: return "200 Gbps";
2810 case RTE_ETH_SPEED_NUM_UNKNOWN: return "Unknown";
2811 default: return "Invalid";
2816 rte_eth_link_to_str(char *str, size_t len, const struct rte_eth_link *eth_link)
2819 RTE_ETHDEV_LOG(ERR, "Cannot convert link to NULL string\n");
2825 "Cannot convert link to string with zero size\n");
2829 if (eth_link == NULL) {
2830 RTE_ETHDEV_LOG(ERR, "Cannot convert to string from NULL link\n");
2834 if (eth_link->link_status == RTE_ETH_LINK_DOWN)
2835 return snprintf(str, len, "Link down");
2837 return snprintf(str, len, "Link up at %s %s %s",
2838 rte_eth_link_speed_to_str(eth_link->link_speed),
2839 (eth_link->link_duplex == RTE_ETH_LINK_FULL_DUPLEX) ?
2841 (eth_link->link_autoneg == RTE_ETH_LINK_AUTONEG) ?
2842 "Autoneg" : "Fixed");
2846 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
2848 struct rte_eth_dev *dev;
2850 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2851 dev = &rte_eth_devices[port_id];
2853 if (stats == NULL) {
2854 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u stats to NULL\n",
2859 memset(stats, 0, sizeof(*stats));
2861 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
2862 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
2863 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
2867 rte_eth_stats_reset(uint16_t port_id)
2869 struct rte_eth_dev *dev;
2872 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2873 dev = &rte_eth_devices[port_id];
2875 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
2876 ret = (*dev->dev_ops->stats_reset)(dev);
2878 return eth_err(port_id, ret);
2880 dev->data->rx_mbuf_alloc_failed = 0;
2886 eth_dev_get_xstats_basic_count(struct rte_eth_dev *dev)
2888 uint16_t nb_rxqs, nb_txqs;
2891 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2892 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2894 count = RTE_NB_STATS;
2895 if (dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS) {
2896 count += nb_rxqs * RTE_NB_RXQ_STATS;
2897 count += nb_txqs * RTE_NB_TXQ_STATS;
2904 eth_dev_get_xstats_count(uint16_t port_id)
2906 struct rte_eth_dev *dev;
2909 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2910 dev = &rte_eth_devices[port_id];
2911 if (dev->dev_ops->xstats_get_names != NULL) {
2912 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2914 return eth_err(port_id, count);
2919 count += eth_dev_get_xstats_basic_count(dev);
2925 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2928 int cnt_xstats, idx_xstat;
2930 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2932 if (xstat_name == NULL) {
2934 "Cannot get ethdev port %u xstats ID from NULL xstat name\n",
2941 "Cannot get ethdev port %u xstats ID to NULL\n",
2947 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2948 if (cnt_xstats < 0) {
2949 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2953 /* Get id-name lookup table */
2954 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2956 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2957 port_id, xstats_names, cnt_xstats, NULL)) {
2958 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2962 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2963 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2972 /* retrieve basic stats names */
2974 eth_basic_stats_get_names(struct rte_eth_dev *dev,
2975 struct rte_eth_xstat_name *xstats_names)
2977 int cnt_used_entries = 0;
2978 uint32_t idx, id_queue;
2981 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2982 strlcpy(xstats_names[cnt_used_entries].name,
2983 eth_dev_stats_strings[idx].name,
2984 sizeof(xstats_names[0].name));
2988 if ((dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS) == 0)
2989 return cnt_used_entries;
2991 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2992 for (id_queue = 0; id_queue < num_q; id_queue++) {
2993 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2994 snprintf(xstats_names[cnt_used_entries].name,
2995 sizeof(xstats_names[0].name),
2997 id_queue, eth_dev_rxq_stats_strings[idx].name);
3002 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
3003 for (id_queue = 0; id_queue < num_q; id_queue++) {
3004 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
3005 snprintf(xstats_names[cnt_used_entries].name,
3006 sizeof(xstats_names[0].name),
3008 id_queue, eth_dev_txq_stats_strings[idx].name);
3012 return cnt_used_entries;
3015 /* retrieve ethdev extended statistics names */
3017 rte_eth_xstats_get_names_by_id(uint16_t port_id,
3018 struct rte_eth_xstat_name *xstats_names, unsigned int size,
3021 struct rte_eth_xstat_name *xstats_names_copy;
3022 unsigned int no_basic_stat_requested = 1;
3023 unsigned int no_ext_stat_requested = 1;
3024 unsigned int expected_entries;
3025 unsigned int basic_count;
3026 struct rte_eth_dev *dev;
3030 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3031 dev = &rte_eth_devices[port_id];
3033 basic_count = eth_dev_get_xstats_basic_count(dev);
3034 ret = eth_dev_get_xstats_count(port_id);
3037 expected_entries = (unsigned int)ret;
3039 /* Return max number of stats if no ids given */
3042 return expected_entries;
3043 else if (xstats_names && size < expected_entries)
3044 return expected_entries;
3047 if (ids && !xstats_names)
3050 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
3051 uint64_t ids_copy[size];
3053 for (i = 0; i < size; i++) {
3054 if (ids[i] < basic_count) {
3055 no_basic_stat_requested = 0;
3060 * Convert ids to xstats ids that PMD knows.
3061 * ids known by user are basic + extended stats.
3063 ids_copy[i] = ids[i] - basic_count;
3066 if (no_basic_stat_requested)
3067 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
3068 ids_copy, xstats_names, size);
3071 /* Retrieve all stats */
3073 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
3075 if (num_stats < 0 || num_stats > (int)expected_entries)
3078 return expected_entries;
3081 xstats_names_copy = calloc(expected_entries,
3082 sizeof(struct rte_eth_xstat_name));
3084 if (!xstats_names_copy) {
3085 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
3090 for (i = 0; i < size; i++) {
3091 if (ids[i] >= basic_count) {
3092 no_ext_stat_requested = 0;
3098 /* Fill xstats_names_copy structure */
3099 if (ids && no_ext_stat_requested) {
3100 eth_basic_stats_get_names(dev, xstats_names_copy);
3102 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
3105 free(xstats_names_copy);
3111 for (i = 0; i < size; i++) {
3112 if (ids[i] >= expected_entries) {
3113 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
3114 free(xstats_names_copy);
3117 xstats_names[i] = xstats_names_copy[ids[i]];
3120 free(xstats_names_copy);
3125 rte_eth_xstats_get_names(uint16_t port_id,
3126 struct rte_eth_xstat_name *xstats_names,
3129 struct rte_eth_dev *dev;
3130 int cnt_used_entries;
3131 int cnt_expected_entries;
3132 int cnt_driver_entries;
3134 cnt_expected_entries = eth_dev_get_xstats_count(port_id);
3135 if (xstats_names == NULL || cnt_expected_entries < 0 ||
3136 (int)size < cnt_expected_entries)
3137 return cnt_expected_entries;
3139 /* port_id checked in eth_dev_get_xstats_count() */
3140 dev = &rte_eth_devices[port_id];
3142 cnt_used_entries = eth_basic_stats_get_names(dev, xstats_names);
3144 if (dev->dev_ops->xstats_get_names != NULL) {
3145 /* If there are any driver-specific xstats, append them
3148 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
3150 xstats_names + cnt_used_entries,
3151 size - cnt_used_entries);
3152 if (cnt_driver_entries < 0)
3153 return eth_err(port_id, cnt_driver_entries);
3154 cnt_used_entries += cnt_driver_entries;
3157 return cnt_used_entries;
3162 eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
3164 struct rte_eth_dev *dev;
3165 struct rte_eth_stats eth_stats;
3166 unsigned int count = 0, i, q;
3167 uint64_t val, *stats_ptr;
3168 uint16_t nb_rxqs, nb_txqs;
3171 ret = rte_eth_stats_get(port_id, ð_stats);
3175 dev = &rte_eth_devices[port_id];
3177 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
3178 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
3181 for (i = 0; i < RTE_NB_STATS; i++) {
3182 stats_ptr = RTE_PTR_ADD(ð_stats,
3183 eth_dev_stats_strings[i].offset);
3185 xstats[count++].value = val;
3188 if ((dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS) == 0)
3192 for (q = 0; q < nb_rxqs; q++) {
3193 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
3194 stats_ptr = RTE_PTR_ADD(ð_stats,
3195 eth_dev_rxq_stats_strings[i].offset +
3196 q * sizeof(uint64_t));
3198 xstats[count++].value = val;
3203 for (q = 0; q < nb_txqs; q++) {
3204 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
3205 stats_ptr = RTE_PTR_ADD(ð_stats,
3206 eth_dev_txq_stats_strings[i].offset +
3207 q * sizeof(uint64_t));
3209 xstats[count++].value = val;
3215 /* retrieve ethdev extended statistics */
3217 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
3218 uint64_t *values, unsigned int size)
3220 unsigned int no_basic_stat_requested = 1;
3221 unsigned int no_ext_stat_requested = 1;
3222 unsigned int num_xstats_filled;
3223 unsigned int basic_count;
3224 uint16_t expected_entries;
3225 struct rte_eth_dev *dev;
3229 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3230 dev = &rte_eth_devices[port_id];
3232 ret = eth_dev_get_xstats_count(port_id);
3235 expected_entries = (uint16_t)ret;
3236 struct rte_eth_xstat xstats[expected_entries];
3237 basic_count = eth_dev_get_xstats_basic_count(dev);
3239 /* Return max number of stats if no ids given */
3242 return expected_entries;
3243 else if (values && size < expected_entries)
3244 return expected_entries;
3250 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
3251 unsigned int basic_count = eth_dev_get_xstats_basic_count(dev);
3252 uint64_t ids_copy[size];
3254 for (i = 0; i < size; i++) {
3255 if (ids[i] < basic_count) {
3256 no_basic_stat_requested = 0;
3261 * Convert ids to xstats ids that PMD knows.
3262 * ids known by user are basic + extended stats.
3264 ids_copy[i] = ids[i] - basic_count;
3267 if (no_basic_stat_requested)
3268 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
3273 for (i = 0; i < size; i++) {
3274 if (ids[i] >= basic_count) {
3275 no_ext_stat_requested = 0;
3281 /* Fill the xstats structure */
3282 if (ids && no_ext_stat_requested)
3283 ret = eth_basic_stats_get(port_id, xstats);
3285 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
3289 num_xstats_filled = (unsigned int)ret;
3291 /* Return all stats */
3293 for (i = 0; i < num_xstats_filled; i++)
3294 values[i] = xstats[i].value;
3295 return expected_entries;
3299 for (i = 0; i < size; i++) {
3300 if (ids[i] >= expected_entries) {
3301 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
3304 values[i] = xstats[ids[i]].value;
3310 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
3313 struct rte_eth_dev *dev;
3314 unsigned int count = 0, i;
3315 signed int xcount = 0;
3316 uint16_t nb_rxqs, nb_txqs;
3319 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3320 dev = &rte_eth_devices[port_id];
3322 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
3323 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
3325 /* Return generic statistics */
3326 count = RTE_NB_STATS;
3327 if (dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS)
3328 count += (nb_rxqs * RTE_NB_RXQ_STATS) + (nb_txqs * RTE_NB_TXQ_STATS);
3330 /* implemented by the driver */
3331 if (dev->dev_ops->xstats_get != NULL) {
3332 /* Retrieve the xstats from the driver at the end of the
3335 xcount = (*dev->dev_ops->xstats_get)(dev,
3336 xstats ? xstats + count : NULL,
3337 (n > count) ? n - count : 0);
3340 return eth_err(port_id, xcount);
3343 if (n < count + xcount || xstats == NULL)
3344 return count + xcount;
3346 /* now fill the xstats structure */
3347 ret = eth_basic_stats_get(port_id, xstats);
3352 for (i = 0; i < count; i++)
3354 /* add an offset to driver-specific stats */
3355 for ( ; i < count + xcount; i++)
3356 xstats[i].id += count;
3358 return count + xcount;
3361 /* reset ethdev extended statistics */
3363 rte_eth_xstats_reset(uint16_t port_id)
3365 struct rte_eth_dev *dev;
3367 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3368 dev = &rte_eth_devices[port_id];
3370 /* implemented by the driver */
3371 if (dev->dev_ops->xstats_reset != NULL)
3372 return eth_err(port_id, (*dev->dev_ops->xstats_reset)(dev));
3374 /* fallback to default */
3375 return rte_eth_stats_reset(port_id);
3379 eth_dev_set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id,
3380 uint8_t stat_idx, uint8_t is_rx)
3382 struct rte_eth_dev *dev;
3384 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3385 dev = &rte_eth_devices[port_id];
3387 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
3390 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
3393 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
3396 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
3397 return (*dev->dev_ops->queue_stats_mapping_set) (dev, queue_id, stat_idx, is_rx);
3401 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
3404 return eth_err(port_id, eth_dev_set_queue_stats_mapping(port_id,
3406 stat_idx, STAT_QMAP_TX));
3410 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
3413 return eth_err(port_id, eth_dev_set_queue_stats_mapping(port_id,
3415 stat_idx, STAT_QMAP_RX));
3419 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
3421 struct rte_eth_dev *dev;
3423 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3424 dev = &rte_eth_devices[port_id];
3426 if (fw_version == NULL && fw_size > 0) {
3428 "Cannot get ethdev port %u FW version to NULL when string size is non zero\n",
3433 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
3434 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
3435 fw_version, fw_size));
3439 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
3441 struct rte_eth_dev *dev;
3442 const struct rte_eth_desc_lim lim = {
3443 .nb_max = UINT16_MAX,
3446 .nb_seg_max = UINT16_MAX,
3447 .nb_mtu_seg_max = UINT16_MAX,
3451 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3452 dev = &rte_eth_devices[port_id];
3454 if (dev_info == NULL) {
3455 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u info to NULL\n",
3461 * Init dev_info before port_id check since caller does not have
3462 * return status and does not know if get is successful or not.
3464 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
3465 dev_info->switch_info.domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
3467 dev_info->rx_desc_lim = lim;
3468 dev_info->tx_desc_lim = lim;
3469 dev_info->device = dev->device;
3470 dev_info->min_mtu = RTE_ETHER_MIN_LEN - RTE_ETHER_HDR_LEN -
3472 dev_info->max_mtu = UINT16_MAX;
3474 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
3475 diag = (*dev->dev_ops->dev_infos_get)(dev, dev_info);
3477 /* Cleanup already filled in device information */
3478 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
3479 return eth_err(port_id, diag);
3482 /* Maximum number of queues should be <= RTE_MAX_QUEUES_PER_PORT */
3483 dev_info->max_rx_queues = RTE_MIN(dev_info->max_rx_queues,
3484 RTE_MAX_QUEUES_PER_PORT);
3485 dev_info->max_tx_queues = RTE_MIN(dev_info->max_tx_queues,
3486 RTE_MAX_QUEUES_PER_PORT);
3488 dev_info->driver_name = dev->device->driver->name;
3489 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
3490 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
3492 dev_info->dev_flags = &dev->data->dev_flags;
3498 rte_eth_dev_conf_get(uint16_t port_id, struct rte_eth_conf *dev_conf)
3500 struct rte_eth_dev *dev;
3502 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3503 dev = &rte_eth_devices[port_id];
3505 if (dev_conf == NULL) {
3507 "Cannot get ethdev port %u configuration to NULL\n",
3512 memcpy(dev_conf, &dev->data->dev_conf, sizeof(struct rte_eth_conf));
3518 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
3519 uint32_t *ptypes, int num)
3522 struct rte_eth_dev *dev;
3523 const uint32_t *all_ptypes;
3525 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3526 dev = &rte_eth_devices[port_id];
3528 if (ptypes == NULL && num > 0) {
3530 "Cannot get ethdev port %u supported packet types to NULL when array size is non zero\n",
3535 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
3536 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3541 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
3542 if (all_ptypes[i] & ptype_mask) {
3544 ptypes[j] = all_ptypes[i];
3552 rte_eth_dev_set_ptypes(uint16_t port_id, uint32_t ptype_mask,
3553 uint32_t *set_ptypes, unsigned int num)
3555 const uint32_t valid_ptype_masks[] = {
3559 RTE_PTYPE_TUNNEL_MASK,
3560 RTE_PTYPE_INNER_L2_MASK,
3561 RTE_PTYPE_INNER_L3_MASK,
3562 RTE_PTYPE_INNER_L4_MASK,
3564 const uint32_t *all_ptypes;
3565 struct rte_eth_dev *dev;
3566 uint32_t unused_mask;
3570 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3571 dev = &rte_eth_devices[port_id];
3573 if (num > 0 && set_ptypes == NULL) {
3575 "Cannot get ethdev port %u set packet types to NULL when array size is non zero\n",
3580 if (*dev->dev_ops->dev_supported_ptypes_get == NULL ||
3581 *dev->dev_ops->dev_ptypes_set == NULL) {
3586 if (ptype_mask == 0) {
3587 ret = (*dev->dev_ops->dev_ptypes_set)(dev,
3592 unused_mask = ptype_mask;
3593 for (i = 0; i < RTE_DIM(valid_ptype_masks); i++) {
3594 uint32_t mask = ptype_mask & valid_ptype_masks[i];
3595 if (mask && mask != valid_ptype_masks[i]) {
3599 unused_mask &= ~valid_ptype_masks[i];
3607 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3608 if (all_ptypes == NULL) {
3614 * Accommodate as many set_ptypes as possible. If the supplied
3615 * set_ptypes array is insufficient fill it partially.
3617 for (i = 0, j = 0; set_ptypes != NULL &&
3618 (all_ptypes[i] != RTE_PTYPE_UNKNOWN); ++i) {
3619 if (ptype_mask & all_ptypes[i]) {
3621 set_ptypes[j] = all_ptypes[i];
3629 if (set_ptypes != NULL && j < num)
3630 set_ptypes[j] = RTE_PTYPE_UNKNOWN;
3632 return (*dev->dev_ops->dev_ptypes_set)(dev, ptype_mask);
3636 set_ptypes[0] = RTE_PTYPE_UNKNOWN;
3642 rte_eth_macaddrs_get(uint16_t port_id, struct rte_ether_addr *ma,
3646 struct rte_eth_dev *dev;
3647 struct rte_eth_dev_info dev_info;
3650 RTE_ETHDEV_LOG(ERR, "%s: invalid parameters\n", __func__);
3654 /* will check for us that port_id is a valid one */
3655 ret = rte_eth_dev_info_get(port_id, &dev_info);
3659 dev = &rte_eth_devices[port_id];
3660 num = RTE_MIN(dev_info.max_mac_addrs, num);
3661 memcpy(ma, dev->data->mac_addrs, num * sizeof(ma[0]));
3667 rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
3669 struct rte_eth_dev *dev;
3671 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3672 dev = &rte_eth_devices[port_id];
3674 if (mac_addr == NULL) {
3676 "Cannot get ethdev port %u MAC address to NULL\n",
3681 rte_ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
3687 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
3689 struct rte_eth_dev *dev;
3691 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3692 dev = &rte_eth_devices[port_id];
3695 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u MTU to NULL\n",
3700 *mtu = dev->data->mtu;
3705 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
3708 struct rte_eth_dev_info dev_info;
3709 struct rte_eth_dev *dev;
3711 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3712 dev = &rte_eth_devices[port_id];
3713 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
3716 * Check if the device supports dev_infos_get, if it does not
3717 * skip min_mtu/max_mtu validation here as this requires values
3718 * that are populated within the call to rte_eth_dev_info_get()
3719 * which relies on dev->dev_ops->dev_infos_get.
3721 if (*dev->dev_ops->dev_infos_get != NULL) {
3722 ret = rte_eth_dev_info_get(port_id, &dev_info);
3726 ret = eth_dev_validate_mtu(port_id, &dev_info, mtu);
3731 if (dev->data->dev_configured == 0) {
3733 "Port %u must be configured before MTU set\n",
3738 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
3740 dev->data->mtu = mtu;
3742 return eth_err(port_id, ret);
3746 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
3748 struct rte_eth_dev *dev;
3751 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3752 dev = &rte_eth_devices[port_id];
3754 if (!(dev->data->dev_conf.rxmode.offloads &
3755 RTE_ETH_RX_OFFLOAD_VLAN_FILTER)) {
3756 RTE_ETHDEV_LOG(ERR, "Port %u: VLAN-filtering disabled\n",
3761 if (vlan_id > 4095) {
3762 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
3766 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
3768 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
3770 struct rte_vlan_filter_conf *vfc;
3774 vfc = &dev->data->vlan_filter_conf;
3775 vidx = vlan_id / 64;
3776 vbit = vlan_id % 64;
3779 vfc->ids[vidx] |= RTE_BIT64(vbit);
3781 vfc->ids[vidx] &= ~RTE_BIT64(vbit);
3784 return eth_err(port_id, ret);
3788 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
3791 struct rte_eth_dev *dev;
3793 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3794 dev = &rte_eth_devices[port_id];
3796 if (rx_queue_id >= dev->data->nb_rx_queues) {
3797 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
3801 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
3802 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
3808 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
3809 enum rte_vlan_type vlan_type,
3812 struct rte_eth_dev *dev;
3814 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3815 dev = &rte_eth_devices[port_id];
3817 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
3818 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
3823 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
3825 struct rte_eth_dev_info dev_info;
3826 struct rte_eth_dev *dev;
3830 uint64_t orig_offloads;
3831 uint64_t dev_offloads;
3832 uint64_t new_offloads;
3834 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3835 dev = &rte_eth_devices[port_id];
3837 /* save original values in case of failure */
3838 orig_offloads = dev->data->dev_conf.rxmode.offloads;
3839 dev_offloads = orig_offloads;
3841 /* check which option changed by application */
3842 cur = !!(offload_mask & RTE_ETH_VLAN_STRIP_OFFLOAD);
3843 org = !!(dev_offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP);
3846 dev_offloads |= RTE_ETH_RX_OFFLOAD_VLAN_STRIP;
3848 dev_offloads &= ~RTE_ETH_RX_OFFLOAD_VLAN_STRIP;
3849 mask |= RTE_ETH_VLAN_STRIP_MASK;
3852 cur = !!(offload_mask & RTE_ETH_VLAN_FILTER_OFFLOAD);
3853 org = !!(dev_offloads & RTE_ETH_RX_OFFLOAD_VLAN_FILTER);
3856 dev_offloads |= RTE_ETH_RX_OFFLOAD_VLAN_FILTER;
3858 dev_offloads &= ~RTE_ETH_RX_OFFLOAD_VLAN_FILTER;
3859 mask |= RTE_ETH_VLAN_FILTER_MASK;
3862 cur = !!(offload_mask & RTE_ETH_VLAN_EXTEND_OFFLOAD);
3863 org = !!(dev_offloads & RTE_ETH_RX_OFFLOAD_VLAN_EXTEND);
3866 dev_offloads |= RTE_ETH_RX_OFFLOAD_VLAN_EXTEND;
3868 dev_offloads &= ~RTE_ETH_RX_OFFLOAD_VLAN_EXTEND;
3869 mask |= RTE_ETH_VLAN_EXTEND_MASK;
3872 cur = !!(offload_mask & RTE_ETH_QINQ_STRIP_OFFLOAD);
3873 org = !!(dev_offloads & RTE_ETH_RX_OFFLOAD_QINQ_STRIP);
3876 dev_offloads |= RTE_ETH_RX_OFFLOAD_QINQ_STRIP;
3878 dev_offloads &= ~RTE_ETH_RX_OFFLOAD_QINQ_STRIP;
3879 mask |= RTE_ETH_QINQ_STRIP_MASK;
3886 ret = rte_eth_dev_info_get(port_id, &dev_info);
3890 /* Rx VLAN offloading must be within its device capabilities */
3891 if ((dev_offloads & dev_info.rx_offload_capa) != dev_offloads) {
3892 new_offloads = dev_offloads & ~orig_offloads;
3894 "Ethdev port_id=%u requested new added VLAN offloads "
3895 "0x%" PRIx64 " must be within Rx offloads capabilities "
3896 "0x%" PRIx64 " in %s()\n",
3897 port_id, new_offloads, dev_info.rx_offload_capa,
3902 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
3903 dev->data->dev_conf.rxmode.offloads = dev_offloads;
3904 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
3906 /* hit an error restore original values */
3907 dev->data->dev_conf.rxmode.offloads = orig_offloads;
3910 return eth_err(port_id, ret);
3914 rte_eth_dev_get_vlan_offload(uint16_t port_id)
3916 struct rte_eth_dev *dev;
3917 uint64_t *dev_offloads;
3920 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3921 dev = &rte_eth_devices[port_id];
3922 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
3924 if (*dev_offloads & RTE_ETH_RX_OFFLOAD_VLAN_STRIP)
3925 ret |= RTE_ETH_VLAN_STRIP_OFFLOAD;
3927 if (*dev_offloads & RTE_ETH_RX_OFFLOAD_VLAN_FILTER)
3928 ret |= RTE_ETH_VLAN_FILTER_OFFLOAD;
3930 if (*dev_offloads & RTE_ETH_RX_OFFLOAD_VLAN_EXTEND)
3931 ret |= RTE_ETH_VLAN_EXTEND_OFFLOAD;
3933 if (*dev_offloads & RTE_ETH_RX_OFFLOAD_QINQ_STRIP)
3934 ret |= RTE_ETH_QINQ_STRIP_OFFLOAD;
3940 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
3942 struct rte_eth_dev *dev;
3944 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3945 dev = &rte_eth_devices[port_id];
3947 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
3948 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
3952 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3954 struct rte_eth_dev *dev;
3956 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3957 dev = &rte_eth_devices[port_id];
3959 if (fc_conf == NULL) {
3961 "Cannot get ethdev port %u flow control config to NULL\n",
3966 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
3967 memset(fc_conf, 0, sizeof(*fc_conf));
3968 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
3972 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3974 struct rte_eth_dev *dev;
3976 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3977 dev = &rte_eth_devices[port_id];
3979 if (fc_conf == NULL) {
3981 "Cannot set ethdev port %u flow control from NULL config\n",
3986 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
3987 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
3991 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
3992 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
3996 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
3997 struct rte_eth_pfc_conf *pfc_conf)
3999 struct rte_eth_dev *dev;
4001 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4002 dev = &rte_eth_devices[port_id];
4004 if (pfc_conf == NULL) {
4006 "Cannot set ethdev port %u priority flow control from NULL config\n",
4011 if (pfc_conf->priority > (RTE_ETH_DCB_NUM_USER_PRIORITIES - 1)) {
4012 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
4016 /* High water, low water validation are device specific */
4017 if (*dev->dev_ops->priority_flow_ctrl_set)
4018 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
4024 eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
4029 num = (reta_size + RTE_ETH_RETA_GROUP_SIZE - 1) / RTE_ETH_RETA_GROUP_SIZE;
4030 for (i = 0; i < num; i++) {
4031 if (reta_conf[i].mask)
4039 eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
4043 uint16_t i, idx, shift;
4046 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
4050 for (i = 0; i < reta_size; i++) {
4051 idx = i / RTE_ETH_RETA_GROUP_SIZE;
4052 shift = i % RTE_ETH_RETA_GROUP_SIZE;
4053 if ((reta_conf[idx].mask & RTE_BIT64(shift)) &&
4054 (reta_conf[idx].reta[shift] >= max_rxq)) {
4056 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
4058 reta_conf[idx].reta[shift], max_rxq);
4067 rte_eth_dev_rss_reta_update(uint16_t port_id,
4068 struct rte_eth_rss_reta_entry64 *reta_conf,
4071 struct rte_eth_dev *dev;
4074 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4075 dev = &rte_eth_devices[port_id];
4077 if (reta_conf == NULL) {
4079 "Cannot update ethdev port %u RSS RETA to NULL\n",
4084 if (reta_size == 0) {
4086 "Cannot update ethdev port %u RSS RETA with zero size\n",
4091 /* Check mask bits */
4092 ret = eth_check_reta_mask(reta_conf, reta_size);
4096 /* Check entry value */
4097 ret = eth_check_reta_entry(reta_conf, reta_size,
4098 dev->data->nb_rx_queues);
4102 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
4103 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
4108 rte_eth_dev_rss_reta_query(uint16_t port_id,
4109 struct rte_eth_rss_reta_entry64 *reta_conf,
4112 struct rte_eth_dev *dev;
4115 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4116 dev = &rte_eth_devices[port_id];
4118 if (reta_conf == NULL) {
4120 "Cannot query ethdev port %u RSS RETA from NULL config\n",
4125 /* Check mask bits */
4126 ret = eth_check_reta_mask(reta_conf, reta_size);
4130 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
4131 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
4136 rte_eth_dev_rss_hash_update(uint16_t port_id,
4137 struct rte_eth_rss_conf *rss_conf)
4139 struct rte_eth_dev *dev;
4140 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
4143 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4144 dev = &rte_eth_devices[port_id];
4146 if (rss_conf == NULL) {
4148 "Cannot update ethdev port %u RSS hash from NULL config\n",
4153 ret = rte_eth_dev_info_get(port_id, &dev_info);
4157 rss_conf->rss_hf = rte_eth_rss_hf_refine(rss_conf->rss_hf);
4158 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
4159 dev_info.flow_type_rss_offloads) {
4161 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
4162 port_id, rss_conf->rss_hf,
4163 dev_info.flow_type_rss_offloads);
4166 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
4167 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
4172 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
4173 struct rte_eth_rss_conf *rss_conf)
4175 struct rte_eth_dev *dev;
4177 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4178 dev = &rte_eth_devices[port_id];
4180 if (rss_conf == NULL) {
4182 "Cannot get ethdev port %u RSS hash config to NULL\n",
4187 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
4188 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
4193 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
4194 struct rte_eth_udp_tunnel *udp_tunnel)
4196 struct rte_eth_dev *dev;
4198 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4199 dev = &rte_eth_devices[port_id];
4201 if (udp_tunnel == NULL) {
4203 "Cannot add ethdev port %u UDP tunnel port from NULL UDP tunnel\n",
4208 if (udp_tunnel->prot_type >= RTE_ETH_TUNNEL_TYPE_MAX) {
4209 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4213 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
4214 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
4219 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
4220 struct rte_eth_udp_tunnel *udp_tunnel)
4222 struct rte_eth_dev *dev;
4224 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4225 dev = &rte_eth_devices[port_id];
4227 if (udp_tunnel == NULL) {
4229 "Cannot delete ethdev port %u UDP tunnel port from NULL UDP tunnel\n",
4234 if (udp_tunnel->prot_type >= RTE_ETH_TUNNEL_TYPE_MAX) {
4235 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4239 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
4240 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
4245 rte_eth_led_on(uint16_t port_id)
4247 struct rte_eth_dev *dev;
4249 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4250 dev = &rte_eth_devices[port_id];
4252 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
4253 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
4257 rte_eth_led_off(uint16_t port_id)
4259 struct rte_eth_dev *dev;
4261 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4262 dev = &rte_eth_devices[port_id];
4264 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
4265 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
4269 rte_eth_fec_get_capability(uint16_t port_id,
4270 struct rte_eth_fec_capa *speed_fec_capa,
4273 struct rte_eth_dev *dev;
4276 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4277 dev = &rte_eth_devices[port_id];
4279 if (speed_fec_capa == NULL && num > 0) {
4281 "Cannot get ethdev port %u FEC capability to NULL when array size is non zero\n",
4286 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_get_capability, -ENOTSUP);
4287 ret = (*dev->dev_ops->fec_get_capability)(dev, speed_fec_capa, num);
4293 rte_eth_fec_get(uint16_t port_id, uint32_t *fec_capa)
4295 struct rte_eth_dev *dev;
4297 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4298 dev = &rte_eth_devices[port_id];
4300 if (fec_capa == NULL) {
4302 "Cannot get ethdev port %u current FEC mode to NULL\n",
4307 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_get, -ENOTSUP);
4308 return eth_err(port_id, (*dev->dev_ops->fec_get)(dev, fec_capa));
4312 rte_eth_fec_set(uint16_t port_id, uint32_t fec_capa)
4314 struct rte_eth_dev *dev;
4316 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4317 dev = &rte_eth_devices[port_id];
4319 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_set, -ENOTSUP);
4320 return eth_err(port_id, (*dev->dev_ops->fec_set)(dev, fec_capa));
4324 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
4328 eth_dev_get_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
4330 struct rte_eth_dev_info dev_info;
4331 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4335 ret = rte_eth_dev_info_get(port_id, &dev_info);
4339 for (i = 0; i < dev_info.max_mac_addrs; i++)
4340 if (memcmp(addr, &dev->data->mac_addrs[i],
4341 RTE_ETHER_ADDR_LEN) == 0)
4347 static const struct rte_ether_addr null_mac_addr;
4350 rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr,
4353 struct rte_eth_dev *dev;
4358 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4359 dev = &rte_eth_devices[port_id];
4363 "Cannot add ethdev port %u MAC address from NULL address\n",
4368 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
4370 if (rte_is_zero_ether_addr(addr)) {
4371 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
4375 if (pool >= RTE_ETH_64_POOLS) {
4376 RTE_ETHDEV_LOG(ERR, "Pool ID must be 0-%d\n", RTE_ETH_64_POOLS - 1);
4380 index = eth_dev_get_mac_addr_index(port_id, addr);
4382 index = eth_dev_get_mac_addr_index(port_id, &null_mac_addr);
4384 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
4389 pool_mask = dev->data->mac_pool_sel[index];
4391 /* Check if both MAC address and pool is already there, and do nothing */
4392 if (pool_mask & RTE_BIT64(pool))
4397 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
4400 /* Update address in NIC data structure */
4401 rte_ether_addr_copy(addr, &dev->data->mac_addrs[index]);
4403 /* Update pool bitmap in NIC data structure */
4404 dev->data->mac_pool_sel[index] |= RTE_BIT64(pool);
4407 return eth_err(port_id, ret);
4411 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *addr)
4413 struct rte_eth_dev *dev;
4416 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4417 dev = &rte_eth_devices[port_id];
4421 "Cannot remove ethdev port %u MAC address from NULL address\n",
4426 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
4428 index = eth_dev_get_mac_addr_index(port_id, addr);
4431 "Port %u: Cannot remove default MAC address\n",
4434 } else if (index < 0)
4435 return 0; /* Do nothing if address wasn't found */
4438 (*dev->dev_ops->mac_addr_remove)(dev, index);
4440 /* Update address in NIC data structure */
4441 rte_ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
4443 /* reset pool bitmap */
4444 dev->data->mac_pool_sel[index] = 0;
4450 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *addr)
4452 struct rte_eth_dev *dev;
4455 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4456 dev = &rte_eth_devices[port_id];
4460 "Cannot set ethdev port %u default MAC address from NULL address\n",
4465 if (!rte_is_valid_assigned_ether_addr(addr))
4468 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
4470 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
4474 /* Update default address in NIC data structure */
4475 rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]);
4482 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
4486 eth_dev_get_hash_mac_addr_index(uint16_t port_id,
4487 const struct rte_ether_addr *addr)
4489 struct rte_eth_dev_info dev_info;
4490 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4494 ret = rte_eth_dev_info_get(port_id, &dev_info);
4498 if (!dev->data->hash_mac_addrs)
4501 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
4502 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
4503 RTE_ETHER_ADDR_LEN) == 0)
4510 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
4515 struct rte_eth_dev *dev;
4517 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4518 dev = &rte_eth_devices[port_id];
4522 "Cannot set ethdev port %u unicast hash table from NULL address\n",
4527 if (rte_is_zero_ether_addr(addr)) {
4528 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
4533 index = eth_dev_get_hash_mac_addr_index(port_id, addr);
4534 /* Check if it's already there, and do nothing */
4535 if ((index >= 0) && on)
4541 "Port %u: the MAC address was not set in UTA\n",
4546 index = eth_dev_get_hash_mac_addr_index(port_id, &null_mac_addr);
4548 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
4554 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
4555 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
4557 /* Update address in NIC data structure */
4559 rte_ether_addr_copy(addr,
4560 &dev->data->hash_mac_addrs[index]);
4562 rte_ether_addr_copy(&null_mac_addr,
4563 &dev->data->hash_mac_addrs[index]);
4566 return eth_err(port_id, ret);
4570 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
4572 struct rte_eth_dev *dev;
4574 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4575 dev = &rte_eth_devices[port_id];
4577 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
4578 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
4582 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
4585 struct rte_eth_dev *dev;
4586 struct rte_eth_dev_info dev_info;
4587 struct rte_eth_link link;
4590 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4591 dev = &rte_eth_devices[port_id];
4593 ret = rte_eth_dev_info_get(port_id, &dev_info);
4597 link = dev->data->dev_link;
4599 if (queue_idx > dev_info.max_tx_queues) {
4601 "Set queue rate limit:port %u: invalid queue ID=%u\n",
4602 port_id, queue_idx);
4606 if (tx_rate > link.link_speed) {
4608 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
4609 tx_rate, link.link_speed);
4613 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
4614 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
4615 queue_idx, tx_rate));
4618 RTE_INIT(eth_dev_init_fp_ops)
4622 for (i = 0; i != RTE_DIM(rte_eth_fp_ops); i++)
4623 eth_dev_fp_ops_reset(rte_eth_fp_ops + i);
4626 RTE_INIT(eth_dev_init_cb_lists)
4630 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
4631 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
4635 rte_eth_dev_callback_register(uint16_t port_id,
4636 enum rte_eth_event_type event,
4637 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4639 struct rte_eth_dev *dev;
4640 struct rte_eth_dev_callback *user_cb;
4644 if (cb_fn == NULL) {
4646 "Cannot register ethdev port %u callback from NULL\n",
4651 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4652 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4656 if (port_id == RTE_ETH_ALL) {
4658 last_port = RTE_MAX_ETHPORTS - 1;
4660 next_port = last_port = port_id;
4663 rte_spinlock_lock(ð_dev_cb_lock);
4666 dev = &rte_eth_devices[next_port];
4668 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
4669 if (user_cb->cb_fn == cb_fn &&
4670 user_cb->cb_arg == cb_arg &&
4671 user_cb->event == event) {
4676 /* create a new callback. */
4677 if (user_cb == NULL) {
4678 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
4679 sizeof(struct rte_eth_dev_callback), 0);
4680 if (user_cb != NULL) {
4681 user_cb->cb_fn = cb_fn;
4682 user_cb->cb_arg = cb_arg;
4683 user_cb->event = event;
4684 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
4687 rte_spinlock_unlock(ð_dev_cb_lock);
4688 rte_eth_dev_callback_unregister(port_id, event,
4694 } while (++next_port <= last_port);
4696 rte_spinlock_unlock(ð_dev_cb_lock);
4701 rte_eth_dev_callback_unregister(uint16_t port_id,
4702 enum rte_eth_event_type event,
4703 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4706 struct rte_eth_dev *dev;
4707 struct rte_eth_dev_callback *cb, *next;
4711 if (cb_fn == NULL) {
4713 "Cannot unregister ethdev port %u callback from NULL\n",
4718 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4719 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4723 if (port_id == RTE_ETH_ALL) {
4725 last_port = RTE_MAX_ETHPORTS - 1;
4727 next_port = last_port = port_id;
4730 rte_spinlock_lock(ð_dev_cb_lock);
4733 dev = &rte_eth_devices[next_port];
4735 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
4738 next = TAILQ_NEXT(cb, next);
4740 if (cb->cb_fn != cb_fn || cb->event != event ||
4741 (cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
4745 * if this callback is not executing right now,
4748 if (cb->active == 0) {
4749 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
4755 } while (++next_port <= last_port);
4757 rte_spinlock_unlock(ð_dev_cb_lock);
4762 rte_eth_dev_callback_process(struct rte_eth_dev *dev,
4763 enum rte_eth_event_type event, void *ret_param)
4765 struct rte_eth_dev_callback *cb_lst;
4766 struct rte_eth_dev_callback dev_cb;
4769 rte_spinlock_lock(ð_dev_cb_lock);
4770 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
4771 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
4775 if (ret_param != NULL)
4776 dev_cb.ret_param = ret_param;
4778 rte_spinlock_unlock(ð_dev_cb_lock);
4779 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
4780 dev_cb.cb_arg, dev_cb.ret_param);
4781 rte_spinlock_lock(ð_dev_cb_lock);
4784 rte_spinlock_unlock(ð_dev_cb_lock);
4789 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
4795 * for secondary process, at that point we expect device
4796 * to be already 'usable', so shared data and all function pointers
4797 * for fast-path devops have to be setup properly inside rte_eth_dev.
4799 if (rte_eal_process_type() == RTE_PROC_SECONDARY)
4800 eth_dev_fp_ops_setup(rte_eth_fp_ops + dev->data->port_id, dev);
4802 rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
4804 dev->state = RTE_ETH_DEV_ATTACHED;
4808 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
4811 struct rte_eth_dev *dev;
4812 struct rte_intr_handle *intr_handle;
4816 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4817 dev = &rte_eth_devices[port_id];
4819 if (!dev->intr_handle) {
4820 RTE_ETHDEV_LOG(ERR, "Rx Intr handle unset\n");
4824 intr_handle = dev->intr_handle;
4825 if (rte_intr_vec_list_index_get(intr_handle, 0) < 0) {
4826 RTE_ETHDEV_LOG(ERR, "Rx Intr vector unset\n");
4830 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
4831 vec = rte_intr_vec_list_index_get(intr_handle, qid);
4832 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4833 if (rc && rc != -EEXIST) {
4835 "p %u q %u Rx ctl error op %d epfd %d vec %u\n",
4836 port_id, qid, op, epfd, vec);
4844 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
4846 struct rte_intr_handle *intr_handle;
4847 struct rte_eth_dev *dev;
4848 unsigned int efd_idx;
4852 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
4853 dev = &rte_eth_devices[port_id];
4855 if (queue_id >= dev->data->nb_rx_queues) {
4856 RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u\n", queue_id);
4860 if (!dev->intr_handle) {
4861 RTE_ETHDEV_LOG(ERR, "Rx Intr handle unset\n");
4865 intr_handle = dev->intr_handle;
4866 if (rte_intr_vec_list_index_get(intr_handle, 0) < 0) {
4867 RTE_ETHDEV_LOG(ERR, "Rx Intr vector unset\n");
4871 vec = rte_intr_vec_list_index_get(intr_handle, queue_id);
4872 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
4873 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
4874 fd = rte_intr_efds_index_get(intr_handle, efd_idx);
4880 eth_dev_dma_mzone_name(char *name, size_t len, uint16_t port_id, uint16_t queue_id,
4881 const char *ring_name)
4883 return snprintf(name, len, "eth_p%d_q%d_%s",
4884 port_id, queue_id, ring_name);
4887 const struct rte_memzone *
4888 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
4889 uint16_t queue_id, size_t size, unsigned align,
4892 char z_name[RTE_MEMZONE_NAMESIZE];
4893 const struct rte_memzone *mz;
4896 rc = eth_dev_dma_mzone_name(z_name, sizeof(z_name), dev->data->port_id,
4897 queue_id, ring_name);
4898 if (rc >= RTE_MEMZONE_NAMESIZE) {
4899 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4900 rte_errno = ENAMETOOLONG;
4904 mz = rte_memzone_lookup(z_name);
4906 if ((socket_id != SOCKET_ID_ANY && socket_id != mz->socket_id) ||
4908 ((uintptr_t)mz->addr & (align - 1)) != 0) {
4910 "memzone %s does not justify the requested attributes\n",
4918 return rte_memzone_reserve_aligned(z_name, size, socket_id,
4919 RTE_MEMZONE_IOVA_CONTIG, align);
4923 rte_eth_dma_zone_free(const struct rte_eth_dev *dev, const char *ring_name,
4926 char z_name[RTE_MEMZONE_NAMESIZE];
4927 const struct rte_memzone *mz;
4930 rc = eth_dev_dma_mzone_name(z_name, sizeof(z_name), dev->data->port_id,
4931 queue_id, ring_name);
4932 if (rc >= RTE_MEMZONE_NAMESIZE) {
4933 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4934 return -ENAMETOOLONG;
4937 mz = rte_memzone_lookup(z_name);
4939 rc = rte_memzone_free(mz);
4947 rte_eth_dev_create(struct rte_device *device, const char *name,
4948 size_t priv_data_size,
4949 ethdev_bus_specific_init ethdev_bus_specific_init,
4950 void *bus_init_params,
4951 ethdev_init_t ethdev_init, void *init_params)
4953 struct rte_eth_dev *ethdev;
4956 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
4958 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
4959 ethdev = rte_eth_dev_allocate(name);
4963 if (priv_data_size) {
4964 ethdev->data->dev_private = rte_zmalloc_socket(
4965 name, priv_data_size, RTE_CACHE_LINE_SIZE,
4968 if (!ethdev->data->dev_private) {
4970 "failed to allocate private data\n");
4976 ethdev = rte_eth_dev_attach_secondary(name);
4979 "secondary process attach failed, ethdev doesn't exist\n");
4984 ethdev->device = device;
4986 if (ethdev_bus_specific_init) {
4987 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
4990 "ethdev bus specific initialisation failed\n");
4995 retval = ethdev_init(ethdev, init_params);
4997 RTE_ETHDEV_LOG(ERR, "ethdev initialisation failed\n");
5001 rte_eth_dev_probing_finish(ethdev);
5006 rte_eth_dev_release_port(ethdev);
5011 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
5012 ethdev_uninit_t ethdev_uninit)
5016 ethdev = rte_eth_dev_allocated(ethdev->data->name);
5020 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
5022 ret = ethdev_uninit(ethdev);
5026 return rte_eth_dev_release_port(ethdev);
5030 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
5031 int epfd, int op, void *data)
5034 struct rte_eth_dev *dev;
5035 struct rte_intr_handle *intr_handle;
5038 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5039 dev = &rte_eth_devices[port_id];
5041 if (queue_id >= dev->data->nb_rx_queues) {
5042 RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u\n", queue_id);
5046 if (!dev->intr_handle) {
5047 RTE_ETHDEV_LOG(ERR, "Rx Intr handle unset\n");
5051 intr_handle = dev->intr_handle;
5052 if (rte_intr_vec_list_index_get(intr_handle, 0) < 0) {
5053 RTE_ETHDEV_LOG(ERR, "Rx Intr vector unset\n");
5057 vec = rte_intr_vec_list_index_get(intr_handle, queue_id);
5058 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
5059 if (rc && rc != -EEXIST) {
5061 "p %u q %u Rx ctl error op %d epfd %d vec %u\n",
5062 port_id, queue_id, op, epfd, vec);
5070 rte_eth_dev_rx_intr_enable(uint16_t port_id,
5073 struct rte_eth_dev *dev;
5076 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5077 dev = &rte_eth_devices[port_id];
5079 ret = eth_dev_validate_rx_queue(dev, queue_id);
5083 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
5084 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id));
5088 rte_eth_dev_rx_intr_disable(uint16_t port_id,
5091 struct rte_eth_dev *dev;
5094 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5095 dev = &rte_eth_devices[port_id];
5097 ret = eth_dev_validate_rx_queue(dev, queue_id);
5101 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
5102 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id));
5106 const struct rte_eth_rxtx_callback *
5107 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
5108 rte_rx_callback_fn fn, void *user_param)
5110 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
5111 rte_errno = ENOTSUP;
5114 struct rte_eth_dev *dev;
5116 /* check input parameters */
5117 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
5118 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
5122 dev = &rte_eth_devices[port_id];
5123 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
5127 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
5135 cb->param = user_param;
5137 rte_spinlock_lock(ð_dev_rx_cb_lock);
5138 /* Add the callbacks in fifo order. */
5139 struct rte_eth_rxtx_callback *tail =
5140 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
5143 /* Stores to cb->fn and cb->param should complete before
5144 * cb is visible to data plane.
5147 &rte_eth_devices[port_id].post_rx_burst_cbs[queue_id],
5148 cb, __ATOMIC_RELEASE);
5153 /* Stores to cb->fn and cb->param should complete before
5154 * cb is visible to data plane.
5156 __atomic_store_n(&tail->next, cb, __ATOMIC_RELEASE);
5158 rte_spinlock_unlock(ð_dev_rx_cb_lock);
5163 const struct rte_eth_rxtx_callback *
5164 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
5165 rte_rx_callback_fn fn, void *user_param)
5167 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
5168 rte_errno = ENOTSUP;
5171 /* check input parameters */
5172 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
5173 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
5178 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
5186 cb->param = user_param;
5188 rte_spinlock_lock(ð_dev_rx_cb_lock);
5189 /* Add the callbacks at first position */
5190 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
5191 /* Stores to cb->fn, cb->param and cb->next should complete before
5192 * cb is visible to data plane threads.
5195 &rte_eth_devices[port_id].post_rx_burst_cbs[queue_id],
5196 cb, __ATOMIC_RELEASE);
5197 rte_spinlock_unlock(ð_dev_rx_cb_lock);
5202 const struct rte_eth_rxtx_callback *
5203 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
5204 rte_tx_callback_fn fn, void *user_param)
5206 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
5207 rte_errno = ENOTSUP;
5210 struct rte_eth_dev *dev;
5212 /* check input parameters */
5213 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
5214 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
5219 dev = &rte_eth_devices[port_id];
5220 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
5225 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
5233 cb->param = user_param;
5235 rte_spinlock_lock(ð_dev_tx_cb_lock);
5236 /* Add the callbacks in fifo order. */
5237 struct rte_eth_rxtx_callback *tail =
5238 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
5241 /* Stores to cb->fn and cb->param should complete before
5242 * cb is visible to data plane.
5245 &rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id],
5246 cb, __ATOMIC_RELEASE);
5251 /* Stores to cb->fn and cb->param should complete before
5252 * cb is visible to data plane.
5254 __atomic_store_n(&tail->next, cb, __ATOMIC_RELEASE);
5256 rte_spinlock_unlock(ð_dev_tx_cb_lock);
5262 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
5263 const struct rte_eth_rxtx_callback *user_cb)
5265 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
5268 /* Check input parameters. */
5269 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5270 if (user_cb == NULL ||
5271 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
5274 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
5275 struct rte_eth_rxtx_callback *cb;
5276 struct rte_eth_rxtx_callback **prev_cb;
5279 rte_spinlock_lock(ð_dev_rx_cb_lock);
5280 prev_cb = &dev->post_rx_burst_cbs[queue_id];
5281 for (; *prev_cb != NULL; prev_cb = &cb->next) {
5283 if (cb == user_cb) {
5284 /* Remove the user cb from the callback list. */
5285 __atomic_store_n(prev_cb, cb->next, __ATOMIC_RELAXED);
5290 rte_spinlock_unlock(ð_dev_rx_cb_lock);
5296 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
5297 const struct rte_eth_rxtx_callback *user_cb)
5299 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
5302 /* Check input parameters. */
5303 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5304 if (user_cb == NULL ||
5305 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
5308 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
5310 struct rte_eth_rxtx_callback *cb;
5311 struct rte_eth_rxtx_callback **prev_cb;
5313 rte_spinlock_lock(ð_dev_tx_cb_lock);
5314 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
5315 for (; *prev_cb != NULL; prev_cb = &cb->next) {
5317 if (cb == user_cb) {
5318 /* Remove the user cb from the callback list. */
5319 __atomic_store_n(prev_cb, cb->next, __ATOMIC_RELAXED);
5324 rte_spinlock_unlock(ð_dev_tx_cb_lock);
5330 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
5331 struct rte_eth_rxq_info *qinfo)
5333 struct rte_eth_dev *dev;
5335 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5336 dev = &rte_eth_devices[port_id];
5338 if (queue_id >= dev->data->nb_rx_queues) {
5339 RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u\n", queue_id);
5343 if (qinfo == NULL) {
5344 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u Rx queue %u info to NULL\n",
5349 if (dev->data->rx_queues == NULL ||
5350 dev->data->rx_queues[queue_id] == NULL) {
5352 "Rx queue %"PRIu16" of device with port_id=%"
5353 PRIu16" has not been setup\n",
5358 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
5359 RTE_ETHDEV_LOG(INFO,
5360 "Can't get hairpin Rx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
5365 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
5367 memset(qinfo, 0, sizeof(*qinfo));
5368 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
5369 qinfo->queue_state = dev->data->rx_queue_state[queue_id];
5375 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
5376 struct rte_eth_txq_info *qinfo)
5378 struct rte_eth_dev *dev;
5380 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5381 dev = &rte_eth_devices[port_id];
5383 if (queue_id >= dev->data->nb_tx_queues) {
5384 RTE_ETHDEV_LOG(ERR, "Invalid Tx queue_id=%u\n", queue_id);
5388 if (qinfo == NULL) {
5389 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u Tx queue %u info to NULL\n",
5394 if (dev->data->tx_queues == NULL ||
5395 dev->data->tx_queues[queue_id] == NULL) {
5397 "Tx queue %"PRIu16" of device with port_id=%"
5398 PRIu16" has not been setup\n",
5403 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
5404 RTE_ETHDEV_LOG(INFO,
5405 "Can't get hairpin Tx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
5410 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
5412 memset(qinfo, 0, sizeof(*qinfo));
5413 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
5414 qinfo->queue_state = dev->data->tx_queue_state[queue_id];
5420 rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
5421 struct rte_eth_burst_mode *mode)
5423 struct rte_eth_dev *dev;
5425 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5426 dev = &rte_eth_devices[port_id];
5428 if (queue_id >= dev->data->nb_rx_queues) {
5429 RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u\n", queue_id);
5435 "Cannot get ethdev port %u Rx queue %u burst mode to NULL\n",
5440 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_burst_mode_get, -ENOTSUP);
5441 memset(mode, 0, sizeof(*mode));
5442 return eth_err(port_id,
5443 dev->dev_ops->rx_burst_mode_get(dev, queue_id, mode));
5447 rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
5448 struct rte_eth_burst_mode *mode)
5450 struct rte_eth_dev *dev;
5452 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5453 dev = &rte_eth_devices[port_id];
5455 if (queue_id >= dev->data->nb_tx_queues) {
5456 RTE_ETHDEV_LOG(ERR, "Invalid Tx queue_id=%u\n", queue_id);
5462 "Cannot get ethdev port %u Tx queue %u burst mode to NULL\n",
5467 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_burst_mode_get, -ENOTSUP);
5468 memset(mode, 0, sizeof(*mode));
5469 return eth_err(port_id,
5470 dev->dev_ops->tx_burst_mode_get(dev, queue_id, mode));
5474 rte_eth_get_monitor_addr(uint16_t port_id, uint16_t queue_id,
5475 struct rte_power_monitor_cond *pmc)
5477 struct rte_eth_dev *dev;
5479 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5480 dev = &rte_eth_devices[port_id];
5482 if (queue_id >= dev->data->nb_rx_queues) {
5483 RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u\n", queue_id);
5489 "Cannot get ethdev port %u Rx queue %u power monitor condition to NULL\n",
5494 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_monitor_addr, -ENOTSUP);
5495 return eth_err(port_id,
5496 dev->dev_ops->get_monitor_addr(dev->data->rx_queues[queue_id], pmc));
5500 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
5501 struct rte_ether_addr *mc_addr_set,
5502 uint32_t nb_mc_addr)
5504 struct rte_eth_dev *dev;
5506 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5507 dev = &rte_eth_devices[port_id];
5509 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
5510 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
5511 mc_addr_set, nb_mc_addr));
5515 rte_eth_timesync_enable(uint16_t port_id)
5517 struct rte_eth_dev *dev;
5519 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5520 dev = &rte_eth_devices[port_id];
5522 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
5523 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
5527 rte_eth_timesync_disable(uint16_t port_id)
5529 struct rte_eth_dev *dev;
5531 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5532 dev = &rte_eth_devices[port_id];
5534 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
5535 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
5539 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
5542 struct rte_eth_dev *dev;
5544 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5545 dev = &rte_eth_devices[port_id];
5547 if (timestamp == NULL) {
5549 "Cannot read ethdev port %u Rx timestamp to NULL\n",
5554 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
5555 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
5556 (dev, timestamp, flags));
5560 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
5561 struct timespec *timestamp)
5563 struct rte_eth_dev *dev;
5565 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5566 dev = &rte_eth_devices[port_id];
5568 if (timestamp == NULL) {
5570 "Cannot read ethdev port %u Tx timestamp to NULL\n",
5575 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
5576 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
5581 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
5583 struct rte_eth_dev *dev;
5585 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5586 dev = &rte_eth_devices[port_id];
5588 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
5589 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev, delta));
5593 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
5595 struct rte_eth_dev *dev;
5597 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5598 dev = &rte_eth_devices[port_id];
5600 if (timestamp == NULL) {
5602 "Cannot read ethdev port %u timesync time to NULL\n",
5607 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
5608 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
5613 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
5615 struct rte_eth_dev *dev;
5617 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5618 dev = &rte_eth_devices[port_id];
5620 if (timestamp == NULL) {
5622 "Cannot write ethdev port %u timesync from NULL time\n",
5627 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
5628 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
5633 rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
5635 struct rte_eth_dev *dev;
5637 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5638 dev = &rte_eth_devices[port_id];
5640 if (clock == NULL) {
5641 RTE_ETHDEV_LOG(ERR, "Cannot read ethdev port %u clock to NULL\n",
5646 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->read_clock, -ENOTSUP);
5647 return eth_err(port_id, (*dev->dev_ops->read_clock)(dev, clock));
5651 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
5653 struct rte_eth_dev *dev;
5655 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5656 dev = &rte_eth_devices[port_id];
5660 "Cannot get ethdev port %u register info to NULL\n",
5665 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
5666 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
5670 rte_eth_dev_get_eeprom_length(uint16_t port_id)
5672 struct rte_eth_dev *dev;
5674 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5675 dev = &rte_eth_devices[port_id];
5677 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
5678 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
5682 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
5684 struct rte_eth_dev *dev;
5686 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5687 dev = &rte_eth_devices[port_id];
5691 "Cannot get ethdev port %u EEPROM info to NULL\n",
5696 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
5697 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
5701 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
5703 struct rte_eth_dev *dev;
5705 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5706 dev = &rte_eth_devices[port_id];
5710 "Cannot set ethdev port %u EEPROM from NULL info\n",
5715 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
5716 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
5720 rte_eth_dev_get_module_info(uint16_t port_id,
5721 struct rte_eth_dev_module_info *modinfo)
5723 struct rte_eth_dev *dev;
5725 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5726 dev = &rte_eth_devices[port_id];
5728 if (modinfo == NULL) {
5730 "Cannot get ethdev port %u EEPROM module info to NULL\n",
5735 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
5736 return (*dev->dev_ops->get_module_info)(dev, modinfo);
5740 rte_eth_dev_get_module_eeprom(uint16_t port_id,
5741 struct rte_dev_eeprom_info *info)
5743 struct rte_eth_dev *dev;
5745 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5746 dev = &rte_eth_devices[port_id];
5750 "Cannot get ethdev port %u module EEPROM info to NULL\n",
5755 if (info->data == NULL) {
5757 "Cannot get ethdev port %u module EEPROM data to NULL\n",
5762 if (info->length == 0) {
5764 "Cannot get ethdev port %u module EEPROM to data with zero size\n",
5769 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
5770 return (*dev->dev_ops->get_module_eeprom)(dev, info);
5774 rte_eth_dev_get_dcb_info(uint16_t port_id,
5775 struct rte_eth_dcb_info *dcb_info)
5777 struct rte_eth_dev *dev;
5779 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5780 dev = &rte_eth_devices[port_id];
5782 if (dcb_info == NULL) {
5784 "Cannot get ethdev port %u DCB info to NULL\n",
5789 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
5791 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
5792 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
5796 eth_dev_adjust_nb_desc(uint16_t *nb_desc,
5797 const struct rte_eth_desc_lim *desc_lim)
5799 if (desc_lim->nb_align != 0)
5800 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
5802 if (desc_lim->nb_max != 0)
5803 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
5805 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
5809 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
5810 uint16_t *nb_rx_desc,
5811 uint16_t *nb_tx_desc)
5813 struct rte_eth_dev_info dev_info;
5816 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5818 ret = rte_eth_dev_info_get(port_id, &dev_info);
5822 if (nb_rx_desc != NULL)
5823 eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
5825 if (nb_tx_desc != NULL)
5826 eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
5832 rte_eth_dev_hairpin_capability_get(uint16_t port_id,
5833 struct rte_eth_hairpin_cap *cap)
5835 struct rte_eth_dev *dev;
5837 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5838 dev = &rte_eth_devices[port_id];
5842 "Cannot get ethdev port %u hairpin capability to NULL\n",
5847 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_cap_get, -ENOTSUP);
5848 memset(cap, 0, sizeof(*cap));
5849 return eth_err(port_id, (*dev->dev_ops->hairpin_cap_get)(dev, cap));
5853 rte_eth_dev_is_rx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5855 if (dev->data->rx_queue_state[queue_id] == RTE_ETH_QUEUE_STATE_HAIRPIN)
5861 rte_eth_dev_is_tx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5863 if (dev->data->tx_queue_state[queue_id] == RTE_ETH_QUEUE_STATE_HAIRPIN)
5869 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
5871 struct rte_eth_dev *dev;
5873 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5874 dev = &rte_eth_devices[port_id];
5878 "Cannot test ethdev port %u mempool operation from NULL pool\n",
5883 if (*dev->dev_ops->pool_ops_supported == NULL)
5884 return 1; /* all pools are supported */
5886 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
5890 * A set of values to describe the possible states of a switch domain.
5892 enum rte_eth_switch_domain_state {
5893 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
5894 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
5898 * Array of switch domains available for allocation. Array is sized to
5899 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
5900 * ethdev ports in a single process.
5902 static struct rte_eth_dev_switch {
5903 enum rte_eth_switch_domain_state state;
5904 } eth_dev_switch_domains[RTE_MAX_ETHPORTS];
5907 rte_eth_switch_domain_alloc(uint16_t *domain_id)
5911 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
5913 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
5914 if (eth_dev_switch_domains[i].state ==
5915 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
5916 eth_dev_switch_domains[i].state =
5917 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
5927 rte_eth_switch_domain_free(uint16_t domain_id)
5929 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
5930 domain_id >= RTE_MAX_ETHPORTS)
5933 if (eth_dev_switch_domains[domain_id].state !=
5934 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
5937 eth_dev_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
5943 eth_dev_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
5946 struct rte_kvargs_pair *pair;
5949 arglist->str = strdup(str_in);
5950 if (arglist->str == NULL)
5953 letter = arglist->str;
5956 pair = &arglist->pairs[0];
5959 case 0: /* Initial */
5962 else if (*letter == '\0')
5969 case 1: /* Parsing key */
5970 if (*letter == '=') {
5972 pair->value = letter + 1;
5974 } else if (*letter == ',' || *letter == '\0')
5979 case 2: /* Parsing value */
5982 else if (*letter == ',') {
5985 pair = &arglist->pairs[arglist->count];
5987 } else if (*letter == '\0') {
5990 pair = &arglist->pairs[arglist->count];
5995 case 3: /* Parsing list */
5998 else if (*letter == '\0')
6007 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
6009 struct rte_kvargs args;
6010 struct rte_kvargs_pair *pair;
6014 memset(eth_da, 0, sizeof(*eth_da));
6016 result = eth_dev_devargs_tokenise(&args, dargs);
6020 for (i = 0; i < args.count; i++) {
6021 pair = &args.pairs[i];
6022 if (strcmp("representor", pair->key) == 0) {
6023 if (eth_da->type != RTE_ETH_REPRESENTOR_NONE) {
6024 RTE_LOG(ERR, EAL, "duplicated representor key: %s\n",
6029 result = rte_eth_devargs_parse_representor_ports(
6030 pair->value, eth_da);
6044 rte_eth_representor_id_get(uint16_t port_id,
6045 enum rte_eth_representor_type type,
6046 int controller, int pf, int representor_port,
6051 struct rte_eth_representor_info *info = NULL;
6054 if (type == RTE_ETH_REPRESENTOR_NONE)
6056 if (repr_id == NULL)
6059 /* Get PMD representor range info. */
6060 ret = rte_eth_representor_info_get(port_id, NULL);
6061 if (ret == -ENOTSUP && type == RTE_ETH_REPRESENTOR_VF &&
6062 controller == -1 && pf == -1) {
6063 /* Direct mapping for legacy VF representor. */
6064 *repr_id = representor_port;
6066 } else if (ret < 0) {
6070 size = sizeof(*info) + n * sizeof(info->ranges[0]);
6071 info = calloc(1, size);
6074 info->nb_ranges_alloc = n;
6075 ret = rte_eth_representor_info_get(port_id, info);
6079 /* Default controller and pf to caller. */
6080 if (controller == -1)
6081 controller = info->controller;
6085 /* Locate representor ID. */
6087 for (i = 0; i < info->nb_ranges; ++i) {
6088 if (info->ranges[i].type != type)
6090 if (info->ranges[i].controller != controller)
6092 if (info->ranges[i].id_end < info->ranges[i].id_base) {
6093 RTE_LOG(WARNING, EAL, "Port %hu invalid representor ID Range %u - %u, entry %d\n",
6094 port_id, info->ranges[i].id_base,
6095 info->ranges[i].id_end, i);
6099 count = info->ranges[i].id_end - info->ranges[i].id_base + 1;
6100 switch (info->ranges[i].type) {
6101 case RTE_ETH_REPRESENTOR_PF:
6102 if (pf < info->ranges[i].pf ||
6103 pf >= info->ranges[i].pf + count)
6105 *repr_id = info->ranges[i].id_base +
6106 (pf - info->ranges[i].pf);
6109 case RTE_ETH_REPRESENTOR_VF:
6110 if (info->ranges[i].pf != pf)
6112 if (representor_port < info->ranges[i].vf ||
6113 representor_port >= info->ranges[i].vf + count)
6115 *repr_id = info->ranges[i].id_base +
6116 (representor_port - info->ranges[i].vf);
6119 case RTE_ETH_REPRESENTOR_SF:
6120 if (info->ranges[i].pf != pf)
6122 if (representor_port < info->ranges[i].sf ||
6123 representor_port >= info->ranges[i].sf + count)
6125 *repr_id = info->ranges[i].id_base +
6126 (representor_port - info->ranges[i].sf);
6139 eth_dev_handle_port_list(const char *cmd __rte_unused,
6140 const char *params __rte_unused,
6141 struct rte_tel_data *d)
6145 rte_tel_data_start_array(d, RTE_TEL_INT_VAL);
6146 RTE_ETH_FOREACH_DEV(port_id)
6147 rte_tel_data_add_array_int(d, port_id);
6152 eth_dev_add_port_queue_stats(struct rte_tel_data *d, uint64_t *q_stats,
6153 const char *stat_name)
6156 struct rte_tel_data *q_data = rte_tel_data_alloc();
6157 rte_tel_data_start_array(q_data, RTE_TEL_U64_VAL);
6158 for (q = 0; q < RTE_ETHDEV_QUEUE_STAT_CNTRS; q++)
6159 rte_tel_data_add_array_u64(q_data, q_stats[q]);
6160 rte_tel_data_add_dict_container(d, stat_name, q_data, 0);
6163 #define ADD_DICT_STAT(stats, s) rte_tel_data_add_dict_u64(d, #s, stats.s)
6166 eth_dev_handle_port_stats(const char *cmd __rte_unused,
6168 struct rte_tel_data *d)
6170 struct rte_eth_stats stats;
6173 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
6176 port_id = atoi(params);
6177 if (!rte_eth_dev_is_valid_port(port_id))
6180 ret = rte_eth_stats_get(port_id, &stats);
6184 rte_tel_data_start_dict(d);
6185 ADD_DICT_STAT(stats, ipackets);
6186 ADD_DICT_STAT(stats, opackets);
6187 ADD_DICT_STAT(stats, ibytes);
6188 ADD_DICT_STAT(stats, obytes);
6189 ADD_DICT_STAT(stats, imissed);
6190 ADD_DICT_STAT(stats, ierrors);
6191 ADD_DICT_STAT(stats, oerrors);
6192 ADD_DICT_STAT(stats, rx_nombuf);
6193 eth_dev_add_port_queue_stats(d, stats.q_ipackets, "q_ipackets");
6194 eth_dev_add_port_queue_stats(d, stats.q_opackets, "q_opackets");
6195 eth_dev_add_port_queue_stats(d, stats.q_ibytes, "q_ibytes");
6196 eth_dev_add_port_queue_stats(d, stats.q_obytes, "q_obytes");
6197 eth_dev_add_port_queue_stats(d, stats.q_errors, "q_errors");
6203 eth_dev_handle_port_xstats(const char *cmd __rte_unused,
6205 struct rte_tel_data *d)
6207 struct rte_eth_xstat *eth_xstats;
6208 struct rte_eth_xstat_name *xstat_names;
6209 int port_id, num_xstats;
6213 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
6216 port_id = strtoul(params, &end_param, 0);
6217 if (*end_param != '\0')
6218 RTE_ETHDEV_LOG(NOTICE,
6219 "Extra parameters passed to ethdev telemetry command, ignoring");
6220 if (!rte_eth_dev_is_valid_port(port_id))
6223 num_xstats = rte_eth_xstats_get(port_id, NULL, 0);
6227 /* use one malloc for both names and stats */
6228 eth_xstats = malloc((sizeof(struct rte_eth_xstat) +
6229 sizeof(struct rte_eth_xstat_name)) * num_xstats);
6230 if (eth_xstats == NULL)
6232 xstat_names = (void *)ð_xstats[num_xstats];
6234 ret = rte_eth_xstats_get_names(port_id, xstat_names, num_xstats);
6235 if (ret < 0 || ret > num_xstats) {
6240 ret = rte_eth_xstats_get(port_id, eth_xstats, num_xstats);
6241 if (ret < 0 || ret > num_xstats) {
6246 rte_tel_data_start_dict(d);
6247 for (i = 0; i < num_xstats; i++)
6248 rte_tel_data_add_dict_u64(d, xstat_names[i].name,
6249 eth_xstats[i].value);
6254 eth_dev_handle_port_link_status(const char *cmd __rte_unused,
6256 struct rte_tel_data *d)
6258 static const char *status_str = "status";
6260 struct rte_eth_link link;
6263 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
6266 port_id = strtoul(params, &end_param, 0);
6267 if (*end_param != '\0')
6268 RTE_ETHDEV_LOG(NOTICE,
6269 "Extra parameters passed to ethdev telemetry command, ignoring");
6270 if (!rte_eth_dev_is_valid_port(port_id))
6273 ret = rte_eth_link_get_nowait(port_id, &link);
6277 rte_tel_data_start_dict(d);
6278 if (!link.link_status) {
6279 rte_tel_data_add_dict_string(d, status_str, "DOWN");
6282 rte_tel_data_add_dict_string(d, status_str, "UP");
6283 rte_tel_data_add_dict_u64(d, "speed", link.link_speed);
6284 rte_tel_data_add_dict_string(d, "duplex",
6285 (link.link_duplex == RTE_ETH_LINK_FULL_DUPLEX) ?
6286 "full-duplex" : "half-duplex");
6291 eth_dev_handle_port_info(const char *cmd __rte_unused,
6293 struct rte_tel_data *d)
6295 struct rte_tel_data *rxq_state, *txq_state;
6296 char mac_addr[RTE_ETHER_ADDR_LEN];
6297 struct rte_eth_dev *eth_dev;
6301 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
6304 port_id = strtoul(params, &end_param, 0);
6305 if (*end_param != '\0')
6306 RTE_ETHDEV_LOG(NOTICE,
6307 "Extra parameters passed to ethdev telemetry command, ignoring");
6309 if (!rte_eth_dev_is_valid_port(port_id))
6312 eth_dev = &rte_eth_devices[port_id];
6316 rxq_state = rte_tel_data_alloc();
6320 txq_state = rte_tel_data_alloc();
6324 rte_tel_data_start_dict(d);
6325 rte_tel_data_add_dict_string(d, "name", eth_dev->data->name);
6326 rte_tel_data_add_dict_int(d, "state", eth_dev->state);
6327 rte_tel_data_add_dict_int(d, "nb_rx_queues",
6328 eth_dev->data->nb_rx_queues);
6329 rte_tel_data_add_dict_int(d, "nb_tx_queues",
6330 eth_dev->data->nb_tx_queues);
6331 rte_tel_data_add_dict_int(d, "port_id", eth_dev->data->port_id);
6332 rte_tel_data_add_dict_int(d, "mtu", eth_dev->data->mtu);
6333 rte_tel_data_add_dict_int(d, "rx_mbuf_size_min",
6334 eth_dev->data->min_rx_buf_size);
6335 rte_tel_data_add_dict_int(d, "rx_mbuf_alloc_fail",
6336 eth_dev->data->rx_mbuf_alloc_failed);
6337 snprintf(mac_addr, RTE_ETHER_ADDR_LEN, "%02x:%02x:%02x:%02x:%02x:%02x",
6338 eth_dev->data->mac_addrs->addr_bytes[0],
6339 eth_dev->data->mac_addrs->addr_bytes[1],
6340 eth_dev->data->mac_addrs->addr_bytes[2],
6341 eth_dev->data->mac_addrs->addr_bytes[3],
6342 eth_dev->data->mac_addrs->addr_bytes[4],
6343 eth_dev->data->mac_addrs->addr_bytes[5]);
6344 rte_tel_data_add_dict_string(d, "mac_addr", mac_addr);
6345 rte_tel_data_add_dict_int(d, "promiscuous",
6346 eth_dev->data->promiscuous);
6347 rte_tel_data_add_dict_int(d, "scattered_rx",
6348 eth_dev->data->scattered_rx);
6349 rte_tel_data_add_dict_int(d, "all_multicast",
6350 eth_dev->data->all_multicast);
6351 rte_tel_data_add_dict_int(d, "dev_started", eth_dev->data->dev_started);
6352 rte_tel_data_add_dict_int(d, "lro", eth_dev->data->lro);
6353 rte_tel_data_add_dict_int(d, "dev_configured",
6354 eth_dev->data->dev_configured);
6356 rte_tel_data_start_array(rxq_state, RTE_TEL_INT_VAL);
6357 for (i = 0; i < eth_dev->data->nb_rx_queues; i++)
6358 rte_tel_data_add_array_int(rxq_state,
6359 eth_dev->data->rx_queue_state[i]);
6361 rte_tel_data_start_array(txq_state, RTE_TEL_INT_VAL);
6362 for (i = 0; i < eth_dev->data->nb_tx_queues; i++)
6363 rte_tel_data_add_array_int(txq_state,
6364 eth_dev->data->tx_queue_state[i]);
6366 rte_tel_data_add_dict_container(d, "rxq_state", rxq_state, 0);
6367 rte_tel_data_add_dict_container(d, "txq_state", txq_state, 0);
6368 rte_tel_data_add_dict_int(d, "numa_node", eth_dev->data->numa_node);
6369 rte_tel_data_add_dict_int(d, "dev_flags", eth_dev->data->dev_flags);
6370 rte_tel_data_add_dict_int(d, "rx_offloads",
6371 eth_dev->data->dev_conf.rxmode.offloads);
6372 rte_tel_data_add_dict_int(d, "tx_offloads",
6373 eth_dev->data->dev_conf.txmode.offloads);
6374 rte_tel_data_add_dict_int(d, "ethdev_rss_hf",
6375 eth_dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf);
6381 rte_eth_hairpin_queue_peer_update(uint16_t peer_port, uint16_t peer_queue,
6382 struct rte_hairpin_peer_info *cur_info,
6383 struct rte_hairpin_peer_info *peer_info,
6386 struct rte_eth_dev *dev;
6388 /* Current queue information is not mandatory. */
6389 if (peer_info == NULL)
6392 /* No need to check the validity again. */
6393 dev = &rte_eth_devices[peer_port];
6394 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_queue_peer_update,
6397 return (*dev->dev_ops->hairpin_queue_peer_update)(dev, peer_queue,
6398 cur_info, peer_info, direction);
6402 rte_eth_hairpin_queue_peer_bind(uint16_t cur_port, uint16_t cur_queue,
6403 struct rte_hairpin_peer_info *peer_info,
6406 struct rte_eth_dev *dev;
6408 if (peer_info == NULL)
6411 /* No need to check the validity again. */
6412 dev = &rte_eth_devices[cur_port];
6413 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_queue_peer_bind,
6416 return (*dev->dev_ops->hairpin_queue_peer_bind)(dev, cur_queue,
6417 peer_info, direction);
6421 rte_eth_hairpin_queue_peer_unbind(uint16_t cur_port, uint16_t cur_queue,
6424 struct rte_eth_dev *dev;
6426 /* No need to check the validity again. */
6427 dev = &rte_eth_devices[cur_port];
6428 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_queue_peer_unbind,
6431 return (*dev->dev_ops->hairpin_queue_peer_unbind)(dev, cur_queue,
6436 rte_eth_representor_info_get(uint16_t port_id,
6437 struct rte_eth_representor_info *info)
6439 struct rte_eth_dev *dev;
6441 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
6442 dev = &rte_eth_devices[port_id];
6444 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->representor_info_get, -ENOTSUP);
6445 return eth_err(port_id, (*dev->dev_ops->representor_info_get)(dev, info));
6449 rte_eth_rx_metadata_negotiate(uint16_t port_id, uint64_t *features)
6451 struct rte_eth_dev *dev;
6453 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
6454 dev = &rte_eth_devices[port_id];
6456 if (dev->data->dev_configured != 0) {
6458 "The port (ID=%"PRIu16") is already configured\n",
6463 if (features == NULL) {
6464 RTE_ETHDEV_LOG(ERR, "Invalid features (NULL)\n");
6468 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_metadata_negotiate, -ENOTSUP);
6469 return eth_err(port_id,
6470 (*dev->dev_ops->rx_metadata_negotiate)(dev, features));
6473 RTE_LOG_REGISTER_DEFAULT(rte_eth_dev_logtype, INFO);
6475 RTE_INIT(ethdev_init_telemetry)
6477 rte_telemetry_register_cmd("/ethdev/list", eth_dev_handle_port_list,
6478 "Returns list of available ethdev ports. Takes no parameters");
6479 rte_telemetry_register_cmd("/ethdev/stats", eth_dev_handle_port_stats,
6480 "Returns the common stats for a port. Parameters: int port_id");
6481 rte_telemetry_register_cmd("/ethdev/xstats", eth_dev_handle_port_xstats,
6482 "Returns the extended stats for a port. Parameters: int port_id");
6483 rte_telemetry_register_cmd("/ethdev/link_status",
6484 eth_dev_handle_port_link_status,
6485 "Returns the link status for a port. Parameters: int port_id");
6486 rte_telemetry_register_cmd("/ethdev/info", eth_dev_handle_port_info,
6487 "Returns the device info for a port. Parameters: int port_id");