1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
12 #include <sys/queue.h>
14 #include <rte_byteorder.h>
16 #include <rte_debug.h>
17 #include <rte_interrupts.h>
18 #include <rte_memory.h>
19 #include <rte_memcpy.h>
20 #include <rte_memzone.h>
21 #include <rte_launch.h>
23 #include <rte_per_lcore.h>
24 #include <rte_lcore.h>
25 #include <rte_branch_prediction.h>
26 #include <rte_common.h>
27 #include <rte_mempool.h>
28 #include <rte_malloc.h>
30 #include <rte_errno.h>
31 #include <rte_spinlock.h>
32 #include <rte_string_fns.h>
33 #include <rte_kvargs.h>
34 #include <rte_class.h>
35 #include <rte_ether.h>
36 #include <rte_telemetry.h>
38 #include "rte_ethdev_trace.h"
39 #include "rte_ethdev.h"
40 #include "ethdev_driver.h"
41 #include "ethdev_profile.h"
42 #include "ethdev_private.h"
44 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
45 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
47 /* public fast-path API */
48 struct rte_eth_fp_ops rte_eth_fp_ops[RTE_MAX_ETHPORTS];
50 /* spinlock for eth device callbacks */
51 static rte_spinlock_t eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
53 /* spinlock for add/remove rx callbacks */
54 static rte_spinlock_t eth_dev_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
56 /* spinlock for add/remove tx callbacks */
57 static rte_spinlock_t eth_dev_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
59 /* spinlock for shared data allocation */
60 static rte_spinlock_t eth_dev_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
62 /* store statistics names and its offset in stats structure */
63 struct rte_eth_xstats_name_off {
64 char name[RTE_ETH_XSTATS_NAME_SIZE];
68 /* Shared memory between primary and secondary processes. */
70 uint64_t next_owner_id;
71 rte_spinlock_t ownership_lock;
72 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
73 } *eth_dev_shared_data;
75 static const struct rte_eth_xstats_name_off eth_dev_stats_strings[] = {
76 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
77 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
78 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
79 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
80 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
81 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
82 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
83 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
87 #define RTE_NB_STATS RTE_DIM(eth_dev_stats_strings)
89 static const struct rte_eth_xstats_name_off eth_dev_rxq_stats_strings[] = {
90 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
91 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
92 {"errors", offsetof(struct rte_eth_stats, q_errors)},
95 #define RTE_NB_RXQ_STATS RTE_DIM(eth_dev_rxq_stats_strings)
97 static const struct rte_eth_xstats_name_off eth_dev_txq_stats_strings[] = {
98 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
99 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
101 #define RTE_NB_TXQ_STATS RTE_DIM(eth_dev_txq_stats_strings)
103 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
104 { DEV_RX_OFFLOAD_##_name, #_name }
106 #define RTE_ETH_RX_OFFLOAD_BIT2STR(_name) \
107 { RTE_ETH_RX_OFFLOAD_##_name, #_name }
109 static const struct {
112 } eth_dev_rx_offload_names[] = {
113 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
114 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
115 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
118 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
119 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
120 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
121 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
122 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
123 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
124 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
125 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
126 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
127 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
128 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
129 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
130 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
131 RTE_RX_OFFLOAD_BIT2STR(RSS_HASH),
132 RTE_ETH_RX_OFFLOAD_BIT2STR(BUFFER_SPLIT),
135 #undef RTE_RX_OFFLOAD_BIT2STR
136 #undef RTE_ETH_RX_OFFLOAD_BIT2STR
138 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
139 { DEV_TX_OFFLOAD_##_name, #_name }
141 static const struct {
144 } eth_dev_tx_offload_names[] = {
145 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
146 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
148 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
149 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
150 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
151 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
152 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
153 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
154 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
156 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
157 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
158 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
159 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
160 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
161 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
162 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
163 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
164 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
165 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
166 RTE_TX_OFFLOAD_BIT2STR(SEND_ON_TIMESTAMP),
169 #undef RTE_TX_OFFLOAD_BIT2STR
172 * The user application callback description.
174 * It contains callback address to be registered by user application,
175 * the pointer to the parameters for callback, and the event type.
177 struct rte_eth_dev_callback {
178 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
179 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
180 void *cb_arg; /**< Parameter for callback */
181 void *ret_param; /**< Return parameter */
182 enum rte_eth_event_type event; /**< Interrupt event type */
183 uint32_t active; /**< Callback is executing */
192 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
195 struct rte_devargs devargs;
196 const char *bus_param_key;
197 char *bus_str = NULL;
198 char *cls_str = NULL;
202 RTE_ETHDEV_LOG(ERR, "Cannot initialize NULL iterator\n");
206 if (devargs_str == NULL) {
208 "Cannot initialize iterator from NULL device description string\n");
212 memset(iter, 0, sizeof(*iter));
213 memset(&devargs, 0, sizeof(devargs));
216 * The devargs string may use various syntaxes:
217 * - 0000:08:00.0,representor=[1-3]
218 * - pci:0000:06:00.0,representor=[0,5]
219 * - class=eth,mac=00:11:22:33:44:55
220 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
224 * Handle pure class filter (i.e. without any bus-level argument),
225 * from future new syntax.
226 * rte_devargs_parse() is not yet supporting the new syntax,
227 * that's why this simple case is temporarily parsed here.
229 #define iter_anybus_str "class=eth,"
230 if (strncmp(devargs_str, iter_anybus_str,
231 strlen(iter_anybus_str)) == 0) {
232 iter->cls_str = devargs_str + strlen(iter_anybus_str);
236 /* Split bus, device and parameters. */
237 ret = rte_devargs_parse(&devargs, devargs_str);
242 * Assume parameters of old syntax can match only at ethdev level.
243 * Extra parameters will be ignored, thanks to "+" prefix.
245 str_size = strlen(devargs.args) + 2;
246 cls_str = malloc(str_size);
247 if (cls_str == NULL) {
251 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
252 if (ret != str_size - 1) {
256 iter->cls_str = cls_str;
258 iter->bus = devargs.bus;
259 if (iter->bus->dev_iterate == NULL) {
264 /* Convert bus args to new syntax for use with new API dev_iterate. */
265 if ((strcmp(iter->bus->name, "vdev") == 0) ||
266 (strcmp(iter->bus->name, "fslmc") == 0) ||
267 (strcmp(iter->bus->name, "dpaa_bus") == 0)) {
268 bus_param_key = "name";
269 } else if (strcmp(iter->bus->name, "pci") == 0) {
270 bus_param_key = "addr";
275 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
276 bus_str = malloc(str_size);
277 if (bus_str == NULL) {
281 ret = snprintf(bus_str, str_size, "%s=%s",
282 bus_param_key, devargs.name);
283 if (ret != str_size - 1) {
287 iter->bus_str = bus_str;
290 iter->cls = rte_class_find_by_name("eth");
291 rte_devargs_reset(&devargs);
296 RTE_ETHDEV_LOG(ERR, "Bus %s does not support iterating.\n",
298 rte_devargs_reset(&devargs);
305 rte_eth_iterator_next(struct rte_dev_iterator *iter)
309 "Cannot get next device from NULL iterator\n");
310 return RTE_MAX_ETHPORTS;
313 if (iter->cls == NULL) /* invalid ethdev iterator */
314 return RTE_MAX_ETHPORTS;
316 do { /* loop to try all matching rte_device */
317 /* If not pure ethdev filter and */
318 if (iter->bus != NULL &&
319 /* not in middle of rte_eth_dev iteration, */
320 iter->class_device == NULL) {
321 /* get next rte_device to try. */
322 iter->device = iter->bus->dev_iterate(
323 iter->device, iter->bus_str, iter);
324 if (iter->device == NULL)
325 break; /* no more rte_device candidate */
327 /* A device is matching bus part, need to check ethdev part. */
328 iter->class_device = iter->cls->dev_iterate(
329 iter->class_device, iter->cls_str, iter);
330 if (iter->class_device != NULL)
331 return eth_dev_to_id(iter->class_device); /* match */
332 } while (iter->bus != NULL); /* need to try next rte_device */
334 /* No more ethdev port to iterate. */
335 rte_eth_iterator_cleanup(iter);
336 return RTE_MAX_ETHPORTS;
340 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
343 RTE_ETHDEV_LOG(ERR, "Cannot do clean up from NULL iterator\n");
347 if (iter->bus_str == NULL)
348 return; /* nothing to free in pure class filter */
349 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
350 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
351 memset(iter, 0, sizeof(*iter));
355 rte_eth_find_next(uint16_t port_id)
357 while (port_id < RTE_MAX_ETHPORTS &&
358 rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED)
361 if (port_id >= RTE_MAX_ETHPORTS)
362 return RTE_MAX_ETHPORTS;
368 * Macro to iterate over all valid ports for internal usage.
369 * Note: RTE_ETH_FOREACH_DEV is different because filtering owned ports.
371 #define RTE_ETH_FOREACH_VALID_DEV(port_id) \
372 for (port_id = rte_eth_find_next(0); \
373 port_id < RTE_MAX_ETHPORTS; \
374 port_id = rte_eth_find_next(port_id + 1))
377 rte_eth_find_next_of(uint16_t port_id, const struct rte_device *parent)
379 port_id = rte_eth_find_next(port_id);
380 while (port_id < RTE_MAX_ETHPORTS &&
381 rte_eth_devices[port_id].device != parent)
382 port_id = rte_eth_find_next(port_id + 1);
388 rte_eth_find_next_sibling(uint16_t port_id, uint16_t ref_port_id)
390 RTE_ETH_VALID_PORTID_OR_ERR_RET(ref_port_id, RTE_MAX_ETHPORTS);
391 return rte_eth_find_next_of(port_id,
392 rte_eth_devices[ref_port_id].device);
396 eth_dev_shared_data_prepare(void)
398 const unsigned flags = 0;
399 const struct rte_memzone *mz;
401 rte_spinlock_lock(ð_dev_shared_data_lock);
403 if (eth_dev_shared_data == NULL) {
404 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
405 /* Allocate port data and ownership shared memory. */
406 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
407 sizeof(*eth_dev_shared_data),
408 rte_socket_id(), flags);
410 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
412 rte_panic("Cannot allocate ethdev shared data\n");
414 eth_dev_shared_data = mz->addr;
415 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
416 eth_dev_shared_data->next_owner_id =
417 RTE_ETH_DEV_NO_OWNER + 1;
418 rte_spinlock_init(ð_dev_shared_data->ownership_lock);
419 memset(eth_dev_shared_data->data, 0,
420 sizeof(eth_dev_shared_data->data));
424 rte_spinlock_unlock(ð_dev_shared_data_lock);
428 eth_dev_is_allocated(const struct rte_eth_dev *ethdev)
430 return ethdev->data->name[0] != '\0';
433 static struct rte_eth_dev *
434 eth_dev_allocated(const char *name)
438 RTE_BUILD_BUG_ON(RTE_MAX_ETHPORTS >= UINT16_MAX);
440 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
441 if (rte_eth_devices[i].data != NULL &&
442 strcmp(rte_eth_devices[i].data->name, name) == 0)
443 return &rte_eth_devices[i];
449 rte_eth_dev_allocated(const char *name)
451 struct rte_eth_dev *ethdev;
453 eth_dev_shared_data_prepare();
455 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
457 ethdev = eth_dev_allocated(name);
459 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
465 eth_dev_find_free_port(void)
469 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
470 /* Using shared name field to find a free port. */
471 if (eth_dev_shared_data->data[i].name[0] == '\0') {
472 RTE_ASSERT(rte_eth_devices[i].state ==
477 return RTE_MAX_ETHPORTS;
480 static struct rte_eth_dev *
481 eth_dev_get(uint16_t port_id)
483 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
485 eth_dev->data = ð_dev_shared_data->data[port_id];
491 rte_eth_dev_allocate(const char *name)
494 struct rte_eth_dev *eth_dev = NULL;
497 name_len = strnlen(name, RTE_ETH_NAME_MAX_LEN);
499 RTE_ETHDEV_LOG(ERR, "Zero length Ethernet device name\n");
503 if (name_len >= RTE_ETH_NAME_MAX_LEN) {
504 RTE_ETHDEV_LOG(ERR, "Ethernet device name is too long\n");
508 eth_dev_shared_data_prepare();
510 /* Synchronize port creation between primary and secondary threads. */
511 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
513 if (eth_dev_allocated(name) != NULL) {
515 "Ethernet device with name %s already allocated\n",
520 port_id = eth_dev_find_free_port();
521 if (port_id == RTE_MAX_ETHPORTS) {
523 "Reached maximum number of Ethernet ports\n");
527 eth_dev = eth_dev_get(port_id);
528 strlcpy(eth_dev->data->name, name, sizeof(eth_dev->data->name));
529 eth_dev->data->port_id = port_id;
530 eth_dev->data->backer_port_id = RTE_MAX_ETHPORTS;
531 eth_dev->data->mtu = RTE_ETHER_MTU;
532 pthread_mutex_init(ð_dev->data->flow_ops_mutex, NULL);
535 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
541 * Attach to a port already registered by the primary process, which
542 * makes sure that the same device would have the same port id both
543 * in the primary and secondary process.
546 rte_eth_dev_attach_secondary(const char *name)
549 struct rte_eth_dev *eth_dev = NULL;
551 eth_dev_shared_data_prepare();
553 /* Synchronize port attachment to primary port creation and release. */
554 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
556 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
557 if (strcmp(eth_dev_shared_data->data[i].name, name) == 0)
560 if (i == RTE_MAX_ETHPORTS) {
562 "Device %s is not driven by the primary process\n",
565 eth_dev = eth_dev_get(i);
566 RTE_ASSERT(eth_dev->data->port_id == i);
569 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
574 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
579 eth_dev_shared_data_prepare();
581 if (eth_dev->state != RTE_ETH_DEV_UNUSED)
582 rte_eth_dev_callback_process(eth_dev,
583 RTE_ETH_EVENT_DESTROY, NULL);
585 eth_dev_fp_ops_reset(rte_eth_fp_ops + eth_dev->data->port_id);
587 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
589 eth_dev->state = RTE_ETH_DEV_UNUSED;
590 eth_dev->device = NULL;
591 eth_dev->process_private = NULL;
592 eth_dev->intr_handle = NULL;
593 eth_dev->rx_pkt_burst = NULL;
594 eth_dev->tx_pkt_burst = NULL;
595 eth_dev->tx_pkt_prepare = NULL;
596 eth_dev->rx_queue_count = NULL;
597 eth_dev->rx_descriptor_status = NULL;
598 eth_dev->tx_descriptor_status = NULL;
599 eth_dev->dev_ops = NULL;
601 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
602 rte_free(eth_dev->data->rx_queues);
603 rte_free(eth_dev->data->tx_queues);
604 rte_free(eth_dev->data->mac_addrs);
605 rte_free(eth_dev->data->hash_mac_addrs);
606 rte_free(eth_dev->data->dev_private);
607 pthread_mutex_destroy(ð_dev->data->flow_ops_mutex);
608 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
611 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
617 rte_eth_dev_is_valid_port(uint16_t port_id)
619 if (port_id >= RTE_MAX_ETHPORTS ||
620 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
627 eth_is_valid_owner_id(uint64_t owner_id)
629 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
630 eth_dev_shared_data->next_owner_id <= owner_id)
636 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
638 port_id = rte_eth_find_next(port_id);
639 while (port_id < RTE_MAX_ETHPORTS &&
640 rte_eth_devices[port_id].data->owner.id != owner_id)
641 port_id = rte_eth_find_next(port_id + 1);
647 rte_eth_dev_owner_new(uint64_t *owner_id)
649 if (owner_id == NULL) {
650 RTE_ETHDEV_LOG(ERR, "Cannot get new owner ID to NULL\n");
654 eth_dev_shared_data_prepare();
656 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
658 *owner_id = eth_dev_shared_data->next_owner_id++;
660 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
665 eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
666 const struct rte_eth_dev_owner *new_owner)
668 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
669 struct rte_eth_dev_owner *port_owner;
671 if (port_id >= RTE_MAX_ETHPORTS || !eth_dev_is_allocated(ethdev)) {
672 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
677 if (new_owner == NULL) {
679 "Cannot set ethdev port %u owner from NULL owner\n",
684 if (!eth_is_valid_owner_id(new_owner->id) &&
685 !eth_is_valid_owner_id(old_owner_id)) {
687 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
688 old_owner_id, new_owner->id);
692 port_owner = &rte_eth_devices[port_id].data->owner;
693 if (port_owner->id != old_owner_id) {
695 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
696 port_id, port_owner->name, port_owner->id);
700 /* can not truncate (same structure) */
701 strlcpy(port_owner->name, new_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN);
703 port_owner->id = new_owner->id;
705 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
706 port_id, new_owner->name, new_owner->id);
712 rte_eth_dev_owner_set(const uint16_t port_id,
713 const struct rte_eth_dev_owner *owner)
717 eth_dev_shared_data_prepare();
719 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
721 ret = eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
723 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
728 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
730 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
731 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
734 eth_dev_shared_data_prepare();
736 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
738 ret = eth_dev_owner_set(port_id, owner_id, &new_owner);
740 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
745 rte_eth_dev_owner_delete(const uint64_t owner_id)
750 eth_dev_shared_data_prepare();
752 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
754 if (eth_is_valid_owner_id(owner_id)) {
755 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
756 if (rte_eth_devices[port_id].data->owner.id == owner_id)
757 memset(&rte_eth_devices[port_id].data->owner, 0,
758 sizeof(struct rte_eth_dev_owner));
759 RTE_ETHDEV_LOG(NOTICE,
760 "All port owners owned by %016"PRIx64" identifier have removed\n",
764 "Invalid owner id=%016"PRIx64"\n",
769 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
775 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
777 struct rte_eth_dev *ethdev;
779 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
780 ethdev = &rte_eth_devices[port_id];
782 if (!eth_dev_is_allocated(ethdev)) {
783 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
789 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u owner to NULL\n",
794 eth_dev_shared_data_prepare();
796 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
797 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
798 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
804 rte_eth_dev_socket_id(uint16_t port_id)
806 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
807 return rte_eth_devices[port_id].data->numa_node;
811 rte_eth_dev_get_sec_ctx(uint16_t port_id)
813 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
814 return rte_eth_devices[port_id].security_ctx;
818 rte_eth_dev_count_avail(void)
825 RTE_ETH_FOREACH_DEV(p)
832 rte_eth_dev_count_total(void)
834 uint16_t port, count = 0;
836 RTE_ETH_FOREACH_VALID_DEV(port)
843 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
847 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
850 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u name to NULL\n",
855 /* shouldn't check 'rte_eth_devices[i].data',
856 * because it might be overwritten by VDEV PMD */
857 tmp = eth_dev_shared_data->data[port_id].name;
863 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
868 RTE_ETHDEV_LOG(ERR, "Cannot get port ID from NULL name");
872 if (port_id == NULL) {
874 "Cannot get port ID to NULL for %s\n", name);
878 RTE_ETH_FOREACH_VALID_DEV(pid)
879 if (!strcmp(name, eth_dev_shared_data->data[pid].name)) {
888 eth_err(uint16_t port_id, int ret)
892 if (rte_eth_dev_is_removed(port_id))
898 eth_dev_rxq_release(struct rte_eth_dev *dev, uint16_t qid)
900 void **rxq = dev->data->rx_queues;
902 if (rxq[qid] == NULL)
905 if (dev->dev_ops->rx_queue_release != NULL)
906 (*dev->dev_ops->rx_queue_release)(dev, qid);
911 eth_dev_txq_release(struct rte_eth_dev *dev, uint16_t qid)
913 void **txq = dev->data->tx_queues;
915 if (txq[qid] == NULL)
918 if (dev->dev_ops->tx_queue_release != NULL)
919 (*dev->dev_ops->tx_queue_release)(dev, qid);
924 eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
926 uint16_t old_nb_queues = dev->data->nb_rx_queues;
929 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
930 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
931 sizeof(dev->data->rx_queues[0]) *
932 RTE_MAX_QUEUES_PER_PORT,
933 RTE_CACHE_LINE_SIZE);
934 if (dev->data->rx_queues == NULL) {
935 dev->data->nb_rx_queues = 0;
938 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
939 for (i = nb_queues; i < old_nb_queues; i++)
940 eth_dev_rxq_release(dev, i);
942 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
943 for (i = nb_queues; i < old_nb_queues; i++)
944 eth_dev_rxq_release(dev, i);
946 rte_free(dev->data->rx_queues);
947 dev->data->rx_queues = NULL;
949 dev->data->nb_rx_queues = nb_queues;
954 eth_dev_validate_rx_queue(const struct rte_eth_dev *dev, uint16_t rx_queue_id)
958 if (rx_queue_id >= dev->data->nb_rx_queues) {
959 port_id = dev->data->port_id;
961 "Invalid Rx queue_id=%u of device with port_id=%u\n",
962 rx_queue_id, port_id);
966 if (dev->data->rx_queues[rx_queue_id] == NULL) {
967 port_id = dev->data->port_id;
969 "Queue %u of device with port_id=%u has not been setup\n",
970 rx_queue_id, port_id);
978 eth_dev_validate_tx_queue(const struct rte_eth_dev *dev, uint16_t tx_queue_id)
982 if (tx_queue_id >= dev->data->nb_tx_queues) {
983 port_id = dev->data->port_id;
985 "Invalid Tx queue_id=%u of device with port_id=%u\n",
986 tx_queue_id, port_id);
990 if (dev->data->tx_queues[tx_queue_id] == NULL) {
991 port_id = dev->data->port_id;
993 "Queue %u of device with port_id=%u has not been setup\n",
994 tx_queue_id, port_id);
1002 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
1004 struct rte_eth_dev *dev;
1007 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1008 dev = &rte_eth_devices[port_id];
1010 if (!dev->data->dev_started) {
1012 "Port %u must be started before start any queue\n",
1017 ret = eth_dev_validate_rx_queue(dev, rx_queue_id);
1021 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
1023 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
1024 RTE_ETHDEV_LOG(INFO,
1025 "Can't start Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1026 rx_queue_id, port_id);
1030 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
1031 RTE_ETHDEV_LOG(INFO,
1032 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
1033 rx_queue_id, port_id);
1037 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev, rx_queue_id));
1041 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
1043 struct rte_eth_dev *dev;
1046 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1047 dev = &rte_eth_devices[port_id];
1049 ret = eth_dev_validate_rx_queue(dev, rx_queue_id);
1053 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
1055 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
1056 RTE_ETHDEV_LOG(INFO,
1057 "Can't stop Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1058 rx_queue_id, port_id);
1062 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
1063 RTE_ETHDEV_LOG(INFO,
1064 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
1065 rx_queue_id, port_id);
1069 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
1073 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
1075 struct rte_eth_dev *dev;
1078 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1079 dev = &rte_eth_devices[port_id];
1081 if (!dev->data->dev_started) {
1083 "Port %u must be started before start any queue\n",
1088 ret = eth_dev_validate_tx_queue(dev, tx_queue_id);
1092 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
1094 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
1095 RTE_ETHDEV_LOG(INFO,
1096 "Can't start Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1097 tx_queue_id, port_id);
1101 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
1102 RTE_ETHDEV_LOG(INFO,
1103 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
1104 tx_queue_id, port_id);
1108 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
1112 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
1114 struct rte_eth_dev *dev;
1117 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1118 dev = &rte_eth_devices[port_id];
1120 ret = eth_dev_validate_tx_queue(dev, tx_queue_id);
1124 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
1126 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
1127 RTE_ETHDEV_LOG(INFO,
1128 "Can't stop Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1129 tx_queue_id, port_id);
1133 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
1134 RTE_ETHDEV_LOG(INFO,
1135 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
1136 tx_queue_id, port_id);
1140 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
1144 eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
1146 uint16_t old_nb_queues = dev->data->nb_tx_queues;
1149 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
1150 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
1151 sizeof(dev->data->tx_queues[0]) *
1152 RTE_MAX_QUEUES_PER_PORT,
1153 RTE_CACHE_LINE_SIZE);
1154 if (dev->data->tx_queues == NULL) {
1155 dev->data->nb_tx_queues = 0;
1158 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
1159 for (i = nb_queues; i < old_nb_queues; i++)
1160 eth_dev_txq_release(dev, i);
1162 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1163 for (i = nb_queues; i < old_nb_queues; i++)
1164 eth_dev_txq_release(dev, i);
1166 rte_free(dev->data->tx_queues);
1167 dev->data->tx_queues = NULL;
1169 dev->data->nb_tx_queues = nb_queues;
1174 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1177 case ETH_SPEED_NUM_10M:
1178 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1179 case ETH_SPEED_NUM_100M:
1180 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1181 case ETH_SPEED_NUM_1G:
1182 return ETH_LINK_SPEED_1G;
1183 case ETH_SPEED_NUM_2_5G:
1184 return ETH_LINK_SPEED_2_5G;
1185 case ETH_SPEED_NUM_5G:
1186 return ETH_LINK_SPEED_5G;
1187 case ETH_SPEED_NUM_10G:
1188 return ETH_LINK_SPEED_10G;
1189 case ETH_SPEED_NUM_20G:
1190 return ETH_LINK_SPEED_20G;
1191 case ETH_SPEED_NUM_25G:
1192 return ETH_LINK_SPEED_25G;
1193 case ETH_SPEED_NUM_40G:
1194 return ETH_LINK_SPEED_40G;
1195 case ETH_SPEED_NUM_50G:
1196 return ETH_LINK_SPEED_50G;
1197 case ETH_SPEED_NUM_56G:
1198 return ETH_LINK_SPEED_56G;
1199 case ETH_SPEED_NUM_100G:
1200 return ETH_LINK_SPEED_100G;
1201 case ETH_SPEED_NUM_200G:
1202 return ETH_LINK_SPEED_200G;
1209 rte_eth_dev_rx_offload_name(uint64_t offload)
1211 const char *name = "UNKNOWN";
1214 for (i = 0; i < RTE_DIM(eth_dev_rx_offload_names); ++i) {
1215 if (offload == eth_dev_rx_offload_names[i].offload) {
1216 name = eth_dev_rx_offload_names[i].name;
1225 rte_eth_dev_tx_offload_name(uint64_t offload)
1227 const char *name = "UNKNOWN";
1230 for (i = 0; i < RTE_DIM(eth_dev_tx_offload_names); ++i) {
1231 if (offload == eth_dev_tx_offload_names[i].offload) {
1232 name = eth_dev_tx_offload_names[i].name;
1241 eth_dev_check_lro_pkt_size(uint16_t port_id, uint32_t config_size,
1242 uint32_t max_rx_pkt_len, uint32_t dev_info_size)
1246 if (dev_info_size == 0) {
1247 if (config_size != max_rx_pkt_len) {
1248 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size"
1249 " %u != %u is not allowed\n",
1250 port_id, config_size, max_rx_pkt_len);
1253 } else if (config_size > dev_info_size) {
1254 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1255 "> max allowed value %u\n", port_id, config_size,
1258 } else if (config_size < RTE_ETHER_MIN_LEN) {
1259 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1260 "< min allowed value %u\n", port_id, config_size,
1261 (unsigned int)RTE_ETHER_MIN_LEN);
1268 * Validate offloads that are requested through rte_eth_dev_configure against
1269 * the offloads successfully set by the ethernet device.
1272 * The port identifier of the Ethernet device.
1273 * @param req_offloads
1274 * The offloads that have been requested through `rte_eth_dev_configure`.
1275 * @param set_offloads
1276 * The offloads successfully set by the ethernet device.
1277 * @param offload_type
1278 * The offload type i.e. Rx/Tx string.
1279 * @param offload_name
1280 * The function that prints the offload name.
1282 * - (0) if validation successful.
1283 * - (-EINVAL) if requested offload has been silently disabled.
1287 eth_dev_validate_offloads(uint16_t port_id, uint64_t req_offloads,
1288 uint64_t set_offloads, const char *offload_type,
1289 const char *(*offload_name)(uint64_t))
1291 uint64_t offloads_diff = req_offloads ^ set_offloads;
1295 while (offloads_diff != 0) {
1296 /* Check if any offload is requested but not enabled. */
1297 offload = 1ULL << __builtin_ctzll(offloads_diff);
1298 if (offload & req_offloads) {
1300 "Port %u failed to enable %s offload %s\n",
1301 port_id, offload_type, offload_name(offload));
1305 /* Check if offload couldn't be disabled. */
1306 if (offload & set_offloads) {
1307 RTE_ETHDEV_LOG(DEBUG,
1308 "Port %u %s offload %s is not requested but enabled\n",
1309 port_id, offload_type, offload_name(offload));
1312 offloads_diff &= ~offload;
1319 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1320 const struct rte_eth_conf *dev_conf)
1322 struct rte_eth_dev *dev;
1323 struct rte_eth_dev_info dev_info;
1324 struct rte_eth_conf orig_conf;
1325 uint16_t overhead_len;
1330 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1331 dev = &rte_eth_devices[port_id];
1333 if (dev_conf == NULL) {
1335 "Cannot configure ethdev port %u from NULL config\n",
1340 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1342 if (dev->data->dev_started) {
1344 "Port %u must be stopped to allow configuration\n",
1350 * Ensure that "dev_configured" is always 0 each time prepare to do
1351 * dev_configure() to avoid any non-anticipated behaviour.
1352 * And set to 1 when dev_configure() is executed successfully.
1354 dev->data->dev_configured = 0;
1356 /* Store original config, as rollback required on failure */
1357 memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1360 * Copy the dev_conf parameter into the dev structure.
1361 * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1363 if (dev_conf != &dev->data->dev_conf)
1364 memcpy(&dev->data->dev_conf, dev_conf,
1365 sizeof(dev->data->dev_conf));
1367 /* Backup mtu for rollback */
1368 old_mtu = dev->data->mtu;
1370 ret = rte_eth_dev_info_get(port_id, &dev_info);
1374 /* Get the real Ethernet overhead length */
1375 if (dev_info.max_mtu != UINT16_MAX &&
1376 dev_info.max_rx_pktlen > dev_info.max_mtu)
1377 overhead_len = dev_info.max_rx_pktlen - dev_info.max_mtu;
1379 overhead_len = RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN;
1381 /* If number of queues specified by application for both Rx and Tx is
1382 * zero, use driver preferred values. This cannot be done individually
1383 * as it is valid for either Tx or Rx (but not both) to be zero.
1384 * If driver does not provide any preferred valued, fall back on
1387 if (nb_rx_q == 0 && nb_tx_q == 0) {
1388 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1390 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1391 nb_tx_q = dev_info.default_txportconf.nb_queues;
1393 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1396 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1398 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1399 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1404 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1406 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1407 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1413 * Check that the numbers of RX and TX queues are not greater
1414 * than the maximum number of RX and TX queues supported by the
1415 * configured device.
1417 if (nb_rx_q > dev_info.max_rx_queues) {
1418 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1419 port_id, nb_rx_q, dev_info.max_rx_queues);
1424 if (nb_tx_q > dev_info.max_tx_queues) {
1425 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1426 port_id, nb_tx_q, dev_info.max_tx_queues);
1431 /* Check that the device supports requested interrupts */
1432 if ((dev_conf->intr_conf.lsc == 1) &&
1433 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1434 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1435 dev->device->driver->name);
1439 if ((dev_conf->intr_conf.rmv == 1) &&
1440 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1441 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1442 dev->device->driver->name);
1448 * If jumbo frames are enabled, check that the maximum RX packet
1449 * length is supported by the configured device.
1451 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1452 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1454 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1455 port_id, dev_conf->rxmode.max_rx_pkt_len,
1456 dev_info.max_rx_pktlen);
1459 } else if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN) {
1461 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1462 port_id, dev_conf->rxmode.max_rx_pkt_len,
1463 (unsigned int)RTE_ETHER_MIN_LEN);
1468 /* Scale the MTU size to adapt max_rx_pkt_len */
1469 dev->data->mtu = dev->data->dev_conf.rxmode.max_rx_pkt_len -
1472 uint16_t pktlen = dev_conf->rxmode.max_rx_pkt_len;
1473 if (pktlen < RTE_ETHER_MIN_MTU + overhead_len ||
1474 pktlen > RTE_ETHER_MTU + overhead_len)
1475 /* Use default value */
1476 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1477 RTE_ETHER_MTU + overhead_len;
1481 * If LRO is enabled, check that the maximum aggregated packet
1482 * size is supported by the configured device.
1484 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
1485 if (dev_conf->rxmode.max_lro_pkt_size == 0)
1486 dev->data->dev_conf.rxmode.max_lro_pkt_size =
1487 dev->data->dev_conf.rxmode.max_rx_pkt_len;
1488 ret = eth_dev_check_lro_pkt_size(port_id,
1489 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1490 dev->data->dev_conf.rxmode.max_rx_pkt_len,
1491 dev_info.max_lro_pkt_size);
1496 /* Any requested offloading must be within its device capabilities */
1497 if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1498 dev_conf->rxmode.offloads) {
1500 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1501 "capabilities 0x%"PRIx64" in %s()\n",
1502 port_id, dev_conf->rxmode.offloads,
1503 dev_info.rx_offload_capa,
1508 if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1509 dev_conf->txmode.offloads) {
1511 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1512 "capabilities 0x%"PRIx64" in %s()\n",
1513 port_id, dev_conf->txmode.offloads,
1514 dev_info.tx_offload_capa,
1520 dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf =
1521 rte_eth_rss_hf_refine(dev_conf->rx_adv_conf.rss_conf.rss_hf);
1523 /* Check that device supports requested rss hash functions. */
1524 if ((dev_info.flow_type_rss_offloads |
1525 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1526 dev_info.flow_type_rss_offloads) {
1528 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1529 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1530 dev_info.flow_type_rss_offloads);
1535 /* Check if Rx RSS distribution is disabled but RSS hash is enabled. */
1536 if (((dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) == 0) &&
1537 (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_RSS_HASH)) {
1539 "Ethdev port_id=%u config invalid Rx mq_mode without RSS but %s offload is requested\n",
1541 rte_eth_dev_rx_offload_name(DEV_RX_OFFLOAD_RSS_HASH));
1547 * Setup new number of RX/TX queues and reconfigure device.
1549 diag = eth_dev_rx_queue_config(dev, nb_rx_q);
1552 "Port%u eth_dev_rx_queue_config = %d\n",
1558 diag = eth_dev_tx_queue_config(dev, nb_tx_q);
1561 "Port%u eth_dev_tx_queue_config = %d\n",
1563 eth_dev_rx_queue_config(dev, 0);
1568 diag = (*dev->dev_ops->dev_configure)(dev);
1570 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1572 ret = eth_err(port_id, diag);
1576 /* Initialize Rx profiling if enabled at compilation time. */
1577 diag = __rte_eth_dev_profile_init(port_id, dev);
1579 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1581 ret = eth_err(port_id, diag);
1585 /* Validate Rx offloads. */
1586 diag = eth_dev_validate_offloads(port_id,
1587 dev_conf->rxmode.offloads,
1588 dev->data->dev_conf.rxmode.offloads, "Rx",
1589 rte_eth_dev_rx_offload_name);
1595 /* Validate Tx offloads. */
1596 diag = eth_dev_validate_offloads(port_id,
1597 dev_conf->txmode.offloads,
1598 dev->data->dev_conf.txmode.offloads, "Tx",
1599 rte_eth_dev_tx_offload_name);
1605 dev->data->dev_configured = 1;
1606 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, 0);
1609 eth_dev_rx_queue_config(dev, 0);
1610 eth_dev_tx_queue_config(dev, 0);
1612 memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1613 if (old_mtu != dev->data->mtu)
1614 dev->data->mtu = old_mtu;
1616 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, ret);
1621 rte_eth_dev_internal_reset(struct rte_eth_dev *dev)
1623 if (dev->data->dev_started) {
1624 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1625 dev->data->port_id);
1629 eth_dev_rx_queue_config(dev, 0);
1630 eth_dev_tx_queue_config(dev, 0);
1632 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1636 eth_dev_mac_restore(struct rte_eth_dev *dev,
1637 struct rte_eth_dev_info *dev_info)
1639 struct rte_ether_addr *addr;
1644 /* replay MAC address configuration including default MAC */
1645 addr = &dev->data->mac_addrs[0];
1646 if (*dev->dev_ops->mac_addr_set != NULL)
1647 (*dev->dev_ops->mac_addr_set)(dev, addr);
1648 else if (*dev->dev_ops->mac_addr_add != NULL)
1649 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1651 if (*dev->dev_ops->mac_addr_add != NULL) {
1652 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1653 addr = &dev->data->mac_addrs[i];
1655 /* skip zero address */
1656 if (rte_is_zero_ether_addr(addr))
1660 pool_mask = dev->data->mac_pool_sel[i];
1663 if (pool_mask & 1ULL)
1664 (*dev->dev_ops->mac_addr_add)(dev,
1668 } while (pool_mask);
1674 eth_dev_config_restore(struct rte_eth_dev *dev,
1675 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1679 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1680 eth_dev_mac_restore(dev, dev_info);
1682 /* replay promiscuous configuration */
1684 * use callbacks directly since we don't need port_id check and
1685 * would like to bypass the same value set
1687 if (rte_eth_promiscuous_get(port_id) == 1 &&
1688 *dev->dev_ops->promiscuous_enable != NULL) {
1689 ret = eth_err(port_id,
1690 (*dev->dev_ops->promiscuous_enable)(dev));
1691 if (ret != 0 && ret != -ENOTSUP) {
1693 "Failed to enable promiscuous mode for device (port %u): %s\n",
1694 port_id, rte_strerror(-ret));
1697 } else if (rte_eth_promiscuous_get(port_id) == 0 &&
1698 *dev->dev_ops->promiscuous_disable != NULL) {
1699 ret = eth_err(port_id,
1700 (*dev->dev_ops->promiscuous_disable)(dev));
1701 if (ret != 0 && ret != -ENOTSUP) {
1703 "Failed to disable promiscuous mode for device (port %u): %s\n",
1704 port_id, rte_strerror(-ret));
1709 /* replay all multicast configuration */
1711 * use callbacks directly since we don't need port_id check and
1712 * would like to bypass the same value set
1714 if (rte_eth_allmulticast_get(port_id) == 1 &&
1715 *dev->dev_ops->allmulticast_enable != NULL) {
1716 ret = eth_err(port_id,
1717 (*dev->dev_ops->allmulticast_enable)(dev));
1718 if (ret != 0 && ret != -ENOTSUP) {
1720 "Failed to enable allmulticast mode for device (port %u): %s\n",
1721 port_id, rte_strerror(-ret));
1724 } else if (rte_eth_allmulticast_get(port_id) == 0 &&
1725 *dev->dev_ops->allmulticast_disable != NULL) {
1726 ret = eth_err(port_id,
1727 (*dev->dev_ops->allmulticast_disable)(dev));
1728 if (ret != 0 && ret != -ENOTSUP) {
1730 "Failed to disable allmulticast mode for device (port %u): %s\n",
1731 port_id, rte_strerror(-ret));
1740 rte_eth_dev_start(uint16_t port_id)
1742 struct rte_eth_dev *dev;
1743 struct rte_eth_dev_info dev_info;
1747 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1748 dev = &rte_eth_devices[port_id];
1750 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1752 if (dev->data->dev_configured == 0) {
1753 RTE_ETHDEV_LOG(INFO,
1754 "Device with port_id=%"PRIu16" is not configured.\n",
1759 if (dev->data->dev_started != 0) {
1760 RTE_ETHDEV_LOG(INFO,
1761 "Device with port_id=%"PRIu16" already started\n",
1766 ret = rte_eth_dev_info_get(port_id, &dev_info);
1770 /* Lets restore MAC now if device does not support live change */
1771 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1772 eth_dev_mac_restore(dev, &dev_info);
1774 diag = (*dev->dev_ops->dev_start)(dev);
1776 dev->data->dev_started = 1;
1778 return eth_err(port_id, diag);
1780 ret = eth_dev_config_restore(dev, &dev_info, port_id);
1783 "Error during restoring configuration for device (port %u): %s\n",
1784 port_id, rte_strerror(-ret));
1785 ret_stop = rte_eth_dev_stop(port_id);
1786 if (ret_stop != 0) {
1788 "Failed to stop device (port %u): %s\n",
1789 port_id, rte_strerror(-ret_stop));
1795 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1796 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1797 (*dev->dev_ops->link_update)(dev, 0);
1800 /* expose selection of PMD fast-path functions */
1801 eth_dev_fp_ops_setup(rte_eth_fp_ops + port_id, dev);
1803 rte_ethdev_trace_start(port_id);
1808 rte_eth_dev_stop(uint16_t port_id)
1810 struct rte_eth_dev *dev;
1813 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1814 dev = &rte_eth_devices[port_id];
1816 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_stop, -ENOTSUP);
1818 if (dev->data->dev_started == 0) {
1819 RTE_ETHDEV_LOG(INFO,
1820 "Device with port_id=%"PRIu16" already stopped\n",
1825 /* point fast-path functions to dummy ones */
1826 eth_dev_fp_ops_reset(rte_eth_fp_ops + port_id);
1828 dev->data->dev_started = 0;
1829 ret = (*dev->dev_ops->dev_stop)(dev);
1830 rte_ethdev_trace_stop(port_id, ret);
1836 rte_eth_dev_set_link_up(uint16_t port_id)
1838 struct rte_eth_dev *dev;
1840 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1841 dev = &rte_eth_devices[port_id];
1843 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1844 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1848 rte_eth_dev_set_link_down(uint16_t port_id)
1850 struct rte_eth_dev *dev;
1852 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1853 dev = &rte_eth_devices[port_id];
1855 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1856 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1860 rte_eth_dev_close(uint16_t port_id)
1862 struct rte_eth_dev *dev;
1863 int firsterr, binerr;
1864 int *lasterr = &firsterr;
1866 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1867 dev = &rte_eth_devices[port_id];
1869 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_close, -ENOTSUP);
1870 *lasterr = (*dev->dev_ops->dev_close)(dev);
1874 rte_ethdev_trace_close(port_id);
1875 *lasterr = rte_eth_dev_release_port(dev);
1881 rte_eth_dev_reset(uint16_t port_id)
1883 struct rte_eth_dev *dev;
1886 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1887 dev = &rte_eth_devices[port_id];
1889 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1891 ret = rte_eth_dev_stop(port_id);
1894 "Failed to stop device (port %u) before reset: %s - ignore\n",
1895 port_id, rte_strerror(-ret));
1897 ret = dev->dev_ops->dev_reset(dev);
1899 return eth_err(port_id, ret);
1903 rte_eth_dev_is_removed(uint16_t port_id)
1905 struct rte_eth_dev *dev;
1908 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1909 dev = &rte_eth_devices[port_id];
1911 if (dev->state == RTE_ETH_DEV_REMOVED)
1914 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1916 ret = dev->dev_ops->is_removed(dev);
1918 /* Device is physically removed. */
1919 dev->state = RTE_ETH_DEV_REMOVED;
1925 rte_eth_rx_queue_check_split(const struct rte_eth_rxseg_split *rx_seg,
1926 uint16_t n_seg, uint32_t *mbp_buf_size,
1927 const struct rte_eth_dev_info *dev_info)
1929 const struct rte_eth_rxseg_capa *seg_capa = &dev_info->rx_seg_capa;
1930 struct rte_mempool *mp_first;
1931 uint32_t offset_mask;
1934 if (n_seg > seg_capa->max_nseg) {
1936 "Requested Rx segments %u exceed supported %u\n",
1937 n_seg, seg_capa->max_nseg);
1941 * Check the sizes and offsets against buffer sizes
1942 * for each segment specified in extended configuration.
1944 mp_first = rx_seg[0].mp;
1945 offset_mask = (1u << seg_capa->offset_align_log2) - 1;
1946 for (seg_idx = 0; seg_idx < n_seg; seg_idx++) {
1947 struct rte_mempool *mpl = rx_seg[seg_idx].mp;
1948 uint32_t length = rx_seg[seg_idx].length;
1949 uint32_t offset = rx_seg[seg_idx].offset;
1952 RTE_ETHDEV_LOG(ERR, "null mempool pointer\n");
1955 if (seg_idx != 0 && mp_first != mpl &&
1956 seg_capa->multi_pools == 0) {
1957 RTE_ETHDEV_LOG(ERR, "Receiving to multiple pools is not supported\n");
1961 if (seg_capa->offset_allowed == 0) {
1962 RTE_ETHDEV_LOG(ERR, "Rx segmentation with offset is not supported\n");
1965 if (offset & offset_mask) {
1966 RTE_ETHDEV_LOG(ERR, "Rx segmentation invalid offset alignment %u, %u\n",
1968 seg_capa->offset_align_log2);
1972 if (mpl->private_data_size <
1973 sizeof(struct rte_pktmbuf_pool_private)) {
1975 "%s private_data_size %u < %u\n",
1976 mpl->name, mpl->private_data_size,
1977 (unsigned int)sizeof
1978 (struct rte_pktmbuf_pool_private));
1981 offset += seg_idx != 0 ? 0 : RTE_PKTMBUF_HEADROOM;
1982 *mbp_buf_size = rte_pktmbuf_data_room_size(mpl);
1983 length = length != 0 ? length : *mbp_buf_size;
1984 if (*mbp_buf_size < length + offset) {
1986 "%s mbuf_data_room_size %u < %u (segment length=%u + segment offset=%u)\n",
1987 mpl->name, *mbp_buf_size,
1988 length + offset, length, offset);
1996 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1997 uint16_t nb_rx_desc, unsigned int socket_id,
1998 const struct rte_eth_rxconf *rx_conf,
1999 struct rte_mempool *mp)
2002 uint32_t mbp_buf_size;
2003 struct rte_eth_dev *dev;
2004 struct rte_eth_dev_info dev_info;
2005 struct rte_eth_rxconf local_conf;
2007 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2008 dev = &rte_eth_devices[port_id];
2010 if (rx_queue_id >= dev->data->nb_rx_queues) {
2011 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
2015 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
2017 ret = rte_eth_dev_info_get(port_id, &dev_info);
2022 /* Single pool configuration check. */
2023 if (rx_conf != NULL && rx_conf->rx_nseg != 0) {
2025 "Ambiguous segment configuration\n");
2029 * Check the size of the mbuf data buffer, this value
2030 * must be provided in the private data of the memory pool.
2031 * First check that the memory pool(s) has a valid private data.
2033 if (mp->private_data_size <
2034 sizeof(struct rte_pktmbuf_pool_private)) {
2035 RTE_ETHDEV_LOG(ERR, "%s private_data_size %u < %u\n",
2036 mp->name, mp->private_data_size,
2038 sizeof(struct rte_pktmbuf_pool_private));
2041 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
2042 if (mbp_buf_size < dev_info.min_rx_bufsize +
2043 RTE_PKTMBUF_HEADROOM) {
2045 "%s mbuf_data_room_size %u < %u (RTE_PKTMBUF_HEADROOM=%u + min_rx_bufsize(dev)=%u)\n",
2046 mp->name, mbp_buf_size,
2047 RTE_PKTMBUF_HEADROOM +
2048 dev_info.min_rx_bufsize,
2049 RTE_PKTMBUF_HEADROOM,
2050 dev_info.min_rx_bufsize);
2054 const struct rte_eth_rxseg_split *rx_seg;
2057 /* Extended multi-segment configuration check. */
2058 if (rx_conf == NULL || rx_conf->rx_seg == NULL || rx_conf->rx_nseg == 0) {
2060 "Memory pool is null and no extended configuration provided\n");
2064 rx_seg = (const struct rte_eth_rxseg_split *)rx_conf->rx_seg;
2065 n_seg = rx_conf->rx_nseg;
2067 if (rx_conf->offloads & RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT) {
2068 ret = rte_eth_rx_queue_check_split(rx_seg, n_seg,
2074 RTE_ETHDEV_LOG(ERR, "No Rx segmentation offload configured\n");
2079 /* Use default specified by driver, if nb_rx_desc is zero */
2080 if (nb_rx_desc == 0) {
2081 nb_rx_desc = dev_info.default_rxportconf.ring_size;
2082 /* If driver default is also zero, fall back on EAL default */
2083 if (nb_rx_desc == 0)
2084 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
2087 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
2088 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
2089 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
2092 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
2093 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
2094 dev_info.rx_desc_lim.nb_min,
2095 dev_info.rx_desc_lim.nb_align);
2099 if (dev->data->dev_started &&
2100 !(dev_info.dev_capa &
2101 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
2104 if (dev->data->dev_started &&
2105 (dev->data->rx_queue_state[rx_queue_id] !=
2106 RTE_ETH_QUEUE_STATE_STOPPED))
2109 eth_dev_rxq_release(dev, rx_queue_id);
2111 if (rx_conf == NULL)
2112 rx_conf = &dev_info.default_rxconf;
2114 local_conf = *rx_conf;
2117 * If an offloading has already been enabled in
2118 * rte_eth_dev_configure(), it has been enabled on all queues,
2119 * so there is no need to enable it in this queue again.
2120 * The local_conf.offloads input to underlying PMD only carries
2121 * those offloadings which are only enabled on this queue and
2122 * not enabled on all queues.
2124 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
2127 * New added offloadings for this queue are those not enabled in
2128 * rte_eth_dev_configure() and they must be per-queue type.
2129 * A pure per-port offloading can't be enabled on a queue while
2130 * disabled on another queue. A pure per-port offloading can't
2131 * be enabled for any queue as new added one if it hasn't been
2132 * enabled in rte_eth_dev_configure().
2134 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
2135 local_conf.offloads) {
2137 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
2138 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
2139 port_id, rx_queue_id, local_conf.offloads,
2140 dev_info.rx_queue_offload_capa,
2146 * If LRO is enabled, check that the maximum aggregated packet
2147 * size is supported by the configured device.
2149 if (local_conf.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
2150 if (dev->data->dev_conf.rxmode.max_lro_pkt_size == 0)
2151 dev->data->dev_conf.rxmode.max_lro_pkt_size =
2152 dev->data->dev_conf.rxmode.max_rx_pkt_len;
2153 int ret = eth_dev_check_lro_pkt_size(port_id,
2154 dev->data->dev_conf.rxmode.max_lro_pkt_size,
2155 dev->data->dev_conf.rxmode.max_rx_pkt_len,
2156 dev_info.max_lro_pkt_size);
2161 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
2162 socket_id, &local_conf, mp);
2164 if (!dev->data->min_rx_buf_size ||
2165 dev->data->min_rx_buf_size > mbp_buf_size)
2166 dev->data->min_rx_buf_size = mbp_buf_size;
2169 rte_ethdev_trace_rxq_setup(port_id, rx_queue_id, nb_rx_desc, mp,
2171 return eth_err(port_id, ret);
2175 rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
2176 uint16_t nb_rx_desc,
2177 const struct rte_eth_hairpin_conf *conf)
2180 struct rte_eth_dev *dev;
2181 struct rte_eth_hairpin_cap cap;
2185 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2186 dev = &rte_eth_devices[port_id];
2188 if (rx_queue_id >= dev->data->nb_rx_queues) {
2189 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
2195 "Cannot setup ethdev port %u Rx hairpin queue from NULL config\n",
2200 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
2203 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_hairpin_queue_setup,
2205 /* if nb_rx_desc is zero use max number of desc from the driver. */
2206 if (nb_rx_desc == 0)
2207 nb_rx_desc = cap.max_nb_desc;
2208 if (nb_rx_desc > cap.max_nb_desc) {
2210 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu",
2211 nb_rx_desc, cap.max_nb_desc);
2214 if (conf->peer_count > cap.max_rx_2_tx) {
2216 "Invalid value for number of peers for Rx queue(=%u), should be: <= %hu",
2217 conf->peer_count, cap.max_rx_2_tx);
2220 if (conf->peer_count == 0) {
2222 "Invalid value for number of peers for Rx queue(=%u), should be: > 0",
2226 for (i = 0, count = 0; i < dev->data->nb_rx_queues &&
2227 cap.max_nb_queues != UINT16_MAX; i++) {
2228 if (i == rx_queue_id || rte_eth_dev_is_rx_hairpin_queue(dev, i))
2231 if (count > cap.max_nb_queues) {
2232 RTE_ETHDEV_LOG(ERR, "To many Rx hairpin queues max is %d",
2236 if (dev->data->dev_started)
2238 eth_dev_rxq_release(dev, rx_queue_id);
2239 ret = (*dev->dev_ops->rx_hairpin_queue_setup)(dev, rx_queue_id,
2242 dev->data->rx_queue_state[rx_queue_id] =
2243 RTE_ETH_QUEUE_STATE_HAIRPIN;
2244 return eth_err(port_id, ret);
2248 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2249 uint16_t nb_tx_desc, unsigned int socket_id,
2250 const struct rte_eth_txconf *tx_conf)
2252 struct rte_eth_dev *dev;
2253 struct rte_eth_dev_info dev_info;
2254 struct rte_eth_txconf local_conf;
2257 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2258 dev = &rte_eth_devices[port_id];
2260 if (tx_queue_id >= dev->data->nb_tx_queues) {
2261 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2265 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
2267 ret = rte_eth_dev_info_get(port_id, &dev_info);
2271 /* Use default specified by driver, if nb_tx_desc is zero */
2272 if (nb_tx_desc == 0) {
2273 nb_tx_desc = dev_info.default_txportconf.ring_size;
2274 /* If driver default is zero, fall back on EAL default */
2275 if (nb_tx_desc == 0)
2276 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
2278 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
2279 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
2280 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
2282 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
2283 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
2284 dev_info.tx_desc_lim.nb_min,
2285 dev_info.tx_desc_lim.nb_align);
2289 if (dev->data->dev_started &&
2290 !(dev_info.dev_capa &
2291 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
2294 if (dev->data->dev_started &&
2295 (dev->data->tx_queue_state[tx_queue_id] !=
2296 RTE_ETH_QUEUE_STATE_STOPPED))
2299 eth_dev_txq_release(dev, tx_queue_id);
2301 if (tx_conf == NULL)
2302 tx_conf = &dev_info.default_txconf;
2304 local_conf = *tx_conf;
2307 * If an offloading has already been enabled in
2308 * rte_eth_dev_configure(), it has been enabled on all queues,
2309 * so there is no need to enable it in this queue again.
2310 * The local_conf.offloads input to underlying PMD only carries
2311 * those offloadings which are only enabled on this queue and
2312 * not enabled on all queues.
2314 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
2317 * New added offloadings for this queue are those not enabled in
2318 * rte_eth_dev_configure() and they must be per-queue type.
2319 * A pure per-port offloading can't be enabled on a queue while
2320 * disabled on another queue. A pure per-port offloading can't
2321 * be enabled for any queue as new added one if it hasn't been
2322 * enabled in rte_eth_dev_configure().
2324 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
2325 local_conf.offloads) {
2327 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
2328 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
2329 port_id, tx_queue_id, local_conf.offloads,
2330 dev_info.tx_queue_offload_capa,
2335 rte_ethdev_trace_txq_setup(port_id, tx_queue_id, nb_tx_desc, tx_conf);
2336 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
2337 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
2341 rte_eth_tx_hairpin_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2342 uint16_t nb_tx_desc,
2343 const struct rte_eth_hairpin_conf *conf)
2345 struct rte_eth_dev *dev;
2346 struct rte_eth_hairpin_cap cap;
2351 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2352 dev = &rte_eth_devices[port_id];
2354 if (tx_queue_id >= dev->data->nb_tx_queues) {
2355 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2361 "Cannot setup ethdev port %u Tx hairpin queue from NULL config\n",
2366 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
2369 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_hairpin_queue_setup,
2371 /* if nb_rx_desc is zero use max number of desc from the driver. */
2372 if (nb_tx_desc == 0)
2373 nb_tx_desc = cap.max_nb_desc;
2374 if (nb_tx_desc > cap.max_nb_desc) {
2376 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu",
2377 nb_tx_desc, cap.max_nb_desc);
2380 if (conf->peer_count > cap.max_tx_2_rx) {
2382 "Invalid value for number of peers for Tx queue(=%u), should be: <= %hu",
2383 conf->peer_count, cap.max_tx_2_rx);
2386 if (conf->peer_count == 0) {
2388 "Invalid value for number of peers for Tx queue(=%u), should be: > 0",
2392 for (i = 0, count = 0; i < dev->data->nb_tx_queues &&
2393 cap.max_nb_queues != UINT16_MAX; i++) {
2394 if (i == tx_queue_id || rte_eth_dev_is_tx_hairpin_queue(dev, i))
2397 if (count > cap.max_nb_queues) {
2398 RTE_ETHDEV_LOG(ERR, "To many Tx hairpin queues max is %d",
2402 if (dev->data->dev_started)
2404 eth_dev_txq_release(dev, tx_queue_id);
2405 ret = (*dev->dev_ops->tx_hairpin_queue_setup)
2406 (dev, tx_queue_id, nb_tx_desc, conf);
2408 dev->data->tx_queue_state[tx_queue_id] =
2409 RTE_ETH_QUEUE_STATE_HAIRPIN;
2410 return eth_err(port_id, ret);
2414 rte_eth_hairpin_bind(uint16_t tx_port, uint16_t rx_port)
2416 struct rte_eth_dev *dev;
2419 RTE_ETH_VALID_PORTID_OR_ERR_RET(tx_port, -ENODEV);
2420 dev = &rte_eth_devices[tx_port];
2422 if (dev->data->dev_started == 0) {
2423 RTE_ETHDEV_LOG(ERR, "Tx port %d is not started\n", tx_port);
2427 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_bind, -ENOTSUP);
2428 ret = (*dev->dev_ops->hairpin_bind)(dev, rx_port);
2430 RTE_ETHDEV_LOG(ERR, "Failed to bind hairpin Tx %d"
2431 " to Rx %d (%d - all ports)\n",
2432 tx_port, rx_port, RTE_MAX_ETHPORTS);
2438 rte_eth_hairpin_unbind(uint16_t tx_port, uint16_t rx_port)
2440 struct rte_eth_dev *dev;
2443 RTE_ETH_VALID_PORTID_OR_ERR_RET(tx_port, -ENODEV);
2444 dev = &rte_eth_devices[tx_port];
2446 if (dev->data->dev_started == 0) {
2447 RTE_ETHDEV_LOG(ERR, "Tx port %d is already stopped\n", tx_port);
2451 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_unbind, -ENOTSUP);
2452 ret = (*dev->dev_ops->hairpin_unbind)(dev, rx_port);
2454 RTE_ETHDEV_LOG(ERR, "Failed to unbind hairpin Tx %d"
2455 " from Rx %d (%d - all ports)\n",
2456 tx_port, rx_port, RTE_MAX_ETHPORTS);
2462 rte_eth_hairpin_get_peer_ports(uint16_t port_id, uint16_t *peer_ports,
2463 size_t len, uint32_t direction)
2465 struct rte_eth_dev *dev;
2468 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2469 dev = &rte_eth_devices[port_id];
2471 if (peer_ports == NULL) {
2473 "Cannot get ethdev port %u hairpin peer ports to NULL\n",
2480 "Cannot get ethdev port %u hairpin peer ports to array with zero size\n",
2485 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_get_peer_ports,
2488 ret = (*dev->dev_ops->hairpin_get_peer_ports)(dev, peer_ports,
2491 RTE_ETHDEV_LOG(ERR, "Failed to get %d hairpin peer %s ports\n",
2492 port_id, direction ? "Rx" : "Tx");
2498 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
2499 void *userdata __rte_unused)
2501 rte_pktmbuf_free_bulk(pkts, unsent);
2505 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
2508 uint64_t *count = userdata;
2510 rte_pktmbuf_free_bulk(pkts, unsent);
2515 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
2516 buffer_tx_error_fn cbfn, void *userdata)
2518 if (buffer == NULL) {
2520 "Cannot set Tx buffer error callback to NULL buffer\n");
2524 buffer->error_callback = cbfn;
2525 buffer->error_userdata = userdata;
2530 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
2534 if (buffer == NULL) {
2535 RTE_ETHDEV_LOG(ERR, "Cannot initialize NULL buffer\n");
2539 buffer->size = size;
2540 if (buffer->error_callback == NULL) {
2541 ret = rte_eth_tx_buffer_set_err_callback(
2542 buffer, rte_eth_tx_buffer_drop_callback, NULL);
2549 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
2551 struct rte_eth_dev *dev;
2554 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2555 dev = &rte_eth_devices[port_id];
2557 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
2559 /* Call driver to free pending mbufs. */
2560 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
2562 return eth_err(port_id, ret);
2566 rte_eth_promiscuous_enable(uint16_t port_id)
2568 struct rte_eth_dev *dev;
2571 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2572 dev = &rte_eth_devices[port_id];
2574 if (dev->data->promiscuous == 1)
2577 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_enable, -ENOTSUP);
2579 diag = (*dev->dev_ops->promiscuous_enable)(dev);
2580 dev->data->promiscuous = (diag == 0) ? 1 : 0;
2582 return eth_err(port_id, diag);
2586 rte_eth_promiscuous_disable(uint16_t port_id)
2588 struct rte_eth_dev *dev;
2591 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2592 dev = &rte_eth_devices[port_id];
2594 if (dev->data->promiscuous == 0)
2597 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_disable, -ENOTSUP);
2599 dev->data->promiscuous = 0;
2600 diag = (*dev->dev_ops->promiscuous_disable)(dev);
2602 dev->data->promiscuous = 1;
2604 return eth_err(port_id, diag);
2608 rte_eth_promiscuous_get(uint16_t port_id)
2610 struct rte_eth_dev *dev;
2612 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2613 dev = &rte_eth_devices[port_id];
2615 return dev->data->promiscuous;
2619 rte_eth_allmulticast_enable(uint16_t port_id)
2621 struct rte_eth_dev *dev;
2624 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2625 dev = &rte_eth_devices[port_id];
2627 if (dev->data->all_multicast == 1)
2630 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_enable, -ENOTSUP);
2631 diag = (*dev->dev_ops->allmulticast_enable)(dev);
2632 dev->data->all_multicast = (diag == 0) ? 1 : 0;
2634 return eth_err(port_id, diag);
2638 rte_eth_allmulticast_disable(uint16_t port_id)
2640 struct rte_eth_dev *dev;
2643 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2644 dev = &rte_eth_devices[port_id];
2646 if (dev->data->all_multicast == 0)
2649 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_disable, -ENOTSUP);
2650 dev->data->all_multicast = 0;
2651 diag = (*dev->dev_ops->allmulticast_disable)(dev);
2653 dev->data->all_multicast = 1;
2655 return eth_err(port_id, diag);
2659 rte_eth_allmulticast_get(uint16_t port_id)
2661 struct rte_eth_dev *dev;
2663 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2664 dev = &rte_eth_devices[port_id];
2666 return dev->data->all_multicast;
2670 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
2672 struct rte_eth_dev *dev;
2674 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2675 dev = &rte_eth_devices[port_id];
2677 if (eth_link == NULL) {
2678 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u link to NULL\n",
2683 if (dev->data->dev_conf.intr_conf.lsc && dev->data->dev_started)
2684 rte_eth_linkstatus_get(dev, eth_link);
2686 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2687 (*dev->dev_ops->link_update)(dev, 1);
2688 *eth_link = dev->data->dev_link;
2695 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
2697 struct rte_eth_dev *dev;
2699 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2700 dev = &rte_eth_devices[port_id];
2702 if (eth_link == NULL) {
2703 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u link to NULL\n",
2708 if (dev->data->dev_conf.intr_conf.lsc && dev->data->dev_started)
2709 rte_eth_linkstatus_get(dev, eth_link);
2711 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2712 (*dev->dev_ops->link_update)(dev, 0);
2713 *eth_link = dev->data->dev_link;
2720 rte_eth_link_speed_to_str(uint32_t link_speed)
2722 switch (link_speed) {
2723 case ETH_SPEED_NUM_NONE: return "None";
2724 case ETH_SPEED_NUM_10M: return "10 Mbps";
2725 case ETH_SPEED_NUM_100M: return "100 Mbps";
2726 case ETH_SPEED_NUM_1G: return "1 Gbps";
2727 case ETH_SPEED_NUM_2_5G: return "2.5 Gbps";
2728 case ETH_SPEED_NUM_5G: return "5 Gbps";
2729 case ETH_SPEED_NUM_10G: return "10 Gbps";
2730 case ETH_SPEED_NUM_20G: return "20 Gbps";
2731 case ETH_SPEED_NUM_25G: return "25 Gbps";
2732 case ETH_SPEED_NUM_40G: return "40 Gbps";
2733 case ETH_SPEED_NUM_50G: return "50 Gbps";
2734 case ETH_SPEED_NUM_56G: return "56 Gbps";
2735 case ETH_SPEED_NUM_100G: return "100 Gbps";
2736 case ETH_SPEED_NUM_200G: return "200 Gbps";
2737 case ETH_SPEED_NUM_UNKNOWN: return "Unknown";
2738 default: return "Invalid";
2743 rte_eth_link_to_str(char *str, size_t len, const struct rte_eth_link *eth_link)
2746 RTE_ETHDEV_LOG(ERR, "Cannot convert link to NULL string\n");
2752 "Cannot convert link to string with zero size\n");
2756 if (eth_link == NULL) {
2757 RTE_ETHDEV_LOG(ERR, "Cannot convert to string from NULL link\n");
2761 if (eth_link->link_status == ETH_LINK_DOWN)
2762 return snprintf(str, len, "Link down");
2764 return snprintf(str, len, "Link up at %s %s %s",
2765 rte_eth_link_speed_to_str(eth_link->link_speed),
2766 (eth_link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
2768 (eth_link->link_autoneg == ETH_LINK_AUTONEG) ?
2769 "Autoneg" : "Fixed");
2773 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
2775 struct rte_eth_dev *dev;
2777 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2778 dev = &rte_eth_devices[port_id];
2780 if (stats == NULL) {
2781 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u stats to NULL\n",
2786 memset(stats, 0, sizeof(*stats));
2788 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
2789 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
2790 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
2794 rte_eth_stats_reset(uint16_t port_id)
2796 struct rte_eth_dev *dev;
2799 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2800 dev = &rte_eth_devices[port_id];
2802 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
2803 ret = (*dev->dev_ops->stats_reset)(dev);
2805 return eth_err(port_id, ret);
2807 dev->data->rx_mbuf_alloc_failed = 0;
2813 eth_dev_get_xstats_basic_count(struct rte_eth_dev *dev)
2815 uint16_t nb_rxqs, nb_txqs;
2818 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2819 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2821 count = RTE_NB_STATS;
2822 if (dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS) {
2823 count += nb_rxqs * RTE_NB_RXQ_STATS;
2824 count += nb_txqs * RTE_NB_TXQ_STATS;
2831 eth_dev_get_xstats_count(uint16_t port_id)
2833 struct rte_eth_dev *dev;
2836 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2837 dev = &rte_eth_devices[port_id];
2838 if (dev->dev_ops->xstats_get_names != NULL) {
2839 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2841 return eth_err(port_id, count);
2846 count += eth_dev_get_xstats_basic_count(dev);
2852 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2855 int cnt_xstats, idx_xstat;
2857 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2859 if (xstat_name == NULL) {
2861 "Cannot get ethdev port %u xstats ID from NULL xstat name\n",
2868 "Cannot get ethdev port %u xstats ID to NULL\n",
2874 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2875 if (cnt_xstats < 0) {
2876 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2880 /* Get id-name lookup table */
2881 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2883 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2884 port_id, xstats_names, cnt_xstats, NULL)) {
2885 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2889 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2890 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2899 /* retrieve basic stats names */
2901 eth_basic_stats_get_names(struct rte_eth_dev *dev,
2902 struct rte_eth_xstat_name *xstats_names)
2904 int cnt_used_entries = 0;
2905 uint32_t idx, id_queue;
2908 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2909 strlcpy(xstats_names[cnt_used_entries].name,
2910 eth_dev_stats_strings[idx].name,
2911 sizeof(xstats_names[0].name));
2915 if ((dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS) == 0)
2916 return cnt_used_entries;
2918 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2919 for (id_queue = 0; id_queue < num_q; id_queue++) {
2920 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2921 snprintf(xstats_names[cnt_used_entries].name,
2922 sizeof(xstats_names[0].name),
2924 id_queue, eth_dev_rxq_stats_strings[idx].name);
2929 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2930 for (id_queue = 0; id_queue < num_q; id_queue++) {
2931 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2932 snprintf(xstats_names[cnt_used_entries].name,
2933 sizeof(xstats_names[0].name),
2935 id_queue, eth_dev_txq_stats_strings[idx].name);
2939 return cnt_used_entries;
2942 /* retrieve ethdev extended statistics names */
2944 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2945 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2948 struct rte_eth_xstat_name *xstats_names_copy;
2949 unsigned int no_basic_stat_requested = 1;
2950 unsigned int no_ext_stat_requested = 1;
2951 unsigned int expected_entries;
2952 unsigned int basic_count;
2953 struct rte_eth_dev *dev;
2957 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2958 dev = &rte_eth_devices[port_id];
2960 basic_count = eth_dev_get_xstats_basic_count(dev);
2961 ret = eth_dev_get_xstats_count(port_id);
2964 expected_entries = (unsigned int)ret;
2966 /* Return max number of stats if no ids given */
2969 return expected_entries;
2970 else if (xstats_names && size < expected_entries)
2971 return expected_entries;
2974 if (ids && !xstats_names)
2977 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2978 uint64_t ids_copy[size];
2980 for (i = 0; i < size; i++) {
2981 if (ids[i] < basic_count) {
2982 no_basic_stat_requested = 0;
2987 * Convert ids to xstats ids that PMD knows.
2988 * ids known by user are basic + extended stats.
2990 ids_copy[i] = ids[i] - basic_count;
2993 if (no_basic_stat_requested)
2994 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2995 ids_copy, xstats_names, size);
2998 /* Retrieve all stats */
3000 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
3002 if (num_stats < 0 || num_stats > (int)expected_entries)
3005 return expected_entries;
3008 xstats_names_copy = calloc(expected_entries,
3009 sizeof(struct rte_eth_xstat_name));
3011 if (!xstats_names_copy) {
3012 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
3017 for (i = 0; i < size; i++) {
3018 if (ids[i] >= basic_count) {
3019 no_ext_stat_requested = 0;
3025 /* Fill xstats_names_copy structure */
3026 if (ids && no_ext_stat_requested) {
3027 eth_basic_stats_get_names(dev, xstats_names_copy);
3029 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
3032 free(xstats_names_copy);
3038 for (i = 0; i < size; i++) {
3039 if (ids[i] >= expected_entries) {
3040 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
3041 free(xstats_names_copy);
3044 xstats_names[i] = xstats_names_copy[ids[i]];
3047 free(xstats_names_copy);
3052 rte_eth_xstats_get_names(uint16_t port_id,
3053 struct rte_eth_xstat_name *xstats_names,
3056 struct rte_eth_dev *dev;
3057 int cnt_used_entries;
3058 int cnt_expected_entries;
3059 int cnt_driver_entries;
3061 cnt_expected_entries = eth_dev_get_xstats_count(port_id);
3062 if (xstats_names == NULL || cnt_expected_entries < 0 ||
3063 (int)size < cnt_expected_entries)
3064 return cnt_expected_entries;
3066 /* port_id checked in eth_dev_get_xstats_count() */
3067 dev = &rte_eth_devices[port_id];
3069 cnt_used_entries = eth_basic_stats_get_names(dev, xstats_names);
3071 if (dev->dev_ops->xstats_get_names != NULL) {
3072 /* If there are any driver-specific xstats, append them
3075 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
3077 xstats_names + cnt_used_entries,
3078 size - cnt_used_entries);
3079 if (cnt_driver_entries < 0)
3080 return eth_err(port_id, cnt_driver_entries);
3081 cnt_used_entries += cnt_driver_entries;
3084 return cnt_used_entries;
3089 eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
3091 struct rte_eth_dev *dev;
3092 struct rte_eth_stats eth_stats;
3093 unsigned int count = 0, i, q;
3094 uint64_t val, *stats_ptr;
3095 uint16_t nb_rxqs, nb_txqs;
3098 ret = rte_eth_stats_get(port_id, ð_stats);
3102 dev = &rte_eth_devices[port_id];
3104 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
3105 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
3108 for (i = 0; i < RTE_NB_STATS; i++) {
3109 stats_ptr = RTE_PTR_ADD(ð_stats,
3110 eth_dev_stats_strings[i].offset);
3112 xstats[count++].value = val;
3115 if ((dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS) == 0)
3119 for (q = 0; q < nb_rxqs; q++) {
3120 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
3121 stats_ptr = RTE_PTR_ADD(ð_stats,
3122 eth_dev_rxq_stats_strings[i].offset +
3123 q * sizeof(uint64_t));
3125 xstats[count++].value = val;
3130 for (q = 0; q < nb_txqs; q++) {
3131 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
3132 stats_ptr = RTE_PTR_ADD(ð_stats,
3133 eth_dev_txq_stats_strings[i].offset +
3134 q * sizeof(uint64_t));
3136 xstats[count++].value = val;
3142 /* retrieve ethdev extended statistics */
3144 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
3145 uint64_t *values, unsigned int size)
3147 unsigned int no_basic_stat_requested = 1;
3148 unsigned int no_ext_stat_requested = 1;
3149 unsigned int num_xstats_filled;
3150 unsigned int basic_count;
3151 uint16_t expected_entries;
3152 struct rte_eth_dev *dev;
3156 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3157 dev = &rte_eth_devices[port_id];
3159 ret = eth_dev_get_xstats_count(port_id);
3162 expected_entries = (uint16_t)ret;
3163 struct rte_eth_xstat xstats[expected_entries];
3164 basic_count = eth_dev_get_xstats_basic_count(dev);
3166 /* Return max number of stats if no ids given */
3169 return expected_entries;
3170 else if (values && size < expected_entries)
3171 return expected_entries;
3177 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
3178 unsigned int basic_count = eth_dev_get_xstats_basic_count(dev);
3179 uint64_t ids_copy[size];
3181 for (i = 0; i < size; i++) {
3182 if (ids[i] < basic_count) {
3183 no_basic_stat_requested = 0;
3188 * Convert ids to xstats ids that PMD knows.
3189 * ids known by user are basic + extended stats.
3191 ids_copy[i] = ids[i] - basic_count;
3194 if (no_basic_stat_requested)
3195 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
3200 for (i = 0; i < size; i++) {
3201 if (ids[i] >= basic_count) {
3202 no_ext_stat_requested = 0;
3208 /* Fill the xstats structure */
3209 if (ids && no_ext_stat_requested)
3210 ret = eth_basic_stats_get(port_id, xstats);
3212 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
3216 num_xstats_filled = (unsigned int)ret;
3218 /* Return all stats */
3220 for (i = 0; i < num_xstats_filled; i++)
3221 values[i] = xstats[i].value;
3222 return expected_entries;
3226 for (i = 0; i < size; i++) {
3227 if (ids[i] >= expected_entries) {
3228 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
3231 values[i] = xstats[ids[i]].value;
3237 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
3240 struct rte_eth_dev *dev;
3241 unsigned int count = 0, i;
3242 signed int xcount = 0;
3243 uint16_t nb_rxqs, nb_txqs;
3246 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3247 dev = &rte_eth_devices[port_id];
3249 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
3250 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
3252 /* Return generic statistics */
3253 count = RTE_NB_STATS;
3254 if (dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS)
3255 count += (nb_rxqs * RTE_NB_RXQ_STATS) + (nb_txqs * RTE_NB_TXQ_STATS);
3257 /* implemented by the driver */
3258 if (dev->dev_ops->xstats_get != NULL) {
3259 /* Retrieve the xstats from the driver at the end of the
3262 xcount = (*dev->dev_ops->xstats_get)(dev,
3263 xstats ? xstats + count : NULL,
3264 (n > count) ? n - count : 0);
3267 return eth_err(port_id, xcount);
3270 if (n < count + xcount || xstats == NULL)
3271 return count + xcount;
3273 /* now fill the xstats structure */
3274 ret = eth_basic_stats_get(port_id, xstats);
3279 for (i = 0; i < count; i++)
3281 /* add an offset to driver-specific stats */
3282 for ( ; i < count + xcount; i++)
3283 xstats[i].id += count;
3285 return count + xcount;
3288 /* reset ethdev extended statistics */
3290 rte_eth_xstats_reset(uint16_t port_id)
3292 struct rte_eth_dev *dev;
3294 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3295 dev = &rte_eth_devices[port_id];
3297 /* implemented by the driver */
3298 if (dev->dev_ops->xstats_reset != NULL)
3299 return eth_err(port_id, (*dev->dev_ops->xstats_reset)(dev));
3301 /* fallback to default */
3302 return rte_eth_stats_reset(port_id);
3306 eth_dev_set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id,
3307 uint8_t stat_idx, uint8_t is_rx)
3309 struct rte_eth_dev *dev;
3311 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3312 dev = &rte_eth_devices[port_id];
3314 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
3317 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
3320 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
3323 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
3324 return (*dev->dev_ops->queue_stats_mapping_set) (dev, queue_id, stat_idx, is_rx);
3328 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
3331 return eth_err(port_id, eth_dev_set_queue_stats_mapping(port_id,
3333 stat_idx, STAT_QMAP_TX));
3337 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
3340 return eth_err(port_id, eth_dev_set_queue_stats_mapping(port_id,
3342 stat_idx, STAT_QMAP_RX));
3346 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
3348 struct rte_eth_dev *dev;
3350 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3351 dev = &rte_eth_devices[port_id];
3353 if (fw_version == NULL && fw_size > 0) {
3355 "Cannot get ethdev port %u FW version to NULL when string size is non zero\n",
3360 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
3361 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
3362 fw_version, fw_size));
3366 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
3368 struct rte_eth_dev *dev;
3369 const struct rte_eth_desc_lim lim = {
3370 .nb_max = UINT16_MAX,
3373 .nb_seg_max = UINT16_MAX,
3374 .nb_mtu_seg_max = UINT16_MAX,
3378 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3379 dev = &rte_eth_devices[port_id];
3381 if (dev_info == NULL) {
3382 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u info to NULL\n",
3388 * Init dev_info before port_id check since caller does not have
3389 * return status and does not know if get is successful or not.
3391 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
3392 dev_info->switch_info.domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
3394 dev_info->rx_desc_lim = lim;
3395 dev_info->tx_desc_lim = lim;
3396 dev_info->device = dev->device;
3397 dev_info->min_mtu = RTE_ETHER_MIN_MTU;
3398 dev_info->max_mtu = UINT16_MAX;
3400 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
3401 diag = (*dev->dev_ops->dev_infos_get)(dev, dev_info);
3403 /* Cleanup already filled in device information */
3404 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
3405 return eth_err(port_id, diag);
3408 /* Maximum number of queues should be <= RTE_MAX_QUEUES_PER_PORT */
3409 dev_info->max_rx_queues = RTE_MIN(dev_info->max_rx_queues,
3410 RTE_MAX_QUEUES_PER_PORT);
3411 dev_info->max_tx_queues = RTE_MIN(dev_info->max_tx_queues,
3412 RTE_MAX_QUEUES_PER_PORT);
3414 dev_info->driver_name = dev->device->driver->name;
3415 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
3416 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
3418 dev_info->dev_flags = &dev->data->dev_flags;
3424 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
3425 uint32_t *ptypes, int num)
3428 struct rte_eth_dev *dev;
3429 const uint32_t *all_ptypes;
3431 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3432 dev = &rte_eth_devices[port_id];
3434 if (ptypes == NULL && num > 0) {
3436 "Cannot get ethdev port %u supported packet types to NULL when array size is non zero\n",
3441 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
3442 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3447 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
3448 if (all_ptypes[i] & ptype_mask) {
3450 ptypes[j] = all_ptypes[i];
3458 rte_eth_dev_set_ptypes(uint16_t port_id, uint32_t ptype_mask,
3459 uint32_t *set_ptypes, unsigned int num)
3461 const uint32_t valid_ptype_masks[] = {
3465 RTE_PTYPE_TUNNEL_MASK,
3466 RTE_PTYPE_INNER_L2_MASK,
3467 RTE_PTYPE_INNER_L3_MASK,
3468 RTE_PTYPE_INNER_L4_MASK,
3470 const uint32_t *all_ptypes;
3471 struct rte_eth_dev *dev;
3472 uint32_t unused_mask;
3476 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3477 dev = &rte_eth_devices[port_id];
3479 if (num > 0 && set_ptypes == NULL) {
3481 "Cannot get ethdev port %u set packet types to NULL when array size is non zero\n",
3486 if (*dev->dev_ops->dev_supported_ptypes_get == NULL ||
3487 *dev->dev_ops->dev_ptypes_set == NULL) {
3492 if (ptype_mask == 0) {
3493 ret = (*dev->dev_ops->dev_ptypes_set)(dev,
3498 unused_mask = ptype_mask;
3499 for (i = 0; i < RTE_DIM(valid_ptype_masks); i++) {
3500 uint32_t mask = ptype_mask & valid_ptype_masks[i];
3501 if (mask && mask != valid_ptype_masks[i]) {
3505 unused_mask &= ~valid_ptype_masks[i];
3513 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3514 if (all_ptypes == NULL) {
3520 * Accommodate as many set_ptypes as possible. If the supplied
3521 * set_ptypes array is insufficient fill it partially.
3523 for (i = 0, j = 0; set_ptypes != NULL &&
3524 (all_ptypes[i] != RTE_PTYPE_UNKNOWN); ++i) {
3525 if (ptype_mask & all_ptypes[i]) {
3527 set_ptypes[j] = all_ptypes[i];
3535 if (set_ptypes != NULL && j < num)
3536 set_ptypes[j] = RTE_PTYPE_UNKNOWN;
3538 return (*dev->dev_ops->dev_ptypes_set)(dev, ptype_mask);
3542 set_ptypes[0] = RTE_PTYPE_UNKNOWN;
3548 rte_eth_macaddrs_get(uint16_t port_id, struct rte_ether_addr *ma,
3552 struct rte_eth_dev *dev;
3553 struct rte_eth_dev_info dev_info;
3556 RTE_ETHDEV_LOG(ERR, "%s: invalid parameters\n", __func__);
3560 /* will check for us that port_id is a valid one */
3561 ret = rte_eth_dev_info_get(port_id, &dev_info);
3565 dev = &rte_eth_devices[port_id];
3566 num = RTE_MIN(dev_info.max_mac_addrs, num);
3567 memcpy(ma, dev->data->mac_addrs, num * sizeof(ma[0]));
3573 rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
3575 struct rte_eth_dev *dev;
3577 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3578 dev = &rte_eth_devices[port_id];
3580 if (mac_addr == NULL) {
3582 "Cannot get ethdev port %u MAC address to NULL\n",
3587 rte_ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
3593 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
3595 struct rte_eth_dev *dev;
3597 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3598 dev = &rte_eth_devices[port_id];
3601 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u MTU to NULL\n",
3606 *mtu = dev->data->mtu;
3611 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
3614 struct rte_eth_dev_info dev_info;
3615 struct rte_eth_dev *dev;
3617 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3618 dev = &rte_eth_devices[port_id];
3619 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
3622 * Check if the device supports dev_infos_get, if it does not
3623 * skip min_mtu/max_mtu validation here as this requires values
3624 * that are populated within the call to rte_eth_dev_info_get()
3625 * which relies on dev->dev_ops->dev_infos_get.
3627 if (*dev->dev_ops->dev_infos_get != NULL) {
3628 ret = rte_eth_dev_info_get(port_id, &dev_info);
3632 if (mtu < dev_info.min_mtu || mtu > dev_info.max_mtu)
3636 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
3638 dev->data->mtu = mtu;
3640 return eth_err(port_id, ret);
3644 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
3646 struct rte_eth_dev *dev;
3649 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3650 dev = &rte_eth_devices[port_id];
3652 if (!(dev->data->dev_conf.rxmode.offloads &
3653 DEV_RX_OFFLOAD_VLAN_FILTER)) {
3654 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
3659 if (vlan_id > 4095) {
3660 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
3664 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
3666 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
3668 struct rte_vlan_filter_conf *vfc;
3672 vfc = &dev->data->vlan_filter_conf;
3673 vidx = vlan_id / 64;
3674 vbit = vlan_id % 64;
3677 vfc->ids[vidx] |= UINT64_C(1) << vbit;
3679 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
3682 return eth_err(port_id, ret);
3686 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
3689 struct rte_eth_dev *dev;
3691 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3692 dev = &rte_eth_devices[port_id];
3694 if (rx_queue_id >= dev->data->nb_rx_queues) {
3695 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
3699 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
3700 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
3706 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
3707 enum rte_vlan_type vlan_type,
3710 struct rte_eth_dev *dev;
3712 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3713 dev = &rte_eth_devices[port_id];
3715 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
3716 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
3721 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
3723 struct rte_eth_dev_info dev_info;
3724 struct rte_eth_dev *dev;
3728 uint64_t orig_offloads;
3729 uint64_t dev_offloads;
3730 uint64_t new_offloads;
3732 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3733 dev = &rte_eth_devices[port_id];
3735 /* save original values in case of failure */
3736 orig_offloads = dev->data->dev_conf.rxmode.offloads;
3737 dev_offloads = orig_offloads;
3739 /* check which option changed by application */
3740 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
3741 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
3744 dev_offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
3746 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
3747 mask |= ETH_VLAN_STRIP_MASK;
3750 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
3751 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER);
3754 dev_offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
3756 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_FILTER;
3757 mask |= ETH_VLAN_FILTER_MASK;
3760 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
3761 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND);
3764 dev_offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
3766 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_EXTEND;
3767 mask |= ETH_VLAN_EXTEND_MASK;
3770 cur = !!(offload_mask & ETH_QINQ_STRIP_OFFLOAD);
3771 org = !!(dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP);
3774 dev_offloads |= DEV_RX_OFFLOAD_QINQ_STRIP;
3776 dev_offloads &= ~DEV_RX_OFFLOAD_QINQ_STRIP;
3777 mask |= ETH_QINQ_STRIP_MASK;
3784 ret = rte_eth_dev_info_get(port_id, &dev_info);
3788 /* Rx VLAN offloading must be within its device capabilities */
3789 if ((dev_offloads & dev_info.rx_offload_capa) != dev_offloads) {
3790 new_offloads = dev_offloads & ~orig_offloads;
3792 "Ethdev port_id=%u requested new added VLAN offloads "
3793 "0x%" PRIx64 " must be within Rx offloads capabilities "
3794 "0x%" PRIx64 " in %s()\n",
3795 port_id, new_offloads, dev_info.rx_offload_capa,
3800 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
3801 dev->data->dev_conf.rxmode.offloads = dev_offloads;
3802 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
3804 /* hit an error restore original values */
3805 dev->data->dev_conf.rxmode.offloads = orig_offloads;
3808 return eth_err(port_id, ret);
3812 rte_eth_dev_get_vlan_offload(uint16_t port_id)
3814 struct rte_eth_dev *dev;
3815 uint64_t *dev_offloads;
3818 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3819 dev = &rte_eth_devices[port_id];
3820 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
3822 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
3823 ret |= ETH_VLAN_STRIP_OFFLOAD;
3825 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
3826 ret |= ETH_VLAN_FILTER_OFFLOAD;
3828 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
3829 ret |= ETH_VLAN_EXTEND_OFFLOAD;
3831 if (*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP)
3832 ret |= ETH_QINQ_STRIP_OFFLOAD;
3838 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
3840 struct rte_eth_dev *dev;
3842 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3843 dev = &rte_eth_devices[port_id];
3845 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
3846 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
3850 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3852 struct rte_eth_dev *dev;
3854 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3855 dev = &rte_eth_devices[port_id];
3857 if (fc_conf == NULL) {
3859 "Cannot get ethdev port %u flow control config to NULL\n",
3864 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
3865 memset(fc_conf, 0, sizeof(*fc_conf));
3866 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
3870 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3872 struct rte_eth_dev *dev;
3874 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3875 dev = &rte_eth_devices[port_id];
3877 if (fc_conf == NULL) {
3879 "Cannot set ethdev port %u flow control from NULL config\n",
3884 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
3885 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
3889 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
3890 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
3894 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
3895 struct rte_eth_pfc_conf *pfc_conf)
3897 struct rte_eth_dev *dev;
3899 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3900 dev = &rte_eth_devices[port_id];
3902 if (pfc_conf == NULL) {
3904 "Cannot set ethdev port %u priority flow control from NULL config\n",
3909 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
3910 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
3914 /* High water, low water validation are device specific */
3915 if (*dev->dev_ops->priority_flow_ctrl_set)
3916 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
3922 eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
3927 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
3928 for (i = 0; i < num; i++) {
3929 if (reta_conf[i].mask)
3937 eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
3941 uint16_t i, idx, shift;
3944 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
3948 for (i = 0; i < reta_size; i++) {
3949 idx = i / RTE_RETA_GROUP_SIZE;
3950 shift = i % RTE_RETA_GROUP_SIZE;
3951 if ((reta_conf[idx].mask & (1ULL << shift)) &&
3952 (reta_conf[idx].reta[shift] >= max_rxq)) {
3954 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
3956 reta_conf[idx].reta[shift], max_rxq);
3965 rte_eth_dev_rss_reta_update(uint16_t port_id,
3966 struct rte_eth_rss_reta_entry64 *reta_conf,
3969 struct rte_eth_dev *dev;
3972 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3973 dev = &rte_eth_devices[port_id];
3975 if (reta_conf == NULL) {
3977 "Cannot update ethdev port %u RSS RETA to NULL\n",
3982 if (reta_size == 0) {
3984 "Cannot update ethdev port %u RSS RETA with zero size\n",
3989 /* Check mask bits */
3990 ret = eth_check_reta_mask(reta_conf, reta_size);
3994 /* Check entry value */
3995 ret = eth_check_reta_entry(reta_conf, reta_size,
3996 dev->data->nb_rx_queues);
4000 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
4001 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
4006 rte_eth_dev_rss_reta_query(uint16_t port_id,
4007 struct rte_eth_rss_reta_entry64 *reta_conf,
4010 struct rte_eth_dev *dev;
4013 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4014 dev = &rte_eth_devices[port_id];
4016 if (reta_conf == NULL) {
4018 "Cannot query ethdev port %u RSS RETA from NULL config\n",
4023 /* Check mask bits */
4024 ret = eth_check_reta_mask(reta_conf, reta_size);
4028 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
4029 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
4034 rte_eth_dev_rss_hash_update(uint16_t port_id,
4035 struct rte_eth_rss_conf *rss_conf)
4037 struct rte_eth_dev *dev;
4038 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
4041 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4042 dev = &rte_eth_devices[port_id];
4044 if (rss_conf == NULL) {
4046 "Cannot update ethdev port %u RSS hash from NULL config\n",
4051 ret = rte_eth_dev_info_get(port_id, &dev_info);
4055 rss_conf->rss_hf = rte_eth_rss_hf_refine(rss_conf->rss_hf);
4056 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
4057 dev_info.flow_type_rss_offloads) {
4059 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
4060 port_id, rss_conf->rss_hf,
4061 dev_info.flow_type_rss_offloads);
4064 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
4065 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
4070 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
4071 struct rte_eth_rss_conf *rss_conf)
4073 struct rte_eth_dev *dev;
4075 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4076 dev = &rte_eth_devices[port_id];
4078 if (rss_conf == NULL) {
4080 "Cannot get ethdev port %u RSS hash config to NULL\n",
4085 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
4086 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
4091 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
4092 struct rte_eth_udp_tunnel *udp_tunnel)
4094 struct rte_eth_dev *dev;
4096 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4097 dev = &rte_eth_devices[port_id];
4099 if (udp_tunnel == NULL) {
4101 "Cannot add ethdev port %u UDP tunnel port from NULL UDP tunnel\n",
4106 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
4107 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4111 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
4112 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
4117 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
4118 struct rte_eth_udp_tunnel *udp_tunnel)
4120 struct rte_eth_dev *dev;
4122 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4123 dev = &rte_eth_devices[port_id];
4125 if (udp_tunnel == NULL) {
4127 "Cannot delete ethdev port %u UDP tunnel port from NULL UDP tunnel\n",
4132 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
4133 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4137 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
4138 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
4143 rte_eth_led_on(uint16_t port_id)
4145 struct rte_eth_dev *dev;
4147 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4148 dev = &rte_eth_devices[port_id];
4150 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
4151 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
4155 rte_eth_led_off(uint16_t port_id)
4157 struct rte_eth_dev *dev;
4159 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4160 dev = &rte_eth_devices[port_id];
4162 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
4163 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
4167 rte_eth_fec_get_capability(uint16_t port_id,
4168 struct rte_eth_fec_capa *speed_fec_capa,
4171 struct rte_eth_dev *dev;
4174 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4175 dev = &rte_eth_devices[port_id];
4177 if (speed_fec_capa == NULL && num > 0) {
4179 "Cannot get ethdev port %u FEC capability to NULL when array size is non zero\n",
4184 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_get_capability, -ENOTSUP);
4185 ret = (*dev->dev_ops->fec_get_capability)(dev, speed_fec_capa, num);
4191 rte_eth_fec_get(uint16_t port_id, uint32_t *fec_capa)
4193 struct rte_eth_dev *dev;
4195 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4196 dev = &rte_eth_devices[port_id];
4198 if (fec_capa == NULL) {
4200 "Cannot get ethdev port %u current FEC mode to NULL\n",
4205 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_get, -ENOTSUP);
4206 return eth_err(port_id, (*dev->dev_ops->fec_get)(dev, fec_capa));
4210 rte_eth_fec_set(uint16_t port_id, uint32_t fec_capa)
4212 struct rte_eth_dev *dev;
4214 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4215 dev = &rte_eth_devices[port_id];
4217 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_set, -ENOTSUP);
4218 return eth_err(port_id, (*dev->dev_ops->fec_set)(dev, fec_capa));
4222 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
4226 eth_dev_get_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
4228 struct rte_eth_dev_info dev_info;
4229 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4233 ret = rte_eth_dev_info_get(port_id, &dev_info);
4237 for (i = 0; i < dev_info.max_mac_addrs; i++)
4238 if (memcmp(addr, &dev->data->mac_addrs[i],
4239 RTE_ETHER_ADDR_LEN) == 0)
4245 static const struct rte_ether_addr null_mac_addr;
4248 rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr,
4251 struct rte_eth_dev *dev;
4256 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4257 dev = &rte_eth_devices[port_id];
4261 "Cannot add ethdev port %u MAC address from NULL address\n",
4266 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
4268 if (rte_is_zero_ether_addr(addr)) {
4269 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
4273 if (pool >= ETH_64_POOLS) {
4274 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
4278 index = eth_dev_get_mac_addr_index(port_id, addr);
4280 index = eth_dev_get_mac_addr_index(port_id, &null_mac_addr);
4282 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
4287 pool_mask = dev->data->mac_pool_sel[index];
4289 /* Check if both MAC address and pool is already there, and do nothing */
4290 if (pool_mask & (1ULL << pool))
4295 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
4298 /* Update address in NIC data structure */
4299 rte_ether_addr_copy(addr, &dev->data->mac_addrs[index]);
4301 /* Update pool bitmap in NIC data structure */
4302 dev->data->mac_pool_sel[index] |= (1ULL << pool);
4305 return eth_err(port_id, ret);
4309 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *addr)
4311 struct rte_eth_dev *dev;
4314 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4315 dev = &rte_eth_devices[port_id];
4319 "Cannot remove ethdev port %u MAC address from NULL address\n",
4324 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
4326 index = eth_dev_get_mac_addr_index(port_id, addr);
4329 "Port %u: Cannot remove default MAC address\n",
4332 } else if (index < 0)
4333 return 0; /* Do nothing if address wasn't found */
4336 (*dev->dev_ops->mac_addr_remove)(dev, index);
4338 /* Update address in NIC data structure */
4339 rte_ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
4341 /* reset pool bitmap */
4342 dev->data->mac_pool_sel[index] = 0;
4348 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *addr)
4350 struct rte_eth_dev *dev;
4353 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4354 dev = &rte_eth_devices[port_id];
4358 "Cannot set ethdev port %u default MAC address from NULL address\n",
4363 if (!rte_is_valid_assigned_ether_addr(addr))
4366 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
4368 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
4372 /* Update default address in NIC data structure */
4373 rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]);
4380 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
4384 eth_dev_get_hash_mac_addr_index(uint16_t port_id,
4385 const struct rte_ether_addr *addr)
4387 struct rte_eth_dev_info dev_info;
4388 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4392 ret = rte_eth_dev_info_get(port_id, &dev_info);
4396 if (!dev->data->hash_mac_addrs)
4399 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
4400 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
4401 RTE_ETHER_ADDR_LEN) == 0)
4408 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
4413 struct rte_eth_dev *dev;
4415 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4416 dev = &rte_eth_devices[port_id];
4420 "Cannot set ethdev port %u unicast hash table from NULL address\n",
4425 if (rte_is_zero_ether_addr(addr)) {
4426 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
4431 index = eth_dev_get_hash_mac_addr_index(port_id, addr);
4432 /* Check if it's already there, and do nothing */
4433 if ((index >= 0) && on)
4439 "Port %u: the MAC address was not set in UTA\n",
4444 index = eth_dev_get_hash_mac_addr_index(port_id, &null_mac_addr);
4446 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
4452 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
4453 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
4455 /* Update address in NIC data structure */
4457 rte_ether_addr_copy(addr,
4458 &dev->data->hash_mac_addrs[index]);
4460 rte_ether_addr_copy(&null_mac_addr,
4461 &dev->data->hash_mac_addrs[index]);
4464 return eth_err(port_id, ret);
4468 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
4470 struct rte_eth_dev *dev;
4472 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4473 dev = &rte_eth_devices[port_id];
4475 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
4476 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
4480 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
4483 struct rte_eth_dev *dev;
4484 struct rte_eth_dev_info dev_info;
4485 struct rte_eth_link link;
4488 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4489 dev = &rte_eth_devices[port_id];
4491 ret = rte_eth_dev_info_get(port_id, &dev_info);
4495 link = dev->data->dev_link;
4497 if (queue_idx > dev_info.max_tx_queues) {
4499 "Set queue rate limit:port %u: invalid queue id=%u\n",
4500 port_id, queue_idx);
4504 if (tx_rate > link.link_speed) {
4506 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
4507 tx_rate, link.link_speed);
4511 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
4512 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
4513 queue_idx, tx_rate));
4516 RTE_INIT(eth_dev_init_fp_ops)
4520 for (i = 0; i != RTE_DIM(rte_eth_fp_ops); i++)
4521 eth_dev_fp_ops_reset(rte_eth_fp_ops + i);
4524 RTE_INIT(eth_dev_init_cb_lists)
4528 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
4529 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
4533 rte_eth_dev_callback_register(uint16_t port_id,
4534 enum rte_eth_event_type event,
4535 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4537 struct rte_eth_dev *dev;
4538 struct rte_eth_dev_callback *user_cb;
4542 if (cb_fn == NULL) {
4544 "Cannot register ethdev port %u callback from NULL\n",
4549 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4550 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4554 if (port_id == RTE_ETH_ALL) {
4556 last_port = RTE_MAX_ETHPORTS - 1;
4558 next_port = last_port = port_id;
4561 rte_spinlock_lock(ð_dev_cb_lock);
4564 dev = &rte_eth_devices[next_port];
4566 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
4567 if (user_cb->cb_fn == cb_fn &&
4568 user_cb->cb_arg == cb_arg &&
4569 user_cb->event == event) {
4574 /* create a new callback. */
4575 if (user_cb == NULL) {
4576 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
4577 sizeof(struct rte_eth_dev_callback), 0);
4578 if (user_cb != NULL) {
4579 user_cb->cb_fn = cb_fn;
4580 user_cb->cb_arg = cb_arg;
4581 user_cb->event = event;
4582 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
4585 rte_spinlock_unlock(ð_dev_cb_lock);
4586 rte_eth_dev_callback_unregister(port_id, event,
4592 } while (++next_port <= last_port);
4594 rte_spinlock_unlock(ð_dev_cb_lock);
4599 rte_eth_dev_callback_unregister(uint16_t port_id,
4600 enum rte_eth_event_type event,
4601 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4604 struct rte_eth_dev *dev;
4605 struct rte_eth_dev_callback *cb, *next;
4609 if (cb_fn == NULL) {
4611 "Cannot unregister ethdev port %u callback from NULL\n",
4616 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4617 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4621 if (port_id == RTE_ETH_ALL) {
4623 last_port = RTE_MAX_ETHPORTS - 1;
4625 next_port = last_port = port_id;
4628 rte_spinlock_lock(ð_dev_cb_lock);
4631 dev = &rte_eth_devices[next_port];
4633 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
4636 next = TAILQ_NEXT(cb, next);
4638 if (cb->cb_fn != cb_fn || cb->event != event ||
4639 (cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
4643 * if this callback is not executing right now,
4646 if (cb->active == 0) {
4647 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
4653 } while (++next_port <= last_port);
4655 rte_spinlock_unlock(ð_dev_cb_lock);
4660 rte_eth_dev_callback_process(struct rte_eth_dev *dev,
4661 enum rte_eth_event_type event, void *ret_param)
4663 struct rte_eth_dev_callback *cb_lst;
4664 struct rte_eth_dev_callback dev_cb;
4667 rte_spinlock_lock(ð_dev_cb_lock);
4668 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
4669 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
4673 if (ret_param != NULL)
4674 dev_cb.ret_param = ret_param;
4676 rte_spinlock_unlock(ð_dev_cb_lock);
4677 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
4678 dev_cb.cb_arg, dev_cb.ret_param);
4679 rte_spinlock_lock(ð_dev_cb_lock);
4682 rte_spinlock_unlock(ð_dev_cb_lock);
4687 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
4693 * for secondary process, at that point we expect device
4694 * to be already 'usable', so shared data and all function pointers
4695 * for fast-path devops have to be setup properly inside rte_eth_dev.
4697 if (rte_eal_process_type() == RTE_PROC_SECONDARY)
4698 eth_dev_fp_ops_setup(rte_eth_fp_ops + dev->data->port_id, dev);
4700 rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
4702 dev->state = RTE_ETH_DEV_ATTACHED;
4706 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
4709 struct rte_eth_dev *dev;
4710 struct rte_intr_handle *intr_handle;
4714 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4715 dev = &rte_eth_devices[port_id];
4717 if (!dev->intr_handle) {
4718 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4722 intr_handle = dev->intr_handle;
4723 if (!intr_handle->intr_vec) {
4724 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4728 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
4729 vec = intr_handle->intr_vec[qid];
4730 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4731 if (rc && rc != -EEXIST) {
4733 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4734 port_id, qid, op, epfd, vec);
4742 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
4744 struct rte_intr_handle *intr_handle;
4745 struct rte_eth_dev *dev;
4746 unsigned int efd_idx;
4750 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
4751 dev = &rte_eth_devices[port_id];
4753 if (queue_id >= dev->data->nb_rx_queues) {
4754 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4758 if (!dev->intr_handle) {
4759 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4763 intr_handle = dev->intr_handle;
4764 if (!intr_handle->intr_vec) {
4765 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4769 vec = intr_handle->intr_vec[queue_id];
4770 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
4771 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
4772 fd = intr_handle->efds[efd_idx];
4778 eth_dev_dma_mzone_name(char *name, size_t len, uint16_t port_id, uint16_t queue_id,
4779 const char *ring_name)
4781 return snprintf(name, len, "eth_p%d_q%d_%s",
4782 port_id, queue_id, ring_name);
4785 const struct rte_memzone *
4786 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
4787 uint16_t queue_id, size_t size, unsigned align,
4790 char z_name[RTE_MEMZONE_NAMESIZE];
4791 const struct rte_memzone *mz;
4794 rc = eth_dev_dma_mzone_name(z_name, sizeof(z_name), dev->data->port_id,
4795 queue_id, ring_name);
4796 if (rc >= RTE_MEMZONE_NAMESIZE) {
4797 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4798 rte_errno = ENAMETOOLONG;
4802 mz = rte_memzone_lookup(z_name);
4804 if ((socket_id != SOCKET_ID_ANY && socket_id != mz->socket_id) ||
4806 ((uintptr_t)mz->addr & (align - 1)) != 0) {
4808 "memzone %s does not justify the requested attributes\n",
4816 return rte_memzone_reserve_aligned(z_name, size, socket_id,
4817 RTE_MEMZONE_IOVA_CONTIG, align);
4821 rte_eth_dma_zone_free(const struct rte_eth_dev *dev, const char *ring_name,
4824 char z_name[RTE_MEMZONE_NAMESIZE];
4825 const struct rte_memzone *mz;
4828 rc = eth_dev_dma_mzone_name(z_name, sizeof(z_name), dev->data->port_id,
4829 queue_id, ring_name);
4830 if (rc >= RTE_MEMZONE_NAMESIZE) {
4831 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4832 return -ENAMETOOLONG;
4835 mz = rte_memzone_lookup(z_name);
4837 rc = rte_memzone_free(mz);
4845 rte_eth_dev_create(struct rte_device *device, const char *name,
4846 size_t priv_data_size,
4847 ethdev_bus_specific_init ethdev_bus_specific_init,
4848 void *bus_init_params,
4849 ethdev_init_t ethdev_init, void *init_params)
4851 struct rte_eth_dev *ethdev;
4854 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
4856 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
4857 ethdev = rte_eth_dev_allocate(name);
4861 if (priv_data_size) {
4862 ethdev->data->dev_private = rte_zmalloc_socket(
4863 name, priv_data_size, RTE_CACHE_LINE_SIZE,
4866 if (!ethdev->data->dev_private) {
4868 "failed to allocate private data\n");
4874 ethdev = rte_eth_dev_attach_secondary(name);
4877 "secondary process attach failed, ethdev doesn't exist\n");
4882 ethdev->device = device;
4884 if (ethdev_bus_specific_init) {
4885 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
4888 "ethdev bus specific initialisation failed\n");
4893 retval = ethdev_init(ethdev, init_params);
4895 RTE_ETHDEV_LOG(ERR, "ethdev initialisation failed\n");
4899 rte_eth_dev_probing_finish(ethdev);
4904 rte_eth_dev_release_port(ethdev);
4909 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
4910 ethdev_uninit_t ethdev_uninit)
4914 ethdev = rte_eth_dev_allocated(ethdev->data->name);
4918 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
4920 ret = ethdev_uninit(ethdev);
4924 return rte_eth_dev_release_port(ethdev);
4928 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
4929 int epfd, int op, void *data)
4932 struct rte_eth_dev *dev;
4933 struct rte_intr_handle *intr_handle;
4936 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4937 dev = &rte_eth_devices[port_id];
4939 if (queue_id >= dev->data->nb_rx_queues) {
4940 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4944 if (!dev->intr_handle) {
4945 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4949 intr_handle = dev->intr_handle;
4950 if (!intr_handle->intr_vec) {
4951 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4955 vec = intr_handle->intr_vec[queue_id];
4956 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4957 if (rc && rc != -EEXIST) {
4959 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4960 port_id, queue_id, op, epfd, vec);
4968 rte_eth_dev_rx_intr_enable(uint16_t port_id,
4971 struct rte_eth_dev *dev;
4974 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4975 dev = &rte_eth_devices[port_id];
4977 ret = eth_dev_validate_rx_queue(dev, queue_id);
4981 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
4982 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id));
4986 rte_eth_dev_rx_intr_disable(uint16_t port_id,
4989 struct rte_eth_dev *dev;
4992 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4993 dev = &rte_eth_devices[port_id];
4995 ret = eth_dev_validate_rx_queue(dev, queue_id);
4999 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
5000 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id));
5004 const struct rte_eth_rxtx_callback *
5005 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
5006 rte_rx_callback_fn fn, void *user_param)
5008 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
5009 rte_errno = ENOTSUP;
5012 struct rte_eth_dev *dev;
5014 /* check input parameters */
5015 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
5016 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
5020 dev = &rte_eth_devices[port_id];
5021 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
5025 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
5033 cb->param = user_param;
5035 rte_spinlock_lock(ð_dev_rx_cb_lock);
5036 /* Add the callbacks in fifo order. */
5037 struct rte_eth_rxtx_callback *tail =
5038 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
5041 /* Stores to cb->fn and cb->param should complete before
5042 * cb is visible to data plane.
5045 &rte_eth_devices[port_id].post_rx_burst_cbs[queue_id],
5046 cb, __ATOMIC_RELEASE);
5051 /* Stores to cb->fn and cb->param should complete before
5052 * cb is visible to data plane.
5054 __atomic_store_n(&tail->next, cb, __ATOMIC_RELEASE);
5056 rte_spinlock_unlock(ð_dev_rx_cb_lock);
5061 const struct rte_eth_rxtx_callback *
5062 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
5063 rte_rx_callback_fn fn, void *user_param)
5065 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
5066 rte_errno = ENOTSUP;
5069 /* check input parameters */
5070 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
5071 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
5076 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
5084 cb->param = user_param;
5086 rte_spinlock_lock(ð_dev_rx_cb_lock);
5087 /* Add the callbacks at first position */
5088 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
5089 /* Stores to cb->fn, cb->param and cb->next should complete before
5090 * cb is visible to data plane threads.
5093 &rte_eth_devices[port_id].post_rx_burst_cbs[queue_id],
5094 cb, __ATOMIC_RELEASE);
5095 rte_spinlock_unlock(ð_dev_rx_cb_lock);
5100 const struct rte_eth_rxtx_callback *
5101 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
5102 rte_tx_callback_fn fn, void *user_param)
5104 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
5105 rte_errno = ENOTSUP;
5108 struct rte_eth_dev *dev;
5110 /* check input parameters */
5111 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
5112 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
5117 dev = &rte_eth_devices[port_id];
5118 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
5123 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
5131 cb->param = user_param;
5133 rte_spinlock_lock(ð_dev_tx_cb_lock);
5134 /* Add the callbacks in fifo order. */
5135 struct rte_eth_rxtx_callback *tail =
5136 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
5139 /* Stores to cb->fn and cb->param should complete before
5140 * cb is visible to data plane.
5143 &rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id],
5144 cb, __ATOMIC_RELEASE);
5149 /* Stores to cb->fn and cb->param should complete before
5150 * cb is visible to data plane.
5152 __atomic_store_n(&tail->next, cb, __ATOMIC_RELEASE);
5154 rte_spinlock_unlock(ð_dev_tx_cb_lock);
5160 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
5161 const struct rte_eth_rxtx_callback *user_cb)
5163 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
5166 /* Check input parameters. */
5167 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5168 if (user_cb == NULL ||
5169 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
5172 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
5173 struct rte_eth_rxtx_callback *cb;
5174 struct rte_eth_rxtx_callback **prev_cb;
5177 rte_spinlock_lock(ð_dev_rx_cb_lock);
5178 prev_cb = &dev->post_rx_burst_cbs[queue_id];
5179 for (; *prev_cb != NULL; prev_cb = &cb->next) {
5181 if (cb == user_cb) {
5182 /* Remove the user cb from the callback list. */
5183 __atomic_store_n(prev_cb, cb->next, __ATOMIC_RELAXED);
5188 rte_spinlock_unlock(ð_dev_rx_cb_lock);
5194 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
5195 const struct rte_eth_rxtx_callback *user_cb)
5197 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
5200 /* Check input parameters. */
5201 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5202 if (user_cb == NULL ||
5203 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
5206 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
5208 struct rte_eth_rxtx_callback *cb;
5209 struct rte_eth_rxtx_callback **prev_cb;
5211 rte_spinlock_lock(ð_dev_tx_cb_lock);
5212 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
5213 for (; *prev_cb != NULL; prev_cb = &cb->next) {
5215 if (cb == user_cb) {
5216 /* Remove the user cb from the callback list. */
5217 __atomic_store_n(prev_cb, cb->next, __ATOMIC_RELAXED);
5222 rte_spinlock_unlock(ð_dev_tx_cb_lock);
5228 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
5229 struct rte_eth_rxq_info *qinfo)
5231 struct rte_eth_dev *dev;
5233 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5234 dev = &rte_eth_devices[port_id];
5236 if (queue_id >= dev->data->nb_rx_queues) {
5237 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
5241 if (qinfo == NULL) {
5242 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u Rx queue %u info to NULL\n",
5247 if (dev->data->rx_queues == NULL ||
5248 dev->data->rx_queues[queue_id] == NULL) {
5250 "Rx queue %"PRIu16" of device with port_id=%"
5251 PRIu16" has not been setup\n",
5256 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
5257 RTE_ETHDEV_LOG(INFO,
5258 "Can't get hairpin Rx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
5263 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
5265 memset(qinfo, 0, sizeof(*qinfo));
5266 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
5267 qinfo->queue_state = dev->data->rx_queue_state[queue_id];
5273 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
5274 struct rte_eth_txq_info *qinfo)
5276 struct rte_eth_dev *dev;
5278 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5279 dev = &rte_eth_devices[port_id];
5281 if (queue_id >= dev->data->nb_tx_queues) {
5282 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
5286 if (qinfo == NULL) {
5287 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u Tx queue %u info to NULL\n",
5292 if (dev->data->tx_queues == NULL ||
5293 dev->data->tx_queues[queue_id] == NULL) {
5295 "Tx queue %"PRIu16" of device with port_id=%"
5296 PRIu16" has not been setup\n",
5301 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
5302 RTE_ETHDEV_LOG(INFO,
5303 "Can't get hairpin Tx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
5308 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
5310 memset(qinfo, 0, sizeof(*qinfo));
5311 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
5312 qinfo->queue_state = dev->data->tx_queue_state[queue_id];
5318 rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
5319 struct rte_eth_burst_mode *mode)
5321 struct rte_eth_dev *dev;
5323 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5324 dev = &rte_eth_devices[port_id];
5326 if (queue_id >= dev->data->nb_rx_queues) {
5327 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
5333 "Cannot get ethdev port %u Rx queue %u burst mode to NULL\n",
5338 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_burst_mode_get, -ENOTSUP);
5339 memset(mode, 0, sizeof(*mode));
5340 return eth_err(port_id,
5341 dev->dev_ops->rx_burst_mode_get(dev, queue_id, mode));
5345 rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
5346 struct rte_eth_burst_mode *mode)
5348 struct rte_eth_dev *dev;
5350 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5351 dev = &rte_eth_devices[port_id];
5353 if (queue_id >= dev->data->nb_tx_queues) {
5354 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
5360 "Cannot get ethdev port %u Tx queue %u burst mode to NULL\n",
5365 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_burst_mode_get, -ENOTSUP);
5366 memset(mode, 0, sizeof(*mode));
5367 return eth_err(port_id,
5368 dev->dev_ops->tx_burst_mode_get(dev, queue_id, mode));
5372 rte_eth_get_monitor_addr(uint16_t port_id, uint16_t queue_id,
5373 struct rte_power_monitor_cond *pmc)
5375 struct rte_eth_dev *dev;
5377 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5378 dev = &rte_eth_devices[port_id];
5380 if (queue_id >= dev->data->nb_rx_queues) {
5381 RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u\n", queue_id);
5387 "Cannot get ethdev port %u Rx queue %u power monitor condition to NULL\n",
5392 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_monitor_addr, -ENOTSUP);
5393 return eth_err(port_id,
5394 dev->dev_ops->get_monitor_addr(dev->data->rx_queues[queue_id], pmc));
5398 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
5399 struct rte_ether_addr *mc_addr_set,
5400 uint32_t nb_mc_addr)
5402 struct rte_eth_dev *dev;
5404 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5405 dev = &rte_eth_devices[port_id];
5407 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
5408 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
5409 mc_addr_set, nb_mc_addr));
5413 rte_eth_timesync_enable(uint16_t port_id)
5415 struct rte_eth_dev *dev;
5417 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5418 dev = &rte_eth_devices[port_id];
5420 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
5421 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
5425 rte_eth_timesync_disable(uint16_t port_id)
5427 struct rte_eth_dev *dev;
5429 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5430 dev = &rte_eth_devices[port_id];
5432 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
5433 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
5437 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
5440 struct rte_eth_dev *dev;
5442 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5443 dev = &rte_eth_devices[port_id];
5445 if (timestamp == NULL) {
5447 "Cannot read ethdev port %u Rx timestamp to NULL\n",
5452 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
5453 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
5454 (dev, timestamp, flags));
5458 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
5459 struct timespec *timestamp)
5461 struct rte_eth_dev *dev;
5463 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5464 dev = &rte_eth_devices[port_id];
5466 if (timestamp == NULL) {
5468 "Cannot read ethdev port %u Tx timestamp to NULL\n",
5473 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
5474 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
5479 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
5481 struct rte_eth_dev *dev;
5483 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5484 dev = &rte_eth_devices[port_id];
5486 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
5487 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev, delta));
5491 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
5493 struct rte_eth_dev *dev;
5495 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5496 dev = &rte_eth_devices[port_id];
5498 if (timestamp == NULL) {
5500 "Cannot read ethdev port %u timesync time to NULL\n",
5505 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
5506 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
5511 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
5513 struct rte_eth_dev *dev;
5515 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5516 dev = &rte_eth_devices[port_id];
5518 if (timestamp == NULL) {
5520 "Cannot write ethdev port %u timesync from NULL time\n",
5525 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
5526 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
5531 rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
5533 struct rte_eth_dev *dev;
5535 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5536 dev = &rte_eth_devices[port_id];
5538 if (clock == NULL) {
5539 RTE_ETHDEV_LOG(ERR, "Cannot read ethdev port %u clock to NULL\n",
5544 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->read_clock, -ENOTSUP);
5545 return eth_err(port_id, (*dev->dev_ops->read_clock)(dev, clock));
5549 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
5551 struct rte_eth_dev *dev;
5553 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5554 dev = &rte_eth_devices[port_id];
5558 "Cannot get ethdev port %u register info to NULL\n",
5563 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
5564 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
5568 rte_eth_dev_get_eeprom_length(uint16_t port_id)
5570 struct rte_eth_dev *dev;
5572 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5573 dev = &rte_eth_devices[port_id];
5575 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
5576 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
5580 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
5582 struct rte_eth_dev *dev;
5584 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5585 dev = &rte_eth_devices[port_id];
5589 "Cannot get ethdev port %u EEPROM info to NULL\n",
5594 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
5595 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
5599 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
5601 struct rte_eth_dev *dev;
5603 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5604 dev = &rte_eth_devices[port_id];
5608 "Cannot set ethdev port %u EEPROM from NULL info\n",
5613 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
5614 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
5618 rte_eth_dev_get_module_info(uint16_t port_id,
5619 struct rte_eth_dev_module_info *modinfo)
5621 struct rte_eth_dev *dev;
5623 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5624 dev = &rte_eth_devices[port_id];
5626 if (modinfo == NULL) {
5628 "Cannot get ethdev port %u EEPROM module info to NULL\n",
5633 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
5634 return (*dev->dev_ops->get_module_info)(dev, modinfo);
5638 rte_eth_dev_get_module_eeprom(uint16_t port_id,
5639 struct rte_dev_eeprom_info *info)
5641 struct rte_eth_dev *dev;
5643 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5644 dev = &rte_eth_devices[port_id];
5648 "Cannot get ethdev port %u module EEPROM info to NULL\n",
5653 if (info->data == NULL) {
5655 "Cannot get ethdev port %u module EEPROM data to NULL\n",
5660 if (info->length == 0) {
5662 "Cannot get ethdev port %u module EEPROM to data with zero size\n",
5667 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
5668 return (*dev->dev_ops->get_module_eeprom)(dev, info);
5672 rte_eth_dev_get_dcb_info(uint16_t port_id,
5673 struct rte_eth_dcb_info *dcb_info)
5675 struct rte_eth_dev *dev;
5677 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5678 dev = &rte_eth_devices[port_id];
5680 if (dcb_info == NULL) {
5682 "Cannot get ethdev port %u DCB info to NULL\n",
5687 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
5689 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
5690 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
5694 eth_dev_adjust_nb_desc(uint16_t *nb_desc,
5695 const struct rte_eth_desc_lim *desc_lim)
5697 if (desc_lim->nb_align != 0)
5698 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
5700 if (desc_lim->nb_max != 0)
5701 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
5703 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
5707 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
5708 uint16_t *nb_rx_desc,
5709 uint16_t *nb_tx_desc)
5711 struct rte_eth_dev_info dev_info;
5714 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5716 ret = rte_eth_dev_info_get(port_id, &dev_info);
5720 if (nb_rx_desc != NULL)
5721 eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
5723 if (nb_tx_desc != NULL)
5724 eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
5730 rte_eth_dev_hairpin_capability_get(uint16_t port_id,
5731 struct rte_eth_hairpin_cap *cap)
5733 struct rte_eth_dev *dev;
5735 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5736 dev = &rte_eth_devices[port_id];
5740 "Cannot get ethdev port %u hairpin capability to NULL\n",
5745 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_cap_get, -ENOTSUP);
5746 memset(cap, 0, sizeof(*cap));
5747 return eth_err(port_id, (*dev->dev_ops->hairpin_cap_get)(dev, cap));
5751 rte_eth_dev_is_rx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5753 if (dev->data->rx_queue_state[queue_id] == RTE_ETH_QUEUE_STATE_HAIRPIN)
5759 rte_eth_dev_is_tx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5761 if (dev->data->tx_queue_state[queue_id] == RTE_ETH_QUEUE_STATE_HAIRPIN)
5767 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
5769 struct rte_eth_dev *dev;
5771 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5772 dev = &rte_eth_devices[port_id];
5776 "Cannot test ethdev port %u mempool operation from NULL pool\n",
5781 if (*dev->dev_ops->pool_ops_supported == NULL)
5782 return 1; /* all pools are supported */
5784 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
5788 * A set of values to describe the possible states of a switch domain.
5790 enum rte_eth_switch_domain_state {
5791 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
5792 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
5796 * Array of switch domains available for allocation. Array is sized to
5797 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
5798 * ethdev ports in a single process.
5800 static struct rte_eth_dev_switch {
5801 enum rte_eth_switch_domain_state state;
5802 } eth_dev_switch_domains[RTE_MAX_ETHPORTS];
5805 rte_eth_switch_domain_alloc(uint16_t *domain_id)
5809 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
5811 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
5812 if (eth_dev_switch_domains[i].state ==
5813 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
5814 eth_dev_switch_domains[i].state =
5815 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
5825 rte_eth_switch_domain_free(uint16_t domain_id)
5827 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
5828 domain_id >= RTE_MAX_ETHPORTS)
5831 if (eth_dev_switch_domains[domain_id].state !=
5832 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
5835 eth_dev_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
5841 eth_dev_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
5844 struct rte_kvargs_pair *pair;
5847 arglist->str = strdup(str_in);
5848 if (arglist->str == NULL)
5851 letter = arglist->str;
5854 pair = &arglist->pairs[0];
5857 case 0: /* Initial */
5860 else if (*letter == '\0')
5867 case 1: /* Parsing key */
5868 if (*letter == '=') {
5870 pair->value = letter + 1;
5872 } else if (*letter == ',' || *letter == '\0')
5877 case 2: /* Parsing value */
5880 else if (*letter == ',') {
5883 pair = &arglist->pairs[arglist->count];
5885 } else if (*letter == '\0') {
5888 pair = &arglist->pairs[arglist->count];
5893 case 3: /* Parsing list */
5896 else if (*letter == '\0')
5905 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
5907 struct rte_kvargs args;
5908 struct rte_kvargs_pair *pair;
5912 memset(eth_da, 0, sizeof(*eth_da));
5914 result = eth_dev_devargs_tokenise(&args, dargs);
5918 for (i = 0; i < args.count; i++) {
5919 pair = &args.pairs[i];
5920 if (strcmp("representor", pair->key) == 0) {
5921 if (eth_da->type != RTE_ETH_REPRESENTOR_NONE) {
5922 RTE_LOG(ERR, EAL, "duplicated representor key: %s\n",
5927 result = rte_eth_devargs_parse_representor_ports(
5928 pair->value, eth_da);
5942 rte_eth_representor_id_get(uint16_t port_id,
5943 enum rte_eth_representor_type type,
5944 int controller, int pf, int representor_port,
5949 struct rte_eth_representor_info *info = NULL;
5952 if (type == RTE_ETH_REPRESENTOR_NONE)
5954 if (repr_id == NULL)
5957 /* Get PMD representor range info. */
5958 ret = rte_eth_representor_info_get(port_id, NULL);
5959 if (ret == -ENOTSUP && type == RTE_ETH_REPRESENTOR_VF &&
5960 controller == -1 && pf == -1) {
5961 /* Direct mapping for legacy VF representor. */
5962 *repr_id = representor_port;
5964 } else if (ret < 0) {
5968 size = sizeof(*info) + n * sizeof(info->ranges[0]);
5969 info = calloc(1, size);
5972 info->nb_ranges_alloc = n;
5973 ret = rte_eth_representor_info_get(port_id, info);
5977 /* Default controller and pf to caller. */
5978 if (controller == -1)
5979 controller = info->controller;
5983 /* Locate representor ID. */
5985 for (i = 0; i < info->nb_ranges; ++i) {
5986 if (info->ranges[i].type != type)
5988 if (info->ranges[i].controller != controller)
5990 if (info->ranges[i].id_end < info->ranges[i].id_base) {
5991 RTE_LOG(WARNING, EAL, "Port %hu invalid representor ID Range %u - %u, entry %d\n",
5992 port_id, info->ranges[i].id_base,
5993 info->ranges[i].id_end, i);
5997 count = info->ranges[i].id_end - info->ranges[i].id_base + 1;
5998 switch (info->ranges[i].type) {
5999 case RTE_ETH_REPRESENTOR_PF:
6000 if (pf < info->ranges[i].pf ||
6001 pf >= info->ranges[i].pf + count)
6003 *repr_id = info->ranges[i].id_base +
6004 (pf - info->ranges[i].pf);
6007 case RTE_ETH_REPRESENTOR_VF:
6008 if (info->ranges[i].pf != pf)
6010 if (representor_port < info->ranges[i].vf ||
6011 representor_port >= info->ranges[i].vf + count)
6013 *repr_id = info->ranges[i].id_base +
6014 (representor_port - info->ranges[i].vf);
6017 case RTE_ETH_REPRESENTOR_SF:
6018 if (info->ranges[i].pf != pf)
6020 if (representor_port < info->ranges[i].sf ||
6021 representor_port >= info->ranges[i].sf + count)
6023 *repr_id = info->ranges[i].id_base +
6024 (representor_port - info->ranges[i].sf);
6037 eth_dev_handle_port_list(const char *cmd __rte_unused,
6038 const char *params __rte_unused,
6039 struct rte_tel_data *d)
6043 rte_tel_data_start_array(d, RTE_TEL_INT_VAL);
6044 RTE_ETH_FOREACH_DEV(port_id)
6045 rte_tel_data_add_array_int(d, port_id);
6050 eth_dev_add_port_queue_stats(struct rte_tel_data *d, uint64_t *q_stats,
6051 const char *stat_name)
6054 struct rte_tel_data *q_data = rte_tel_data_alloc();
6055 rte_tel_data_start_array(q_data, RTE_TEL_U64_VAL);
6056 for (q = 0; q < RTE_ETHDEV_QUEUE_STAT_CNTRS; q++)
6057 rte_tel_data_add_array_u64(q_data, q_stats[q]);
6058 rte_tel_data_add_dict_container(d, stat_name, q_data, 0);
6061 #define ADD_DICT_STAT(stats, s) rte_tel_data_add_dict_u64(d, #s, stats.s)
6064 eth_dev_handle_port_stats(const char *cmd __rte_unused,
6066 struct rte_tel_data *d)
6068 struct rte_eth_stats stats;
6071 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
6074 port_id = atoi(params);
6075 if (!rte_eth_dev_is_valid_port(port_id))
6078 ret = rte_eth_stats_get(port_id, &stats);
6082 rte_tel_data_start_dict(d);
6083 ADD_DICT_STAT(stats, ipackets);
6084 ADD_DICT_STAT(stats, opackets);
6085 ADD_DICT_STAT(stats, ibytes);
6086 ADD_DICT_STAT(stats, obytes);
6087 ADD_DICT_STAT(stats, imissed);
6088 ADD_DICT_STAT(stats, ierrors);
6089 ADD_DICT_STAT(stats, oerrors);
6090 ADD_DICT_STAT(stats, rx_nombuf);
6091 eth_dev_add_port_queue_stats(d, stats.q_ipackets, "q_ipackets");
6092 eth_dev_add_port_queue_stats(d, stats.q_opackets, "q_opackets");
6093 eth_dev_add_port_queue_stats(d, stats.q_ibytes, "q_ibytes");
6094 eth_dev_add_port_queue_stats(d, stats.q_obytes, "q_obytes");
6095 eth_dev_add_port_queue_stats(d, stats.q_errors, "q_errors");
6101 eth_dev_handle_port_xstats(const char *cmd __rte_unused,
6103 struct rte_tel_data *d)
6105 struct rte_eth_xstat *eth_xstats;
6106 struct rte_eth_xstat_name *xstat_names;
6107 int port_id, num_xstats;
6111 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
6114 port_id = strtoul(params, &end_param, 0);
6115 if (*end_param != '\0')
6116 RTE_ETHDEV_LOG(NOTICE,
6117 "Extra parameters passed to ethdev telemetry command, ignoring");
6118 if (!rte_eth_dev_is_valid_port(port_id))
6121 num_xstats = rte_eth_xstats_get(port_id, NULL, 0);
6125 /* use one malloc for both names and stats */
6126 eth_xstats = malloc((sizeof(struct rte_eth_xstat) +
6127 sizeof(struct rte_eth_xstat_name)) * num_xstats);
6128 if (eth_xstats == NULL)
6130 xstat_names = (void *)ð_xstats[num_xstats];
6132 ret = rte_eth_xstats_get_names(port_id, xstat_names, num_xstats);
6133 if (ret < 0 || ret > num_xstats) {
6138 ret = rte_eth_xstats_get(port_id, eth_xstats, num_xstats);
6139 if (ret < 0 || ret > num_xstats) {
6144 rte_tel_data_start_dict(d);
6145 for (i = 0; i < num_xstats; i++)
6146 rte_tel_data_add_dict_u64(d, xstat_names[i].name,
6147 eth_xstats[i].value);
6152 eth_dev_handle_port_link_status(const char *cmd __rte_unused,
6154 struct rte_tel_data *d)
6156 static const char *status_str = "status";
6158 struct rte_eth_link link;
6161 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
6164 port_id = strtoul(params, &end_param, 0);
6165 if (*end_param != '\0')
6166 RTE_ETHDEV_LOG(NOTICE,
6167 "Extra parameters passed to ethdev telemetry command, ignoring");
6168 if (!rte_eth_dev_is_valid_port(port_id))
6171 ret = rte_eth_link_get_nowait(port_id, &link);
6175 rte_tel_data_start_dict(d);
6176 if (!link.link_status) {
6177 rte_tel_data_add_dict_string(d, status_str, "DOWN");
6180 rte_tel_data_add_dict_string(d, status_str, "UP");
6181 rte_tel_data_add_dict_u64(d, "speed", link.link_speed);
6182 rte_tel_data_add_dict_string(d, "duplex",
6183 (link.link_duplex == ETH_LINK_FULL_DUPLEX) ?
6184 "full-duplex" : "half-duplex");
6189 rte_eth_hairpin_queue_peer_update(uint16_t peer_port, uint16_t peer_queue,
6190 struct rte_hairpin_peer_info *cur_info,
6191 struct rte_hairpin_peer_info *peer_info,
6194 struct rte_eth_dev *dev;
6196 /* Current queue information is not mandatory. */
6197 if (peer_info == NULL)
6200 /* No need to check the validity again. */
6201 dev = &rte_eth_devices[peer_port];
6202 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_queue_peer_update,
6205 return (*dev->dev_ops->hairpin_queue_peer_update)(dev, peer_queue,
6206 cur_info, peer_info, direction);
6210 rte_eth_hairpin_queue_peer_bind(uint16_t cur_port, uint16_t cur_queue,
6211 struct rte_hairpin_peer_info *peer_info,
6214 struct rte_eth_dev *dev;
6216 if (peer_info == NULL)
6219 /* No need to check the validity again. */
6220 dev = &rte_eth_devices[cur_port];
6221 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_queue_peer_bind,
6224 return (*dev->dev_ops->hairpin_queue_peer_bind)(dev, cur_queue,
6225 peer_info, direction);
6229 rte_eth_hairpin_queue_peer_unbind(uint16_t cur_port, uint16_t cur_queue,
6232 struct rte_eth_dev *dev;
6234 /* No need to check the validity again. */
6235 dev = &rte_eth_devices[cur_port];
6236 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_queue_peer_unbind,
6239 return (*dev->dev_ops->hairpin_queue_peer_unbind)(dev, cur_queue,
6244 rte_eth_representor_info_get(uint16_t port_id,
6245 struct rte_eth_representor_info *info)
6247 struct rte_eth_dev *dev;
6249 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
6250 dev = &rte_eth_devices[port_id];
6252 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->representor_info_get, -ENOTSUP);
6253 return eth_err(port_id, (*dev->dev_ops->representor_info_get)(dev, info));
6257 rte_eth_rx_metadata_negotiate(uint16_t port_id, uint64_t *features)
6259 struct rte_eth_dev *dev;
6261 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
6262 dev = &rte_eth_devices[port_id];
6264 if (dev->data->dev_configured != 0) {
6266 "The port (id=%"PRIu16") is already configured\n",
6271 if (features == NULL) {
6272 RTE_ETHDEV_LOG(ERR, "Invalid features (NULL)\n");
6276 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_metadata_negotiate, -ENOTSUP);
6277 return eth_err(port_id,
6278 (*dev->dev_ops->rx_metadata_negotiate)(dev, features));
6281 RTE_LOG_REGISTER_DEFAULT(rte_eth_dev_logtype, INFO);
6283 RTE_INIT(ethdev_init_telemetry)
6285 rte_telemetry_register_cmd("/ethdev/list", eth_dev_handle_port_list,
6286 "Returns list of available ethdev ports. Takes no parameters");
6287 rte_telemetry_register_cmd("/ethdev/stats", eth_dev_handle_port_stats,
6288 "Returns the common stats for a port. Parameters: int port_id");
6289 rte_telemetry_register_cmd("/ethdev/xstats", eth_dev_handle_port_xstats,
6290 "Returns the extended stats for a port. Parameters: int port_id");
6291 rte_telemetry_register_cmd("/ethdev/link_status",
6292 eth_dev_handle_port_link_status,
6293 "Returns the link status for a port. Parameters: int port_id");