1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
12 #include <sys/queue.h>
14 #include <rte_byteorder.h>
16 #include <rte_debug.h>
17 #include <rte_interrupts.h>
18 #include <rte_memory.h>
19 #include <rte_memcpy.h>
20 #include <rte_memzone.h>
21 #include <rte_launch.h>
23 #include <rte_per_lcore.h>
24 #include <rte_lcore.h>
25 #include <rte_branch_prediction.h>
26 #include <rte_common.h>
27 #include <rte_mempool.h>
28 #include <rte_malloc.h>
30 #include <rte_errno.h>
31 #include <rte_spinlock.h>
32 #include <rte_string_fns.h>
33 #include <rte_kvargs.h>
34 #include <rte_class.h>
35 #include <rte_ether.h>
36 #include <rte_telemetry.h>
38 #include "rte_ethdev_trace.h"
39 #include "rte_ethdev.h"
40 #include "ethdev_driver.h"
41 #include "ethdev_profile.h"
42 #include "ethdev_private.h"
44 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
45 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
47 /* spinlock for eth device callbacks */
48 static rte_spinlock_t eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
50 /* spinlock for add/remove rx callbacks */
51 static rte_spinlock_t eth_dev_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
53 /* spinlock for add/remove tx callbacks */
54 static rte_spinlock_t eth_dev_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
56 /* spinlock for shared data allocation */
57 static rte_spinlock_t eth_dev_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
59 /* store statistics names and its offset in stats structure */
60 struct rte_eth_xstats_name_off {
61 char name[RTE_ETH_XSTATS_NAME_SIZE];
65 /* Shared memory between primary and secondary processes. */
67 uint64_t next_owner_id;
68 rte_spinlock_t ownership_lock;
69 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
70 } *eth_dev_shared_data;
72 static const struct rte_eth_xstats_name_off eth_dev_stats_strings[] = {
73 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
74 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
75 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
76 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
77 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
78 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
79 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
80 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
84 #define RTE_NB_STATS RTE_DIM(eth_dev_stats_strings)
86 static const struct rte_eth_xstats_name_off eth_dev_rxq_stats_strings[] = {
87 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
88 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
89 {"errors", offsetof(struct rte_eth_stats, q_errors)},
92 #define RTE_NB_RXQ_STATS RTE_DIM(eth_dev_rxq_stats_strings)
94 static const struct rte_eth_xstats_name_off eth_dev_txq_stats_strings[] = {
95 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
96 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
98 #define RTE_NB_TXQ_STATS RTE_DIM(eth_dev_txq_stats_strings)
100 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
101 { DEV_RX_OFFLOAD_##_name, #_name }
103 #define RTE_ETH_RX_OFFLOAD_BIT2STR(_name) \
104 { RTE_ETH_RX_OFFLOAD_##_name, #_name }
106 static const struct {
109 } eth_dev_rx_offload_names[] = {
110 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
111 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
112 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
113 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
114 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
115 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
116 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
118 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
119 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
120 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
121 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
122 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
123 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
124 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
125 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
126 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
127 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
128 RTE_RX_OFFLOAD_BIT2STR(RSS_HASH),
129 RTE_ETH_RX_OFFLOAD_BIT2STR(BUFFER_SPLIT),
132 #undef RTE_RX_OFFLOAD_BIT2STR
133 #undef RTE_ETH_RX_OFFLOAD_BIT2STR
135 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
136 { DEV_TX_OFFLOAD_##_name, #_name }
138 static const struct {
141 } eth_dev_tx_offload_names[] = {
142 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
143 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
144 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
148 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
150 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
151 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
152 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
156 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
157 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
158 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
159 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
160 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
161 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
162 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
163 RTE_TX_OFFLOAD_BIT2STR(SEND_ON_TIMESTAMP),
166 #undef RTE_TX_OFFLOAD_BIT2STR
169 * The user application callback description.
171 * It contains callback address to be registered by user application,
172 * the pointer to the parameters for callback, and the event type.
174 struct rte_eth_dev_callback {
175 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
176 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
177 void *cb_arg; /**< Parameter for callback */
178 void *ret_param; /**< Return parameter */
179 enum rte_eth_event_type event; /**< Interrupt event type */
180 uint32_t active; /**< Callback is executing */
189 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
192 struct rte_devargs devargs;
193 const char *bus_param_key;
194 char *bus_str = NULL;
195 char *cls_str = NULL;
199 RTE_ETHDEV_LOG(ERR, "Cannot initialize NULL iterator\n");
203 if (devargs_str == NULL) {
205 "Cannot initialize iterator from NULL device description string\n");
209 memset(iter, 0, sizeof(*iter));
210 memset(&devargs, 0, sizeof(devargs));
213 * The devargs string may use various syntaxes:
214 * - 0000:08:00.0,representor=[1-3]
215 * - pci:0000:06:00.0,representor=[0,5]
216 * - class=eth,mac=00:11:22:33:44:55
217 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
221 * Handle pure class filter (i.e. without any bus-level argument),
222 * from future new syntax.
223 * rte_devargs_parse() is not yet supporting the new syntax,
224 * that's why this simple case is temporarily parsed here.
226 #define iter_anybus_str "class=eth,"
227 if (strncmp(devargs_str, iter_anybus_str,
228 strlen(iter_anybus_str)) == 0) {
229 iter->cls_str = devargs_str + strlen(iter_anybus_str);
233 /* Split bus, device and parameters. */
234 ret = rte_devargs_parse(&devargs, devargs_str);
239 * Assume parameters of old syntax can match only at ethdev level.
240 * Extra parameters will be ignored, thanks to "+" prefix.
242 str_size = strlen(devargs.args) + 2;
243 cls_str = malloc(str_size);
244 if (cls_str == NULL) {
248 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
249 if (ret != str_size - 1) {
253 iter->cls_str = cls_str;
255 iter->bus = devargs.bus;
256 if (iter->bus->dev_iterate == NULL) {
261 /* Convert bus args to new syntax for use with new API dev_iterate. */
262 if ((strcmp(iter->bus->name, "vdev") == 0) ||
263 (strcmp(iter->bus->name, "fslmc") == 0) ||
264 (strcmp(iter->bus->name, "dpaa_bus") == 0)) {
265 bus_param_key = "name";
266 } else if (strcmp(iter->bus->name, "pci") == 0) {
267 bus_param_key = "addr";
272 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
273 bus_str = malloc(str_size);
274 if (bus_str == NULL) {
278 ret = snprintf(bus_str, str_size, "%s=%s",
279 bus_param_key, devargs.name);
280 if (ret != str_size - 1) {
284 iter->bus_str = bus_str;
287 iter->cls = rte_class_find_by_name("eth");
288 rte_devargs_reset(&devargs);
293 RTE_ETHDEV_LOG(ERR, "Bus %s does not support iterating.\n",
295 rte_devargs_reset(&devargs);
302 rte_eth_iterator_next(struct rte_dev_iterator *iter)
306 "Cannot get next device from NULL iterator\n");
307 return RTE_MAX_ETHPORTS;
310 if (iter->cls == NULL) /* invalid ethdev iterator */
311 return RTE_MAX_ETHPORTS;
313 do { /* loop to try all matching rte_device */
314 /* If not pure ethdev filter and */
315 if (iter->bus != NULL &&
316 /* not in middle of rte_eth_dev iteration, */
317 iter->class_device == NULL) {
318 /* get next rte_device to try. */
319 iter->device = iter->bus->dev_iterate(
320 iter->device, iter->bus_str, iter);
321 if (iter->device == NULL)
322 break; /* no more rte_device candidate */
324 /* A device is matching bus part, need to check ethdev part. */
325 iter->class_device = iter->cls->dev_iterate(
326 iter->class_device, iter->cls_str, iter);
327 if (iter->class_device != NULL)
328 return eth_dev_to_id(iter->class_device); /* match */
329 } while (iter->bus != NULL); /* need to try next rte_device */
331 /* No more ethdev port to iterate. */
332 rte_eth_iterator_cleanup(iter);
333 return RTE_MAX_ETHPORTS;
337 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
340 RTE_ETHDEV_LOG(ERR, "Cannot do clean up from NULL iterator\n");
344 if (iter->bus_str == NULL)
345 return; /* nothing to free in pure class filter */
346 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
347 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
348 memset(iter, 0, sizeof(*iter));
352 rte_eth_find_next(uint16_t port_id)
354 while (port_id < RTE_MAX_ETHPORTS &&
355 rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED)
358 if (port_id >= RTE_MAX_ETHPORTS)
359 return RTE_MAX_ETHPORTS;
365 * Macro to iterate over all valid ports for internal usage.
366 * Note: RTE_ETH_FOREACH_DEV is different because filtering owned ports.
368 #define RTE_ETH_FOREACH_VALID_DEV(port_id) \
369 for (port_id = rte_eth_find_next(0); \
370 port_id < RTE_MAX_ETHPORTS; \
371 port_id = rte_eth_find_next(port_id + 1))
374 rte_eth_find_next_of(uint16_t port_id, const struct rte_device *parent)
376 port_id = rte_eth_find_next(port_id);
377 while (port_id < RTE_MAX_ETHPORTS &&
378 rte_eth_devices[port_id].device != parent)
379 port_id = rte_eth_find_next(port_id + 1);
385 rte_eth_find_next_sibling(uint16_t port_id, uint16_t ref_port_id)
387 RTE_ETH_VALID_PORTID_OR_ERR_RET(ref_port_id, RTE_MAX_ETHPORTS);
388 return rte_eth_find_next_of(port_id,
389 rte_eth_devices[ref_port_id].device);
393 eth_dev_shared_data_prepare(void)
395 const unsigned flags = 0;
396 const struct rte_memzone *mz;
398 rte_spinlock_lock(ð_dev_shared_data_lock);
400 if (eth_dev_shared_data == NULL) {
401 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
402 /* Allocate port data and ownership shared memory. */
403 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
404 sizeof(*eth_dev_shared_data),
405 rte_socket_id(), flags);
407 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
409 rte_panic("Cannot allocate ethdev shared data\n");
411 eth_dev_shared_data = mz->addr;
412 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
413 eth_dev_shared_data->next_owner_id =
414 RTE_ETH_DEV_NO_OWNER + 1;
415 rte_spinlock_init(ð_dev_shared_data->ownership_lock);
416 memset(eth_dev_shared_data->data, 0,
417 sizeof(eth_dev_shared_data->data));
421 rte_spinlock_unlock(ð_dev_shared_data_lock);
425 eth_dev_is_allocated(const struct rte_eth_dev *ethdev)
427 return ethdev->data->name[0] != '\0';
430 static struct rte_eth_dev *
431 eth_dev_allocated(const char *name)
435 RTE_BUILD_BUG_ON(RTE_MAX_ETHPORTS >= UINT16_MAX);
437 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
438 if (rte_eth_devices[i].data != NULL &&
439 strcmp(rte_eth_devices[i].data->name, name) == 0)
440 return &rte_eth_devices[i];
446 rte_eth_dev_allocated(const char *name)
448 struct rte_eth_dev *ethdev;
450 eth_dev_shared_data_prepare();
452 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
454 ethdev = eth_dev_allocated(name);
456 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
462 eth_dev_find_free_port(void)
466 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
467 /* Using shared name field to find a free port. */
468 if (eth_dev_shared_data->data[i].name[0] == '\0') {
469 RTE_ASSERT(rte_eth_devices[i].state ==
474 return RTE_MAX_ETHPORTS;
477 static struct rte_eth_dev *
478 eth_dev_get(uint16_t port_id)
480 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
482 eth_dev->data = ð_dev_shared_data->data[port_id];
488 rte_eth_dev_allocate(const char *name)
491 struct rte_eth_dev *eth_dev = NULL;
494 name_len = strnlen(name, RTE_ETH_NAME_MAX_LEN);
496 RTE_ETHDEV_LOG(ERR, "Zero length Ethernet device name\n");
500 if (name_len >= RTE_ETH_NAME_MAX_LEN) {
501 RTE_ETHDEV_LOG(ERR, "Ethernet device name is too long\n");
505 eth_dev_shared_data_prepare();
507 /* Synchronize port creation between primary and secondary threads. */
508 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
510 if (eth_dev_allocated(name) != NULL) {
512 "Ethernet device with name %s already allocated\n",
517 port_id = eth_dev_find_free_port();
518 if (port_id == RTE_MAX_ETHPORTS) {
520 "Reached maximum number of Ethernet ports\n");
524 eth_dev = eth_dev_get(port_id);
525 strlcpy(eth_dev->data->name, name, sizeof(eth_dev->data->name));
526 eth_dev->data->port_id = port_id;
527 eth_dev->data->mtu = RTE_ETHER_MTU;
528 pthread_mutex_init(ð_dev->data->flow_ops_mutex, NULL);
531 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
537 * Attach to a port already registered by the primary process, which
538 * makes sure that the same device would have the same port id both
539 * in the primary and secondary process.
542 rte_eth_dev_attach_secondary(const char *name)
545 struct rte_eth_dev *eth_dev = NULL;
547 eth_dev_shared_data_prepare();
549 /* Synchronize port attachment to primary port creation and release. */
550 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
552 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
553 if (strcmp(eth_dev_shared_data->data[i].name, name) == 0)
556 if (i == RTE_MAX_ETHPORTS) {
558 "Device %s is not driven by the primary process\n",
561 eth_dev = eth_dev_get(i);
562 RTE_ASSERT(eth_dev->data->port_id == i);
565 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
570 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
575 eth_dev_shared_data_prepare();
577 if (eth_dev->state != RTE_ETH_DEV_UNUSED)
578 rte_eth_dev_callback_process(eth_dev,
579 RTE_ETH_EVENT_DESTROY, NULL);
581 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
583 eth_dev->state = RTE_ETH_DEV_UNUSED;
584 eth_dev->device = NULL;
585 eth_dev->process_private = NULL;
586 eth_dev->intr_handle = NULL;
587 eth_dev->rx_pkt_burst = NULL;
588 eth_dev->tx_pkt_burst = NULL;
589 eth_dev->tx_pkt_prepare = NULL;
590 eth_dev->rx_queue_count = NULL;
591 eth_dev->rx_descriptor_done = NULL;
592 eth_dev->rx_descriptor_status = NULL;
593 eth_dev->tx_descriptor_status = NULL;
594 eth_dev->dev_ops = NULL;
596 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
597 rte_free(eth_dev->data->rx_queues);
598 rte_free(eth_dev->data->tx_queues);
599 rte_free(eth_dev->data->mac_addrs);
600 rte_free(eth_dev->data->hash_mac_addrs);
601 rte_free(eth_dev->data->dev_private);
602 pthread_mutex_destroy(ð_dev->data->flow_ops_mutex);
603 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
606 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
612 rte_eth_dev_is_valid_port(uint16_t port_id)
614 if (port_id >= RTE_MAX_ETHPORTS ||
615 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
622 eth_is_valid_owner_id(uint64_t owner_id)
624 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
625 eth_dev_shared_data->next_owner_id <= owner_id)
631 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
633 port_id = rte_eth_find_next(port_id);
634 while (port_id < RTE_MAX_ETHPORTS &&
635 rte_eth_devices[port_id].data->owner.id != owner_id)
636 port_id = rte_eth_find_next(port_id + 1);
642 rte_eth_dev_owner_new(uint64_t *owner_id)
644 if (owner_id == NULL) {
645 RTE_ETHDEV_LOG(ERR, "Cannot get new owner ID to NULL\n");
649 eth_dev_shared_data_prepare();
651 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
653 *owner_id = eth_dev_shared_data->next_owner_id++;
655 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
660 eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
661 const struct rte_eth_dev_owner *new_owner)
663 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
664 struct rte_eth_dev_owner *port_owner;
666 if (port_id >= RTE_MAX_ETHPORTS || !eth_dev_is_allocated(ethdev)) {
667 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
672 if (new_owner == NULL) {
674 "Cannot set ethdev port %u owner from NULL owner\n",
679 if (!eth_is_valid_owner_id(new_owner->id) &&
680 !eth_is_valid_owner_id(old_owner_id)) {
682 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
683 old_owner_id, new_owner->id);
687 port_owner = &rte_eth_devices[port_id].data->owner;
688 if (port_owner->id != old_owner_id) {
690 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
691 port_id, port_owner->name, port_owner->id);
695 /* can not truncate (same structure) */
696 strlcpy(port_owner->name, new_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN);
698 port_owner->id = new_owner->id;
700 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
701 port_id, new_owner->name, new_owner->id);
707 rte_eth_dev_owner_set(const uint16_t port_id,
708 const struct rte_eth_dev_owner *owner)
712 eth_dev_shared_data_prepare();
714 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
716 ret = eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
718 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
723 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
725 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
726 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
729 eth_dev_shared_data_prepare();
731 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
733 ret = eth_dev_owner_set(port_id, owner_id, &new_owner);
735 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
740 rte_eth_dev_owner_delete(const uint64_t owner_id)
745 eth_dev_shared_data_prepare();
747 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
749 if (eth_is_valid_owner_id(owner_id)) {
750 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
751 if (rte_eth_devices[port_id].data->owner.id == owner_id)
752 memset(&rte_eth_devices[port_id].data->owner, 0,
753 sizeof(struct rte_eth_dev_owner));
754 RTE_ETHDEV_LOG(NOTICE,
755 "All port owners owned by %016"PRIx64" identifier have removed\n",
759 "Invalid owner id=%016"PRIx64"\n",
764 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
770 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
772 struct rte_eth_dev *ethdev;
774 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
775 ethdev = &rte_eth_devices[port_id];
777 if (!eth_dev_is_allocated(ethdev)) {
778 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
784 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u owner to NULL\n",
789 eth_dev_shared_data_prepare();
791 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
792 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
793 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
799 rte_eth_dev_socket_id(uint16_t port_id)
801 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
802 return rte_eth_devices[port_id].data->numa_node;
806 rte_eth_dev_get_sec_ctx(uint16_t port_id)
808 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
809 return rte_eth_devices[port_id].security_ctx;
813 rte_eth_dev_count_avail(void)
820 RTE_ETH_FOREACH_DEV(p)
827 rte_eth_dev_count_total(void)
829 uint16_t port, count = 0;
831 RTE_ETH_FOREACH_VALID_DEV(port)
838 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
842 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
845 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u name to NULL\n",
850 /* shouldn't check 'rte_eth_devices[i].data',
851 * because it might be overwritten by VDEV PMD */
852 tmp = eth_dev_shared_data->data[port_id].name;
858 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
863 RTE_ETHDEV_LOG(ERR, "Cannot get port ID from NULL name");
867 if (port_id == NULL) {
869 "Cannot get port ID to NULL for %s\n", name);
873 RTE_ETH_FOREACH_VALID_DEV(pid)
874 if (!strcmp(name, eth_dev_shared_data->data[pid].name)) {
883 eth_err(uint16_t port_id, int ret)
887 if (rte_eth_dev_is_removed(port_id))
893 eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
895 uint16_t old_nb_queues = dev->data->nb_rx_queues;
899 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
900 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
901 sizeof(dev->data->rx_queues[0]) * nb_queues,
902 RTE_CACHE_LINE_SIZE);
903 if (dev->data->rx_queues == NULL) {
904 dev->data->nb_rx_queues = 0;
907 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
908 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
910 rxq = dev->data->rx_queues;
912 for (i = nb_queues; i < old_nb_queues; i++)
913 (*dev->dev_ops->rx_queue_release)(rxq[i]);
914 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
915 RTE_CACHE_LINE_SIZE);
918 if (nb_queues > old_nb_queues) {
919 uint16_t new_qs = nb_queues - old_nb_queues;
921 memset(rxq + old_nb_queues, 0,
922 sizeof(rxq[0]) * new_qs);
925 dev->data->rx_queues = rxq;
927 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
928 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
930 rxq = dev->data->rx_queues;
932 for (i = nb_queues; i < old_nb_queues; i++)
933 (*dev->dev_ops->rx_queue_release)(rxq[i]);
935 rte_free(dev->data->rx_queues);
936 dev->data->rx_queues = NULL;
938 dev->data->nb_rx_queues = nb_queues;
943 eth_dev_validate_rx_queue(const struct rte_eth_dev *dev, uint16_t rx_queue_id)
947 if (rx_queue_id >= dev->data->nb_rx_queues) {
948 port_id = dev->data->port_id;
950 "Invalid Rx queue_id=%u of device with port_id=%u\n",
951 rx_queue_id, port_id);
955 if (dev->data->rx_queues[rx_queue_id] == NULL) {
956 port_id = dev->data->port_id;
958 "Queue %u of device with port_id=%u has not been setup\n",
959 rx_queue_id, port_id);
967 eth_dev_validate_tx_queue(const struct rte_eth_dev *dev, uint16_t tx_queue_id)
971 if (tx_queue_id >= dev->data->nb_tx_queues) {
972 port_id = dev->data->port_id;
974 "Invalid Tx queue_id=%u of device with port_id=%u\n",
975 tx_queue_id, port_id);
979 if (dev->data->tx_queues[tx_queue_id] == NULL) {
980 port_id = dev->data->port_id;
982 "Queue %u of device with port_id=%u has not been setup\n",
983 tx_queue_id, port_id);
991 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
993 struct rte_eth_dev *dev;
996 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
997 dev = &rte_eth_devices[port_id];
999 if (!dev->data->dev_started) {
1001 "Port %u must be started before start any queue\n",
1006 ret = eth_dev_validate_rx_queue(dev, rx_queue_id);
1010 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
1012 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
1013 RTE_ETHDEV_LOG(INFO,
1014 "Can't start Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1015 rx_queue_id, port_id);
1019 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
1020 RTE_ETHDEV_LOG(INFO,
1021 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
1022 rx_queue_id, port_id);
1026 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev, rx_queue_id));
1030 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
1032 struct rte_eth_dev *dev;
1035 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1036 dev = &rte_eth_devices[port_id];
1038 ret = eth_dev_validate_rx_queue(dev, rx_queue_id);
1042 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
1044 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
1045 RTE_ETHDEV_LOG(INFO,
1046 "Can't stop Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1047 rx_queue_id, port_id);
1051 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
1052 RTE_ETHDEV_LOG(INFO,
1053 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
1054 rx_queue_id, port_id);
1058 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
1062 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
1064 struct rte_eth_dev *dev;
1067 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1068 dev = &rte_eth_devices[port_id];
1070 if (!dev->data->dev_started) {
1072 "Port %u must be started before start any queue\n",
1077 ret = eth_dev_validate_tx_queue(dev, tx_queue_id);
1081 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
1083 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
1084 RTE_ETHDEV_LOG(INFO,
1085 "Can't start Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1086 tx_queue_id, port_id);
1090 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
1091 RTE_ETHDEV_LOG(INFO,
1092 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
1093 tx_queue_id, port_id);
1097 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
1101 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
1103 struct rte_eth_dev *dev;
1106 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1107 dev = &rte_eth_devices[port_id];
1109 ret = eth_dev_validate_tx_queue(dev, tx_queue_id);
1113 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
1115 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
1116 RTE_ETHDEV_LOG(INFO,
1117 "Can't stop Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1118 tx_queue_id, port_id);
1122 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
1123 RTE_ETHDEV_LOG(INFO,
1124 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
1125 tx_queue_id, port_id);
1129 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
1133 eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
1135 uint16_t old_nb_queues = dev->data->nb_tx_queues;
1139 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
1140 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
1141 sizeof(dev->data->tx_queues[0]) * nb_queues,
1142 RTE_CACHE_LINE_SIZE);
1143 if (dev->data->tx_queues == NULL) {
1144 dev->data->nb_tx_queues = 0;
1147 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
1148 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1150 txq = dev->data->tx_queues;
1152 for (i = nb_queues; i < old_nb_queues; i++)
1153 (*dev->dev_ops->tx_queue_release)(txq[i]);
1154 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
1155 RTE_CACHE_LINE_SIZE);
1158 if (nb_queues > old_nb_queues) {
1159 uint16_t new_qs = nb_queues - old_nb_queues;
1161 memset(txq + old_nb_queues, 0,
1162 sizeof(txq[0]) * new_qs);
1165 dev->data->tx_queues = txq;
1167 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1168 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1170 txq = dev->data->tx_queues;
1172 for (i = nb_queues; i < old_nb_queues; i++)
1173 (*dev->dev_ops->tx_queue_release)(txq[i]);
1175 rte_free(dev->data->tx_queues);
1176 dev->data->tx_queues = NULL;
1178 dev->data->nb_tx_queues = nb_queues;
1183 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1186 case ETH_SPEED_NUM_10M:
1187 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1188 case ETH_SPEED_NUM_100M:
1189 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1190 case ETH_SPEED_NUM_1G:
1191 return ETH_LINK_SPEED_1G;
1192 case ETH_SPEED_NUM_2_5G:
1193 return ETH_LINK_SPEED_2_5G;
1194 case ETH_SPEED_NUM_5G:
1195 return ETH_LINK_SPEED_5G;
1196 case ETH_SPEED_NUM_10G:
1197 return ETH_LINK_SPEED_10G;
1198 case ETH_SPEED_NUM_20G:
1199 return ETH_LINK_SPEED_20G;
1200 case ETH_SPEED_NUM_25G:
1201 return ETH_LINK_SPEED_25G;
1202 case ETH_SPEED_NUM_40G:
1203 return ETH_LINK_SPEED_40G;
1204 case ETH_SPEED_NUM_50G:
1205 return ETH_LINK_SPEED_50G;
1206 case ETH_SPEED_NUM_56G:
1207 return ETH_LINK_SPEED_56G;
1208 case ETH_SPEED_NUM_100G:
1209 return ETH_LINK_SPEED_100G;
1210 case ETH_SPEED_NUM_200G:
1211 return ETH_LINK_SPEED_200G;
1218 rte_eth_dev_rx_offload_name(uint64_t offload)
1220 const char *name = "UNKNOWN";
1223 for (i = 0; i < RTE_DIM(eth_dev_rx_offload_names); ++i) {
1224 if (offload == eth_dev_rx_offload_names[i].offload) {
1225 name = eth_dev_rx_offload_names[i].name;
1234 rte_eth_dev_tx_offload_name(uint64_t offload)
1236 const char *name = "UNKNOWN";
1239 for (i = 0; i < RTE_DIM(eth_dev_tx_offload_names); ++i) {
1240 if (offload == eth_dev_tx_offload_names[i].offload) {
1241 name = eth_dev_tx_offload_names[i].name;
1250 eth_dev_check_lro_pkt_size(uint16_t port_id, uint32_t config_size,
1251 uint32_t max_rx_pkt_len, uint32_t dev_info_size)
1255 if (dev_info_size == 0) {
1256 if (config_size != max_rx_pkt_len) {
1257 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size"
1258 " %u != %u is not allowed\n",
1259 port_id, config_size, max_rx_pkt_len);
1262 } else if (config_size > dev_info_size) {
1263 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1264 "> max allowed value %u\n", port_id, config_size,
1267 } else if (config_size < RTE_ETHER_MIN_LEN) {
1268 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1269 "< min allowed value %u\n", port_id, config_size,
1270 (unsigned int)RTE_ETHER_MIN_LEN);
1277 * Validate offloads that are requested through rte_eth_dev_configure against
1278 * the offloads successfully set by the ethernet device.
1281 * The port identifier of the Ethernet device.
1282 * @param req_offloads
1283 * The offloads that have been requested through `rte_eth_dev_configure`.
1284 * @param set_offloads
1285 * The offloads successfully set by the ethernet device.
1286 * @param offload_type
1287 * The offload type i.e. Rx/Tx string.
1288 * @param offload_name
1289 * The function that prints the offload name.
1291 * - (0) if validation successful.
1292 * - (-EINVAL) if requested offload has been silently disabled.
1296 eth_dev_validate_offloads(uint16_t port_id, uint64_t req_offloads,
1297 uint64_t set_offloads, const char *offload_type,
1298 const char *(*offload_name)(uint64_t))
1300 uint64_t offloads_diff = req_offloads ^ set_offloads;
1304 while (offloads_diff != 0) {
1305 /* Check if any offload is requested but not enabled. */
1306 offload = 1ULL << __builtin_ctzll(offloads_diff);
1307 if (offload & req_offloads) {
1309 "Port %u failed to enable %s offload %s\n",
1310 port_id, offload_type, offload_name(offload));
1314 /* Check if offload couldn't be disabled. */
1315 if (offload & set_offloads) {
1316 RTE_ETHDEV_LOG(DEBUG,
1317 "Port %u %s offload %s is not requested but enabled\n",
1318 port_id, offload_type, offload_name(offload));
1321 offloads_diff &= ~offload;
1328 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1329 const struct rte_eth_conf *dev_conf)
1331 struct rte_eth_dev *dev;
1332 struct rte_eth_dev_info dev_info;
1333 struct rte_eth_conf orig_conf;
1334 uint16_t overhead_len;
1339 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1340 dev = &rte_eth_devices[port_id];
1342 if (dev_conf == NULL) {
1344 "Cannot configure ethdev port %u from NULL config\n",
1349 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1351 if (dev->data->dev_started) {
1353 "Port %u must be stopped to allow configuration\n",
1359 * Ensure that "dev_configured" is always 0 each time prepare to do
1360 * dev_configure() to avoid any non-anticipated behaviour.
1361 * And set to 1 when dev_configure() is executed successfully.
1363 dev->data->dev_configured = 0;
1365 /* Store original config, as rollback required on failure */
1366 memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1369 * Copy the dev_conf parameter into the dev structure.
1370 * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1372 if (dev_conf != &dev->data->dev_conf)
1373 memcpy(&dev->data->dev_conf, dev_conf,
1374 sizeof(dev->data->dev_conf));
1376 /* Backup mtu for rollback */
1377 old_mtu = dev->data->mtu;
1379 ret = rte_eth_dev_info_get(port_id, &dev_info);
1383 /* Get the real Ethernet overhead length */
1384 if (dev_info.max_mtu != UINT16_MAX &&
1385 dev_info.max_rx_pktlen > dev_info.max_mtu)
1386 overhead_len = dev_info.max_rx_pktlen - dev_info.max_mtu;
1388 overhead_len = RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN;
1390 /* If number of queues specified by application for both Rx and Tx is
1391 * zero, use driver preferred values. This cannot be done individually
1392 * as it is valid for either Tx or Rx (but not both) to be zero.
1393 * If driver does not provide any preferred valued, fall back on
1396 if (nb_rx_q == 0 && nb_tx_q == 0) {
1397 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1399 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1400 nb_tx_q = dev_info.default_txportconf.nb_queues;
1402 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1405 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1407 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1408 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1413 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1415 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1416 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1422 * Check that the numbers of RX and TX queues are not greater
1423 * than the maximum number of RX and TX queues supported by the
1424 * configured device.
1426 if (nb_rx_q > dev_info.max_rx_queues) {
1427 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1428 port_id, nb_rx_q, dev_info.max_rx_queues);
1433 if (nb_tx_q > dev_info.max_tx_queues) {
1434 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1435 port_id, nb_tx_q, dev_info.max_tx_queues);
1440 /* Check that the device supports requested interrupts */
1441 if ((dev_conf->intr_conf.lsc == 1) &&
1442 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1443 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1444 dev->device->driver->name);
1448 if ((dev_conf->intr_conf.rmv == 1) &&
1449 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1450 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1451 dev->device->driver->name);
1457 * If jumbo frames are enabled, check that the maximum RX packet
1458 * length is supported by the configured device.
1460 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1461 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1463 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1464 port_id, dev_conf->rxmode.max_rx_pkt_len,
1465 dev_info.max_rx_pktlen);
1468 } else if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN) {
1470 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1471 port_id, dev_conf->rxmode.max_rx_pkt_len,
1472 (unsigned int)RTE_ETHER_MIN_LEN);
1477 /* Scale the MTU size to adapt max_rx_pkt_len */
1478 dev->data->mtu = dev->data->dev_conf.rxmode.max_rx_pkt_len -
1481 uint16_t pktlen = dev_conf->rxmode.max_rx_pkt_len;
1482 if (pktlen < RTE_ETHER_MIN_MTU + overhead_len ||
1483 pktlen > RTE_ETHER_MTU + overhead_len)
1484 /* Use default value */
1485 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1486 RTE_ETHER_MTU + overhead_len;
1490 * If LRO is enabled, check that the maximum aggregated packet
1491 * size is supported by the configured device.
1493 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
1494 if (dev_conf->rxmode.max_lro_pkt_size == 0)
1495 dev->data->dev_conf.rxmode.max_lro_pkt_size =
1496 dev->data->dev_conf.rxmode.max_rx_pkt_len;
1497 ret = eth_dev_check_lro_pkt_size(port_id,
1498 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1499 dev->data->dev_conf.rxmode.max_rx_pkt_len,
1500 dev_info.max_lro_pkt_size);
1505 /* Any requested offloading must be within its device capabilities */
1506 if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1507 dev_conf->rxmode.offloads) {
1509 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1510 "capabilities 0x%"PRIx64" in %s()\n",
1511 port_id, dev_conf->rxmode.offloads,
1512 dev_info.rx_offload_capa,
1517 if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1518 dev_conf->txmode.offloads) {
1520 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1521 "capabilities 0x%"PRIx64" in %s()\n",
1522 port_id, dev_conf->txmode.offloads,
1523 dev_info.tx_offload_capa,
1529 dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf =
1530 rte_eth_rss_hf_refine(dev_conf->rx_adv_conf.rss_conf.rss_hf);
1532 /* Check that device supports requested rss hash functions. */
1533 if ((dev_info.flow_type_rss_offloads |
1534 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1535 dev_info.flow_type_rss_offloads) {
1537 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1538 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1539 dev_info.flow_type_rss_offloads);
1544 /* Check if Rx RSS distribution is disabled but RSS hash is enabled. */
1545 if (((dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) == 0) &&
1546 (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_RSS_HASH)) {
1548 "Ethdev port_id=%u config invalid Rx mq_mode without RSS but %s offload is requested\n",
1550 rte_eth_dev_rx_offload_name(DEV_RX_OFFLOAD_RSS_HASH));
1556 * Setup new number of RX/TX queues and reconfigure device.
1558 diag = eth_dev_rx_queue_config(dev, nb_rx_q);
1561 "Port%u eth_dev_rx_queue_config = %d\n",
1567 diag = eth_dev_tx_queue_config(dev, nb_tx_q);
1570 "Port%u eth_dev_tx_queue_config = %d\n",
1572 eth_dev_rx_queue_config(dev, 0);
1577 diag = (*dev->dev_ops->dev_configure)(dev);
1579 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1581 ret = eth_err(port_id, diag);
1585 /* Initialize Rx profiling if enabled at compilation time. */
1586 diag = __rte_eth_dev_profile_init(port_id, dev);
1588 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1590 ret = eth_err(port_id, diag);
1594 /* Validate Rx offloads. */
1595 diag = eth_dev_validate_offloads(port_id,
1596 dev_conf->rxmode.offloads,
1597 dev->data->dev_conf.rxmode.offloads, "Rx",
1598 rte_eth_dev_rx_offload_name);
1604 /* Validate Tx offloads. */
1605 diag = eth_dev_validate_offloads(port_id,
1606 dev_conf->txmode.offloads,
1607 dev->data->dev_conf.txmode.offloads, "Tx",
1608 rte_eth_dev_tx_offload_name);
1614 dev->data->dev_configured = 1;
1615 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, 0);
1618 eth_dev_rx_queue_config(dev, 0);
1619 eth_dev_tx_queue_config(dev, 0);
1621 memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1622 if (old_mtu != dev->data->mtu)
1623 dev->data->mtu = old_mtu;
1625 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, ret);
1630 rte_eth_dev_internal_reset(struct rte_eth_dev *dev)
1632 if (dev->data->dev_started) {
1633 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1634 dev->data->port_id);
1638 eth_dev_rx_queue_config(dev, 0);
1639 eth_dev_tx_queue_config(dev, 0);
1641 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1645 eth_dev_mac_restore(struct rte_eth_dev *dev,
1646 struct rte_eth_dev_info *dev_info)
1648 struct rte_ether_addr *addr;
1653 /* replay MAC address configuration including default MAC */
1654 addr = &dev->data->mac_addrs[0];
1655 if (*dev->dev_ops->mac_addr_set != NULL)
1656 (*dev->dev_ops->mac_addr_set)(dev, addr);
1657 else if (*dev->dev_ops->mac_addr_add != NULL)
1658 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1660 if (*dev->dev_ops->mac_addr_add != NULL) {
1661 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1662 addr = &dev->data->mac_addrs[i];
1664 /* skip zero address */
1665 if (rte_is_zero_ether_addr(addr))
1669 pool_mask = dev->data->mac_pool_sel[i];
1672 if (pool_mask & 1ULL)
1673 (*dev->dev_ops->mac_addr_add)(dev,
1677 } while (pool_mask);
1683 eth_dev_config_restore(struct rte_eth_dev *dev,
1684 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1688 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1689 eth_dev_mac_restore(dev, dev_info);
1691 /* replay promiscuous configuration */
1693 * use callbacks directly since we don't need port_id check and
1694 * would like to bypass the same value set
1696 if (rte_eth_promiscuous_get(port_id) == 1 &&
1697 *dev->dev_ops->promiscuous_enable != NULL) {
1698 ret = eth_err(port_id,
1699 (*dev->dev_ops->promiscuous_enable)(dev));
1700 if (ret != 0 && ret != -ENOTSUP) {
1702 "Failed to enable promiscuous mode for device (port %u): %s\n",
1703 port_id, rte_strerror(-ret));
1706 } else if (rte_eth_promiscuous_get(port_id) == 0 &&
1707 *dev->dev_ops->promiscuous_disable != NULL) {
1708 ret = eth_err(port_id,
1709 (*dev->dev_ops->promiscuous_disable)(dev));
1710 if (ret != 0 && ret != -ENOTSUP) {
1712 "Failed to disable promiscuous mode for device (port %u): %s\n",
1713 port_id, rte_strerror(-ret));
1718 /* replay all multicast configuration */
1720 * use callbacks directly since we don't need port_id check and
1721 * would like to bypass the same value set
1723 if (rte_eth_allmulticast_get(port_id) == 1 &&
1724 *dev->dev_ops->allmulticast_enable != NULL) {
1725 ret = eth_err(port_id,
1726 (*dev->dev_ops->allmulticast_enable)(dev));
1727 if (ret != 0 && ret != -ENOTSUP) {
1729 "Failed to enable allmulticast mode for device (port %u): %s\n",
1730 port_id, rte_strerror(-ret));
1733 } else if (rte_eth_allmulticast_get(port_id) == 0 &&
1734 *dev->dev_ops->allmulticast_disable != NULL) {
1735 ret = eth_err(port_id,
1736 (*dev->dev_ops->allmulticast_disable)(dev));
1737 if (ret != 0 && ret != -ENOTSUP) {
1739 "Failed to disable allmulticast mode for device (port %u): %s\n",
1740 port_id, rte_strerror(-ret));
1749 rte_eth_dev_start(uint16_t port_id)
1751 struct rte_eth_dev *dev;
1752 struct rte_eth_dev_info dev_info;
1756 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1757 dev = &rte_eth_devices[port_id];
1759 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1761 if (dev->data->dev_configured == 0) {
1762 RTE_ETHDEV_LOG(INFO,
1763 "Device with port_id=%"PRIu16" is not configured.\n",
1768 if (dev->data->dev_started != 0) {
1769 RTE_ETHDEV_LOG(INFO,
1770 "Device with port_id=%"PRIu16" already started\n",
1775 ret = rte_eth_dev_info_get(port_id, &dev_info);
1779 /* Lets restore MAC now if device does not support live change */
1780 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1781 eth_dev_mac_restore(dev, &dev_info);
1783 diag = (*dev->dev_ops->dev_start)(dev);
1785 dev->data->dev_started = 1;
1787 return eth_err(port_id, diag);
1789 ret = eth_dev_config_restore(dev, &dev_info, port_id);
1792 "Error during restoring configuration for device (port %u): %s\n",
1793 port_id, rte_strerror(-ret));
1794 ret_stop = rte_eth_dev_stop(port_id);
1795 if (ret_stop != 0) {
1797 "Failed to stop device (port %u): %s\n",
1798 port_id, rte_strerror(-ret_stop));
1804 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1805 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1806 (*dev->dev_ops->link_update)(dev, 0);
1809 rte_ethdev_trace_start(port_id);
1814 rte_eth_dev_stop(uint16_t port_id)
1816 struct rte_eth_dev *dev;
1819 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1820 dev = &rte_eth_devices[port_id];
1822 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_stop, -ENOTSUP);
1824 if (dev->data->dev_started == 0) {
1825 RTE_ETHDEV_LOG(INFO,
1826 "Device with port_id=%"PRIu16" already stopped\n",
1831 dev->data->dev_started = 0;
1832 ret = (*dev->dev_ops->dev_stop)(dev);
1833 rte_ethdev_trace_stop(port_id, ret);
1839 rte_eth_dev_set_link_up(uint16_t port_id)
1841 struct rte_eth_dev *dev;
1843 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1844 dev = &rte_eth_devices[port_id];
1846 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1847 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1851 rte_eth_dev_set_link_down(uint16_t port_id)
1853 struct rte_eth_dev *dev;
1855 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1856 dev = &rte_eth_devices[port_id];
1858 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1859 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1863 rte_eth_dev_close(uint16_t port_id)
1865 struct rte_eth_dev *dev;
1866 int firsterr, binerr;
1867 int *lasterr = &firsterr;
1869 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1870 dev = &rte_eth_devices[port_id];
1872 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_close, -ENOTSUP);
1873 *lasterr = (*dev->dev_ops->dev_close)(dev);
1877 rte_ethdev_trace_close(port_id);
1878 *lasterr = rte_eth_dev_release_port(dev);
1884 rte_eth_dev_reset(uint16_t port_id)
1886 struct rte_eth_dev *dev;
1889 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1890 dev = &rte_eth_devices[port_id];
1892 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1894 ret = rte_eth_dev_stop(port_id);
1897 "Failed to stop device (port %u) before reset: %s - ignore\n",
1898 port_id, rte_strerror(-ret));
1900 ret = dev->dev_ops->dev_reset(dev);
1902 return eth_err(port_id, ret);
1906 rte_eth_dev_is_removed(uint16_t port_id)
1908 struct rte_eth_dev *dev;
1911 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1912 dev = &rte_eth_devices[port_id];
1914 if (dev->state == RTE_ETH_DEV_REMOVED)
1917 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1919 ret = dev->dev_ops->is_removed(dev);
1921 /* Device is physically removed. */
1922 dev->state = RTE_ETH_DEV_REMOVED;
1928 rte_eth_rx_queue_check_split(const struct rte_eth_rxseg_split *rx_seg,
1929 uint16_t n_seg, uint32_t *mbp_buf_size,
1930 const struct rte_eth_dev_info *dev_info)
1932 const struct rte_eth_rxseg_capa *seg_capa = &dev_info->rx_seg_capa;
1933 struct rte_mempool *mp_first;
1934 uint32_t offset_mask;
1937 if (n_seg > seg_capa->max_nseg) {
1939 "Requested Rx segments %u exceed supported %u\n",
1940 n_seg, seg_capa->max_nseg);
1944 * Check the sizes and offsets against buffer sizes
1945 * for each segment specified in extended configuration.
1947 mp_first = rx_seg[0].mp;
1948 offset_mask = (1u << seg_capa->offset_align_log2) - 1;
1949 for (seg_idx = 0; seg_idx < n_seg; seg_idx++) {
1950 struct rte_mempool *mpl = rx_seg[seg_idx].mp;
1951 uint32_t length = rx_seg[seg_idx].length;
1952 uint32_t offset = rx_seg[seg_idx].offset;
1955 RTE_ETHDEV_LOG(ERR, "null mempool pointer\n");
1958 if (seg_idx != 0 && mp_first != mpl &&
1959 seg_capa->multi_pools == 0) {
1960 RTE_ETHDEV_LOG(ERR, "Receiving to multiple pools is not supported\n");
1964 if (seg_capa->offset_allowed == 0) {
1965 RTE_ETHDEV_LOG(ERR, "Rx segmentation with offset is not supported\n");
1968 if (offset & offset_mask) {
1969 RTE_ETHDEV_LOG(ERR, "Rx segmentation invalid offset alignment %u, %u\n",
1971 seg_capa->offset_align_log2);
1975 if (mpl->private_data_size <
1976 sizeof(struct rte_pktmbuf_pool_private)) {
1978 "%s private_data_size %u < %u\n",
1979 mpl->name, mpl->private_data_size,
1980 (unsigned int)sizeof
1981 (struct rte_pktmbuf_pool_private));
1984 offset += seg_idx != 0 ? 0 : RTE_PKTMBUF_HEADROOM;
1985 *mbp_buf_size = rte_pktmbuf_data_room_size(mpl);
1986 length = length != 0 ? length : *mbp_buf_size;
1987 if (*mbp_buf_size < length + offset) {
1989 "%s mbuf_data_room_size %u < %u (segment length=%u + segment offset=%u)\n",
1990 mpl->name, *mbp_buf_size,
1991 length + offset, length, offset);
1999 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
2000 uint16_t nb_rx_desc, unsigned int socket_id,
2001 const struct rte_eth_rxconf *rx_conf,
2002 struct rte_mempool *mp)
2005 uint32_t mbp_buf_size;
2006 struct rte_eth_dev *dev;
2007 struct rte_eth_dev_info dev_info;
2008 struct rte_eth_rxconf local_conf;
2011 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2012 dev = &rte_eth_devices[port_id];
2014 if (rx_queue_id >= dev->data->nb_rx_queues) {
2015 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
2019 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
2021 ret = rte_eth_dev_info_get(port_id, &dev_info);
2026 /* Single pool configuration check. */
2027 if (rx_conf != NULL && rx_conf->rx_nseg != 0) {
2029 "Ambiguous segment configuration\n");
2033 * Check the size of the mbuf data buffer, this value
2034 * must be provided in the private data of the memory pool.
2035 * First check that the memory pool(s) has a valid private data.
2037 if (mp->private_data_size <
2038 sizeof(struct rte_pktmbuf_pool_private)) {
2039 RTE_ETHDEV_LOG(ERR, "%s private_data_size %u < %u\n",
2040 mp->name, mp->private_data_size,
2042 sizeof(struct rte_pktmbuf_pool_private));
2045 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
2046 if (mbp_buf_size < dev_info.min_rx_bufsize +
2047 RTE_PKTMBUF_HEADROOM) {
2049 "%s mbuf_data_room_size %u < %u (RTE_PKTMBUF_HEADROOM=%u + min_rx_bufsize(dev)=%u)\n",
2050 mp->name, mbp_buf_size,
2051 RTE_PKTMBUF_HEADROOM +
2052 dev_info.min_rx_bufsize,
2053 RTE_PKTMBUF_HEADROOM,
2054 dev_info.min_rx_bufsize);
2058 const struct rte_eth_rxseg_split *rx_seg;
2061 /* Extended multi-segment configuration check. */
2062 if (rx_conf == NULL || rx_conf->rx_seg == NULL || rx_conf->rx_nseg == 0) {
2064 "Memory pool is null and no extended configuration provided\n");
2068 rx_seg = (const struct rte_eth_rxseg_split *)rx_conf->rx_seg;
2069 n_seg = rx_conf->rx_nseg;
2071 if (rx_conf->offloads & RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT) {
2072 ret = rte_eth_rx_queue_check_split(rx_seg, n_seg,
2078 RTE_ETHDEV_LOG(ERR, "No Rx segmentation offload configured\n");
2083 /* Use default specified by driver, if nb_rx_desc is zero */
2084 if (nb_rx_desc == 0) {
2085 nb_rx_desc = dev_info.default_rxportconf.ring_size;
2086 /* If driver default is also zero, fall back on EAL default */
2087 if (nb_rx_desc == 0)
2088 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
2091 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
2092 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
2093 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
2096 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
2097 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
2098 dev_info.rx_desc_lim.nb_min,
2099 dev_info.rx_desc_lim.nb_align);
2103 if (dev->data->dev_started &&
2104 !(dev_info.dev_capa &
2105 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
2108 if (dev->data->dev_started &&
2109 (dev->data->rx_queue_state[rx_queue_id] !=
2110 RTE_ETH_QUEUE_STATE_STOPPED))
2113 rxq = dev->data->rx_queues;
2114 if (rxq[rx_queue_id]) {
2115 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
2117 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
2118 rxq[rx_queue_id] = NULL;
2121 if (rx_conf == NULL)
2122 rx_conf = &dev_info.default_rxconf;
2124 local_conf = *rx_conf;
2127 * If an offloading has already been enabled in
2128 * rte_eth_dev_configure(), it has been enabled on all queues,
2129 * so there is no need to enable it in this queue again.
2130 * The local_conf.offloads input to underlying PMD only carries
2131 * those offloadings which are only enabled on this queue and
2132 * not enabled on all queues.
2134 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
2137 * New added offloadings for this queue are those not enabled in
2138 * rte_eth_dev_configure() and they must be per-queue type.
2139 * A pure per-port offloading can't be enabled on a queue while
2140 * disabled on another queue. A pure per-port offloading can't
2141 * be enabled for any queue as new added one if it hasn't been
2142 * enabled in rte_eth_dev_configure().
2144 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
2145 local_conf.offloads) {
2147 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
2148 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
2149 port_id, rx_queue_id, local_conf.offloads,
2150 dev_info.rx_queue_offload_capa,
2156 * If LRO is enabled, check that the maximum aggregated packet
2157 * size is supported by the configured device.
2159 if (local_conf.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
2160 if (dev->data->dev_conf.rxmode.max_lro_pkt_size == 0)
2161 dev->data->dev_conf.rxmode.max_lro_pkt_size =
2162 dev->data->dev_conf.rxmode.max_rx_pkt_len;
2163 int ret = eth_dev_check_lro_pkt_size(port_id,
2164 dev->data->dev_conf.rxmode.max_lro_pkt_size,
2165 dev->data->dev_conf.rxmode.max_rx_pkt_len,
2166 dev_info.max_lro_pkt_size);
2171 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
2172 socket_id, &local_conf, mp);
2174 if (!dev->data->min_rx_buf_size ||
2175 dev->data->min_rx_buf_size > mbp_buf_size)
2176 dev->data->min_rx_buf_size = mbp_buf_size;
2179 rte_ethdev_trace_rxq_setup(port_id, rx_queue_id, nb_rx_desc, mp,
2181 return eth_err(port_id, ret);
2185 rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
2186 uint16_t nb_rx_desc,
2187 const struct rte_eth_hairpin_conf *conf)
2190 struct rte_eth_dev *dev;
2191 struct rte_eth_hairpin_cap cap;
2196 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2197 dev = &rte_eth_devices[port_id];
2199 if (rx_queue_id >= dev->data->nb_rx_queues) {
2200 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
2206 "Cannot setup ethdev port %u Rx hairpin queue from NULL config\n",
2211 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
2214 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_hairpin_queue_setup,
2216 /* if nb_rx_desc is zero use max number of desc from the driver. */
2217 if (nb_rx_desc == 0)
2218 nb_rx_desc = cap.max_nb_desc;
2219 if (nb_rx_desc > cap.max_nb_desc) {
2221 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu",
2222 nb_rx_desc, cap.max_nb_desc);
2225 if (conf->peer_count > cap.max_rx_2_tx) {
2227 "Invalid value for number of peers for Rx queue(=%u), should be: <= %hu",
2228 conf->peer_count, cap.max_rx_2_tx);
2231 if (conf->peer_count == 0) {
2233 "Invalid value for number of peers for Rx queue(=%u), should be: > 0",
2237 for (i = 0, count = 0; i < dev->data->nb_rx_queues &&
2238 cap.max_nb_queues != UINT16_MAX; i++) {
2239 if (i == rx_queue_id || rte_eth_dev_is_rx_hairpin_queue(dev, i))
2242 if (count > cap.max_nb_queues) {
2243 RTE_ETHDEV_LOG(ERR, "To many Rx hairpin queues max is %d",
2247 if (dev->data->dev_started)
2249 rxq = dev->data->rx_queues;
2250 if (rxq[rx_queue_id] != NULL) {
2251 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
2253 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
2254 rxq[rx_queue_id] = NULL;
2256 ret = (*dev->dev_ops->rx_hairpin_queue_setup)(dev, rx_queue_id,
2259 dev->data->rx_queue_state[rx_queue_id] =
2260 RTE_ETH_QUEUE_STATE_HAIRPIN;
2261 return eth_err(port_id, ret);
2265 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2266 uint16_t nb_tx_desc, unsigned int socket_id,
2267 const struct rte_eth_txconf *tx_conf)
2269 struct rte_eth_dev *dev;
2270 struct rte_eth_dev_info dev_info;
2271 struct rte_eth_txconf local_conf;
2275 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2276 dev = &rte_eth_devices[port_id];
2278 if (tx_queue_id >= dev->data->nb_tx_queues) {
2279 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2283 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
2285 ret = rte_eth_dev_info_get(port_id, &dev_info);
2289 /* Use default specified by driver, if nb_tx_desc is zero */
2290 if (nb_tx_desc == 0) {
2291 nb_tx_desc = dev_info.default_txportconf.ring_size;
2292 /* If driver default is zero, fall back on EAL default */
2293 if (nb_tx_desc == 0)
2294 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
2296 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
2297 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
2298 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
2300 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
2301 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
2302 dev_info.tx_desc_lim.nb_min,
2303 dev_info.tx_desc_lim.nb_align);
2307 if (dev->data->dev_started &&
2308 !(dev_info.dev_capa &
2309 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
2312 if (dev->data->dev_started &&
2313 (dev->data->tx_queue_state[tx_queue_id] !=
2314 RTE_ETH_QUEUE_STATE_STOPPED))
2317 txq = dev->data->tx_queues;
2318 if (txq[tx_queue_id]) {
2319 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2321 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2322 txq[tx_queue_id] = NULL;
2325 if (tx_conf == NULL)
2326 tx_conf = &dev_info.default_txconf;
2328 local_conf = *tx_conf;
2331 * If an offloading has already been enabled in
2332 * rte_eth_dev_configure(), it has been enabled on all queues,
2333 * so there is no need to enable it in this queue again.
2334 * The local_conf.offloads input to underlying PMD only carries
2335 * those offloadings which are only enabled on this queue and
2336 * not enabled on all queues.
2338 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
2341 * New added offloadings for this queue are those not enabled in
2342 * rte_eth_dev_configure() and they must be per-queue type.
2343 * A pure per-port offloading can't be enabled on a queue while
2344 * disabled on another queue. A pure per-port offloading can't
2345 * be enabled for any queue as new added one if it hasn't been
2346 * enabled in rte_eth_dev_configure().
2348 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
2349 local_conf.offloads) {
2351 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
2352 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
2353 port_id, tx_queue_id, local_conf.offloads,
2354 dev_info.tx_queue_offload_capa,
2359 rte_ethdev_trace_txq_setup(port_id, tx_queue_id, nb_tx_desc, tx_conf);
2360 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
2361 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
2365 rte_eth_tx_hairpin_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2366 uint16_t nb_tx_desc,
2367 const struct rte_eth_hairpin_conf *conf)
2369 struct rte_eth_dev *dev;
2370 struct rte_eth_hairpin_cap cap;
2376 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2377 dev = &rte_eth_devices[port_id];
2379 if (tx_queue_id >= dev->data->nb_tx_queues) {
2380 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2386 "Cannot setup ethdev port %u Tx hairpin queue from NULL config\n",
2391 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
2394 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_hairpin_queue_setup,
2396 /* if nb_rx_desc is zero use max number of desc from the driver. */
2397 if (nb_tx_desc == 0)
2398 nb_tx_desc = cap.max_nb_desc;
2399 if (nb_tx_desc > cap.max_nb_desc) {
2401 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu",
2402 nb_tx_desc, cap.max_nb_desc);
2405 if (conf->peer_count > cap.max_tx_2_rx) {
2407 "Invalid value for number of peers for Tx queue(=%u), should be: <= %hu",
2408 conf->peer_count, cap.max_tx_2_rx);
2411 if (conf->peer_count == 0) {
2413 "Invalid value for number of peers for Tx queue(=%u), should be: > 0",
2417 for (i = 0, count = 0; i < dev->data->nb_tx_queues &&
2418 cap.max_nb_queues != UINT16_MAX; i++) {
2419 if (i == tx_queue_id || rte_eth_dev_is_tx_hairpin_queue(dev, i))
2422 if (count > cap.max_nb_queues) {
2423 RTE_ETHDEV_LOG(ERR, "To many Tx hairpin queues max is %d",
2427 if (dev->data->dev_started)
2429 txq = dev->data->tx_queues;
2430 if (txq[tx_queue_id] != NULL) {
2431 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2433 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2434 txq[tx_queue_id] = NULL;
2436 ret = (*dev->dev_ops->tx_hairpin_queue_setup)
2437 (dev, tx_queue_id, nb_tx_desc, conf);
2439 dev->data->tx_queue_state[tx_queue_id] =
2440 RTE_ETH_QUEUE_STATE_HAIRPIN;
2441 return eth_err(port_id, ret);
2445 rte_eth_hairpin_bind(uint16_t tx_port, uint16_t rx_port)
2447 struct rte_eth_dev *dev;
2450 RTE_ETH_VALID_PORTID_OR_ERR_RET(tx_port, -ENODEV);
2451 dev = &rte_eth_devices[tx_port];
2453 if (dev->data->dev_started == 0) {
2454 RTE_ETHDEV_LOG(ERR, "Tx port %d is not started\n", tx_port);
2458 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_bind, -ENOTSUP);
2459 ret = (*dev->dev_ops->hairpin_bind)(dev, rx_port);
2461 RTE_ETHDEV_LOG(ERR, "Failed to bind hairpin Tx %d"
2462 " to Rx %d (%d - all ports)\n",
2463 tx_port, rx_port, RTE_MAX_ETHPORTS);
2469 rte_eth_hairpin_unbind(uint16_t tx_port, uint16_t rx_port)
2471 struct rte_eth_dev *dev;
2474 RTE_ETH_VALID_PORTID_OR_ERR_RET(tx_port, -ENODEV);
2475 dev = &rte_eth_devices[tx_port];
2477 if (dev->data->dev_started == 0) {
2478 RTE_ETHDEV_LOG(ERR, "Tx port %d is already stopped\n", tx_port);
2482 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_unbind, -ENOTSUP);
2483 ret = (*dev->dev_ops->hairpin_unbind)(dev, rx_port);
2485 RTE_ETHDEV_LOG(ERR, "Failed to unbind hairpin Tx %d"
2486 " from Rx %d (%d - all ports)\n",
2487 tx_port, rx_port, RTE_MAX_ETHPORTS);
2493 rte_eth_hairpin_get_peer_ports(uint16_t port_id, uint16_t *peer_ports,
2494 size_t len, uint32_t direction)
2496 struct rte_eth_dev *dev;
2499 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2500 dev = &rte_eth_devices[port_id];
2502 if (peer_ports == NULL) {
2504 "Cannot get ethdev port %u hairpin peer ports to NULL\n",
2511 "Cannot get ethdev port %u hairpin peer ports to array with zero size\n",
2516 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_get_peer_ports,
2519 ret = (*dev->dev_ops->hairpin_get_peer_ports)(dev, peer_ports,
2522 RTE_ETHDEV_LOG(ERR, "Failed to get %d hairpin peer %s ports\n",
2523 port_id, direction ? "Rx" : "Tx");
2529 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
2530 void *userdata __rte_unused)
2532 rte_pktmbuf_free_bulk(pkts, unsent);
2536 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
2539 uint64_t *count = userdata;
2541 rte_pktmbuf_free_bulk(pkts, unsent);
2546 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
2547 buffer_tx_error_fn cbfn, void *userdata)
2549 if (buffer == NULL) {
2551 "Cannot set Tx buffer error callback to NULL buffer\n");
2555 buffer->error_callback = cbfn;
2556 buffer->error_userdata = userdata;
2561 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
2565 if (buffer == NULL) {
2566 RTE_ETHDEV_LOG(ERR, "Cannot initialize NULL buffer\n");
2570 buffer->size = size;
2571 if (buffer->error_callback == NULL) {
2572 ret = rte_eth_tx_buffer_set_err_callback(
2573 buffer, rte_eth_tx_buffer_drop_callback, NULL);
2580 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
2582 struct rte_eth_dev *dev;
2585 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2586 dev = &rte_eth_devices[port_id];
2588 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
2590 /* Call driver to free pending mbufs. */
2591 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
2593 return eth_err(port_id, ret);
2597 rte_eth_promiscuous_enable(uint16_t port_id)
2599 struct rte_eth_dev *dev;
2602 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2603 dev = &rte_eth_devices[port_id];
2605 if (dev->data->promiscuous == 1)
2608 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_enable, -ENOTSUP);
2610 diag = (*dev->dev_ops->promiscuous_enable)(dev);
2611 dev->data->promiscuous = (diag == 0) ? 1 : 0;
2613 return eth_err(port_id, diag);
2617 rte_eth_promiscuous_disable(uint16_t port_id)
2619 struct rte_eth_dev *dev;
2622 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2623 dev = &rte_eth_devices[port_id];
2625 if (dev->data->promiscuous == 0)
2628 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_disable, -ENOTSUP);
2630 dev->data->promiscuous = 0;
2631 diag = (*dev->dev_ops->promiscuous_disable)(dev);
2633 dev->data->promiscuous = 1;
2635 return eth_err(port_id, diag);
2639 rte_eth_promiscuous_get(uint16_t port_id)
2641 struct rte_eth_dev *dev;
2643 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2644 dev = &rte_eth_devices[port_id];
2646 return dev->data->promiscuous;
2650 rte_eth_allmulticast_enable(uint16_t port_id)
2652 struct rte_eth_dev *dev;
2655 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2656 dev = &rte_eth_devices[port_id];
2658 if (dev->data->all_multicast == 1)
2661 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_enable, -ENOTSUP);
2662 diag = (*dev->dev_ops->allmulticast_enable)(dev);
2663 dev->data->all_multicast = (diag == 0) ? 1 : 0;
2665 return eth_err(port_id, diag);
2669 rte_eth_allmulticast_disable(uint16_t port_id)
2671 struct rte_eth_dev *dev;
2674 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2675 dev = &rte_eth_devices[port_id];
2677 if (dev->data->all_multicast == 0)
2680 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_disable, -ENOTSUP);
2681 dev->data->all_multicast = 0;
2682 diag = (*dev->dev_ops->allmulticast_disable)(dev);
2684 dev->data->all_multicast = 1;
2686 return eth_err(port_id, diag);
2690 rte_eth_allmulticast_get(uint16_t port_id)
2692 struct rte_eth_dev *dev;
2694 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2695 dev = &rte_eth_devices[port_id];
2697 return dev->data->all_multicast;
2701 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
2703 struct rte_eth_dev *dev;
2705 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2706 dev = &rte_eth_devices[port_id];
2708 if (eth_link == NULL) {
2709 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u link to NULL\n",
2714 if (dev->data->dev_conf.intr_conf.lsc && dev->data->dev_started)
2715 rte_eth_linkstatus_get(dev, eth_link);
2717 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2718 (*dev->dev_ops->link_update)(dev, 1);
2719 *eth_link = dev->data->dev_link;
2726 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
2728 struct rte_eth_dev *dev;
2730 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2731 dev = &rte_eth_devices[port_id];
2733 if (eth_link == NULL) {
2734 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u link to NULL\n",
2739 if (dev->data->dev_conf.intr_conf.lsc && dev->data->dev_started)
2740 rte_eth_linkstatus_get(dev, eth_link);
2742 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2743 (*dev->dev_ops->link_update)(dev, 0);
2744 *eth_link = dev->data->dev_link;
2751 rte_eth_link_speed_to_str(uint32_t link_speed)
2753 switch (link_speed) {
2754 case ETH_SPEED_NUM_NONE: return "None";
2755 case ETH_SPEED_NUM_10M: return "10 Mbps";
2756 case ETH_SPEED_NUM_100M: return "100 Mbps";
2757 case ETH_SPEED_NUM_1G: return "1 Gbps";
2758 case ETH_SPEED_NUM_2_5G: return "2.5 Gbps";
2759 case ETH_SPEED_NUM_5G: return "5 Gbps";
2760 case ETH_SPEED_NUM_10G: return "10 Gbps";
2761 case ETH_SPEED_NUM_20G: return "20 Gbps";
2762 case ETH_SPEED_NUM_25G: return "25 Gbps";
2763 case ETH_SPEED_NUM_40G: return "40 Gbps";
2764 case ETH_SPEED_NUM_50G: return "50 Gbps";
2765 case ETH_SPEED_NUM_56G: return "56 Gbps";
2766 case ETH_SPEED_NUM_100G: return "100 Gbps";
2767 case ETH_SPEED_NUM_200G: return "200 Gbps";
2768 case ETH_SPEED_NUM_UNKNOWN: return "Unknown";
2769 default: return "Invalid";
2774 rte_eth_link_to_str(char *str, size_t len, const struct rte_eth_link *eth_link)
2777 RTE_ETHDEV_LOG(ERR, "Cannot convert link to NULL string\n");
2783 "Cannot convert link to string with zero size\n");
2787 if (eth_link == NULL) {
2788 RTE_ETHDEV_LOG(ERR, "Cannot convert to string from NULL link\n");
2792 if (eth_link->link_status == ETH_LINK_DOWN)
2793 return snprintf(str, len, "Link down");
2795 return snprintf(str, len, "Link up at %s %s %s",
2796 rte_eth_link_speed_to_str(eth_link->link_speed),
2797 (eth_link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
2799 (eth_link->link_autoneg == ETH_LINK_AUTONEG) ?
2800 "Autoneg" : "Fixed");
2804 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
2806 struct rte_eth_dev *dev;
2808 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2809 dev = &rte_eth_devices[port_id];
2811 if (stats == NULL) {
2812 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u stats to NULL\n",
2817 memset(stats, 0, sizeof(*stats));
2819 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
2820 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
2821 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
2825 rte_eth_stats_reset(uint16_t port_id)
2827 struct rte_eth_dev *dev;
2830 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2831 dev = &rte_eth_devices[port_id];
2833 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
2834 ret = (*dev->dev_ops->stats_reset)(dev);
2836 return eth_err(port_id, ret);
2838 dev->data->rx_mbuf_alloc_failed = 0;
2844 eth_dev_get_xstats_basic_count(struct rte_eth_dev *dev)
2846 uint16_t nb_rxqs, nb_txqs;
2849 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2850 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2852 count = RTE_NB_STATS;
2853 if (dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS) {
2854 count += nb_rxqs * RTE_NB_RXQ_STATS;
2855 count += nb_txqs * RTE_NB_TXQ_STATS;
2862 eth_dev_get_xstats_count(uint16_t port_id)
2864 struct rte_eth_dev *dev;
2867 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2868 dev = &rte_eth_devices[port_id];
2869 if (dev->dev_ops->xstats_get_names != NULL) {
2870 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2872 return eth_err(port_id, count);
2877 count += eth_dev_get_xstats_basic_count(dev);
2883 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2886 int cnt_xstats, idx_xstat;
2888 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2890 if (xstat_name == NULL) {
2892 "Cannot get ethdev port %u xstats ID from NULL xstat name\n",
2899 "Cannot get ethdev port %u xstats ID to NULL\n",
2905 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2906 if (cnt_xstats < 0) {
2907 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2911 /* Get id-name lookup table */
2912 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2914 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2915 port_id, xstats_names, cnt_xstats, NULL)) {
2916 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2920 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2921 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2930 /* retrieve basic stats names */
2932 eth_basic_stats_get_names(struct rte_eth_dev *dev,
2933 struct rte_eth_xstat_name *xstats_names)
2935 int cnt_used_entries = 0;
2936 uint32_t idx, id_queue;
2939 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2940 strlcpy(xstats_names[cnt_used_entries].name,
2941 eth_dev_stats_strings[idx].name,
2942 sizeof(xstats_names[0].name));
2946 if ((dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS) == 0)
2947 return cnt_used_entries;
2949 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2950 for (id_queue = 0; id_queue < num_q; id_queue++) {
2951 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2952 snprintf(xstats_names[cnt_used_entries].name,
2953 sizeof(xstats_names[0].name),
2955 id_queue, eth_dev_rxq_stats_strings[idx].name);
2960 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2961 for (id_queue = 0; id_queue < num_q; id_queue++) {
2962 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2963 snprintf(xstats_names[cnt_used_entries].name,
2964 sizeof(xstats_names[0].name),
2966 id_queue, eth_dev_txq_stats_strings[idx].name);
2970 return cnt_used_entries;
2973 /* retrieve ethdev extended statistics names */
2975 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2976 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2979 struct rte_eth_xstat_name *xstats_names_copy;
2980 unsigned int no_basic_stat_requested = 1;
2981 unsigned int no_ext_stat_requested = 1;
2982 unsigned int expected_entries;
2983 unsigned int basic_count;
2984 struct rte_eth_dev *dev;
2988 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2989 dev = &rte_eth_devices[port_id];
2991 basic_count = eth_dev_get_xstats_basic_count(dev);
2992 ret = eth_dev_get_xstats_count(port_id);
2995 expected_entries = (unsigned int)ret;
2997 /* Return max number of stats if no ids given */
3000 return expected_entries;
3001 else if (xstats_names && size < expected_entries)
3002 return expected_entries;
3005 if (ids && !xstats_names)
3008 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
3009 uint64_t ids_copy[size];
3011 for (i = 0; i < size; i++) {
3012 if (ids[i] < basic_count) {
3013 no_basic_stat_requested = 0;
3018 * Convert ids to xstats ids that PMD knows.
3019 * ids known by user are basic + extended stats.
3021 ids_copy[i] = ids[i] - basic_count;
3024 if (no_basic_stat_requested)
3025 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
3026 ids_copy, xstats_names, size);
3029 /* Retrieve all stats */
3031 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
3033 if (num_stats < 0 || num_stats > (int)expected_entries)
3036 return expected_entries;
3039 xstats_names_copy = calloc(expected_entries,
3040 sizeof(struct rte_eth_xstat_name));
3042 if (!xstats_names_copy) {
3043 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
3048 for (i = 0; i < size; i++) {
3049 if (ids[i] >= basic_count) {
3050 no_ext_stat_requested = 0;
3056 /* Fill xstats_names_copy structure */
3057 if (ids && no_ext_stat_requested) {
3058 eth_basic_stats_get_names(dev, xstats_names_copy);
3060 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
3063 free(xstats_names_copy);
3069 for (i = 0; i < size; i++) {
3070 if (ids[i] >= expected_entries) {
3071 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
3072 free(xstats_names_copy);
3075 xstats_names[i] = xstats_names_copy[ids[i]];
3078 free(xstats_names_copy);
3083 rte_eth_xstats_get_names(uint16_t port_id,
3084 struct rte_eth_xstat_name *xstats_names,
3087 struct rte_eth_dev *dev;
3088 int cnt_used_entries;
3089 int cnt_expected_entries;
3090 int cnt_driver_entries;
3092 cnt_expected_entries = eth_dev_get_xstats_count(port_id);
3093 if (xstats_names == NULL || cnt_expected_entries < 0 ||
3094 (int)size < cnt_expected_entries)
3095 return cnt_expected_entries;
3097 /* port_id checked in eth_dev_get_xstats_count() */
3098 dev = &rte_eth_devices[port_id];
3100 cnt_used_entries = eth_basic_stats_get_names(dev, xstats_names);
3102 if (dev->dev_ops->xstats_get_names != NULL) {
3103 /* If there are any driver-specific xstats, append them
3106 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
3108 xstats_names + cnt_used_entries,
3109 size - cnt_used_entries);
3110 if (cnt_driver_entries < 0)
3111 return eth_err(port_id, cnt_driver_entries);
3112 cnt_used_entries += cnt_driver_entries;
3115 return cnt_used_entries;
3120 eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
3122 struct rte_eth_dev *dev;
3123 struct rte_eth_stats eth_stats;
3124 unsigned int count = 0, i, q;
3125 uint64_t val, *stats_ptr;
3126 uint16_t nb_rxqs, nb_txqs;
3129 ret = rte_eth_stats_get(port_id, ð_stats);
3133 dev = &rte_eth_devices[port_id];
3135 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
3136 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
3139 for (i = 0; i < RTE_NB_STATS; i++) {
3140 stats_ptr = RTE_PTR_ADD(ð_stats,
3141 eth_dev_stats_strings[i].offset);
3143 xstats[count++].value = val;
3146 if ((dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS) == 0)
3150 for (q = 0; q < nb_rxqs; q++) {
3151 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
3152 stats_ptr = RTE_PTR_ADD(ð_stats,
3153 eth_dev_rxq_stats_strings[i].offset +
3154 q * sizeof(uint64_t));
3156 xstats[count++].value = val;
3161 for (q = 0; q < nb_txqs; q++) {
3162 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
3163 stats_ptr = RTE_PTR_ADD(ð_stats,
3164 eth_dev_txq_stats_strings[i].offset +
3165 q * sizeof(uint64_t));
3167 xstats[count++].value = val;
3173 /* retrieve ethdev extended statistics */
3175 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
3176 uint64_t *values, unsigned int size)
3178 unsigned int no_basic_stat_requested = 1;
3179 unsigned int no_ext_stat_requested = 1;
3180 unsigned int num_xstats_filled;
3181 unsigned int basic_count;
3182 uint16_t expected_entries;
3183 struct rte_eth_dev *dev;
3187 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3188 dev = &rte_eth_devices[port_id];
3190 ret = eth_dev_get_xstats_count(port_id);
3193 expected_entries = (uint16_t)ret;
3194 struct rte_eth_xstat xstats[expected_entries];
3195 basic_count = eth_dev_get_xstats_basic_count(dev);
3197 /* Return max number of stats if no ids given */
3200 return expected_entries;
3201 else if (values && size < expected_entries)
3202 return expected_entries;
3208 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
3209 unsigned int basic_count = eth_dev_get_xstats_basic_count(dev);
3210 uint64_t ids_copy[size];
3212 for (i = 0; i < size; i++) {
3213 if (ids[i] < basic_count) {
3214 no_basic_stat_requested = 0;
3219 * Convert ids to xstats ids that PMD knows.
3220 * ids known by user are basic + extended stats.
3222 ids_copy[i] = ids[i] - basic_count;
3225 if (no_basic_stat_requested)
3226 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
3231 for (i = 0; i < size; i++) {
3232 if (ids[i] >= basic_count) {
3233 no_ext_stat_requested = 0;
3239 /* Fill the xstats structure */
3240 if (ids && no_ext_stat_requested)
3241 ret = eth_basic_stats_get(port_id, xstats);
3243 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
3247 num_xstats_filled = (unsigned int)ret;
3249 /* Return all stats */
3251 for (i = 0; i < num_xstats_filled; i++)
3252 values[i] = xstats[i].value;
3253 return expected_entries;
3257 for (i = 0; i < size; i++) {
3258 if (ids[i] >= expected_entries) {
3259 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
3262 values[i] = xstats[ids[i]].value;
3268 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
3271 struct rte_eth_dev *dev;
3272 unsigned int count = 0, i;
3273 signed int xcount = 0;
3274 uint16_t nb_rxqs, nb_txqs;
3277 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3278 dev = &rte_eth_devices[port_id];
3280 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
3281 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
3283 /* Return generic statistics */
3284 count = RTE_NB_STATS;
3285 if (dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS)
3286 count += (nb_rxqs * RTE_NB_RXQ_STATS) + (nb_txqs * RTE_NB_TXQ_STATS);
3288 /* implemented by the driver */
3289 if (dev->dev_ops->xstats_get != NULL) {
3290 /* Retrieve the xstats from the driver at the end of the
3293 xcount = (*dev->dev_ops->xstats_get)(dev,
3294 xstats ? xstats + count : NULL,
3295 (n > count) ? n - count : 0);
3298 return eth_err(port_id, xcount);
3301 if (n < count + xcount || xstats == NULL)
3302 return count + xcount;
3304 /* now fill the xstats structure */
3305 ret = eth_basic_stats_get(port_id, xstats);
3310 for (i = 0; i < count; i++)
3312 /* add an offset to driver-specific stats */
3313 for ( ; i < count + xcount; i++)
3314 xstats[i].id += count;
3316 return count + xcount;
3319 /* reset ethdev extended statistics */
3321 rte_eth_xstats_reset(uint16_t port_id)
3323 struct rte_eth_dev *dev;
3325 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3326 dev = &rte_eth_devices[port_id];
3328 /* implemented by the driver */
3329 if (dev->dev_ops->xstats_reset != NULL)
3330 return eth_err(port_id, (*dev->dev_ops->xstats_reset)(dev));
3332 /* fallback to default */
3333 return rte_eth_stats_reset(port_id);
3337 eth_dev_set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id,
3338 uint8_t stat_idx, uint8_t is_rx)
3340 struct rte_eth_dev *dev;
3342 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3343 dev = &rte_eth_devices[port_id];
3345 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
3348 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
3351 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
3354 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
3355 return (*dev->dev_ops->queue_stats_mapping_set) (dev, queue_id, stat_idx, is_rx);
3359 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
3362 return eth_err(port_id, eth_dev_set_queue_stats_mapping(port_id,
3364 stat_idx, STAT_QMAP_TX));
3368 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
3371 return eth_err(port_id, eth_dev_set_queue_stats_mapping(port_id,
3373 stat_idx, STAT_QMAP_RX));
3377 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
3379 struct rte_eth_dev *dev;
3381 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3382 dev = &rte_eth_devices[port_id];
3384 if (fw_version == NULL && fw_size > 0) {
3386 "Cannot get ethdev port %u FW version to NULL when string size is non zero\n",
3391 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
3392 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
3393 fw_version, fw_size));
3397 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
3399 struct rte_eth_dev *dev;
3400 const struct rte_eth_desc_lim lim = {
3401 .nb_max = UINT16_MAX,
3404 .nb_seg_max = UINT16_MAX,
3405 .nb_mtu_seg_max = UINT16_MAX,
3409 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3410 dev = &rte_eth_devices[port_id];
3412 if (dev_info == NULL) {
3413 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u info to NULL\n",
3419 * Init dev_info before port_id check since caller does not have
3420 * return status and does not know if get is successful or not.
3422 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
3423 dev_info->switch_info.domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
3425 dev_info->rx_desc_lim = lim;
3426 dev_info->tx_desc_lim = lim;
3427 dev_info->device = dev->device;
3428 dev_info->min_mtu = RTE_ETHER_MIN_MTU;
3429 dev_info->max_mtu = UINT16_MAX;
3431 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
3432 diag = (*dev->dev_ops->dev_infos_get)(dev, dev_info);
3434 /* Cleanup already filled in device information */
3435 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
3436 return eth_err(port_id, diag);
3439 /* Maximum number of queues should be <= RTE_MAX_QUEUES_PER_PORT */
3440 dev_info->max_rx_queues = RTE_MIN(dev_info->max_rx_queues,
3441 RTE_MAX_QUEUES_PER_PORT);
3442 dev_info->max_tx_queues = RTE_MIN(dev_info->max_tx_queues,
3443 RTE_MAX_QUEUES_PER_PORT);
3445 dev_info->driver_name = dev->device->driver->name;
3446 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
3447 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
3449 dev_info->dev_flags = &dev->data->dev_flags;
3455 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
3456 uint32_t *ptypes, int num)
3459 struct rte_eth_dev *dev;
3460 const uint32_t *all_ptypes;
3462 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3463 dev = &rte_eth_devices[port_id];
3465 if (ptypes == NULL && num > 0) {
3467 "Cannot get ethdev port %u supported packet types to NULL when array size is non zero\n",
3472 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
3473 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3478 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
3479 if (all_ptypes[i] & ptype_mask) {
3481 ptypes[j] = all_ptypes[i];
3489 rte_eth_dev_set_ptypes(uint16_t port_id, uint32_t ptype_mask,
3490 uint32_t *set_ptypes, unsigned int num)
3492 const uint32_t valid_ptype_masks[] = {
3496 RTE_PTYPE_TUNNEL_MASK,
3497 RTE_PTYPE_INNER_L2_MASK,
3498 RTE_PTYPE_INNER_L3_MASK,
3499 RTE_PTYPE_INNER_L4_MASK,
3501 const uint32_t *all_ptypes;
3502 struct rte_eth_dev *dev;
3503 uint32_t unused_mask;
3507 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3508 dev = &rte_eth_devices[port_id];
3510 if (num > 0 && set_ptypes == NULL) {
3512 "Cannot get ethdev port %u set packet types to NULL when array size is non zero\n",
3517 if (*dev->dev_ops->dev_supported_ptypes_get == NULL ||
3518 *dev->dev_ops->dev_ptypes_set == NULL) {
3523 if (ptype_mask == 0) {
3524 ret = (*dev->dev_ops->dev_ptypes_set)(dev,
3529 unused_mask = ptype_mask;
3530 for (i = 0; i < RTE_DIM(valid_ptype_masks); i++) {
3531 uint32_t mask = ptype_mask & valid_ptype_masks[i];
3532 if (mask && mask != valid_ptype_masks[i]) {
3536 unused_mask &= ~valid_ptype_masks[i];
3544 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3545 if (all_ptypes == NULL) {
3551 * Accommodate as many set_ptypes as possible. If the supplied
3552 * set_ptypes array is insufficient fill it partially.
3554 for (i = 0, j = 0; set_ptypes != NULL &&
3555 (all_ptypes[i] != RTE_PTYPE_UNKNOWN); ++i) {
3556 if (ptype_mask & all_ptypes[i]) {
3558 set_ptypes[j] = all_ptypes[i];
3566 if (set_ptypes != NULL && j < num)
3567 set_ptypes[j] = RTE_PTYPE_UNKNOWN;
3569 return (*dev->dev_ops->dev_ptypes_set)(dev, ptype_mask);
3573 set_ptypes[0] = RTE_PTYPE_UNKNOWN;
3579 rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
3581 struct rte_eth_dev *dev;
3583 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3584 dev = &rte_eth_devices[port_id];
3586 if (mac_addr == NULL) {
3588 "Cannot get ethdev port %u MAC address to NULL\n",
3593 rte_ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
3599 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
3601 struct rte_eth_dev *dev;
3603 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3604 dev = &rte_eth_devices[port_id];
3607 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u MTU to NULL\n",
3612 *mtu = dev->data->mtu;
3617 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
3620 struct rte_eth_dev_info dev_info;
3621 struct rte_eth_dev *dev;
3623 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3624 dev = &rte_eth_devices[port_id];
3625 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
3628 * Check if the device supports dev_infos_get, if it does not
3629 * skip min_mtu/max_mtu validation here as this requires values
3630 * that are populated within the call to rte_eth_dev_info_get()
3631 * which relies on dev->dev_ops->dev_infos_get.
3633 if (*dev->dev_ops->dev_infos_get != NULL) {
3634 ret = rte_eth_dev_info_get(port_id, &dev_info);
3638 if (mtu < dev_info.min_mtu || mtu > dev_info.max_mtu)
3642 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
3644 dev->data->mtu = mtu;
3646 return eth_err(port_id, ret);
3650 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
3652 struct rte_eth_dev *dev;
3655 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3656 dev = &rte_eth_devices[port_id];
3658 if (!(dev->data->dev_conf.rxmode.offloads &
3659 DEV_RX_OFFLOAD_VLAN_FILTER)) {
3660 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
3665 if (vlan_id > 4095) {
3666 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
3670 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
3672 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
3674 struct rte_vlan_filter_conf *vfc;
3678 vfc = &dev->data->vlan_filter_conf;
3679 vidx = vlan_id / 64;
3680 vbit = vlan_id % 64;
3683 vfc->ids[vidx] |= UINT64_C(1) << vbit;
3685 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
3688 return eth_err(port_id, ret);
3692 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
3695 struct rte_eth_dev *dev;
3697 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3698 dev = &rte_eth_devices[port_id];
3700 if (rx_queue_id >= dev->data->nb_rx_queues) {
3701 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
3705 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
3706 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
3712 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
3713 enum rte_vlan_type vlan_type,
3716 struct rte_eth_dev *dev;
3718 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3719 dev = &rte_eth_devices[port_id];
3721 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
3722 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
3727 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
3729 struct rte_eth_dev_info dev_info;
3730 struct rte_eth_dev *dev;
3734 uint64_t orig_offloads;
3735 uint64_t dev_offloads;
3736 uint64_t new_offloads;
3738 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3739 dev = &rte_eth_devices[port_id];
3741 /* save original values in case of failure */
3742 orig_offloads = dev->data->dev_conf.rxmode.offloads;
3743 dev_offloads = orig_offloads;
3745 /* check which option changed by application */
3746 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
3747 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
3750 dev_offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
3752 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
3753 mask |= ETH_VLAN_STRIP_MASK;
3756 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
3757 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER);
3760 dev_offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
3762 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_FILTER;
3763 mask |= ETH_VLAN_FILTER_MASK;
3766 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
3767 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND);
3770 dev_offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
3772 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_EXTEND;
3773 mask |= ETH_VLAN_EXTEND_MASK;
3776 cur = !!(offload_mask & ETH_QINQ_STRIP_OFFLOAD);
3777 org = !!(dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP);
3780 dev_offloads |= DEV_RX_OFFLOAD_QINQ_STRIP;
3782 dev_offloads &= ~DEV_RX_OFFLOAD_QINQ_STRIP;
3783 mask |= ETH_QINQ_STRIP_MASK;
3790 ret = rte_eth_dev_info_get(port_id, &dev_info);
3794 /* Rx VLAN offloading must be within its device capabilities */
3795 if ((dev_offloads & dev_info.rx_offload_capa) != dev_offloads) {
3796 new_offloads = dev_offloads & ~orig_offloads;
3798 "Ethdev port_id=%u requested new added VLAN offloads "
3799 "0x%" PRIx64 " must be within Rx offloads capabilities "
3800 "0x%" PRIx64 " in %s()\n",
3801 port_id, new_offloads, dev_info.rx_offload_capa,
3806 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
3807 dev->data->dev_conf.rxmode.offloads = dev_offloads;
3808 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
3810 /* hit an error restore original values */
3811 dev->data->dev_conf.rxmode.offloads = orig_offloads;
3814 return eth_err(port_id, ret);
3818 rte_eth_dev_get_vlan_offload(uint16_t port_id)
3820 struct rte_eth_dev *dev;
3821 uint64_t *dev_offloads;
3824 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3825 dev = &rte_eth_devices[port_id];
3826 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
3828 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
3829 ret |= ETH_VLAN_STRIP_OFFLOAD;
3831 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
3832 ret |= ETH_VLAN_FILTER_OFFLOAD;
3834 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
3835 ret |= ETH_VLAN_EXTEND_OFFLOAD;
3837 if (*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP)
3838 ret |= ETH_QINQ_STRIP_OFFLOAD;
3844 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
3846 struct rte_eth_dev *dev;
3848 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3849 dev = &rte_eth_devices[port_id];
3851 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
3852 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
3856 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3858 struct rte_eth_dev *dev;
3860 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3861 dev = &rte_eth_devices[port_id];
3863 if (fc_conf == NULL) {
3865 "Cannot get ethdev port %u flow control config to NULL\n",
3870 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
3871 memset(fc_conf, 0, sizeof(*fc_conf));
3872 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
3876 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3878 struct rte_eth_dev *dev;
3880 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3881 dev = &rte_eth_devices[port_id];
3883 if (fc_conf == NULL) {
3885 "Cannot set ethdev port %u flow control from NULL config\n",
3890 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
3891 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
3895 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
3896 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
3900 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
3901 struct rte_eth_pfc_conf *pfc_conf)
3903 struct rte_eth_dev *dev;
3905 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3906 dev = &rte_eth_devices[port_id];
3908 if (pfc_conf == NULL) {
3910 "Cannot set ethdev port %u priority flow control from NULL config\n",
3915 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
3916 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
3920 /* High water, low water validation are device specific */
3921 if (*dev->dev_ops->priority_flow_ctrl_set)
3922 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
3928 eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
3933 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
3934 for (i = 0; i < num; i++) {
3935 if (reta_conf[i].mask)
3943 eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
3947 uint16_t i, idx, shift;
3950 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
3954 for (i = 0; i < reta_size; i++) {
3955 idx = i / RTE_RETA_GROUP_SIZE;
3956 shift = i % RTE_RETA_GROUP_SIZE;
3957 if ((reta_conf[idx].mask & (1ULL << shift)) &&
3958 (reta_conf[idx].reta[shift] >= max_rxq)) {
3960 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
3962 reta_conf[idx].reta[shift], max_rxq);
3971 rte_eth_dev_rss_reta_update(uint16_t port_id,
3972 struct rte_eth_rss_reta_entry64 *reta_conf,
3975 struct rte_eth_dev *dev;
3978 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3979 dev = &rte_eth_devices[port_id];
3981 if (reta_conf == NULL) {
3983 "Cannot update ethdev port %u RSS RETA to NULL\n",
3988 if (reta_size == 0) {
3990 "Cannot update ethdev port %u RSS RETA with zero size\n",
3995 /* Check mask bits */
3996 ret = eth_check_reta_mask(reta_conf, reta_size);
4000 /* Check entry value */
4001 ret = eth_check_reta_entry(reta_conf, reta_size,
4002 dev->data->nb_rx_queues);
4006 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
4007 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
4012 rte_eth_dev_rss_reta_query(uint16_t port_id,
4013 struct rte_eth_rss_reta_entry64 *reta_conf,
4016 struct rte_eth_dev *dev;
4019 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4020 dev = &rte_eth_devices[port_id];
4022 if (reta_conf == NULL) {
4024 "Cannot query ethdev port %u RSS RETA from NULL config\n",
4029 /* Check mask bits */
4030 ret = eth_check_reta_mask(reta_conf, reta_size);
4034 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
4035 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
4040 rte_eth_dev_rss_hash_update(uint16_t port_id,
4041 struct rte_eth_rss_conf *rss_conf)
4043 struct rte_eth_dev *dev;
4044 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
4047 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4048 dev = &rte_eth_devices[port_id];
4050 if (rss_conf == NULL) {
4052 "Cannot update ethdev port %u RSS hash from NULL config\n",
4057 ret = rte_eth_dev_info_get(port_id, &dev_info);
4061 rss_conf->rss_hf = rte_eth_rss_hf_refine(rss_conf->rss_hf);
4062 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
4063 dev_info.flow_type_rss_offloads) {
4065 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
4066 port_id, rss_conf->rss_hf,
4067 dev_info.flow_type_rss_offloads);
4070 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
4071 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
4076 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
4077 struct rte_eth_rss_conf *rss_conf)
4079 struct rte_eth_dev *dev;
4081 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4082 dev = &rte_eth_devices[port_id];
4084 if (rss_conf == NULL) {
4086 "Cannot get ethdev port %u RSS hash config to NULL\n",
4091 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
4092 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
4097 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
4098 struct rte_eth_udp_tunnel *udp_tunnel)
4100 struct rte_eth_dev *dev;
4102 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4103 dev = &rte_eth_devices[port_id];
4105 if (udp_tunnel == NULL) {
4107 "Cannot add ethdev port %u UDP tunnel port from NULL UDP tunnel\n",
4112 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
4113 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4117 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
4118 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
4123 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
4124 struct rte_eth_udp_tunnel *udp_tunnel)
4126 struct rte_eth_dev *dev;
4128 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4129 dev = &rte_eth_devices[port_id];
4131 if (udp_tunnel == NULL) {
4133 "Cannot delete ethdev port %u UDP tunnel port from NULL UDP tunnel\n",
4138 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
4139 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4143 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
4144 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
4149 rte_eth_led_on(uint16_t port_id)
4151 struct rte_eth_dev *dev;
4153 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4154 dev = &rte_eth_devices[port_id];
4156 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
4157 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
4161 rte_eth_led_off(uint16_t port_id)
4163 struct rte_eth_dev *dev;
4165 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4166 dev = &rte_eth_devices[port_id];
4168 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
4169 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
4173 rte_eth_fec_get_capability(uint16_t port_id,
4174 struct rte_eth_fec_capa *speed_fec_capa,
4177 struct rte_eth_dev *dev;
4180 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4181 dev = &rte_eth_devices[port_id];
4183 if (speed_fec_capa == NULL && num > 0) {
4185 "Cannot get ethdev port %u FEC capability to NULL when array size is non zero\n",
4190 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_get_capability, -ENOTSUP);
4191 ret = (*dev->dev_ops->fec_get_capability)(dev, speed_fec_capa, num);
4197 rte_eth_fec_get(uint16_t port_id, uint32_t *fec_capa)
4199 struct rte_eth_dev *dev;
4201 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4202 dev = &rte_eth_devices[port_id];
4204 if (fec_capa == NULL) {
4206 "Cannot get ethdev port %u current FEC mode to NULL\n",
4211 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_get, -ENOTSUP);
4212 return eth_err(port_id, (*dev->dev_ops->fec_get)(dev, fec_capa));
4216 rte_eth_fec_set(uint16_t port_id, uint32_t fec_capa)
4218 struct rte_eth_dev *dev;
4220 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4221 dev = &rte_eth_devices[port_id];
4223 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_set, -ENOTSUP);
4224 return eth_err(port_id, (*dev->dev_ops->fec_set)(dev, fec_capa));
4228 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
4232 eth_dev_get_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
4234 struct rte_eth_dev_info dev_info;
4235 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4239 ret = rte_eth_dev_info_get(port_id, &dev_info);
4243 for (i = 0; i < dev_info.max_mac_addrs; i++)
4244 if (memcmp(addr, &dev->data->mac_addrs[i],
4245 RTE_ETHER_ADDR_LEN) == 0)
4251 static const struct rte_ether_addr null_mac_addr;
4254 rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr,
4257 struct rte_eth_dev *dev;
4262 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4263 dev = &rte_eth_devices[port_id];
4267 "Cannot add ethdev port %u MAC address from NULL address\n",
4272 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
4274 if (rte_is_zero_ether_addr(addr)) {
4275 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
4279 if (pool >= ETH_64_POOLS) {
4280 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
4284 index = eth_dev_get_mac_addr_index(port_id, addr);
4286 index = eth_dev_get_mac_addr_index(port_id, &null_mac_addr);
4288 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
4293 pool_mask = dev->data->mac_pool_sel[index];
4295 /* Check if both MAC address and pool is already there, and do nothing */
4296 if (pool_mask & (1ULL << pool))
4301 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
4304 /* Update address in NIC data structure */
4305 rte_ether_addr_copy(addr, &dev->data->mac_addrs[index]);
4307 /* Update pool bitmap in NIC data structure */
4308 dev->data->mac_pool_sel[index] |= (1ULL << pool);
4311 return eth_err(port_id, ret);
4315 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *addr)
4317 struct rte_eth_dev *dev;
4320 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4321 dev = &rte_eth_devices[port_id];
4325 "Cannot remove ethdev port %u MAC address from NULL address\n",
4330 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
4332 index = eth_dev_get_mac_addr_index(port_id, addr);
4335 "Port %u: Cannot remove default MAC address\n",
4338 } else if (index < 0)
4339 return 0; /* Do nothing if address wasn't found */
4342 (*dev->dev_ops->mac_addr_remove)(dev, index);
4344 /* Update address in NIC data structure */
4345 rte_ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
4347 /* reset pool bitmap */
4348 dev->data->mac_pool_sel[index] = 0;
4354 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *addr)
4356 struct rte_eth_dev *dev;
4359 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4360 dev = &rte_eth_devices[port_id];
4364 "Cannot set ethdev port %u default MAC address from NULL address\n",
4369 if (!rte_is_valid_assigned_ether_addr(addr))
4372 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
4374 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
4378 /* Update default address in NIC data structure */
4379 rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]);
4386 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
4390 eth_dev_get_hash_mac_addr_index(uint16_t port_id,
4391 const struct rte_ether_addr *addr)
4393 struct rte_eth_dev_info dev_info;
4394 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4398 ret = rte_eth_dev_info_get(port_id, &dev_info);
4402 if (!dev->data->hash_mac_addrs)
4405 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
4406 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
4407 RTE_ETHER_ADDR_LEN) == 0)
4414 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
4419 struct rte_eth_dev *dev;
4421 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4422 dev = &rte_eth_devices[port_id];
4426 "Cannot set ethdev port %u unicast hash table from NULL address\n",
4431 if (rte_is_zero_ether_addr(addr)) {
4432 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
4437 index = eth_dev_get_hash_mac_addr_index(port_id, addr);
4438 /* Check if it's already there, and do nothing */
4439 if ((index >= 0) && on)
4445 "Port %u: the MAC address was not set in UTA\n",
4450 index = eth_dev_get_hash_mac_addr_index(port_id, &null_mac_addr);
4452 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
4458 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
4459 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
4461 /* Update address in NIC data structure */
4463 rte_ether_addr_copy(addr,
4464 &dev->data->hash_mac_addrs[index]);
4466 rte_ether_addr_copy(&null_mac_addr,
4467 &dev->data->hash_mac_addrs[index]);
4470 return eth_err(port_id, ret);
4474 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
4476 struct rte_eth_dev *dev;
4478 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4479 dev = &rte_eth_devices[port_id];
4481 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
4482 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
4486 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
4489 struct rte_eth_dev *dev;
4490 struct rte_eth_dev_info dev_info;
4491 struct rte_eth_link link;
4494 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4495 dev = &rte_eth_devices[port_id];
4497 ret = rte_eth_dev_info_get(port_id, &dev_info);
4501 link = dev->data->dev_link;
4503 if (queue_idx > dev_info.max_tx_queues) {
4505 "Set queue rate limit:port %u: invalid queue id=%u\n",
4506 port_id, queue_idx);
4510 if (tx_rate > link.link_speed) {
4512 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
4513 tx_rate, link.link_speed);
4517 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
4518 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
4519 queue_idx, tx_rate));
4523 rte_eth_mirror_rule_set(uint16_t port_id,
4524 struct rte_eth_mirror_conf *mirror_conf,
4525 uint8_t rule_id, uint8_t on)
4527 struct rte_eth_dev *dev;
4529 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4530 dev = &rte_eth_devices[port_id];
4532 if (mirror_conf == NULL) {
4534 "Cannot set ethdev port %u mirror rule from NULL config\n",
4539 if (mirror_conf->rule_type == 0) {
4540 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
4544 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
4545 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
4550 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
4551 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
4552 (mirror_conf->pool_mask == 0)) {
4554 "Invalid mirror pool, pool mask can not be 0\n");
4558 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
4559 mirror_conf->vlan.vlan_mask == 0) {
4561 "Invalid vlan mask, vlan mask can not be 0\n");
4565 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
4567 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
4568 mirror_conf, rule_id, on));
4572 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
4574 struct rte_eth_dev *dev;
4576 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4577 dev = &rte_eth_devices[port_id];
4579 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
4580 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev, rule_id));
4583 RTE_INIT(eth_dev_init_cb_lists)
4587 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
4588 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
4592 rte_eth_dev_callback_register(uint16_t port_id,
4593 enum rte_eth_event_type event,
4594 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4596 struct rte_eth_dev *dev;
4597 struct rte_eth_dev_callback *user_cb;
4601 if (cb_fn == NULL) {
4603 "Cannot register ethdev port %u callback from NULL\n",
4608 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4609 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4613 if (port_id == RTE_ETH_ALL) {
4615 last_port = RTE_MAX_ETHPORTS - 1;
4617 next_port = last_port = port_id;
4620 rte_spinlock_lock(ð_dev_cb_lock);
4623 dev = &rte_eth_devices[next_port];
4625 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
4626 if (user_cb->cb_fn == cb_fn &&
4627 user_cb->cb_arg == cb_arg &&
4628 user_cb->event == event) {
4633 /* create a new callback. */
4634 if (user_cb == NULL) {
4635 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
4636 sizeof(struct rte_eth_dev_callback), 0);
4637 if (user_cb != NULL) {
4638 user_cb->cb_fn = cb_fn;
4639 user_cb->cb_arg = cb_arg;
4640 user_cb->event = event;
4641 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
4644 rte_spinlock_unlock(ð_dev_cb_lock);
4645 rte_eth_dev_callback_unregister(port_id, event,
4651 } while (++next_port <= last_port);
4653 rte_spinlock_unlock(ð_dev_cb_lock);
4658 rte_eth_dev_callback_unregister(uint16_t port_id,
4659 enum rte_eth_event_type event,
4660 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4663 struct rte_eth_dev *dev;
4664 struct rte_eth_dev_callback *cb, *next;
4668 if (cb_fn == NULL) {
4670 "Cannot unregister ethdev port %u callback from NULL\n",
4675 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4676 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4680 if (port_id == RTE_ETH_ALL) {
4682 last_port = RTE_MAX_ETHPORTS - 1;
4684 next_port = last_port = port_id;
4687 rte_spinlock_lock(ð_dev_cb_lock);
4690 dev = &rte_eth_devices[next_port];
4692 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
4695 next = TAILQ_NEXT(cb, next);
4697 if (cb->cb_fn != cb_fn || cb->event != event ||
4698 (cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
4702 * if this callback is not executing right now,
4705 if (cb->active == 0) {
4706 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
4712 } while (++next_port <= last_port);
4714 rte_spinlock_unlock(ð_dev_cb_lock);
4719 rte_eth_dev_callback_process(struct rte_eth_dev *dev,
4720 enum rte_eth_event_type event, void *ret_param)
4722 struct rte_eth_dev_callback *cb_lst;
4723 struct rte_eth_dev_callback dev_cb;
4726 rte_spinlock_lock(ð_dev_cb_lock);
4727 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
4728 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
4732 if (ret_param != NULL)
4733 dev_cb.ret_param = ret_param;
4735 rte_spinlock_unlock(ð_dev_cb_lock);
4736 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
4737 dev_cb.cb_arg, dev_cb.ret_param);
4738 rte_spinlock_lock(ð_dev_cb_lock);
4741 rte_spinlock_unlock(ð_dev_cb_lock);
4746 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
4751 rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
4753 dev->state = RTE_ETH_DEV_ATTACHED;
4757 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
4760 struct rte_eth_dev *dev;
4761 struct rte_intr_handle *intr_handle;
4765 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4766 dev = &rte_eth_devices[port_id];
4768 if (!dev->intr_handle) {
4769 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4773 intr_handle = dev->intr_handle;
4774 if (!intr_handle->intr_vec) {
4775 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4779 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
4780 vec = intr_handle->intr_vec[qid];
4781 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4782 if (rc && rc != -EEXIST) {
4784 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4785 port_id, qid, op, epfd, vec);
4793 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
4795 struct rte_intr_handle *intr_handle;
4796 struct rte_eth_dev *dev;
4797 unsigned int efd_idx;
4801 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
4802 dev = &rte_eth_devices[port_id];
4804 if (queue_id >= dev->data->nb_rx_queues) {
4805 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4809 if (!dev->intr_handle) {
4810 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4814 intr_handle = dev->intr_handle;
4815 if (!intr_handle->intr_vec) {
4816 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4820 vec = intr_handle->intr_vec[queue_id];
4821 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
4822 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
4823 fd = intr_handle->efds[efd_idx];
4829 eth_dev_dma_mzone_name(char *name, size_t len, uint16_t port_id, uint16_t queue_id,
4830 const char *ring_name)
4832 return snprintf(name, len, "eth_p%d_q%d_%s",
4833 port_id, queue_id, ring_name);
4836 const struct rte_memzone *
4837 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
4838 uint16_t queue_id, size_t size, unsigned align,
4841 char z_name[RTE_MEMZONE_NAMESIZE];
4842 const struct rte_memzone *mz;
4845 rc = eth_dev_dma_mzone_name(z_name, sizeof(z_name), dev->data->port_id,
4846 queue_id, ring_name);
4847 if (rc >= RTE_MEMZONE_NAMESIZE) {
4848 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4849 rte_errno = ENAMETOOLONG;
4853 mz = rte_memzone_lookup(z_name);
4855 if ((socket_id != SOCKET_ID_ANY && socket_id != mz->socket_id) ||
4857 ((uintptr_t)mz->addr & (align - 1)) != 0) {
4859 "memzone %s does not justify the requested attributes\n",
4867 return rte_memzone_reserve_aligned(z_name, size, socket_id,
4868 RTE_MEMZONE_IOVA_CONTIG, align);
4872 rte_eth_dma_zone_free(const struct rte_eth_dev *dev, const char *ring_name,
4875 char z_name[RTE_MEMZONE_NAMESIZE];
4876 const struct rte_memzone *mz;
4879 rc = eth_dev_dma_mzone_name(z_name, sizeof(z_name), dev->data->port_id,
4880 queue_id, ring_name);
4881 if (rc >= RTE_MEMZONE_NAMESIZE) {
4882 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4883 return -ENAMETOOLONG;
4886 mz = rte_memzone_lookup(z_name);
4888 rc = rte_memzone_free(mz);
4896 rte_eth_dev_create(struct rte_device *device, const char *name,
4897 size_t priv_data_size,
4898 ethdev_bus_specific_init ethdev_bus_specific_init,
4899 void *bus_init_params,
4900 ethdev_init_t ethdev_init, void *init_params)
4902 struct rte_eth_dev *ethdev;
4905 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
4907 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
4908 ethdev = rte_eth_dev_allocate(name);
4912 if (priv_data_size) {
4913 ethdev->data->dev_private = rte_zmalloc_socket(
4914 name, priv_data_size, RTE_CACHE_LINE_SIZE,
4917 if (!ethdev->data->dev_private) {
4919 "failed to allocate private data\n");
4925 ethdev = rte_eth_dev_attach_secondary(name);
4928 "secondary process attach failed, ethdev doesn't exist\n");
4933 ethdev->device = device;
4935 if (ethdev_bus_specific_init) {
4936 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
4939 "ethdev bus specific initialisation failed\n");
4944 retval = ethdev_init(ethdev, init_params);
4946 RTE_ETHDEV_LOG(ERR, "ethdev initialisation failed\n");
4950 rte_eth_dev_probing_finish(ethdev);
4955 rte_eth_dev_release_port(ethdev);
4960 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
4961 ethdev_uninit_t ethdev_uninit)
4965 ethdev = rte_eth_dev_allocated(ethdev->data->name);
4969 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
4971 ret = ethdev_uninit(ethdev);
4975 return rte_eth_dev_release_port(ethdev);
4979 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
4980 int epfd, int op, void *data)
4983 struct rte_eth_dev *dev;
4984 struct rte_intr_handle *intr_handle;
4987 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4988 dev = &rte_eth_devices[port_id];
4990 if (queue_id >= dev->data->nb_rx_queues) {
4991 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4995 if (!dev->intr_handle) {
4996 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
5000 intr_handle = dev->intr_handle;
5001 if (!intr_handle->intr_vec) {
5002 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
5006 vec = intr_handle->intr_vec[queue_id];
5007 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
5008 if (rc && rc != -EEXIST) {
5010 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
5011 port_id, queue_id, op, epfd, vec);
5019 rte_eth_dev_rx_intr_enable(uint16_t port_id,
5022 struct rte_eth_dev *dev;
5025 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5026 dev = &rte_eth_devices[port_id];
5028 ret = eth_dev_validate_rx_queue(dev, queue_id);
5032 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
5033 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id));
5037 rte_eth_dev_rx_intr_disable(uint16_t port_id,
5040 struct rte_eth_dev *dev;
5043 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5044 dev = &rte_eth_devices[port_id];
5046 ret = eth_dev_validate_rx_queue(dev, queue_id);
5050 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
5051 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id));
5055 const struct rte_eth_rxtx_callback *
5056 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
5057 rte_rx_callback_fn fn, void *user_param)
5059 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
5060 rte_errno = ENOTSUP;
5063 struct rte_eth_dev *dev;
5065 /* check input parameters */
5066 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
5067 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
5071 dev = &rte_eth_devices[port_id];
5072 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
5076 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
5084 cb->param = user_param;
5086 rte_spinlock_lock(ð_dev_rx_cb_lock);
5087 /* Add the callbacks in fifo order. */
5088 struct rte_eth_rxtx_callback *tail =
5089 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
5092 /* Stores to cb->fn and cb->param should complete before
5093 * cb is visible to data plane.
5096 &rte_eth_devices[port_id].post_rx_burst_cbs[queue_id],
5097 cb, __ATOMIC_RELEASE);
5102 /* Stores to cb->fn and cb->param should complete before
5103 * cb is visible to data plane.
5105 __atomic_store_n(&tail->next, cb, __ATOMIC_RELEASE);
5107 rte_spinlock_unlock(ð_dev_rx_cb_lock);
5112 const struct rte_eth_rxtx_callback *
5113 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
5114 rte_rx_callback_fn fn, void *user_param)
5116 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
5117 rte_errno = ENOTSUP;
5120 /* check input parameters */
5121 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
5122 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
5127 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
5135 cb->param = user_param;
5137 rte_spinlock_lock(ð_dev_rx_cb_lock);
5138 /* Add the callbacks at first position */
5139 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
5140 /* Stores to cb->fn, cb->param and cb->next should complete before
5141 * cb is visible to data plane threads.
5144 &rte_eth_devices[port_id].post_rx_burst_cbs[queue_id],
5145 cb, __ATOMIC_RELEASE);
5146 rte_spinlock_unlock(ð_dev_rx_cb_lock);
5151 const struct rte_eth_rxtx_callback *
5152 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
5153 rte_tx_callback_fn fn, void *user_param)
5155 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
5156 rte_errno = ENOTSUP;
5159 struct rte_eth_dev *dev;
5161 /* check input parameters */
5162 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
5163 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
5168 dev = &rte_eth_devices[port_id];
5169 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
5174 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
5182 cb->param = user_param;
5184 rte_spinlock_lock(ð_dev_tx_cb_lock);
5185 /* Add the callbacks in fifo order. */
5186 struct rte_eth_rxtx_callback *tail =
5187 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
5190 /* Stores to cb->fn and cb->param should complete before
5191 * cb is visible to data plane.
5194 &rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id],
5195 cb, __ATOMIC_RELEASE);
5200 /* Stores to cb->fn and cb->param should complete before
5201 * cb is visible to data plane.
5203 __atomic_store_n(&tail->next, cb, __ATOMIC_RELEASE);
5205 rte_spinlock_unlock(ð_dev_tx_cb_lock);
5211 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
5212 const struct rte_eth_rxtx_callback *user_cb)
5214 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
5217 /* Check input parameters. */
5218 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5219 if (user_cb == NULL ||
5220 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
5223 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
5224 struct rte_eth_rxtx_callback *cb;
5225 struct rte_eth_rxtx_callback **prev_cb;
5228 rte_spinlock_lock(ð_dev_rx_cb_lock);
5229 prev_cb = &dev->post_rx_burst_cbs[queue_id];
5230 for (; *prev_cb != NULL; prev_cb = &cb->next) {
5232 if (cb == user_cb) {
5233 /* Remove the user cb from the callback list. */
5234 __atomic_store_n(prev_cb, cb->next, __ATOMIC_RELAXED);
5239 rte_spinlock_unlock(ð_dev_rx_cb_lock);
5245 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
5246 const struct rte_eth_rxtx_callback *user_cb)
5248 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
5251 /* Check input parameters. */
5252 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5253 if (user_cb == NULL ||
5254 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
5257 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
5259 struct rte_eth_rxtx_callback *cb;
5260 struct rte_eth_rxtx_callback **prev_cb;
5262 rte_spinlock_lock(ð_dev_tx_cb_lock);
5263 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
5264 for (; *prev_cb != NULL; prev_cb = &cb->next) {
5266 if (cb == user_cb) {
5267 /* Remove the user cb from the callback list. */
5268 __atomic_store_n(prev_cb, cb->next, __ATOMIC_RELAXED);
5273 rte_spinlock_unlock(ð_dev_tx_cb_lock);
5279 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
5280 struct rte_eth_rxq_info *qinfo)
5282 struct rte_eth_dev *dev;
5284 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5285 dev = &rte_eth_devices[port_id];
5287 if (queue_id >= dev->data->nb_rx_queues) {
5288 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
5292 if (qinfo == NULL) {
5293 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u Rx queue %u info to NULL\n",
5298 if (dev->data->rx_queues == NULL ||
5299 dev->data->rx_queues[queue_id] == NULL) {
5301 "Rx queue %"PRIu16" of device with port_id=%"
5302 PRIu16" has not been setup\n",
5307 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
5308 RTE_ETHDEV_LOG(INFO,
5309 "Can't get hairpin Rx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
5314 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
5316 memset(qinfo, 0, sizeof(*qinfo));
5317 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
5318 qinfo->queue_state = dev->data->rx_queue_state[queue_id];
5324 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
5325 struct rte_eth_txq_info *qinfo)
5327 struct rte_eth_dev *dev;
5329 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5330 dev = &rte_eth_devices[port_id];
5332 if (queue_id >= dev->data->nb_tx_queues) {
5333 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
5337 if (qinfo == NULL) {
5338 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u Tx queue %u info to NULL\n",
5343 if (dev->data->tx_queues == NULL ||
5344 dev->data->tx_queues[queue_id] == NULL) {
5346 "Tx queue %"PRIu16" of device with port_id=%"
5347 PRIu16" has not been setup\n",
5352 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
5353 RTE_ETHDEV_LOG(INFO,
5354 "Can't get hairpin Tx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
5359 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
5361 memset(qinfo, 0, sizeof(*qinfo));
5362 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
5363 qinfo->queue_state = dev->data->tx_queue_state[queue_id];
5369 rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
5370 struct rte_eth_burst_mode *mode)
5372 struct rte_eth_dev *dev;
5374 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5375 dev = &rte_eth_devices[port_id];
5377 if (queue_id >= dev->data->nb_rx_queues) {
5378 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
5384 "Cannot get ethdev port %u Rx queue %u burst mode to NULL\n",
5389 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_burst_mode_get, -ENOTSUP);
5390 memset(mode, 0, sizeof(*mode));
5391 return eth_err(port_id,
5392 dev->dev_ops->rx_burst_mode_get(dev, queue_id, mode));
5396 rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
5397 struct rte_eth_burst_mode *mode)
5399 struct rte_eth_dev *dev;
5401 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5402 dev = &rte_eth_devices[port_id];
5404 if (queue_id >= dev->data->nb_tx_queues) {
5405 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
5411 "Cannot get ethdev port %u Tx queue %u burst mode to NULL\n",
5416 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_burst_mode_get, -ENOTSUP);
5417 memset(mode, 0, sizeof(*mode));
5418 return eth_err(port_id,
5419 dev->dev_ops->tx_burst_mode_get(dev, queue_id, mode));
5423 rte_eth_get_monitor_addr(uint16_t port_id, uint16_t queue_id,
5424 struct rte_power_monitor_cond *pmc)
5426 struct rte_eth_dev *dev;
5428 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5429 dev = &rte_eth_devices[port_id];
5431 if (queue_id >= dev->data->nb_rx_queues) {
5432 RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u\n", queue_id);
5438 "Cannot get ethdev port %u Rx queue %u power monitor condition to NULL\n",
5443 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_monitor_addr, -ENOTSUP);
5444 return eth_err(port_id,
5445 dev->dev_ops->get_monitor_addr(dev->data->rx_queues[queue_id], pmc));
5449 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
5450 struct rte_ether_addr *mc_addr_set,
5451 uint32_t nb_mc_addr)
5453 struct rte_eth_dev *dev;
5455 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5456 dev = &rte_eth_devices[port_id];
5458 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
5459 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
5460 mc_addr_set, nb_mc_addr));
5464 rte_eth_timesync_enable(uint16_t port_id)
5466 struct rte_eth_dev *dev;
5468 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5469 dev = &rte_eth_devices[port_id];
5471 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
5472 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
5476 rte_eth_timesync_disable(uint16_t port_id)
5478 struct rte_eth_dev *dev;
5480 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5481 dev = &rte_eth_devices[port_id];
5483 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
5484 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
5488 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
5491 struct rte_eth_dev *dev;
5493 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5494 dev = &rte_eth_devices[port_id];
5496 if (timestamp == NULL) {
5498 "Cannot read ethdev port %u Rx timestamp to NULL\n",
5503 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
5504 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
5505 (dev, timestamp, flags));
5509 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
5510 struct timespec *timestamp)
5512 struct rte_eth_dev *dev;
5514 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5515 dev = &rte_eth_devices[port_id];
5517 if (timestamp == NULL) {
5519 "Cannot read ethdev port %u Tx timestamp to NULL\n",
5524 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
5525 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
5530 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
5532 struct rte_eth_dev *dev;
5534 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5535 dev = &rte_eth_devices[port_id];
5537 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
5538 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev, delta));
5542 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
5544 struct rte_eth_dev *dev;
5546 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5547 dev = &rte_eth_devices[port_id];
5549 if (timestamp == NULL) {
5551 "Cannot read ethdev port %u timesync time to NULL\n",
5556 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
5557 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
5562 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
5564 struct rte_eth_dev *dev;
5566 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5567 dev = &rte_eth_devices[port_id];
5569 if (timestamp == NULL) {
5571 "Cannot write ethdev port %u timesync from NULL time\n",
5576 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
5577 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
5582 rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
5584 struct rte_eth_dev *dev;
5586 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5587 dev = &rte_eth_devices[port_id];
5589 if (clock == NULL) {
5590 RTE_ETHDEV_LOG(ERR, "Cannot read ethdev port %u clock to NULL\n",
5595 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->read_clock, -ENOTSUP);
5596 return eth_err(port_id, (*dev->dev_ops->read_clock)(dev, clock));
5600 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
5602 struct rte_eth_dev *dev;
5604 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5605 dev = &rte_eth_devices[port_id];
5609 "Cannot get ethdev port %u register info to NULL\n",
5614 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
5615 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
5619 rte_eth_dev_get_eeprom_length(uint16_t port_id)
5621 struct rte_eth_dev *dev;
5623 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5624 dev = &rte_eth_devices[port_id];
5626 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
5627 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
5631 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
5633 struct rte_eth_dev *dev;
5635 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5636 dev = &rte_eth_devices[port_id];
5640 "Cannot get ethdev port %u EEPROM info to NULL\n",
5645 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
5646 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
5650 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
5652 struct rte_eth_dev *dev;
5654 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5655 dev = &rte_eth_devices[port_id];
5659 "Cannot set ethdev port %u EEPROM from NULL info\n",
5664 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
5665 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
5669 rte_eth_dev_get_module_info(uint16_t port_id,
5670 struct rte_eth_dev_module_info *modinfo)
5672 struct rte_eth_dev *dev;
5674 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5675 dev = &rte_eth_devices[port_id];
5677 if (modinfo == NULL) {
5679 "Cannot get ethdev port %u EEPROM module info to NULL\n",
5684 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
5685 return (*dev->dev_ops->get_module_info)(dev, modinfo);
5689 rte_eth_dev_get_module_eeprom(uint16_t port_id,
5690 struct rte_dev_eeprom_info *info)
5692 struct rte_eth_dev *dev;
5694 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5695 dev = &rte_eth_devices[port_id];
5699 "Cannot get ethdev port %u module EEPROM info to NULL\n",
5704 if (info->data == NULL) {
5706 "Cannot get ethdev port %u module EEPROM data to NULL\n",
5711 if (info->length == 0) {
5713 "Cannot get ethdev port %u module EEPROM to data with zero size\n",
5718 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
5719 return (*dev->dev_ops->get_module_eeprom)(dev, info);
5723 rte_eth_dev_get_dcb_info(uint16_t port_id,
5724 struct rte_eth_dcb_info *dcb_info)
5726 struct rte_eth_dev *dev;
5728 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5729 dev = &rte_eth_devices[port_id];
5731 if (dcb_info == NULL) {
5733 "Cannot get ethdev port %u DCB info to NULL\n",
5738 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
5740 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
5741 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
5745 eth_dev_adjust_nb_desc(uint16_t *nb_desc,
5746 const struct rte_eth_desc_lim *desc_lim)
5748 if (desc_lim->nb_align != 0)
5749 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
5751 if (desc_lim->nb_max != 0)
5752 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
5754 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
5758 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
5759 uint16_t *nb_rx_desc,
5760 uint16_t *nb_tx_desc)
5762 struct rte_eth_dev_info dev_info;
5765 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5767 ret = rte_eth_dev_info_get(port_id, &dev_info);
5771 if (nb_rx_desc != NULL)
5772 eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
5774 if (nb_tx_desc != NULL)
5775 eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
5781 rte_eth_dev_hairpin_capability_get(uint16_t port_id,
5782 struct rte_eth_hairpin_cap *cap)
5784 struct rte_eth_dev *dev;
5786 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5787 dev = &rte_eth_devices[port_id];
5791 "Cannot get ethdev port %u hairpin capability to NULL\n",
5796 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_cap_get, -ENOTSUP);
5797 memset(cap, 0, sizeof(*cap));
5798 return eth_err(port_id, (*dev->dev_ops->hairpin_cap_get)(dev, cap));
5802 rte_eth_dev_is_rx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5804 if (dev->data->rx_queue_state[queue_id] == RTE_ETH_QUEUE_STATE_HAIRPIN)
5810 rte_eth_dev_is_tx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5812 if (dev->data->tx_queue_state[queue_id] == RTE_ETH_QUEUE_STATE_HAIRPIN)
5818 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
5820 struct rte_eth_dev *dev;
5822 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5823 dev = &rte_eth_devices[port_id];
5827 "Cannot test ethdev port %u mempool operation from NULL pool\n",
5832 if (*dev->dev_ops->pool_ops_supported == NULL)
5833 return 1; /* all pools are supported */
5835 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
5839 * A set of values to describe the possible states of a switch domain.
5841 enum rte_eth_switch_domain_state {
5842 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
5843 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
5847 * Array of switch domains available for allocation. Array is sized to
5848 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
5849 * ethdev ports in a single process.
5851 static struct rte_eth_dev_switch {
5852 enum rte_eth_switch_domain_state state;
5853 } eth_dev_switch_domains[RTE_MAX_ETHPORTS];
5856 rte_eth_switch_domain_alloc(uint16_t *domain_id)
5860 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
5862 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
5863 if (eth_dev_switch_domains[i].state ==
5864 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
5865 eth_dev_switch_domains[i].state =
5866 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
5876 rte_eth_switch_domain_free(uint16_t domain_id)
5878 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
5879 domain_id >= RTE_MAX_ETHPORTS)
5882 if (eth_dev_switch_domains[domain_id].state !=
5883 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
5886 eth_dev_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
5892 eth_dev_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
5895 struct rte_kvargs_pair *pair;
5898 arglist->str = strdup(str_in);
5899 if (arglist->str == NULL)
5902 letter = arglist->str;
5905 pair = &arglist->pairs[0];
5908 case 0: /* Initial */
5911 else if (*letter == '\0')
5918 case 1: /* Parsing key */
5919 if (*letter == '=') {
5921 pair->value = letter + 1;
5923 } else if (*letter == ',' || *letter == '\0')
5928 case 2: /* Parsing value */
5931 else if (*letter == ',') {
5934 pair = &arglist->pairs[arglist->count];
5936 } else if (*letter == '\0') {
5939 pair = &arglist->pairs[arglist->count];
5944 case 3: /* Parsing list */
5947 else if (*letter == '\0')
5956 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
5958 struct rte_kvargs args;
5959 struct rte_kvargs_pair *pair;
5963 memset(eth_da, 0, sizeof(*eth_da));
5965 result = eth_dev_devargs_tokenise(&args, dargs);
5969 for (i = 0; i < args.count; i++) {
5970 pair = &args.pairs[i];
5971 if (strcmp("representor", pair->key) == 0) {
5972 if (eth_da->type != RTE_ETH_REPRESENTOR_NONE) {
5973 RTE_LOG(ERR, EAL, "duplicated representor key: %s\n",
5978 result = rte_eth_devargs_parse_representor_ports(
5979 pair->value, eth_da);
5993 rte_eth_representor_id_get(const struct rte_eth_dev *ethdev,
5994 enum rte_eth_representor_type type,
5995 int controller, int pf, int representor_port,
6000 struct rte_eth_representor_info *info = NULL;
6003 if (type == RTE_ETH_REPRESENTOR_NONE)
6005 if (repr_id == NULL)
6008 /* Get PMD representor range info. */
6009 ret = rte_eth_representor_info_get(ethdev->data->port_id, NULL);
6010 if (ret == -ENOTSUP && type == RTE_ETH_REPRESENTOR_VF &&
6011 controller == -1 && pf == -1) {
6012 /* Direct mapping for legacy VF representor. */
6013 *repr_id = representor_port;
6015 } else if (ret < 0) {
6019 size = sizeof(*info) + n * sizeof(info->ranges[0]);
6020 info = calloc(1, size);
6023 info->nb_ranges_alloc = n;
6024 ret = rte_eth_representor_info_get(ethdev->data->port_id, info);
6028 /* Default controller and pf to caller. */
6029 if (controller == -1)
6030 controller = info->controller;
6034 /* Locate representor ID. */
6036 for (i = 0; i < info->nb_ranges; ++i) {
6037 if (info->ranges[i].type != type)
6039 if (info->ranges[i].controller != controller)
6041 if (info->ranges[i].id_end < info->ranges[i].id_base) {
6042 RTE_LOG(WARNING, EAL, "Port %hu invalid representor ID Range %u - %u, entry %d\n",
6043 ethdev->data->port_id, info->ranges[i].id_base,
6044 info->ranges[i].id_end, i);
6048 count = info->ranges[i].id_end - info->ranges[i].id_base + 1;
6049 switch (info->ranges[i].type) {
6050 case RTE_ETH_REPRESENTOR_PF:
6051 if (pf < info->ranges[i].pf ||
6052 pf >= info->ranges[i].pf + count)
6054 *repr_id = info->ranges[i].id_base +
6055 (pf - info->ranges[i].pf);
6058 case RTE_ETH_REPRESENTOR_VF:
6059 if (info->ranges[i].pf != pf)
6061 if (representor_port < info->ranges[i].vf ||
6062 representor_port >= info->ranges[i].vf + count)
6064 *repr_id = info->ranges[i].id_base +
6065 (representor_port - info->ranges[i].vf);
6068 case RTE_ETH_REPRESENTOR_SF:
6069 if (info->ranges[i].pf != pf)
6071 if (representor_port < info->ranges[i].sf ||
6072 representor_port >= info->ranges[i].sf + count)
6074 *repr_id = info->ranges[i].id_base +
6075 (representor_port - info->ranges[i].sf);
6088 eth_dev_handle_port_list(const char *cmd __rte_unused,
6089 const char *params __rte_unused,
6090 struct rte_tel_data *d)
6094 rte_tel_data_start_array(d, RTE_TEL_INT_VAL);
6095 RTE_ETH_FOREACH_DEV(port_id)
6096 rte_tel_data_add_array_int(d, port_id);
6101 eth_dev_add_port_queue_stats(struct rte_tel_data *d, uint64_t *q_stats,
6102 const char *stat_name)
6105 struct rte_tel_data *q_data = rte_tel_data_alloc();
6106 rte_tel_data_start_array(q_data, RTE_TEL_U64_VAL);
6107 for (q = 0; q < RTE_ETHDEV_QUEUE_STAT_CNTRS; q++)
6108 rte_tel_data_add_array_u64(q_data, q_stats[q]);
6109 rte_tel_data_add_dict_container(d, stat_name, q_data, 0);
6112 #define ADD_DICT_STAT(stats, s) rte_tel_data_add_dict_u64(d, #s, stats.s)
6115 eth_dev_handle_port_stats(const char *cmd __rte_unused,
6117 struct rte_tel_data *d)
6119 struct rte_eth_stats stats;
6122 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
6125 port_id = atoi(params);
6126 if (!rte_eth_dev_is_valid_port(port_id))
6129 ret = rte_eth_stats_get(port_id, &stats);
6133 rte_tel_data_start_dict(d);
6134 ADD_DICT_STAT(stats, ipackets);
6135 ADD_DICT_STAT(stats, opackets);
6136 ADD_DICT_STAT(stats, ibytes);
6137 ADD_DICT_STAT(stats, obytes);
6138 ADD_DICT_STAT(stats, imissed);
6139 ADD_DICT_STAT(stats, ierrors);
6140 ADD_DICT_STAT(stats, oerrors);
6141 ADD_DICT_STAT(stats, rx_nombuf);
6142 eth_dev_add_port_queue_stats(d, stats.q_ipackets, "q_ipackets");
6143 eth_dev_add_port_queue_stats(d, stats.q_opackets, "q_opackets");
6144 eth_dev_add_port_queue_stats(d, stats.q_ibytes, "q_ibytes");
6145 eth_dev_add_port_queue_stats(d, stats.q_obytes, "q_obytes");
6146 eth_dev_add_port_queue_stats(d, stats.q_errors, "q_errors");
6152 eth_dev_handle_port_xstats(const char *cmd __rte_unused,
6154 struct rte_tel_data *d)
6156 struct rte_eth_xstat *eth_xstats;
6157 struct rte_eth_xstat_name *xstat_names;
6158 int port_id, num_xstats;
6162 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
6165 port_id = strtoul(params, &end_param, 0);
6166 if (*end_param != '\0')
6167 RTE_ETHDEV_LOG(NOTICE,
6168 "Extra parameters passed to ethdev telemetry command, ignoring");
6169 if (!rte_eth_dev_is_valid_port(port_id))
6172 num_xstats = rte_eth_xstats_get(port_id, NULL, 0);
6176 /* use one malloc for both names and stats */
6177 eth_xstats = malloc((sizeof(struct rte_eth_xstat) +
6178 sizeof(struct rte_eth_xstat_name)) * num_xstats);
6179 if (eth_xstats == NULL)
6181 xstat_names = (void *)ð_xstats[num_xstats];
6183 ret = rte_eth_xstats_get_names(port_id, xstat_names, num_xstats);
6184 if (ret < 0 || ret > num_xstats) {
6189 ret = rte_eth_xstats_get(port_id, eth_xstats, num_xstats);
6190 if (ret < 0 || ret > num_xstats) {
6195 rte_tel_data_start_dict(d);
6196 for (i = 0; i < num_xstats; i++)
6197 rte_tel_data_add_dict_u64(d, xstat_names[i].name,
6198 eth_xstats[i].value);
6203 eth_dev_handle_port_link_status(const char *cmd __rte_unused,
6205 struct rte_tel_data *d)
6207 static const char *status_str = "status";
6209 struct rte_eth_link link;
6212 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
6215 port_id = strtoul(params, &end_param, 0);
6216 if (*end_param != '\0')
6217 RTE_ETHDEV_LOG(NOTICE,
6218 "Extra parameters passed to ethdev telemetry command, ignoring");
6219 if (!rte_eth_dev_is_valid_port(port_id))
6222 ret = rte_eth_link_get_nowait(port_id, &link);
6226 rte_tel_data_start_dict(d);
6227 if (!link.link_status) {
6228 rte_tel_data_add_dict_string(d, status_str, "DOWN");
6231 rte_tel_data_add_dict_string(d, status_str, "UP");
6232 rte_tel_data_add_dict_u64(d, "speed", link.link_speed);
6233 rte_tel_data_add_dict_string(d, "duplex",
6234 (link.link_duplex == ETH_LINK_FULL_DUPLEX) ?
6235 "full-duplex" : "half-duplex");
6240 rte_eth_hairpin_queue_peer_update(uint16_t peer_port, uint16_t peer_queue,
6241 struct rte_hairpin_peer_info *cur_info,
6242 struct rte_hairpin_peer_info *peer_info,
6245 struct rte_eth_dev *dev;
6247 /* Current queue information is not mandatory. */
6248 if (peer_info == NULL)
6251 /* No need to check the validity again. */
6252 dev = &rte_eth_devices[peer_port];
6253 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_queue_peer_update,
6256 return (*dev->dev_ops->hairpin_queue_peer_update)(dev, peer_queue,
6257 cur_info, peer_info, direction);
6261 rte_eth_hairpin_queue_peer_bind(uint16_t cur_port, uint16_t cur_queue,
6262 struct rte_hairpin_peer_info *peer_info,
6265 struct rte_eth_dev *dev;
6267 if (peer_info == NULL)
6270 /* No need to check the validity again. */
6271 dev = &rte_eth_devices[cur_port];
6272 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_queue_peer_bind,
6275 return (*dev->dev_ops->hairpin_queue_peer_bind)(dev, cur_queue,
6276 peer_info, direction);
6280 rte_eth_hairpin_queue_peer_unbind(uint16_t cur_port, uint16_t cur_queue,
6283 struct rte_eth_dev *dev;
6285 /* No need to check the validity again. */
6286 dev = &rte_eth_devices[cur_port];
6287 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_queue_peer_unbind,
6290 return (*dev->dev_ops->hairpin_queue_peer_unbind)(dev, cur_queue,
6295 rte_eth_representor_info_get(uint16_t port_id,
6296 struct rte_eth_representor_info *info)
6298 struct rte_eth_dev *dev;
6300 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
6301 dev = &rte_eth_devices[port_id];
6303 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->representor_info_get, -ENOTSUP);
6304 return eth_err(port_id, (*dev->dev_ops->representor_info_get)(dev, info));
6307 RTE_LOG_REGISTER_DEFAULT(rte_eth_dev_logtype, INFO);
6309 RTE_INIT(ethdev_init_telemetry)
6311 rte_telemetry_register_cmd("/ethdev/list", eth_dev_handle_port_list,
6312 "Returns list of available ethdev ports. Takes no parameters");
6313 rte_telemetry_register_cmd("/ethdev/stats", eth_dev_handle_port_stats,
6314 "Returns the common stats for a port. Parameters: int port_id");
6315 rte_telemetry_register_cmd("/ethdev/xstats", eth_dev_handle_port_xstats,
6316 "Returns the extended stats for a port. Parameters: int port_id");
6317 rte_telemetry_register_cmd("/ethdev/link_status",
6318 eth_dev_handle_port_link_status,
6319 "Returns the link status for a port. Parameters: int port_id");