1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
12 #include <sys/queue.h>
14 #include <rte_byteorder.h>
16 #include <rte_debug.h>
17 #include <rte_interrupts.h>
18 #include <rte_memory.h>
19 #include <rte_memcpy.h>
20 #include <rte_memzone.h>
21 #include <rte_launch.h>
23 #include <rte_per_lcore.h>
24 #include <rte_lcore.h>
25 #include <rte_branch_prediction.h>
26 #include <rte_common.h>
27 #include <rte_mempool.h>
28 #include <rte_malloc.h>
30 #include <rte_errno.h>
31 #include <rte_spinlock.h>
32 #include <rte_string_fns.h>
33 #include <rte_kvargs.h>
34 #include <rte_class.h>
35 #include <rte_ether.h>
36 #include <rte_telemetry.h>
38 #include "rte_ethdev_trace.h"
39 #include "rte_ethdev.h"
40 #include "ethdev_driver.h"
41 #include "ethdev_profile.h"
42 #include "ethdev_private.h"
44 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
45 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
47 /* public fast-path API */
48 struct rte_eth_fp_ops rte_eth_fp_ops[RTE_MAX_ETHPORTS];
50 /* spinlock for eth device callbacks */
51 static rte_spinlock_t eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
53 /* spinlock for add/remove rx callbacks */
54 static rte_spinlock_t eth_dev_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
56 /* spinlock for add/remove tx callbacks */
57 static rte_spinlock_t eth_dev_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
59 /* spinlock for shared data allocation */
60 static rte_spinlock_t eth_dev_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
62 /* store statistics names and its offset in stats structure */
63 struct rte_eth_xstats_name_off {
64 char name[RTE_ETH_XSTATS_NAME_SIZE];
68 /* Shared memory between primary and secondary processes. */
70 uint64_t next_owner_id;
71 rte_spinlock_t ownership_lock;
72 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
73 } *eth_dev_shared_data;
75 static const struct rte_eth_xstats_name_off eth_dev_stats_strings[] = {
76 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
77 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
78 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
79 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
80 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
81 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
82 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
83 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
87 #define RTE_NB_STATS RTE_DIM(eth_dev_stats_strings)
89 static const struct rte_eth_xstats_name_off eth_dev_rxq_stats_strings[] = {
90 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
91 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
92 {"errors", offsetof(struct rte_eth_stats, q_errors)},
95 #define RTE_NB_RXQ_STATS RTE_DIM(eth_dev_rxq_stats_strings)
97 static const struct rte_eth_xstats_name_off eth_dev_txq_stats_strings[] = {
98 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
99 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
101 #define RTE_NB_TXQ_STATS RTE_DIM(eth_dev_txq_stats_strings)
103 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
104 { DEV_RX_OFFLOAD_##_name, #_name }
106 #define RTE_ETH_RX_OFFLOAD_BIT2STR(_name) \
107 { RTE_ETH_RX_OFFLOAD_##_name, #_name }
109 static const struct {
112 } eth_dev_rx_offload_names[] = {
113 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
114 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
115 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
118 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
119 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
120 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
121 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
122 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
123 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
124 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
125 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
126 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
127 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
128 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
129 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
130 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
131 RTE_RX_OFFLOAD_BIT2STR(RSS_HASH),
132 RTE_ETH_RX_OFFLOAD_BIT2STR(BUFFER_SPLIT),
135 #undef RTE_RX_OFFLOAD_BIT2STR
136 #undef RTE_ETH_RX_OFFLOAD_BIT2STR
138 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
139 { DEV_TX_OFFLOAD_##_name, #_name }
141 static const struct {
144 } eth_dev_tx_offload_names[] = {
145 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
146 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
148 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
149 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
150 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
151 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
152 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
153 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
154 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
156 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
157 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
158 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
159 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
160 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
161 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
162 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
163 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
164 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
165 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
166 RTE_TX_OFFLOAD_BIT2STR(SEND_ON_TIMESTAMP),
169 #undef RTE_TX_OFFLOAD_BIT2STR
172 * The user application callback description.
174 * It contains callback address to be registered by user application,
175 * the pointer to the parameters for callback, and the event type.
177 struct rte_eth_dev_callback {
178 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
179 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
180 void *cb_arg; /**< Parameter for callback */
181 void *ret_param; /**< Return parameter */
182 enum rte_eth_event_type event; /**< Interrupt event type */
183 uint32_t active; /**< Callback is executing */
192 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
195 struct rte_devargs devargs;
196 const char *bus_param_key;
197 char *bus_str = NULL;
198 char *cls_str = NULL;
202 RTE_ETHDEV_LOG(ERR, "Cannot initialize NULL iterator\n");
206 if (devargs_str == NULL) {
208 "Cannot initialize iterator from NULL device description string\n");
212 memset(iter, 0, sizeof(*iter));
213 memset(&devargs, 0, sizeof(devargs));
216 * The devargs string may use various syntaxes:
217 * - 0000:08:00.0,representor=[1-3]
218 * - pci:0000:06:00.0,representor=[0,5]
219 * - class=eth,mac=00:11:22:33:44:55
220 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
224 * Handle pure class filter (i.e. without any bus-level argument),
225 * from future new syntax.
226 * rte_devargs_parse() is not yet supporting the new syntax,
227 * that's why this simple case is temporarily parsed here.
229 #define iter_anybus_str "class=eth,"
230 if (strncmp(devargs_str, iter_anybus_str,
231 strlen(iter_anybus_str)) == 0) {
232 iter->cls_str = devargs_str + strlen(iter_anybus_str);
236 /* Split bus, device and parameters. */
237 ret = rte_devargs_parse(&devargs, devargs_str);
242 * Assume parameters of old syntax can match only at ethdev level.
243 * Extra parameters will be ignored, thanks to "+" prefix.
245 str_size = strlen(devargs.args) + 2;
246 cls_str = malloc(str_size);
247 if (cls_str == NULL) {
251 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
252 if (ret != str_size - 1) {
256 iter->cls_str = cls_str;
258 iter->bus = devargs.bus;
259 if (iter->bus->dev_iterate == NULL) {
264 /* Convert bus args to new syntax for use with new API dev_iterate. */
265 if ((strcmp(iter->bus->name, "vdev") == 0) ||
266 (strcmp(iter->bus->name, "fslmc") == 0) ||
267 (strcmp(iter->bus->name, "dpaa_bus") == 0)) {
268 bus_param_key = "name";
269 } else if (strcmp(iter->bus->name, "pci") == 0) {
270 bus_param_key = "addr";
275 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
276 bus_str = malloc(str_size);
277 if (bus_str == NULL) {
281 ret = snprintf(bus_str, str_size, "%s=%s",
282 bus_param_key, devargs.name);
283 if (ret != str_size - 1) {
287 iter->bus_str = bus_str;
290 iter->cls = rte_class_find_by_name("eth");
291 rte_devargs_reset(&devargs);
296 RTE_ETHDEV_LOG(ERR, "Bus %s does not support iterating.\n",
298 rte_devargs_reset(&devargs);
305 rte_eth_iterator_next(struct rte_dev_iterator *iter)
309 "Cannot get next device from NULL iterator\n");
310 return RTE_MAX_ETHPORTS;
313 if (iter->cls == NULL) /* invalid ethdev iterator */
314 return RTE_MAX_ETHPORTS;
316 do { /* loop to try all matching rte_device */
317 /* If not pure ethdev filter and */
318 if (iter->bus != NULL &&
319 /* not in middle of rte_eth_dev iteration, */
320 iter->class_device == NULL) {
321 /* get next rte_device to try. */
322 iter->device = iter->bus->dev_iterate(
323 iter->device, iter->bus_str, iter);
324 if (iter->device == NULL)
325 break; /* no more rte_device candidate */
327 /* A device is matching bus part, need to check ethdev part. */
328 iter->class_device = iter->cls->dev_iterate(
329 iter->class_device, iter->cls_str, iter);
330 if (iter->class_device != NULL)
331 return eth_dev_to_id(iter->class_device); /* match */
332 } while (iter->bus != NULL); /* need to try next rte_device */
334 /* No more ethdev port to iterate. */
335 rte_eth_iterator_cleanup(iter);
336 return RTE_MAX_ETHPORTS;
340 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
343 RTE_ETHDEV_LOG(ERR, "Cannot do clean up from NULL iterator\n");
347 if (iter->bus_str == NULL)
348 return; /* nothing to free in pure class filter */
349 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
350 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
351 memset(iter, 0, sizeof(*iter));
355 rte_eth_find_next(uint16_t port_id)
357 while (port_id < RTE_MAX_ETHPORTS &&
358 rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED)
361 if (port_id >= RTE_MAX_ETHPORTS)
362 return RTE_MAX_ETHPORTS;
368 * Macro to iterate over all valid ports for internal usage.
369 * Note: RTE_ETH_FOREACH_DEV is different because filtering owned ports.
371 #define RTE_ETH_FOREACH_VALID_DEV(port_id) \
372 for (port_id = rte_eth_find_next(0); \
373 port_id < RTE_MAX_ETHPORTS; \
374 port_id = rte_eth_find_next(port_id + 1))
377 rte_eth_find_next_of(uint16_t port_id, const struct rte_device *parent)
379 port_id = rte_eth_find_next(port_id);
380 while (port_id < RTE_MAX_ETHPORTS &&
381 rte_eth_devices[port_id].device != parent)
382 port_id = rte_eth_find_next(port_id + 1);
388 rte_eth_find_next_sibling(uint16_t port_id, uint16_t ref_port_id)
390 RTE_ETH_VALID_PORTID_OR_ERR_RET(ref_port_id, RTE_MAX_ETHPORTS);
391 return rte_eth_find_next_of(port_id,
392 rte_eth_devices[ref_port_id].device);
396 eth_dev_shared_data_prepare(void)
398 const unsigned flags = 0;
399 const struct rte_memzone *mz;
401 rte_spinlock_lock(ð_dev_shared_data_lock);
403 if (eth_dev_shared_data == NULL) {
404 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
405 /* Allocate port data and ownership shared memory. */
406 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
407 sizeof(*eth_dev_shared_data),
408 rte_socket_id(), flags);
410 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
412 rte_panic("Cannot allocate ethdev shared data\n");
414 eth_dev_shared_data = mz->addr;
415 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
416 eth_dev_shared_data->next_owner_id =
417 RTE_ETH_DEV_NO_OWNER + 1;
418 rte_spinlock_init(ð_dev_shared_data->ownership_lock);
419 memset(eth_dev_shared_data->data, 0,
420 sizeof(eth_dev_shared_data->data));
424 rte_spinlock_unlock(ð_dev_shared_data_lock);
428 eth_dev_is_allocated(const struct rte_eth_dev *ethdev)
430 return ethdev->data->name[0] != '\0';
433 static struct rte_eth_dev *
434 eth_dev_allocated(const char *name)
438 RTE_BUILD_BUG_ON(RTE_MAX_ETHPORTS >= UINT16_MAX);
440 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
441 if (rte_eth_devices[i].data != NULL &&
442 strcmp(rte_eth_devices[i].data->name, name) == 0)
443 return &rte_eth_devices[i];
449 rte_eth_dev_allocated(const char *name)
451 struct rte_eth_dev *ethdev;
453 eth_dev_shared_data_prepare();
455 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
457 ethdev = eth_dev_allocated(name);
459 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
465 eth_dev_find_free_port(void)
469 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
470 /* Using shared name field to find a free port. */
471 if (eth_dev_shared_data->data[i].name[0] == '\0') {
472 RTE_ASSERT(rte_eth_devices[i].state ==
477 return RTE_MAX_ETHPORTS;
480 static struct rte_eth_dev *
481 eth_dev_get(uint16_t port_id)
483 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
485 eth_dev->data = ð_dev_shared_data->data[port_id];
491 rte_eth_dev_allocate(const char *name)
494 struct rte_eth_dev *eth_dev = NULL;
497 name_len = strnlen(name, RTE_ETH_NAME_MAX_LEN);
499 RTE_ETHDEV_LOG(ERR, "Zero length Ethernet device name\n");
503 if (name_len >= RTE_ETH_NAME_MAX_LEN) {
504 RTE_ETHDEV_LOG(ERR, "Ethernet device name is too long\n");
508 eth_dev_shared_data_prepare();
510 /* Synchronize port creation between primary and secondary threads. */
511 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
513 if (eth_dev_allocated(name) != NULL) {
515 "Ethernet device with name %s already allocated\n",
520 port_id = eth_dev_find_free_port();
521 if (port_id == RTE_MAX_ETHPORTS) {
523 "Reached maximum number of Ethernet ports\n");
527 eth_dev = eth_dev_get(port_id);
528 strlcpy(eth_dev->data->name, name, sizeof(eth_dev->data->name));
529 eth_dev->data->port_id = port_id;
530 eth_dev->data->backer_port_id = RTE_MAX_ETHPORTS;
531 eth_dev->data->mtu = RTE_ETHER_MTU;
532 pthread_mutex_init(ð_dev->data->flow_ops_mutex, NULL);
535 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
541 * Attach to a port already registered by the primary process, which
542 * makes sure that the same device would have the same port id both
543 * in the primary and secondary process.
546 rte_eth_dev_attach_secondary(const char *name)
549 struct rte_eth_dev *eth_dev = NULL;
551 eth_dev_shared_data_prepare();
553 /* Synchronize port attachment to primary port creation and release. */
554 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
556 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
557 if (strcmp(eth_dev_shared_data->data[i].name, name) == 0)
560 if (i == RTE_MAX_ETHPORTS) {
562 "Device %s is not driven by the primary process\n",
565 eth_dev = eth_dev_get(i);
566 RTE_ASSERT(eth_dev->data->port_id == i);
569 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
574 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
579 eth_dev_shared_data_prepare();
581 if (eth_dev->state != RTE_ETH_DEV_UNUSED)
582 rte_eth_dev_callback_process(eth_dev,
583 RTE_ETH_EVENT_DESTROY, NULL);
585 eth_dev_fp_ops_reset(rte_eth_fp_ops + eth_dev->data->port_id);
587 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
589 eth_dev->state = RTE_ETH_DEV_UNUSED;
590 eth_dev->device = NULL;
591 eth_dev->process_private = NULL;
592 eth_dev->intr_handle = NULL;
593 eth_dev->rx_pkt_burst = NULL;
594 eth_dev->tx_pkt_burst = NULL;
595 eth_dev->tx_pkt_prepare = NULL;
596 eth_dev->rx_queue_count = NULL;
597 eth_dev->rx_descriptor_status = NULL;
598 eth_dev->tx_descriptor_status = NULL;
599 eth_dev->dev_ops = NULL;
601 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
602 rte_free(eth_dev->data->rx_queues);
603 rte_free(eth_dev->data->tx_queues);
604 rte_free(eth_dev->data->mac_addrs);
605 rte_free(eth_dev->data->hash_mac_addrs);
606 rte_free(eth_dev->data->dev_private);
607 pthread_mutex_destroy(ð_dev->data->flow_ops_mutex);
608 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
611 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
617 rte_eth_dev_is_valid_port(uint16_t port_id)
619 if (port_id >= RTE_MAX_ETHPORTS ||
620 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
627 eth_is_valid_owner_id(uint64_t owner_id)
629 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
630 eth_dev_shared_data->next_owner_id <= owner_id)
636 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
638 port_id = rte_eth_find_next(port_id);
639 while (port_id < RTE_MAX_ETHPORTS &&
640 rte_eth_devices[port_id].data->owner.id != owner_id)
641 port_id = rte_eth_find_next(port_id + 1);
647 rte_eth_dev_owner_new(uint64_t *owner_id)
649 if (owner_id == NULL) {
650 RTE_ETHDEV_LOG(ERR, "Cannot get new owner ID to NULL\n");
654 eth_dev_shared_data_prepare();
656 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
658 *owner_id = eth_dev_shared_data->next_owner_id++;
660 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
665 eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
666 const struct rte_eth_dev_owner *new_owner)
668 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
669 struct rte_eth_dev_owner *port_owner;
671 if (port_id >= RTE_MAX_ETHPORTS || !eth_dev_is_allocated(ethdev)) {
672 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
677 if (new_owner == NULL) {
679 "Cannot set ethdev port %u owner from NULL owner\n",
684 if (!eth_is_valid_owner_id(new_owner->id) &&
685 !eth_is_valid_owner_id(old_owner_id)) {
687 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
688 old_owner_id, new_owner->id);
692 port_owner = &rte_eth_devices[port_id].data->owner;
693 if (port_owner->id != old_owner_id) {
695 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
696 port_id, port_owner->name, port_owner->id);
700 /* can not truncate (same structure) */
701 strlcpy(port_owner->name, new_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN);
703 port_owner->id = new_owner->id;
705 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
706 port_id, new_owner->name, new_owner->id);
712 rte_eth_dev_owner_set(const uint16_t port_id,
713 const struct rte_eth_dev_owner *owner)
717 eth_dev_shared_data_prepare();
719 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
721 ret = eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
723 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
728 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
730 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
731 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
734 eth_dev_shared_data_prepare();
736 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
738 ret = eth_dev_owner_set(port_id, owner_id, &new_owner);
740 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
745 rte_eth_dev_owner_delete(const uint64_t owner_id)
750 eth_dev_shared_data_prepare();
752 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
754 if (eth_is_valid_owner_id(owner_id)) {
755 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
756 if (rte_eth_devices[port_id].data->owner.id == owner_id)
757 memset(&rte_eth_devices[port_id].data->owner, 0,
758 sizeof(struct rte_eth_dev_owner));
759 RTE_ETHDEV_LOG(NOTICE,
760 "All port owners owned by %016"PRIx64" identifier have removed\n",
764 "Invalid owner id=%016"PRIx64"\n",
769 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
775 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
777 struct rte_eth_dev *ethdev;
779 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
780 ethdev = &rte_eth_devices[port_id];
782 if (!eth_dev_is_allocated(ethdev)) {
783 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
789 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u owner to NULL\n",
794 eth_dev_shared_data_prepare();
796 rte_spinlock_lock(ð_dev_shared_data->ownership_lock);
797 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
798 rte_spinlock_unlock(ð_dev_shared_data->ownership_lock);
804 rte_eth_dev_socket_id(uint16_t port_id)
806 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
807 return rte_eth_devices[port_id].data->numa_node;
811 rte_eth_dev_get_sec_ctx(uint16_t port_id)
813 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
814 return rte_eth_devices[port_id].security_ctx;
818 rte_eth_dev_count_avail(void)
825 RTE_ETH_FOREACH_DEV(p)
832 rte_eth_dev_count_total(void)
834 uint16_t port, count = 0;
836 RTE_ETH_FOREACH_VALID_DEV(port)
843 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
847 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
850 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u name to NULL\n",
855 /* shouldn't check 'rte_eth_devices[i].data',
856 * because it might be overwritten by VDEV PMD */
857 tmp = eth_dev_shared_data->data[port_id].name;
863 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
868 RTE_ETHDEV_LOG(ERR, "Cannot get port ID from NULL name");
872 if (port_id == NULL) {
874 "Cannot get port ID to NULL for %s\n", name);
878 RTE_ETH_FOREACH_VALID_DEV(pid)
879 if (!strcmp(name, eth_dev_shared_data->data[pid].name)) {
888 eth_err(uint16_t port_id, int ret)
892 if (rte_eth_dev_is_removed(port_id))
898 eth_dev_rxq_release(struct rte_eth_dev *dev, uint16_t qid)
900 void **rxq = dev->data->rx_queues;
902 if (rxq[qid] == NULL)
905 if (dev->dev_ops->rx_queue_release != NULL)
906 (*dev->dev_ops->rx_queue_release)(dev, qid);
911 eth_dev_txq_release(struct rte_eth_dev *dev, uint16_t qid)
913 void **txq = dev->data->tx_queues;
915 if (txq[qid] == NULL)
918 if (dev->dev_ops->tx_queue_release != NULL)
919 (*dev->dev_ops->tx_queue_release)(dev, qid);
924 eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
926 uint16_t old_nb_queues = dev->data->nb_rx_queues;
929 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
930 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
931 sizeof(dev->data->rx_queues[0]) *
932 RTE_MAX_QUEUES_PER_PORT,
933 RTE_CACHE_LINE_SIZE);
934 if (dev->data->rx_queues == NULL) {
935 dev->data->nb_rx_queues = 0;
938 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
939 for (i = nb_queues; i < old_nb_queues; i++)
940 eth_dev_rxq_release(dev, i);
942 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
943 for (i = nb_queues; i < old_nb_queues; i++)
944 eth_dev_rxq_release(dev, i);
946 rte_free(dev->data->rx_queues);
947 dev->data->rx_queues = NULL;
949 dev->data->nb_rx_queues = nb_queues;
954 eth_dev_validate_rx_queue(const struct rte_eth_dev *dev, uint16_t rx_queue_id)
958 if (rx_queue_id >= dev->data->nb_rx_queues) {
959 port_id = dev->data->port_id;
961 "Invalid Rx queue_id=%u of device with port_id=%u\n",
962 rx_queue_id, port_id);
966 if (dev->data->rx_queues[rx_queue_id] == NULL) {
967 port_id = dev->data->port_id;
969 "Queue %u of device with port_id=%u has not been setup\n",
970 rx_queue_id, port_id);
978 eth_dev_validate_tx_queue(const struct rte_eth_dev *dev, uint16_t tx_queue_id)
982 if (tx_queue_id >= dev->data->nb_tx_queues) {
983 port_id = dev->data->port_id;
985 "Invalid Tx queue_id=%u of device with port_id=%u\n",
986 tx_queue_id, port_id);
990 if (dev->data->tx_queues[tx_queue_id] == NULL) {
991 port_id = dev->data->port_id;
993 "Queue %u of device with port_id=%u has not been setup\n",
994 tx_queue_id, port_id);
1002 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
1004 struct rte_eth_dev *dev;
1007 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1008 dev = &rte_eth_devices[port_id];
1010 if (!dev->data->dev_started) {
1012 "Port %u must be started before start any queue\n",
1017 ret = eth_dev_validate_rx_queue(dev, rx_queue_id);
1021 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
1023 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
1024 RTE_ETHDEV_LOG(INFO,
1025 "Can't start Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1026 rx_queue_id, port_id);
1030 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
1031 RTE_ETHDEV_LOG(INFO,
1032 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
1033 rx_queue_id, port_id);
1037 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev, rx_queue_id));
1041 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
1043 struct rte_eth_dev *dev;
1046 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1047 dev = &rte_eth_devices[port_id];
1049 ret = eth_dev_validate_rx_queue(dev, rx_queue_id);
1053 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
1055 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
1056 RTE_ETHDEV_LOG(INFO,
1057 "Can't stop Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1058 rx_queue_id, port_id);
1062 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
1063 RTE_ETHDEV_LOG(INFO,
1064 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
1065 rx_queue_id, port_id);
1069 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
1073 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
1075 struct rte_eth_dev *dev;
1078 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1079 dev = &rte_eth_devices[port_id];
1081 if (!dev->data->dev_started) {
1083 "Port %u must be started before start any queue\n",
1088 ret = eth_dev_validate_tx_queue(dev, tx_queue_id);
1092 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
1094 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
1095 RTE_ETHDEV_LOG(INFO,
1096 "Can't start Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1097 tx_queue_id, port_id);
1101 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
1102 RTE_ETHDEV_LOG(INFO,
1103 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
1104 tx_queue_id, port_id);
1108 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
1112 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
1114 struct rte_eth_dev *dev;
1117 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1118 dev = &rte_eth_devices[port_id];
1120 ret = eth_dev_validate_tx_queue(dev, tx_queue_id);
1124 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
1126 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
1127 RTE_ETHDEV_LOG(INFO,
1128 "Can't stop Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1129 tx_queue_id, port_id);
1133 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
1134 RTE_ETHDEV_LOG(INFO,
1135 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
1136 tx_queue_id, port_id);
1140 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
1144 eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
1146 uint16_t old_nb_queues = dev->data->nb_tx_queues;
1149 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
1150 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
1151 sizeof(dev->data->tx_queues[0]) *
1152 RTE_MAX_QUEUES_PER_PORT,
1153 RTE_CACHE_LINE_SIZE);
1154 if (dev->data->tx_queues == NULL) {
1155 dev->data->nb_tx_queues = 0;
1158 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
1159 for (i = nb_queues; i < old_nb_queues; i++)
1160 eth_dev_txq_release(dev, i);
1162 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1163 for (i = nb_queues; i < old_nb_queues; i++)
1164 eth_dev_txq_release(dev, i);
1166 rte_free(dev->data->tx_queues);
1167 dev->data->tx_queues = NULL;
1169 dev->data->nb_tx_queues = nb_queues;
1174 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1177 case ETH_SPEED_NUM_10M:
1178 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1179 case ETH_SPEED_NUM_100M:
1180 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1181 case ETH_SPEED_NUM_1G:
1182 return ETH_LINK_SPEED_1G;
1183 case ETH_SPEED_NUM_2_5G:
1184 return ETH_LINK_SPEED_2_5G;
1185 case ETH_SPEED_NUM_5G:
1186 return ETH_LINK_SPEED_5G;
1187 case ETH_SPEED_NUM_10G:
1188 return ETH_LINK_SPEED_10G;
1189 case ETH_SPEED_NUM_20G:
1190 return ETH_LINK_SPEED_20G;
1191 case ETH_SPEED_NUM_25G:
1192 return ETH_LINK_SPEED_25G;
1193 case ETH_SPEED_NUM_40G:
1194 return ETH_LINK_SPEED_40G;
1195 case ETH_SPEED_NUM_50G:
1196 return ETH_LINK_SPEED_50G;
1197 case ETH_SPEED_NUM_56G:
1198 return ETH_LINK_SPEED_56G;
1199 case ETH_SPEED_NUM_100G:
1200 return ETH_LINK_SPEED_100G;
1201 case ETH_SPEED_NUM_200G:
1202 return ETH_LINK_SPEED_200G;
1209 rte_eth_dev_rx_offload_name(uint64_t offload)
1211 const char *name = "UNKNOWN";
1214 for (i = 0; i < RTE_DIM(eth_dev_rx_offload_names); ++i) {
1215 if (offload == eth_dev_rx_offload_names[i].offload) {
1216 name = eth_dev_rx_offload_names[i].name;
1225 rte_eth_dev_tx_offload_name(uint64_t offload)
1227 const char *name = "UNKNOWN";
1230 for (i = 0; i < RTE_DIM(eth_dev_tx_offload_names); ++i) {
1231 if (offload == eth_dev_tx_offload_names[i].offload) {
1232 name = eth_dev_tx_offload_names[i].name;
1241 eth_dev_check_lro_pkt_size(uint16_t port_id, uint32_t config_size,
1242 uint32_t max_rx_pkt_len, uint32_t dev_info_size)
1246 if (dev_info_size == 0) {
1247 if (config_size != max_rx_pkt_len) {
1248 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size"
1249 " %u != %u is not allowed\n",
1250 port_id, config_size, max_rx_pkt_len);
1253 } else if (config_size > dev_info_size) {
1254 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1255 "> max allowed value %u\n", port_id, config_size,
1258 } else if (config_size < RTE_ETHER_MIN_LEN) {
1259 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1260 "< min allowed value %u\n", port_id, config_size,
1261 (unsigned int)RTE_ETHER_MIN_LEN);
1268 * Validate offloads that are requested through rte_eth_dev_configure against
1269 * the offloads successfully set by the ethernet device.
1272 * The port identifier of the Ethernet device.
1273 * @param req_offloads
1274 * The offloads that have been requested through `rte_eth_dev_configure`.
1275 * @param set_offloads
1276 * The offloads successfully set by the ethernet device.
1277 * @param offload_type
1278 * The offload type i.e. Rx/Tx string.
1279 * @param offload_name
1280 * The function that prints the offload name.
1282 * - (0) if validation successful.
1283 * - (-EINVAL) if requested offload has been silently disabled.
1287 eth_dev_validate_offloads(uint16_t port_id, uint64_t req_offloads,
1288 uint64_t set_offloads, const char *offload_type,
1289 const char *(*offload_name)(uint64_t))
1291 uint64_t offloads_diff = req_offloads ^ set_offloads;
1295 while (offloads_diff != 0) {
1296 /* Check if any offload is requested but not enabled. */
1297 offload = 1ULL << __builtin_ctzll(offloads_diff);
1298 if (offload & req_offloads) {
1300 "Port %u failed to enable %s offload %s\n",
1301 port_id, offload_type, offload_name(offload));
1305 /* Check if offload couldn't be disabled. */
1306 if (offload & set_offloads) {
1307 RTE_ETHDEV_LOG(DEBUG,
1308 "Port %u %s offload %s is not requested but enabled\n",
1309 port_id, offload_type, offload_name(offload));
1312 offloads_diff &= ~offload;
1319 eth_dev_get_overhead_len(uint32_t max_rx_pktlen, uint16_t max_mtu)
1321 uint32_t overhead_len;
1323 if (max_mtu != UINT16_MAX && max_rx_pktlen > max_mtu)
1324 overhead_len = max_rx_pktlen - max_mtu;
1326 overhead_len = RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN;
1328 return overhead_len;
1332 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1333 const struct rte_eth_conf *dev_conf)
1335 struct rte_eth_dev *dev;
1336 struct rte_eth_dev_info dev_info;
1337 struct rte_eth_conf orig_conf;
1338 uint32_t max_rx_pktlen;
1339 uint32_t overhead_len;
1344 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1345 dev = &rte_eth_devices[port_id];
1347 if (dev_conf == NULL) {
1349 "Cannot configure ethdev port %u from NULL config\n",
1354 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1356 if (dev->data->dev_started) {
1358 "Port %u must be stopped to allow configuration\n",
1364 * Ensure that "dev_configured" is always 0 each time prepare to do
1365 * dev_configure() to avoid any non-anticipated behaviour.
1366 * And set to 1 when dev_configure() is executed successfully.
1368 dev->data->dev_configured = 0;
1370 /* Store original config, as rollback required on failure */
1371 memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1374 * Copy the dev_conf parameter into the dev structure.
1375 * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1377 if (dev_conf != &dev->data->dev_conf)
1378 memcpy(&dev->data->dev_conf, dev_conf,
1379 sizeof(dev->data->dev_conf));
1381 /* Backup mtu for rollback */
1382 old_mtu = dev->data->mtu;
1384 ret = rte_eth_dev_info_get(port_id, &dev_info);
1388 /* Get the real Ethernet overhead length */
1389 overhead_len = eth_dev_get_overhead_len(dev_info.max_rx_pktlen,
1392 /* If number of queues specified by application for both Rx and Tx is
1393 * zero, use driver preferred values. This cannot be done individually
1394 * as it is valid for either Tx or Rx (but not both) to be zero.
1395 * If driver does not provide any preferred valued, fall back on
1398 if (nb_rx_q == 0 && nb_tx_q == 0) {
1399 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1401 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1402 nb_tx_q = dev_info.default_txportconf.nb_queues;
1404 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1407 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1409 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1410 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1415 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1417 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1418 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1424 * Check that the numbers of RX and TX queues are not greater
1425 * than the maximum number of RX and TX queues supported by the
1426 * configured device.
1428 if (nb_rx_q > dev_info.max_rx_queues) {
1429 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1430 port_id, nb_rx_q, dev_info.max_rx_queues);
1435 if (nb_tx_q > dev_info.max_tx_queues) {
1436 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1437 port_id, nb_tx_q, dev_info.max_tx_queues);
1442 /* Check that the device supports requested interrupts */
1443 if ((dev_conf->intr_conf.lsc == 1) &&
1444 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1445 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1446 dev->device->driver->name);
1450 if ((dev_conf->intr_conf.rmv == 1) &&
1451 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1452 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1453 dev->device->driver->name);
1459 * Check that the maximum RX packet length is supported by the
1460 * configured device.
1462 if (dev_conf->rxmode.mtu == 0)
1463 dev->data->dev_conf.rxmode.mtu = RTE_ETHER_MTU;
1464 max_rx_pktlen = dev->data->dev_conf.rxmode.mtu + overhead_len;
1465 if (max_rx_pktlen > dev_info.max_rx_pktlen) {
1467 "Ethdev port_id=%u max_rx_pktlen %u > max valid value %u\n",
1468 port_id, max_rx_pktlen, dev_info.max_rx_pktlen);
1471 } else if (max_rx_pktlen < RTE_ETHER_MIN_LEN) {
1473 "Ethdev port_id=%u max_rx_pktlen %u < min valid value %u\n",
1474 port_id, max_rx_pktlen, RTE_ETHER_MIN_LEN);
1479 if ((dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) == 0) {
1480 if (dev->data->dev_conf.rxmode.mtu < RTE_ETHER_MIN_MTU ||
1481 dev->data->dev_conf.rxmode.mtu > RTE_ETHER_MTU)
1482 /* Use default value */
1483 dev->data->dev_conf.rxmode.mtu = RTE_ETHER_MTU;
1486 dev->data->mtu = dev->data->dev_conf.rxmode.mtu;
1489 * If LRO is enabled, check that the maximum aggregated packet
1490 * size is supported by the configured device.
1492 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
1493 if (dev_conf->rxmode.max_lro_pkt_size == 0)
1494 dev->data->dev_conf.rxmode.max_lro_pkt_size = max_rx_pktlen;
1495 ret = eth_dev_check_lro_pkt_size(port_id,
1496 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1498 dev_info.max_lro_pkt_size);
1503 /* Any requested offloading must be within its device capabilities */
1504 if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1505 dev_conf->rxmode.offloads) {
1507 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1508 "capabilities 0x%"PRIx64" in %s()\n",
1509 port_id, dev_conf->rxmode.offloads,
1510 dev_info.rx_offload_capa,
1515 if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1516 dev_conf->txmode.offloads) {
1518 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1519 "capabilities 0x%"PRIx64" in %s()\n",
1520 port_id, dev_conf->txmode.offloads,
1521 dev_info.tx_offload_capa,
1527 dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf =
1528 rte_eth_rss_hf_refine(dev_conf->rx_adv_conf.rss_conf.rss_hf);
1530 /* Check that device supports requested rss hash functions. */
1531 if ((dev_info.flow_type_rss_offloads |
1532 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1533 dev_info.flow_type_rss_offloads) {
1535 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1536 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1537 dev_info.flow_type_rss_offloads);
1542 /* Check if Rx RSS distribution is disabled but RSS hash is enabled. */
1543 if (((dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) == 0) &&
1544 (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_RSS_HASH)) {
1546 "Ethdev port_id=%u config invalid Rx mq_mode without RSS but %s offload is requested\n",
1548 rte_eth_dev_rx_offload_name(DEV_RX_OFFLOAD_RSS_HASH));
1554 * Setup new number of RX/TX queues and reconfigure device.
1556 diag = eth_dev_rx_queue_config(dev, nb_rx_q);
1559 "Port%u eth_dev_rx_queue_config = %d\n",
1565 diag = eth_dev_tx_queue_config(dev, nb_tx_q);
1568 "Port%u eth_dev_tx_queue_config = %d\n",
1570 eth_dev_rx_queue_config(dev, 0);
1575 diag = (*dev->dev_ops->dev_configure)(dev);
1577 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1579 ret = eth_err(port_id, diag);
1583 /* Initialize Rx profiling if enabled at compilation time. */
1584 diag = __rte_eth_dev_profile_init(port_id, dev);
1586 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1588 ret = eth_err(port_id, diag);
1592 /* Validate Rx offloads. */
1593 diag = eth_dev_validate_offloads(port_id,
1594 dev_conf->rxmode.offloads,
1595 dev->data->dev_conf.rxmode.offloads, "Rx",
1596 rte_eth_dev_rx_offload_name);
1602 /* Validate Tx offloads. */
1603 diag = eth_dev_validate_offloads(port_id,
1604 dev_conf->txmode.offloads,
1605 dev->data->dev_conf.txmode.offloads, "Tx",
1606 rte_eth_dev_tx_offload_name);
1612 dev->data->dev_configured = 1;
1613 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, 0);
1616 eth_dev_rx_queue_config(dev, 0);
1617 eth_dev_tx_queue_config(dev, 0);
1619 memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1620 if (old_mtu != dev->data->mtu)
1621 dev->data->mtu = old_mtu;
1623 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, ret);
1628 rte_eth_dev_internal_reset(struct rte_eth_dev *dev)
1630 if (dev->data->dev_started) {
1631 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1632 dev->data->port_id);
1636 eth_dev_rx_queue_config(dev, 0);
1637 eth_dev_tx_queue_config(dev, 0);
1639 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1643 eth_dev_mac_restore(struct rte_eth_dev *dev,
1644 struct rte_eth_dev_info *dev_info)
1646 struct rte_ether_addr *addr;
1651 /* replay MAC address configuration including default MAC */
1652 addr = &dev->data->mac_addrs[0];
1653 if (*dev->dev_ops->mac_addr_set != NULL)
1654 (*dev->dev_ops->mac_addr_set)(dev, addr);
1655 else if (*dev->dev_ops->mac_addr_add != NULL)
1656 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1658 if (*dev->dev_ops->mac_addr_add != NULL) {
1659 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1660 addr = &dev->data->mac_addrs[i];
1662 /* skip zero address */
1663 if (rte_is_zero_ether_addr(addr))
1667 pool_mask = dev->data->mac_pool_sel[i];
1670 if (pool_mask & 1ULL)
1671 (*dev->dev_ops->mac_addr_add)(dev,
1675 } while (pool_mask);
1681 eth_dev_config_restore(struct rte_eth_dev *dev,
1682 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1686 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1687 eth_dev_mac_restore(dev, dev_info);
1689 /* replay promiscuous configuration */
1691 * use callbacks directly since we don't need port_id check and
1692 * would like to bypass the same value set
1694 if (rte_eth_promiscuous_get(port_id) == 1 &&
1695 *dev->dev_ops->promiscuous_enable != NULL) {
1696 ret = eth_err(port_id,
1697 (*dev->dev_ops->promiscuous_enable)(dev));
1698 if (ret != 0 && ret != -ENOTSUP) {
1700 "Failed to enable promiscuous mode for device (port %u): %s\n",
1701 port_id, rte_strerror(-ret));
1704 } else if (rte_eth_promiscuous_get(port_id) == 0 &&
1705 *dev->dev_ops->promiscuous_disable != NULL) {
1706 ret = eth_err(port_id,
1707 (*dev->dev_ops->promiscuous_disable)(dev));
1708 if (ret != 0 && ret != -ENOTSUP) {
1710 "Failed to disable promiscuous mode for device (port %u): %s\n",
1711 port_id, rte_strerror(-ret));
1716 /* replay all multicast configuration */
1718 * use callbacks directly since we don't need port_id check and
1719 * would like to bypass the same value set
1721 if (rte_eth_allmulticast_get(port_id) == 1 &&
1722 *dev->dev_ops->allmulticast_enable != NULL) {
1723 ret = eth_err(port_id,
1724 (*dev->dev_ops->allmulticast_enable)(dev));
1725 if (ret != 0 && ret != -ENOTSUP) {
1727 "Failed to enable allmulticast mode for device (port %u): %s\n",
1728 port_id, rte_strerror(-ret));
1731 } else if (rte_eth_allmulticast_get(port_id) == 0 &&
1732 *dev->dev_ops->allmulticast_disable != NULL) {
1733 ret = eth_err(port_id,
1734 (*dev->dev_ops->allmulticast_disable)(dev));
1735 if (ret != 0 && ret != -ENOTSUP) {
1737 "Failed to disable allmulticast mode for device (port %u): %s\n",
1738 port_id, rte_strerror(-ret));
1747 rte_eth_dev_start(uint16_t port_id)
1749 struct rte_eth_dev *dev;
1750 struct rte_eth_dev_info dev_info;
1754 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1755 dev = &rte_eth_devices[port_id];
1757 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1759 if (dev->data->dev_configured == 0) {
1760 RTE_ETHDEV_LOG(INFO,
1761 "Device with port_id=%"PRIu16" is not configured.\n",
1766 if (dev->data->dev_started != 0) {
1767 RTE_ETHDEV_LOG(INFO,
1768 "Device with port_id=%"PRIu16" already started\n",
1773 ret = rte_eth_dev_info_get(port_id, &dev_info);
1777 /* Lets restore MAC now if device does not support live change */
1778 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1779 eth_dev_mac_restore(dev, &dev_info);
1781 diag = (*dev->dev_ops->dev_start)(dev);
1783 dev->data->dev_started = 1;
1785 return eth_err(port_id, diag);
1787 ret = eth_dev_config_restore(dev, &dev_info, port_id);
1790 "Error during restoring configuration for device (port %u): %s\n",
1791 port_id, rte_strerror(-ret));
1792 ret_stop = rte_eth_dev_stop(port_id);
1793 if (ret_stop != 0) {
1795 "Failed to stop device (port %u): %s\n",
1796 port_id, rte_strerror(-ret_stop));
1802 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1803 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1804 (*dev->dev_ops->link_update)(dev, 0);
1807 /* expose selection of PMD fast-path functions */
1808 eth_dev_fp_ops_setup(rte_eth_fp_ops + port_id, dev);
1810 rte_ethdev_trace_start(port_id);
1815 rte_eth_dev_stop(uint16_t port_id)
1817 struct rte_eth_dev *dev;
1820 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1821 dev = &rte_eth_devices[port_id];
1823 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_stop, -ENOTSUP);
1825 if (dev->data->dev_started == 0) {
1826 RTE_ETHDEV_LOG(INFO,
1827 "Device with port_id=%"PRIu16" already stopped\n",
1832 /* point fast-path functions to dummy ones */
1833 eth_dev_fp_ops_reset(rte_eth_fp_ops + port_id);
1835 dev->data->dev_started = 0;
1836 ret = (*dev->dev_ops->dev_stop)(dev);
1837 rte_ethdev_trace_stop(port_id, ret);
1843 rte_eth_dev_set_link_up(uint16_t port_id)
1845 struct rte_eth_dev *dev;
1847 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1848 dev = &rte_eth_devices[port_id];
1850 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1851 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1855 rte_eth_dev_set_link_down(uint16_t port_id)
1857 struct rte_eth_dev *dev;
1859 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1860 dev = &rte_eth_devices[port_id];
1862 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1863 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1867 rte_eth_dev_close(uint16_t port_id)
1869 struct rte_eth_dev *dev;
1870 int firsterr, binerr;
1871 int *lasterr = &firsterr;
1873 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1874 dev = &rte_eth_devices[port_id];
1876 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_close, -ENOTSUP);
1877 *lasterr = (*dev->dev_ops->dev_close)(dev);
1881 rte_ethdev_trace_close(port_id);
1882 *lasterr = rte_eth_dev_release_port(dev);
1888 rte_eth_dev_reset(uint16_t port_id)
1890 struct rte_eth_dev *dev;
1893 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1894 dev = &rte_eth_devices[port_id];
1896 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1898 ret = rte_eth_dev_stop(port_id);
1901 "Failed to stop device (port %u) before reset: %s - ignore\n",
1902 port_id, rte_strerror(-ret));
1904 ret = dev->dev_ops->dev_reset(dev);
1906 return eth_err(port_id, ret);
1910 rte_eth_dev_is_removed(uint16_t port_id)
1912 struct rte_eth_dev *dev;
1915 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1916 dev = &rte_eth_devices[port_id];
1918 if (dev->state == RTE_ETH_DEV_REMOVED)
1921 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1923 ret = dev->dev_ops->is_removed(dev);
1925 /* Device is physically removed. */
1926 dev->state = RTE_ETH_DEV_REMOVED;
1932 rte_eth_rx_queue_check_split(const struct rte_eth_rxseg_split *rx_seg,
1933 uint16_t n_seg, uint32_t *mbp_buf_size,
1934 const struct rte_eth_dev_info *dev_info)
1936 const struct rte_eth_rxseg_capa *seg_capa = &dev_info->rx_seg_capa;
1937 struct rte_mempool *mp_first;
1938 uint32_t offset_mask;
1941 if (n_seg > seg_capa->max_nseg) {
1943 "Requested Rx segments %u exceed supported %u\n",
1944 n_seg, seg_capa->max_nseg);
1948 * Check the sizes and offsets against buffer sizes
1949 * for each segment specified in extended configuration.
1951 mp_first = rx_seg[0].mp;
1952 offset_mask = (1u << seg_capa->offset_align_log2) - 1;
1953 for (seg_idx = 0; seg_idx < n_seg; seg_idx++) {
1954 struct rte_mempool *mpl = rx_seg[seg_idx].mp;
1955 uint32_t length = rx_seg[seg_idx].length;
1956 uint32_t offset = rx_seg[seg_idx].offset;
1959 RTE_ETHDEV_LOG(ERR, "null mempool pointer\n");
1962 if (seg_idx != 0 && mp_first != mpl &&
1963 seg_capa->multi_pools == 0) {
1964 RTE_ETHDEV_LOG(ERR, "Receiving to multiple pools is not supported\n");
1968 if (seg_capa->offset_allowed == 0) {
1969 RTE_ETHDEV_LOG(ERR, "Rx segmentation with offset is not supported\n");
1972 if (offset & offset_mask) {
1973 RTE_ETHDEV_LOG(ERR, "Rx segmentation invalid offset alignment %u, %u\n",
1975 seg_capa->offset_align_log2);
1979 if (mpl->private_data_size <
1980 sizeof(struct rte_pktmbuf_pool_private)) {
1982 "%s private_data_size %u < %u\n",
1983 mpl->name, mpl->private_data_size,
1984 (unsigned int)sizeof
1985 (struct rte_pktmbuf_pool_private));
1988 offset += seg_idx != 0 ? 0 : RTE_PKTMBUF_HEADROOM;
1989 *mbp_buf_size = rte_pktmbuf_data_room_size(mpl);
1990 length = length != 0 ? length : *mbp_buf_size;
1991 if (*mbp_buf_size < length + offset) {
1993 "%s mbuf_data_room_size %u < %u (segment length=%u + segment offset=%u)\n",
1994 mpl->name, *mbp_buf_size,
1995 length + offset, length, offset);
2003 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
2004 uint16_t nb_rx_desc, unsigned int socket_id,
2005 const struct rte_eth_rxconf *rx_conf,
2006 struct rte_mempool *mp)
2009 uint32_t mbp_buf_size;
2010 struct rte_eth_dev *dev;
2011 struct rte_eth_dev_info dev_info;
2012 struct rte_eth_rxconf local_conf;
2014 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2015 dev = &rte_eth_devices[port_id];
2017 if (rx_queue_id >= dev->data->nb_rx_queues) {
2018 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
2022 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
2024 ret = rte_eth_dev_info_get(port_id, &dev_info);
2029 /* Single pool configuration check. */
2030 if (rx_conf != NULL && rx_conf->rx_nseg != 0) {
2032 "Ambiguous segment configuration\n");
2036 * Check the size of the mbuf data buffer, this value
2037 * must be provided in the private data of the memory pool.
2038 * First check that the memory pool(s) has a valid private data.
2040 if (mp->private_data_size <
2041 sizeof(struct rte_pktmbuf_pool_private)) {
2042 RTE_ETHDEV_LOG(ERR, "%s private_data_size %u < %u\n",
2043 mp->name, mp->private_data_size,
2045 sizeof(struct rte_pktmbuf_pool_private));
2048 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
2049 if (mbp_buf_size < dev_info.min_rx_bufsize +
2050 RTE_PKTMBUF_HEADROOM) {
2052 "%s mbuf_data_room_size %u < %u (RTE_PKTMBUF_HEADROOM=%u + min_rx_bufsize(dev)=%u)\n",
2053 mp->name, mbp_buf_size,
2054 RTE_PKTMBUF_HEADROOM +
2055 dev_info.min_rx_bufsize,
2056 RTE_PKTMBUF_HEADROOM,
2057 dev_info.min_rx_bufsize);
2061 const struct rte_eth_rxseg_split *rx_seg;
2064 /* Extended multi-segment configuration check. */
2065 if (rx_conf == NULL || rx_conf->rx_seg == NULL || rx_conf->rx_nseg == 0) {
2067 "Memory pool is null and no extended configuration provided\n");
2071 rx_seg = (const struct rte_eth_rxseg_split *)rx_conf->rx_seg;
2072 n_seg = rx_conf->rx_nseg;
2074 if (rx_conf->offloads & RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT) {
2075 ret = rte_eth_rx_queue_check_split(rx_seg, n_seg,
2081 RTE_ETHDEV_LOG(ERR, "No Rx segmentation offload configured\n");
2086 /* Use default specified by driver, if nb_rx_desc is zero */
2087 if (nb_rx_desc == 0) {
2088 nb_rx_desc = dev_info.default_rxportconf.ring_size;
2089 /* If driver default is also zero, fall back on EAL default */
2090 if (nb_rx_desc == 0)
2091 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
2094 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
2095 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
2096 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
2099 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
2100 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
2101 dev_info.rx_desc_lim.nb_min,
2102 dev_info.rx_desc_lim.nb_align);
2106 if (dev->data->dev_started &&
2107 !(dev_info.dev_capa &
2108 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
2111 if (dev->data->dev_started &&
2112 (dev->data->rx_queue_state[rx_queue_id] !=
2113 RTE_ETH_QUEUE_STATE_STOPPED))
2116 eth_dev_rxq_release(dev, rx_queue_id);
2118 if (rx_conf == NULL)
2119 rx_conf = &dev_info.default_rxconf;
2121 local_conf = *rx_conf;
2124 * If an offloading has already been enabled in
2125 * rte_eth_dev_configure(), it has been enabled on all queues,
2126 * so there is no need to enable it in this queue again.
2127 * The local_conf.offloads input to underlying PMD only carries
2128 * those offloadings which are only enabled on this queue and
2129 * not enabled on all queues.
2131 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
2134 * New added offloadings for this queue are those not enabled in
2135 * rte_eth_dev_configure() and they must be per-queue type.
2136 * A pure per-port offloading can't be enabled on a queue while
2137 * disabled on another queue. A pure per-port offloading can't
2138 * be enabled for any queue as new added one if it hasn't been
2139 * enabled in rte_eth_dev_configure().
2141 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
2142 local_conf.offloads) {
2144 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
2145 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
2146 port_id, rx_queue_id, local_conf.offloads,
2147 dev_info.rx_queue_offload_capa,
2153 * If LRO is enabled, check that the maximum aggregated packet
2154 * size is supported by the configured device.
2156 /* Get the real Ethernet overhead length */
2157 if (local_conf.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
2158 uint32_t overhead_len;
2159 uint32_t max_rx_pktlen;
2162 overhead_len = eth_dev_get_overhead_len(dev_info.max_rx_pktlen,
2164 max_rx_pktlen = dev->data->mtu + overhead_len;
2165 if (dev->data->dev_conf.rxmode.max_lro_pkt_size == 0)
2166 dev->data->dev_conf.rxmode.max_lro_pkt_size = max_rx_pktlen;
2167 ret = eth_dev_check_lro_pkt_size(port_id,
2168 dev->data->dev_conf.rxmode.max_lro_pkt_size,
2170 dev_info.max_lro_pkt_size);
2175 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
2176 socket_id, &local_conf, mp);
2178 if (!dev->data->min_rx_buf_size ||
2179 dev->data->min_rx_buf_size > mbp_buf_size)
2180 dev->data->min_rx_buf_size = mbp_buf_size;
2183 rte_ethdev_trace_rxq_setup(port_id, rx_queue_id, nb_rx_desc, mp,
2185 return eth_err(port_id, ret);
2189 rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
2190 uint16_t nb_rx_desc,
2191 const struct rte_eth_hairpin_conf *conf)
2194 struct rte_eth_dev *dev;
2195 struct rte_eth_hairpin_cap cap;
2199 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2200 dev = &rte_eth_devices[port_id];
2202 if (rx_queue_id >= dev->data->nb_rx_queues) {
2203 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
2209 "Cannot setup ethdev port %u Rx hairpin queue from NULL config\n",
2214 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
2217 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_hairpin_queue_setup,
2219 /* if nb_rx_desc is zero use max number of desc from the driver. */
2220 if (nb_rx_desc == 0)
2221 nb_rx_desc = cap.max_nb_desc;
2222 if (nb_rx_desc > cap.max_nb_desc) {
2224 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu",
2225 nb_rx_desc, cap.max_nb_desc);
2228 if (conf->peer_count > cap.max_rx_2_tx) {
2230 "Invalid value for number of peers for Rx queue(=%u), should be: <= %hu",
2231 conf->peer_count, cap.max_rx_2_tx);
2234 if (conf->peer_count == 0) {
2236 "Invalid value for number of peers for Rx queue(=%u), should be: > 0",
2240 for (i = 0, count = 0; i < dev->data->nb_rx_queues &&
2241 cap.max_nb_queues != UINT16_MAX; i++) {
2242 if (i == rx_queue_id || rte_eth_dev_is_rx_hairpin_queue(dev, i))
2245 if (count > cap.max_nb_queues) {
2246 RTE_ETHDEV_LOG(ERR, "To many Rx hairpin queues max is %d",
2250 if (dev->data->dev_started)
2252 eth_dev_rxq_release(dev, rx_queue_id);
2253 ret = (*dev->dev_ops->rx_hairpin_queue_setup)(dev, rx_queue_id,
2256 dev->data->rx_queue_state[rx_queue_id] =
2257 RTE_ETH_QUEUE_STATE_HAIRPIN;
2258 return eth_err(port_id, ret);
2262 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2263 uint16_t nb_tx_desc, unsigned int socket_id,
2264 const struct rte_eth_txconf *tx_conf)
2266 struct rte_eth_dev *dev;
2267 struct rte_eth_dev_info dev_info;
2268 struct rte_eth_txconf local_conf;
2271 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2272 dev = &rte_eth_devices[port_id];
2274 if (tx_queue_id >= dev->data->nb_tx_queues) {
2275 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2279 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
2281 ret = rte_eth_dev_info_get(port_id, &dev_info);
2285 /* Use default specified by driver, if nb_tx_desc is zero */
2286 if (nb_tx_desc == 0) {
2287 nb_tx_desc = dev_info.default_txportconf.ring_size;
2288 /* If driver default is zero, fall back on EAL default */
2289 if (nb_tx_desc == 0)
2290 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
2292 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
2293 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
2294 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
2296 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
2297 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
2298 dev_info.tx_desc_lim.nb_min,
2299 dev_info.tx_desc_lim.nb_align);
2303 if (dev->data->dev_started &&
2304 !(dev_info.dev_capa &
2305 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
2308 if (dev->data->dev_started &&
2309 (dev->data->tx_queue_state[tx_queue_id] !=
2310 RTE_ETH_QUEUE_STATE_STOPPED))
2313 eth_dev_txq_release(dev, tx_queue_id);
2315 if (tx_conf == NULL)
2316 tx_conf = &dev_info.default_txconf;
2318 local_conf = *tx_conf;
2321 * If an offloading has already been enabled in
2322 * rte_eth_dev_configure(), it has been enabled on all queues,
2323 * so there is no need to enable it in this queue again.
2324 * The local_conf.offloads input to underlying PMD only carries
2325 * those offloadings which are only enabled on this queue and
2326 * not enabled on all queues.
2328 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
2331 * New added offloadings for this queue are those not enabled in
2332 * rte_eth_dev_configure() and they must be per-queue type.
2333 * A pure per-port offloading can't be enabled on a queue while
2334 * disabled on another queue. A pure per-port offloading can't
2335 * be enabled for any queue as new added one if it hasn't been
2336 * enabled in rte_eth_dev_configure().
2338 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
2339 local_conf.offloads) {
2341 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
2342 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
2343 port_id, tx_queue_id, local_conf.offloads,
2344 dev_info.tx_queue_offload_capa,
2349 rte_ethdev_trace_txq_setup(port_id, tx_queue_id, nb_tx_desc, tx_conf);
2350 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
2351 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
2355 rte_eth_tx_hairpin_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2356 uint16_t nb_tx_desc,
2357 const struct rte_eth_hairpin_conf *conf)
2359 struct rte_eth_dev *dev;
2360 struct rte_eth_hairpin_cap cap;
2365 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2366 dev = &rte_eth_devices[port_id];
2368 if (tx_queue_id >= dev->data->nb_tx_queues) {
2369 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2375 "Cannot setup ethdev port %u Tx hairpin queue from NULL config\n",
2380 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
2383 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_hairpin_queue_setup,
2385 /* if nb_rx_desc is zero use max number of desc from the driver. */
2386 if (nb_tx_desc == 0)
2387 nb_tx_desc = cap.max_nb_desc;
2388 if (nb_tx_desc > cap.max_nb_desc) {
2390 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu",
2391 nb_tx_desc, cap.max_nb_desc);
2394 if (conf->peer_count > cap.max_tx_2_rx) {
2396 "Invalid value for number of peers for Tx queue(=%u), should be: <= %hu",
2397 conf->peer_count, cap.max_tx_2_rx);
2400 if (conf->peer_count == 0) {
2402 "Invalid value for number of peers for Tx queue(=%u), should be: > 0",
2406 for (i = 0, count = 0; i < dev->data->nb_tx_queues &&
2407 cap.max_nb_queues != UINT16_MAX; i++) {
2408 if (i == tx_queue_id || rte_eth_dev_is_tx_hairpin_queue(dev, i))
2411 if (count > cap.max_nb_queues) {
2412 RTE_ETHDEV_LOG(ERR, "To many Tx hairpin queues max is %d",
2416 if (dev->data->dev_started)
2418 eth_dev_txq_release(dev, tx_queue_id);
2419 ret = (*dev->dev_ops->tx_hairpin_queue_setup)
2420 (dev, tx_queue_id, nb_tx_desc, conf);
2422 dev->data->tx_queue_state[tx_queue_id] =
2423 RTE_ETH_QUEUE_STATE_HAIRPIN;
2424 return eth_err(port_id, ret);
2428 rte_eth_hairpin_bind(uint16_t tx_port, uint16_t rx_port)
2430 struct rte_eth_dev *dev;
2433 RTE_ETH_VALID_PORTID_OR_ERR_RET(tx_port, -ENODEV);
2434 dev = &rte_eth_devices[tx_port];
2436 if (dev->data->dev_started == 0) {
2437 RTE_ETHDEV_LOG(ERR, "Tx port %d is not started\n", tx_port);
2441 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_bind, -ENOTSUP);
2442 ret = (*dev->dev_ops->hairpin_bind)(dev, rx_port);
2444 RTE_ETHDEV_LOG(ERR, "Failed to bind hairpin Tx %d"
2445 " to Rx %d (%d - all ports)\n",
2446 tx_port, rx_port, RTE_MAX_ETHPORTS);
2452 rte_eth_hairpin_unbind(uint16_t tx_port, uint16_t rx_port)
2454 struct rte_eth_dev *dev;
2457 RTE_ETH_VALID_PORTID_OR_ERR_RET(tx_port, -ENODEV);
2458 dev = &rte_eth_devices[tx_port];
2460 if (dev->data->dev_started == 0) {
2461 RTE_ETHDEV_LOG(ERR, "Tx port %d is already stopped\n", tx_port);
2465 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_unbind, -ENOTSUP);
2466 ret = (*dev->dev_ops->hairpin_unbind)(dev, rx_port);
2468 RTE_ETHDEV_LOG(ERR, "Failed to unbind hairpin Tx %d"
2469 " from Rx %d (%d - all ports)\n",
2470 tx_port, rx_port, RTE_MAX_ETHPORTS);
2476 rte_eth_hairpin_get_peer_ports(uint16_t port_id, uint16_t *peer_ports,
2477 size_t len, uint32_t direction)
2479 struct rte_eth_dev *dev;
2482 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2483 dev = &rte_eth_devices[port_id];
2485 if (peer_ports == NULL) {
2487 "Cannot get ethdev port %u hairpin peer ports to NULL\n",
2494 "Cannot get ethdev port %u hairpin peer ports to array with zero size\n",
2499 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_get_peer_ports,
2502 ret = (*dev->dev_ops->hairpin_get_peer_ports)(dev, peer_ports,
2505 RTE_ETHDEV_LOG(ERR, "Failed to get %d hairpin peer %s ports\n",
2506 port_id, direction ? "Rx" : "Tx");
2512 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
2513 void *userdata __rte_unused)
2515 rte_pktmbuf_free_bulk(pkts, unsent);
2519 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
2522 uint64_t *count = userdata;
2524 rte_pktmbuf_free_bulk(pkts, unsent);
2529 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
2530 buffer_tx_error_fn cbfn, void *userdata)
2532 if (buffer == NULL) {
2534 "Cannot set Tx buffer error callback to NULL buffer\n");
2538 buffer->error_callback = cbfn;
2539 buffer->error_userdata = userdata;
2544 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
2548 if (buffer == NULL) {
2549 RTE_ETHDEV_LOG(ERR, "Cannot initialize NULL buffer\n");
2553 buffer->size = size;
2554 if (buffer->error_callback == NULL) {
2555 ret = rte_eth_tx_buffer_set_err_callback(
2556 buffer, rte_eth_tx_buffer_drop_callback, NULL);
2563 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
2565 struct rte_eth_dev *dev;
2568 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2569 dev = &rte_eth_devices[port_id];
2571 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
2573 /* Call driver to free pending mbufs. */
2574 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
2576 return eth_err(port_id, ret);
2580 rte_eth_promiscuous_enable(uint16_t port_id)
2582 struct rte_eth_dev *dev;
2585 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2586 dev = &rte_eth_devices[port_id];
2588 if (dev->data->promiscuous == 1)
2591 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_enable, -ENOTSUP);
2593 diag = (*dev->dev_ops->promiscuous_enable)(dev);
2594 dev->data->promiscuous = (diag == 0) ? 1 : 0;
2596 return eth_err(port_id, diag);
2600 rte_eth_promiscuous_disable(uint16_t port_id)
2602 struct rte_eth_dev *dev;
2605 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2606 dev = &rte_eth_devices[port_id];
2608 if (dev->data->promiscuous == 0)
2611 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_disable, -ENOTSUP);
2613 dev->data->promiscuous = 0;
2614 diag = (*dev->dev_ops->promiscuous_disable)(dev);
2616 dev->data->promiscuous = 1;
2618 return eth_err(port_id, diag);
2622 rte_eth_promiscuous_get(uint16_t port_id)
2624 struct rte_eth_dev *dev;
2626 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2627 dev = &rte_eth_devices[port_id];
2629 return dev->data->promiscuous;
2633 rte_eth_allmulticast_enable(uint16_t port_id)
2635 struct rte_eth_dev *dev;
2638 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2639 dev = &rte_eth_devices[port_id];
2641 if (dev->data->all_multicast == 1)
2644 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_enable, -ENOTSUP);
2645 diag = (*dev->dev_ops->allmulticast_enable)(dev);
2646 dev->data->all_multicast = (diag == 0) ? 1 : 0;
2648 return eth_err(port_id, diag);
2652 rte_eth_allmulticast_disable(uint16_t port_id)
2654 struct rte_eth_dev *dev;
2657 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2658 dev = &rte_eth_devices[port_id];
2660 if (dev->data->all_multicast == 0)
2663 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_disable, -ENOTSUP);
2664 dev->data->all_multicast = 0;
2665 diag = (*dev->dev_ops->allmulticast_disable)(dev);
2667 dev->data->all_multicast = 1;
2669 return eth_err(port_id, diag);
2673 rte_eth_allmulticast_get(uint16_t port_id)
2675 struct rte_eth_dev *dev;
2677 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2678 dev = &rte_eth_devices[port_id];
2680 return dev->data->all_multicast;
2684 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
2686 struct rte_eth_dev *dev;
2688 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2689 dev = &rte_eth_devices[port_id];
2691 if (eth_link == NULL) {
2692 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u link to NULL\n",
2697 if (dev->data->dev_conf.intr_conf.lsc && dev->data->dev_started)
2698 rte_eth_linkstatus_get(dev, eth_link);
2700 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2701 (*dev->dev_ops->link_update)(dev, 1);
2702 *eth_link = dev->data->dev_link;
2709 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
2711 struct rte_eth_dev *dev;
2713 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2714 dev = &rte_eth_devices[port_id];
2716 if (eth_link == NULL) {
2717 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u link to NULL\n",
2722 if (dev->data->dev_conf.intr_conf.lsc && dev->data->dev_started)
2723 rte_eth_linkstatus_get(dev, eth_link);
2725 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2726 (*dev->dev_ops->link_update)(dev, 0);
2727 *eth_link = dev->data->dev_link;
2734 rte_eth_link_speed_to_str(uint32_t link_speed)
2736 switch (link_speed) {
2737 case ETH_SPEED_NUM_NONE: return "None";
2738 case ETH_SPEED_NUM_10M: return "10 Mbps";
2739 case ETH_SPEED_NUM_100M: return "100 Mbps";
2740 case ETH_SPEED_NUM_1G: return "1 Gbps";
2741 case ETH_SPEED_NUM_2_5G: return "2.5 Gbps";
2742 case ETH_SPEED_NUM_5G: return "5 Gbps";
2743 case ETH_SPEED_NUM_10G: return "10 Gbps";
2744 case ETH_SPEED_NUM_20G: return "20 Gbps";
2745 case ETH_SPEED_NUM_25G: return "25 Gbps";
2746 case ETH_SPEED_NUM_40G: return "40 Gbps";
2747 case ETH_SPEED_NUM_50G: return "50 Gbps";
2748 case ETH_SPEED_NUM_56G: return "56 Gbps";
2749 case ETH_SPEED_NUM_100G: return "100 Gbps";
2750 case ETH_SPEED_NUM_200G: return "200 Gbps";
2751 case ETH_SPEED_NUM_UNKNOWN: return "Unknown";
2752 default: return "Invalid";
2757 rte_eth_link_to_str(char *str, size_t len, const struct rte_eth_link *eth_link)
2760 RTE_ETHDEV_LOG(ERR, "Cannot convert link to NULL string\n");
2766 "Cannot convert link to string with zero size\n");
2770 if (eth_link == NULL) {
2771 RTE_ETHDEV_LOG(ERR, "Cannot convert to string from NULL link\n");
2775 if (eth_link->link_status == ETH_LINK_DOWN)
2776 return snprintf(str, len, "Link down");
2778 return snprintf(str, len, "Link up at %s %s %s",
2779 rte_eth_link_speed_to_str(eth_link->link_speed),
2780 (eth_link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
2782 (eth_link->link_autoneg == ETH_LINK_AUTONEG) ?
2783 "Autoneg" : "Fixed");
2787 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
2789 struct rte_eth_dev *dev;
2791 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2792 dev = &rte_eth_devices[port_id];
2794 if (stats == NULL) {
2795 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u stats to NULL\n",
2800 memset(stats, 0, sizeof(*stats));
2802 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
2803 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
2804 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
2808 rte_eth_stats_reset(uint16_t port_id)
2810 struct rte_eth_dev *dev;
2813 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2814 dev = &rte_eth_devices[port_id];
2816 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
2817 ret = (*dev->dev_ops->stats_reset)(dev);
2819 return eth_err(port_id, ret);
2821 dev->data->rx_mbuf_alloc_failed = 0;
2827 eth_dev_get_xstats_basic_count(struct rte_eth_dev *dev)
2829 uint16_t nb_rxqs, nb_txqs;
2832 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2833 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2835 count = RTE_NB_STATS;
2836 if (dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS) {
2837 count += nb_rxqs * RTE_NB_RXQ_STATS;
2838 count += nb_txqs * RTE_NB_TXQ_STATS;
2845 eth_dev_get_xstats_count(uint16_t port_id)
2847 struct rte_eth_dev *dev;
2850 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2851 dev = &rte_eth_devices[port_id];
2852 if (dev->dev_ops->xstats_get_names != NULL) {
2853 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2855 return eth_err(port_id, count);
2860 count += eth_dev_get_xstats_basic_count(dev);
2866 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2869 int cnt_xstats, idx_xstat;
2871 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2873 if (xstat_name == NULL) {
2875 "Cannot get ethdev port %u xstats ID from NULL xstat name\n",
2882 "Cannot get ethdev port %u xstats ID to NULL\n",
2888 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2889 if (cnt_xstats < 0) {
2890 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2894 /* Get id-name lookup table */
2895 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2897 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2898 port_id, xstats_names, cnt_xstats, NULL)) {
2899 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2903 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2904 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2913 /* retrieve basic stats names */
2915 eth_basic_stats_get_names(struct rte_eth_dev *dev,
2916 struct rte_eth_xstat_name *xstats_names)
2918 int cnt_used_entries = 0;
2919 uint32_t idx, id_queue;
2922 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2923 strlcpy(xstats_names[cnt_used_entries].name,
2924 eth_dev_stats_strings[idx].name,
2925 sizeof(xstats_names[0].name));
2929 if ((dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS) == 0)
2930 return cnt_used_entries;
2932 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2933 for (id_queue = 0; id_queue < num_q; id_queue++) {
2934 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2935 snprintf(xstats_names[cnt_used_entries].name,
2936 sizeof(xstats_names[0].name),
2938 id_queue, eth_dev_rxq_stats_strings[idx].name);
2943 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2944 for (id_queue = 0; id_queue < num_q; id_queue++) {
2945 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2946 snprintf(xstats_names[cnt_used_entries].name,
2947 sizeof(xstats_names[0].name),
2949 id_queue, eth_dev_txq_stats_strings[idx].name);
2953 return cnt_used_entries;
2956 /* retrieve ethdev extended statistics names */
2958 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2959 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2962 struct rte_eth_xstat_name *xstats_names_copy;
2963 unsigned int no_basic_stat_requested = 1;
2964 unsigned int no_ext_stat_requested = 1;
2965 unsigned int expected_entries;
2966 unsigned int basic_count;
2967 struct rte_eth_dev *dev;
2971 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2972 dev = &rte_eth_devices[port_id];
2974 basic_count = eth_dev_get_xstats_basic_count(dev);
2975 ret = eth_dev_get_xstats_count(port_id);
2978 expected_entries = (unsigned int)ret;
2980 /* Return max number of stats if no ids given */
2983 return expected_entries;
2984 else if (xstats_names && size < expected_entries)
2985 return expected_entries;
2988 if (ids && !xstats_names)
2991 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2992 uint64_t ids_copy[size];
2994 for (i = 0; i < size; i++) {
2995 if (ids[i] < basic_count) {
2996 no_basic_stat_requested = 0;
3001 * Convert ids to xstats ids that PMD knows.
3002 * ids known by user are basic + extended stats.
3004 ids_copy[i] = ids[i] - basic_count;
3007 if (no_basic_stat_requested)
3008 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
3009 ids_copy, xstats_names, size);
3012 /* Retrieve all stats */
3014 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
3016 if (num_stats < 0 || num_stats > (int)expected_entries)
3019 return expected_entries;
3022 xstats_names_copy = calloc(expected_entries,
3023 sizeof(struct rte_eth_xstat_name));
3025 if (!xstats_names_copy) {
3026 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
3031 for (i = 0; i < size; i++) {
3032 if (ids[i] >= basic_count) {
3033 no_ext_stat_requested = 0;
3039 /* Fill xstats_names_copy structure */
3040 if (ids && no_ext_stat_requested) {
3041 eth_basic_stats_get_names(dev, xstats_names_copy);
3043 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
3046 free(xstats_names_copy);
3052 for (i = 0; i < size; i++) {
3053 if (ids[i] >= expected_entries) {
3054 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
3055 free(xstats_names_copy);
3058 xstats_names[i] = xstats_names_copy[ids[i]];
3061 free(xstats_names_copy);
3066 rte_eth_xstats_get_names(uint16_t port_id,
3067 struct rte_eth_xstat_name *xstats_names,
3070 struct rte_eth_dev *dev;
3071 int cnt_used_entries;
3072 int cnt_expected_entries;
3073 int cnt_driver_entries;
3075 cnt_expected_entries = eth_dev_get_xstats_count(port_id);
3076 if (xstats_names == NULL || cnt_expected_entries < 0 ||
3077 (int)size < cnt_expected_entries)
3078 return cnt_expected_entries;
3080 /* port_id checked in eth_dev_get_xstats_count() */
3081 dev = &rte_eth_devices[port_id];
3083 cnt_used_entries = eth_basic_stats_get_names(dev, xstats_names);
3085 if (dev->dev_ops->xstats_get_names != NULL) {
3086 /* If there are any driver-specific xstats, append them
3089 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
3091 xstats_names + cnt_used_entries,
3092 size - cnt_used_entries);
3093 if (cnt_driver_entries < 0)
3094 return eth_err(port_id, cnt_driver_entries);
3095 cnt_used_entries += cnt_driver_entries;
3098 return cnt_used_entries;
3103 eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
3105 struct rte_eth_dev *dev;
3106 struct rte_eth_stats eth_stats;
3107 unsigned int count = 0, i, q;
3108 uint64_t val, *stats_ptr;
3109 uint16_t nb_rxqs, nb_txqs;
3112 ret = rte_eth_stats_get(port_id, ð_stats);
3116 dev = &rte_eth_devices[port_id];
3118 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
3119 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
3122 for (i = 0; i < RTE_NB_STATS; i++) {
3123 stats_ptr = RTE_PTR_ADD(ð_stats,
3124 eth_dev_stats_strings[i].offset);
3126 xstats[count++].value = val;
3129 if ((dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS) == 0)
3133 for (q = 0; q < nb_rxqs; q++) {
3134 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
3135 stats_ptr = RTE_PTR_ADD(ð_stats,
3136 eth_dev_rxq_stats_strings[i].offset +
3137 q * sizeof(uint64_t));
3139 xstats[count++].value = val;
3144 for (q = 0; q < nb_txqs; q++) {
3145 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
3146 stats_ptr = RTE_PTR_ADD(ð_stats,
3147 eth_dev_txq_stats_strings[i].offset +
3148 q * sizeof(uint64_t));
3150 xstats[count++].value = val;
3156 /* retrieve ethdev extended statistics */
3158 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
3159 uint64_t *values, unsigned int size)
3161 unsigned int no_basic_stat_requested = 1;
3162 unsigned int no_ext_stat_requested = 1;
3163 unsigned int num_xstats_filled;
3164 unsigned int basic_count;
3165 uint16_t expected_entries;
3166 struct rte_eth_dev *dev;
3170 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3171 dev = &rte_eth_devices[port_id];
3173 ret = eth_dev_get_xstats_count(port_id);
3176 expected_entries = (uint16_t)ret;
3177 struct rte_eth_xstat xstats[expected_entries];
3178 basic_count = eth_dev_get_xstats_basic_count(dev);
3180 /* Return max number of stats if no ids given */
3183 return expected_entries;
3184 else if (values && size < expected_entries)
3185 return expected_entries;
3191 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
3192 unsigned int basic_count = eth_dev_get_xstats_basic_count(dev);
3193 uint64_t ids_copy[size];
3195 for (i = 0; i < size; i++) {
3196 if (ids[i] < basic_count) {
3197 no_basic_stat_requested = 0;
3202 * Convert ids to xstats ids that PMD knows.
3203 * ids known by user are basic + extended stats.
3205 ids_copy[i] = ids[i] - basic_count;
3208 if (no_basic_stat_requested)
3209 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
3214 for (i = 0; i < size; i++) {
3215 if (ids[i] >= basic_count) {
3216 no_ext_stat_requested = 0;
3222 /* Fill the xstats structure */
3223 if (ids && no_ext_stat_requested)
3224 ret = eth_basic_stats_get(port_id, xstats);
3226 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
3230 num_xstats_filled = (unsigned int)ret;
3232 /* Return all stats */
3234 for (i = 0; i < num_xstats_filled; i++)
3235 values[i] = xstats[i].value;
3236 return expected_entries;
3240 for (i = 0; i < size; i++) {
3241 if (ids[i] >= expected_entries) {
3242 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
3245 values[i] = xstats[ids[i]].value;
3251 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
3254 struct rte_eth_dev *dev;
3255 unsigned int count = 0, i;
3256 signed int xcount = 0;
3257 uint16_t nb_rxqs, nb_txqs;
3260 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3261 dev = &rte_eth_devices[port_id];
3263 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
3264 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
3266 /* Return generic statistics */
3267 count = RTE_NB_STATS;
3268 if (dev->data->dev_flags & RTE_ETH_DEV_AUTOFILL_QUEUE_XSTATS)
3269 count += (nb_rxqs * RTE_NB_RXQ_STATS) + (nb_txqs * RTE_NB_TXQ_STATS);
3271 /* implemented by the driver */
3272 if (dev->dev_ops->xstats_get != NULL) {
3273 /* Retrieve the xstats from the driver at the end of the
3276 xcount = (*dev->dev_ops->xstats_get)(dev,
3277 xstats ? xstats + count : NULL,
3278 (n > count) ? n - count : 0);
3281 return eth_err(port_id, xcount);
3284 if (n < count + xcount || xstats == NULL)
3285 return count + xcount;
3287 /* now fill the xstats structure */
3288 ret = eth_basic_stats_get(port_id, xstats);
3293 for (i = 0; i < count; i++)
3295 /* add an offset to driver-specific stats */
3296 for ( ; i < count + xcount; i++)
3297 xstats[i].id += count;
3299 return count + xcount;
3302 /* reset ethdev extended statistics */
3304 rte_eth_xstats_reset(uint16_t port_id)
3306 struct rte_eth_dev *dev;
3308 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3309 dev = &rte_eth_devices[port_id];
3311 /* implemented by the driver */
3312 if (dev->dev_ops->xstats_reset != NULL)
3313 return eth_err(port_id, (*dev->dev_ops->xstats_reset)(dev));
3315 /* fallback to default */
3316 return rte_eth_stats_reset(port_id);
3320 eth_dev_set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id,
3321 uint8_t stat_idx, uint8_t is_rx)
3323 struct rte_eth_dev *dev;
3325 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3326 dev = &rte_eth_devices[port_id];
3328 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
3331 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
3334 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
3337 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
3338 return (*dev->dev_ops->queue_stats_mapping_set) (dev, queue_id, stat_idx, is_rx);
3342 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
3345 return eth_err(port_id, eth_dev_set_queue_stats_mapping(port_id,
3347 stat_idx, STAT_QMAP_TX));
3351 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
3354 return eth_err(port_id, eth_dev_set_queue_stats_mapping(port_id,
3356 stat_idx, STAT_QMAP_RX));
3360 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
3362 struct rte_eth_dev *dev;
3364 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3365 dev = &rte_eth_devices[port_id];
3367 if (fw_version == NULL && fw_size > 0) {
3369 "Cannot get ethdev port %u FW version to NULL when string size is non zero\n",
3374 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
3375 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
3376 fw_version, fw_size));
3380 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
3382 struct rte_eth_dev *dev;
3383 const struct rte_eth_desc_lim lim = {
3384 .nb_max = UINT16_MAX,
3387 .nb_seg_max = UINT16_MAX,
3388 .nb_mtu_seg_max = UINT16_MAX,
3392 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3393 dev = &rte_eth_devices[port_id];
3395 if (dev_info == NULL) {
3396 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u info to NULL\n",
3402 * Init dev_info before port_id check since caller does not have
3403 * return status and does not know if get is successful or not.
3405 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
3406 dev_info->switch_info.domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
3408 dev_info->rx_desc_lim = lim;
3409 dev_info->tx_desc_lim = lim;
3410 dev_info->device = dev->device;
3411 dev_info->min_mtu = RTE_ETHER_MIN_MTU;
3412 dev_info->max_mtu = UINT16_MAX;
3414 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
3415 diag = (*dev->dev_ops->dev_infos_get)(dev, dev_info);
3417 /* Cleanup already filled in device information */
3418 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
3419 return eth_err(port_id, diag);
3422 /* Maximum number of queues should be <= RTE_MAX_QUEUES_PER_PORT */
3423 dev_info->max_rx_queues = RTE_MIN(dev_info->max_rx_queues,
3424 RTE_MAX_QUEUES_PER_PORT);
3425 dev_info->max_tx_queues = RTE_MIN(dev_info->max_tx_queues,
3426 RTE_MAX_QUEUES_PER_PORT);
3428 dev_info->driver_name = dev->device->driver->name;
3429 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
3430 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
3432 dev_info->dev_flags = &dev->data->dev_flags;
3438 rte_eth_dev_conf_get(uint16_t port_id, struct rte_eth_conf *dev_conf)
3440 struct rte_eth_dev *dev;
3442 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3443 dev = &rte_eth_devices[port_id];
3445 if (dev_conf == NULL) {
3447 "Cannot get ethdev port %u configuration to NULL\n",
3452 memcpy(dev_conf, &dev->data->dev_conf, sizeof(struct rte_eth_conf));
3458 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
3459 uint32_t *ptypes, int num)
3462 struct rte_eth_dev *dev;
3463 const uint32_t *all_ptypes;
3465 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3466 dev = &rte_eth_devices[port_id];
3468 if (ptypes == NULL && num > 0) {
3470 "Cannot get ethdev port %u supported packet types to NULL when array size is non zero\n",
3475 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
3476 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3481 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
3482 if (all_ptypes[i] & ptype_mask) {
3484 ptypes[j] = all_ptypes[i];
3492 rte_eth_dev_set_ptypes(uint16_t port_id, uint32_t ptype_mask,
3493 uint32_t *set_ptypes, unsigned int num)
3495 const uint32_t valid_ptype_masks[] = {
3499 RTE_PTYPE_TUNNEL_MASK,
3500 RTE_PTYPE_INNER_L2_MASK,
3501 RTE_PTYPE_INNER_L3_MASK,
3502 RTE_PTYPE_INNER_L4_MASK,
3504 const uint32_t *all_ptypes;
3505 struct rte_eth_dev *dev;
3506 uint32_t unused_mask;
3510 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3511 dev = &rte_eth_devices[port_id];
3513 if (num > 0 && set_ptypes == NULL) {
3515 "Cannot get ethdev port %u set packet types to NULL when array size is non zero\n",
3520 if (*dev->dev_ops->dev_supported_ptypes_get == NULL ||
3521 *dev->dev_ops->dev_ptypes_set == NULL) {
3526 if (ptype_mask == 0) {
3527 ret = (*dev->dev_ops->dev_ptypes_set)(dev,
3532 unused_mask = ptype_mask;
3533 for (i = 0; i < RTE_DIM(valid_ptype_masks); i++) {
3534 uint32_t mask = ptype_mask & valid_ptype_masks[i];
3535 if (mask && mask != valid_ptype_masks[i]) {
3539 unused_mask &= ~valid_ptype_masks[i];
3547 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3548 if (all_ptypes == NULL) {
3554 * Accommodate as many set_ptypes as possible. If the supplied
3555 * set_ptypes array is insufficient fill it partially.
3557 for (i = 0, j = 0; set_ptypes != NULL &&
3558 (all_ptypes[i] != RTE_PTYPE_UNKNOWN); ++i) {
3559 if (ptype_mask & all_ptypes[i]) {
3561 set_ptypes[j] = all_ptypes[i];
3569 if (set_ptypes != NULL && j < num)
3570 set_ptypes[j] = RTE_PTYPE_UNKNOWN;
3572 return (*dev->dev_ops->dev_ptypes_set)(dev, ptype_mask);
3576 set_ptypes[0] = RTE_PTYPE_UNKNOWN;
3582 rte_eth_macaddrs_get(uint16_t port_id, struct rte_ether_addr *ma,
3586 struct rte_eth_dev *dev;
3587 struct rte_eth_dev_info dev_info;
3590 RTE_ETHDEV_LOG(ERR, "%s: invalid parameters\n", __func__);
3594 /* will check for us that port_id is a valid one */
3595 ret = rte_eth_dev_info_get(port_id, &dev_info);
3599 dev = &rte_eth_devices[port_id];
3600 num = RTE_MIN(dev_info.max_mac_addrs, num);
3601 memcpy(ma, dev->data->mac_addrs, num * sizeof(ma[0]));
3607 rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
3609 struct rte_eth_dev *dev;
3611 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3612 dev = &rte_eth_devices[port_id];
3614 if (mac_addr == NULL) {
3616 "Cannot get ethdev port %u MAC address to NULL\n",
3621 rte_ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
3627 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
3629 struct rte_eth_dev *dev;
3631 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3632 dev = &rte_eth_devices[port_id];
3635 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u MTU to NULL\n",
3640 *mtu = dev->data->mtu;
3645 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
3648 struct rte_eth_dev_info dev_info;
3649 struct rte_eth_dev *dev;
3650 int is_jumbo_frame_capable = 0;
3652 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3653 dev = &rte_eth_devices[port_id];
3654 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
3657 * Check if the device supports dev_infos_get, if it does not
3658 * skip min_mtu/max_mtu validation here as this requires values
3659 * that are populated within the call to rte_eth_dev_info_get()
3660 * which relies on dev->dev_ops->dev_infos_get.
3662 if (*dev->dev_ops->dev_infos_get != NULL) {
3663 ret = rte_eth_dev_info_get(port_id, &dev_info);
3667 if (mtu < dev_info.min_mtu || mtu > dev_info.max_mtu)
3670 if ((dev_info.rx_offload_capa & DEV_RX_OFFLOAD_JUMBO_FRAME) != 0)
3671 is_jumbo_frame_capable = 1;
3674 if (mtu > RTE_ETHER_MTU && is_jumbo_frame_capable == 0)
3677 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
3679 dev->data->mtu = mtu;
3681 /* switch to jumbo mode if needed */
3682 if (mtu > RTE_ETHER_MTU)
3683 dev->data->dev_conf.rxmode.offloads |=
3684 DEV_RX_OFFLOAD_JUMBO_FRAME;
3686 dev->data->dev_conf.rxmode.offloads &=
3687 ~DEV_RX_OFFLOAD_JUMBO_FRAME;
3690 return eth_err(port_id, ret);
3694 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
3696 struct rte_eth_dev *dev;
3699 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3700 dev = &rte_eth_devices[port_id];
3702 if (!(dev->data->dev_conf.rxmode.offloads &
3703 DEV_RX_OFFLOAD_VLAN_FILTER)) {
3704 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
3709 if (vlan_id > 4095) {
3710 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
3714 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
3716 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
3718 struct rte_vlan_filter_conf *vfc;
3722 vfc = &dev->data->vlan_filter_conf;
3723 vidx = vlan_id / 64;
3724 vbit = vlan_id % 64;
3727 vfc->ids[vidx] |= UINT64_C(1) << vbit;
3729 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
3732 return eth_err(port_id, ret);
3736 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
3739 struct rte_eth_dev *dev;
3741 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3742 dev = &rte_eth_devices[port_id];
3744 if (rx_queue_id >= dev->data->nb_rx_queues) {
3745 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
3749 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
3750 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
3756 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
3757 enum rte_vlan_type vlan_type,
3760 struct rte_eth_dev *dev;
3762 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3763 dev = &rte_eth_devices[port_id];
3765 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
3766 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
3771 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
3773 struct rte_eth_dev_info dev_info;
3774 struct rte_eth_dev *dev;
3778 uint64_t orig_offloads;
3779 uint64_t dev_offloads;
3780 uint64_t new_offloads;
3782 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3783 dev = &rte_eth_devices[port_id];
3785 /* save original values in case of failure */
3786 orig_offloads = dev->data->dev_conf.rxmode.offloads;
3787 dev_offloads = orig_offloads;
3789 /* check which option changed by application */
3790 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
3791 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
3794 dev_offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
3796 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
3797 mask |= ETH_VLAN_STRIP_MASK;
3800 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
3801 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER);
3804 dev_offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
3806 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_FILTER;
3807 mask |= ETH_VLAN_FILTER_MASK;
3810 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
3811 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND);
3814 dev_offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
3816 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_EXTEND;
3817 mask |= ETH_VLAN_EXTEND_MASK;
3820 cur = !!(offload_mask & ETH_QINQ_STRIP_OFFLOAD);
3821 org = !!(dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP);
3824 dev_offloads |= DEV_RX_OFFLOAD_QINQ_STRIP;
3826 dev_offloads &= ~DEV_RX_OFFLOAD_QINQ_STRIP;
3827 mask |= ETH_QINQ_STRIP_MASK;
3834 ret = rte_eth_dev_info_get(port_id, &dev_info);
3838 /* Rx VLAN offloading must be within its device capabilities */
3839 if ((dev_offloads & dev_info.rx_offload_capa) != dev_offloads) {
3840 new_offloads = dev_offloads & ~orig_offloads;
3842 "Ethdev port_id=%u requested new added VLAN offloads "
3843 "0x%" PRIx64 " must be within Rx offloads capabilities "
3844 "0x%" PRIx64 " in %s()\n",
3845 port_id, new_offloads, dev_info.rx_offload_capa,
3850 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
3851 dev->data->dev_conf.rxmode.offloads = dev_offloads;
3852 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
3854 /* hit an error restore original values */
3855 dev->data->dev_conf.rxmode.offloads = orig_offloads;
3858 return eth_err(port_id, ret);
3862 rte_eth_dev_get_vlan_offload(uint16_t port_id)
3864 struct rte_eth_dev *dev;
3865 uint64_t *dev_offloads;
3868 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3869 dev = &rte_eth_devices[port_id];
3870 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
3872 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
3873 ret |= ETH_VLAN_STRIP_OFFLOAD;
3875 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
3876 ret |= ETH_VLAN_FILTER_OFFLOAD;
3878 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
3879 ret |= ETH_VLAN_EXTEND_OFFLOAD;
3881 if (*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP)
3882 ret |= ETH_QINQ_STRIP_OFFLOAD;
3888 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
3890 struct rte_eth_dev *dev;
3892 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3893 dev = &rte_eth_devices[port_id];
3895 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
3896 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
3900 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3902 struct rte_eth_dev *dev;
3904 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3905 dev = &rte_eth_devices[port_id];
3907 if (fc_conf == NULL) {
3909 "Cannot get ethdev port %u flow control config to NULL\n",
3914 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
3915 memset(fc_conf, 0, sizeof(*fc_conf));
3916 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
3920 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3922 struct rte_eth_dev *dev;
3924 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3925 dev = &rte_eth_devices[port_id];
3927 if (fc_conf == NULL) {
3929 "Cannot set ethdev port %u flow control from NULL config\n",
3934 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
3935 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
3939 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
3940 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
3944 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
3945 struct rte_eth_pfc_conf *pfc_conf)
3947 struct rte_eth_dev *dev;
3949 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3950 dev = &rte_eth_devices[port_id];
3952 if (pfc_conf == NULL) {
3954 "Cannot set ethdev port %u priority flow control from NULL config\n",
3959 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
3960 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
3964 /* High water, low water validation are device specific */
3965 if (*dev->dev_ops->priority_flow_ctrl_set)
3966 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
3972 eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
3977 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
3978 for (i = 0; i < num; i++) {
3979 if (reta_conf[i].mask)
3987 eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
3991 uint16_t i, idx, shift;
3994 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
3998 for (i = 0; i < reta_size; i++) {
3999 idx = i / RTE_RETA_GROUP_SIZE;
4000 shift = i % RTE_RETA_GROUP_SIZE;
4001 if ((reta_conf[idx].mask & (1ULL << shift)) &&
4002 (reta_conf[idx].reta[shift] >= max_rxq)) {
4004 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
4006 reta_conf[idx].reta[shift], max_rxq);
4015 rte_eth_dev_rss_reta_update(uint16_t port_id,
4016 struct rte_eth_rss_reta_entry64 *reta_conf,
4019 struct rte_eth_dev *dev;
4022 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4023 dev = &rte_eth_devices[port_id];
4025 if (reta_conf == NULL) {
4027 "Cannot update ethdev port %u RSS RETA to NULL\n",
4032 if (reta_size == 0) {
4034 "Cannot update ethdev port %u RSS RETA with zero size\n",
4039 /* Check mask bits */
4040 ret = eth_check_reta_mask(reta_conf, reta_size);
4044 /* Check entry value */
4045 ret = eth_check_reta_entry(reta_conf, reta_size,
4046 dev->data->nb_rx_queues);
4050 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
4051 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
4056 rte_eth_dev_rss_reta_query(uint16_t port_id,
4057 struct rte_eth_rss_reta_entry64 *reta_conf,
4060 struct rte_eth_dev *dev;
4063 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4064 dev = &rte_eth_devices[port_id];
4066 if (reta_conf == NULL) {
4068 "Cannot query ethdev port %u RSS RETA from NULL config\n",
4073 /* Check mask bits */
4074 ret = eth_check_reta_mask(reta_conf, reta_size);
4078 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
4079 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
4084 rte_eth_dev_rss_hash_update(uint16_t port_id,
4085 struct rte_eth_rss_conf *rss_conf)
4087 struct rte_eth_dev *dev;
4088 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
4091 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4092 dev = &rte_eth_devices[port_id];
4094 if (rss_conf == NULL) {
4096 "Cannot update ethdev port %u RSS hash from NULL config\n",
4101 ret = rte_eth_dev_info_get(port_id, &dev_info);
4105 rss_conf->rss_hf = rte_eth_rss_hf_refine(rss_conf->rss_hf);
4106 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
4107 dev_info.flow_type_rss_offloads) {
4109 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
4110 port_id, rss_conf->rss_hf,
4111 dev_info.flow_type_rss_offloads);
4114 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
4115 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
4120 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
4121 struct rte_eth_rss_conf *rss_conf)
4123 struct rte_eth_dev *dev;
4125 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4126 dev = &rte_eth_devices[port_id];
4128 if (rss_conf == NULL) {
4130 "Cannot get ethdev port %u RSS hash config to NULL\n",
4135 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
4136 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
4141 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
4142 struct rte_eth_udp_tunnel *udp_tunnel)
4144 struct rte_eth_dev *dev;
4146 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4147 dev = &rte_eth_devices[port_id];
4149 if (udp_tunnel == NULL) {
4151 "Cannot add ethdev port %u UDP tunnel port from NULL UDP tunnel\n",
4156 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
4157 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4161 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
4162 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
4167 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
4168 struct rte_eth_udp_tunnel *udp_tunnel)
4170 struct rte_eth_dev *dev;
4172 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4173 dev = &rte_eth_devices[port_id];
4175 if (udp_tunnel == NULL) {
4177 "Cannot delete ethdev port %u UDP tunnel port from NULL UDP tunnel\n",
4182 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
4183 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4187 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
4188 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
4193 rte_eth_led_on(uint16_t port_id)
4195 struct rte_eth_dev *dev;
4197 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4198 dev = &rte_eth_devices[port_id];
4200 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
4201 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
4205 rte_eth_led_off(uint16_t port_id)
4207 struct rte_eth_dev *dev;
4209 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4210 dev = &rte_eth_devices[port_id];
4212 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
4213 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
4217 rte_eth_fec_get_capability(uint16_t port_id,
4218 struct rte_eth_fec_capa *speed_fec_capa,
4221 struct rte_eth_dev *dev;
4224 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4225 dev = &rte_eth_devices[port_id];
4227 if (speed_fec_capa == NULL && num > 0) {
4229 "Cannot get ethdev port %u FEC capability to NULL when array size is non zero\n",
4234 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_get_capability, -ENOTSUP);
4235 ret = (*dev->dev_ops->fec_get_capability)(dev, speed_fec_capa, num);
4241 rte_eth_fec_get(uint16_t port_id, uint32_t *fec_capa)
4243 struct rte_eth_dev *dev;
4245 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4246 dev = &rte_eth_devices[port_id];
4248 if (fec_capa == NULL) {
4250 "Cannot get ethdev port %u current FEC mode to NULL\n",
4255 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_get, -ENOTSUP);
4256 return eth_err(port_id, (*dev->dev_ops->fec_get)(dev, fec_capa));
4260 rte_eth_fec_set(uint16_t port_id, uint32_t fec_capa)
4262 struct rte_eth_dev *dev;
4264 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4265 dev = &rte_eth_devices[port_id];
4267 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_set, -ENOTSUP);
4268 return eth_err(port_id, (*dev->dev_ops->fec_set)(dev, fec_capa));
4272 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
4276 eth_dev_get_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
4278 struct rte_eth_dev_info dev_info;
4279 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4283 ret = rte_eth_dev_info_get(port_id, &dev_info);
4287 for (i = 0; i < dev_info.max_mac_addrs; i++)
4288 if (memcmp(addr, &dev->data->mac_addrs[i],
4289 RTE_ETHER_ADDR_LEN) == 0)
4295 static const struct rte_ether_addr null_mac_addr;
4298 rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr,
4301 struct rte_eth_dev *dev;
4306 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4307 dev = &rte_eth_devices[port_id];
4311 "Cannot add ethdev port %u MAC address from NULL address\n",
4316 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
4318 if (rte_is_zero_ether_addr(addr)) {
4319 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
4323 if (pool >= ETH_64_POOLS) {
4324 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
4328 index = eth_dev_get_mac_addr_index(port_id, addr);
4330 index = eth_dev_get_mac_addr_index(port_id, &null_mac_addr);
4332 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
4337 pool_mask = dev->data->mac_pool_sel[index];
4339 /* Check if both MAC address and pool is already there, and do nothing */
4340 if (pool_mask & (1ULL << pool))
4345 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
4348 /* Update address in NIC data structure */
4349 rte_ether_addr_copy(addr, &dev->data->mac_addrs[index]);
4351 /* Update pool bitmap in NIC data structure */
4352 dev->data->mac_pool_sel[index] |= (1ULL << pool);
4355 return eth_err(port_id, ret);
4359 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *addr)
4361 struct rte_eth_dev *dev;
4364 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4365 dev = &rte_eth_devices[port_id];
4369 "Cannot remove ethdev port %u MAC address from NULL address\n",
4374 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
4376 index = eth_dev_get_mac_addr_index(port_id, addr);
4379 "Port %u: Cannot remove default MAC address\n",
4382 } else if (index < 0)
4383 return 0; /* Do nothing if address wasn't found */
4386 (*dev->dev_ops->mac_addr_remove)(dev, index);
4388 /* Update address in NIC data structure */
4389 rte_ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
4391 /* reset pool bitmap */
4392 dev->data->mac_pool_sel[index] = 0;
4398 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *addr)
4400 struct rte_eth_dev *dev;
4403 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4404 dev = &rte_eth_devices[port_id];
4408 "Cannot set ethdev port %u default MAC address from NULL address\n",
4413 if (!rte_is_valid_assigned_ether_addr(addr))
4416 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
4418 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
4422 /* Update default address in NIC data structure */
4423 rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]);
4430 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
4434 eth_dev_get_hash_mac_addr_index(uint16_t port_id,
4435 const struct rte_ether_addr *addr)
4437 struct rte_eth_dev_info dev_info;
4438 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4442 ret = rte_eth_dev_info_get(port_id, &dev_info);
4446 if (!dev->data->hash_mac_addrs)
4449 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
4450 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
4451 RTE_ETHER_ADDR_LEN) == 0)
4458 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
4463 struct rte_eth_dev *dev;
4465 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4466 dev = &rte_eth_devices[port_id];
4470 "Cannot set ethdev port %u unicast hash table from NULL address\n",
4475 if (rte_is_zero_ether_addr(addr)) {
4476 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
4481 index = eth_dev_get_hash_mac_addr_index(port_id, addr);
4482 /* Check if it's already there, and do nothing */
4483 if ((index >= 0) && on)
4489 "Port %u: the MAC address was not set in UTA\n",
4494 index = eth_dev_get_hash_mac_addr_index(port_id, &null_mac_addr);
4496 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
4502 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
4503 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
4505 /* Update address in NIC data structure */
4507 rte_ether_addr_copy(addr,
4508 &dev->data->hash_mac_addrs[index]);
4510 rte_ether_addr_copy(&null_mac_addr,
4511 &dev->data->hash_mac_addrs[index]);
4514 return eth_err(port_id, ret);
4518 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
4520 struct rte_eth_dev *dev;
4522 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4523 dev = &rte_eth_devices[port_id];
4525 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
4526 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
4530 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
4533 struct rte_eth_dev *dev;
4534 struct rte_eth_dev_info dev_info;
4535 struct rte_eth_link link;
4538 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4539 dev = &rte_eth_devices[port_id];
4541 ret = rte_eth_dev_info_get(port_id, &dev_info);
4545 link = dev->data->dev_link;
4547 if (queue_idx > dev_info.max_tx_queues) {
4549 "Set queue rate limit:port %u: invalid queue id=%u\n",
4550 port_id, queue_idx);
4554 if (tx_rate > link.link_speed) {
4556 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
4557 tx_rate, link.link_speed);
4561 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
4562 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
4563 queue_idx, tx_rate));
4566 RTE_INIT(eth_dev_init_fp_ops)
4570 for (i = 0; i != RTE_DIM(rte_eth_fp_ops); i++)
4571 eth_dev_fp_ops_reset(rte_eth_fp_ops + i);
4574 RTE_INIT(eth_dev_init_cb_lists)
4578 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
4579 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
4583 rte_eth_dev_callback_register(uint16_t port_id,
4584 enum rte_eth_event_type event,
4585 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4587 struct rte_eth_dev *dev;
4588 struct rte_eth_dev_callback *user_cb;
4592 if (cb_fn == NULL) {
4594 "Cannot register ethdev port %u callback from NULL\n",
4599 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4600 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4604 if (port_id == RTE_ETH_ALL) {
4606 last_port = RTE_MAX_ETHPORTS - 1;
4608 next_port = last_port = port_id;
4611 rte_spinlock_lock(ð_dev_cb_lock);
4614 dev = &rte_eth_devices[next_port];
4616 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
4617 if (user_cb->cb_fn == cb_fn &&
4618 user_cb->cb_arg == cb_arg &&
4619 user_cb->event == event) {
4624 /* create a new callback. */
4625 if (user_cb == NULL) {
4626 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
4627 sizeof(struct rte_eth_dev_callback), 0);
4628 if (user_cb != NULL) {
4629 user_cb->cb_fn = cb_fn;
4630 user_cb->cb_arg = cb_arg;
4631 user_cb->event = event;
4632 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
4635 rte_spinlock_unlock(ð_dev_cb_lock);
4636 rte_eth_dev_callback_unregister(port_id, event,
4642 } while (++next_port <= last_port);
4644 rte_spinlock_unlock(ð_dev_cb_lock);
4649 rte_eth_dev_callback_unregister(uint16_t port_id,
4650 enum rte_eth_event_type event,
4651 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4654 struct rte_eth_dev *dev;
4655 struct rte_eth_dev_callback *cb, *next;
4659 if (cb_fn == NULL) {
4661 "Cannot unregister ethdev port %u callback from NULL\n",
4666 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4667 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4671 if (port_id == RTE_ETH_ALL) {
4673 last_port = RTE_MAX_ETHPORTS - 1;
4675 next_port = last_port = port_id;
4678 rte_spinlock_lock(ð_dev_cb_lock);
4681 dev = &rte_eth_devices[next_port];
4683 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
4686 next = TAILQ_NEXT(cb, next);
4688 if (cb->cb_fn != cb_fn || cb->event != event ||
4689 (cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
4693 * if this callback is not executing right now,
4696 if (cb->active == 0) {
4697 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
4703 } while (++next_port <= last_port);
4705 rte_spinlock_unlock(ð_dev_cb_lock);
4710 rte_eth_dev_callback_process(struct rte_eth_dev *dev,
4711 enum rte_eth_event_type event, void *ret_param)
4713 struct rte_eth_dev_callback *cb_lst;
4714 struct rte_eth_dev_callback dev_cb;
4717 rte_spinlock_lock(ð_dev_cb_lock);
4718 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
4719 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
4723 if (ret_param != NULL)
4724 dev_cb.ret_param = ret_param;
4726 rte_spinlock_unlock(ð_dev_cb_lock);
4727 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
4728 dev_cb.cb_arg, dev_cb.ret_param);
4729 rte_spinlock_lock(ð_dev_cb_lock);
4732 rte_spinlock_unlock(ð_dev_cb_lock);
4737 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
4743 * for secondary process, at that point we expect device
4744 * to be already 'usable', so shared data and all function pointers
4745 * for fast-path devops have to be setup properly inside rte_eth_dev.
4747 if (rte_eal_process_type() == RTE_PROC_SECONDARY)
4748 eth_dev_fp_ops_setup(rte_eth_fp_ops + dev->data->port_id, dev);
4750 rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
4752 dev->state = RTE_ETH_DEV_ATTACHED;
4756 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
4759 struct rte_eth_dev *dev;
4760 struct rte_intr_handle *intr_handle;
4764 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4765 dev = &rte_eth_devices[port_id];
4767 if (!dev->intr_handle) {
4768 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4772 intr_handle = dev->intr_handle;
4773 if (!intr_handle->intr_vec) {
4774 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4778 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
4779 vec = intr_handle->intr_vec[qid];
4780 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4781 if (rc && rc != -EEXIST) {
4783 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4784 port_id, qid, op, epfd, vec);
4792 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
4794 struct rte_intr_handle *intr_handle;
4795 struct rte_eth_dev *dev;
4796 unsigned int efd_idx;
4800 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
4801 dev = &rte_eth_devices[port_id];
4803 if (queue_id >= dev->data->nb_rx_queues) {
4804 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4808 if (!dev->intr_handle) {
4809 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4813 intr_handle = dev->intr_handle;
4814 if (!intr_handle->intr_vec) {
4815 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4819 vec = intr_handle->intr_vec[queue_id];
4820 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
4821 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
4822 fd = intr_handle->efds[efd_idx];
4828 eth_dev_dma_mzone_name(char *name, size_t len, uint16_t port_id, uint16_t queue_id,
4829 const char *ring_name)
4831 return snprintf(name, len, "eth_p%d_q%d_%s",
4832 port_id, queue_id, ring_name);
4835 const struct rte_memzone *
4836 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
4837 uint16_t queue_id, size_t size, unsigned align,
4840 char z_name[RTE_MEMZONE_NAMESIZE];
4841 const struct rte_memzone *mz;
4844 rc = eth_dev_dma_mzone_name(z_name, sizeof(z_name), dev->data->port_id,
4845 queue_id, ring_name);
4846 if (rc >= RTE_MEMZONE_NAMESIZE) {
4847 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4848 rte_errno = ENAMETOOLONG;
4852 mz = rte_memzone_lookup(z_name);
4854 if ((socket_id != SOCKET_ID_ANY && socket_id != mz->socket_id) ||
4856 ((uintptr_t)mz->addr & (align - 1)) != 0) {
4858 "memzone %s does not justify the requested attributes\n",
4866 return rte_memzone_reserve_aligned(z_name, size, socket_id,
4867 RTE_MEMZONE_IOVA_CONTIG, align);
4871 rte_eth_dma_zone_free(const struct rte_eth_dev *dev, const char *ring_name,
4874 char z_name[RTE_MEMZONE_NAMESIZE];
4875 const struct rte_memzone *mz;
4878 rc = eth_dev_dma_mzone_name(z_name, sizeof(z_name), dev->data->port_id,
4879 queue_id, ring_name);
4880 if (rc >= RTE_MEMZONE_NAMESIZE) {
4881 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4882 return -ENAMETOOLONG;
4885 mz = rte_memzone_lookup(z_name);
4887 rc = rte_memzone_free(mz);
4895 rte_eth_dev_create(struct rte_device *device, const char *name,
4896 size_t priv_data_size,
4897 ethdev_bus_specific_init ethdev_bus_specific_init,
4898 void *bus_init_params,
4899 ethdev_init_t ethdev_init, void *init_params)
4901 struct rte_eth_dev *ethdev;
4904 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
4906 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
4907 ethdev = rte_eth_dev_allocate(name);
4911 if (priv_data_size) {
4912 ethdev->data->dev_private = rte_zmalloc_socket(
4913 name, priv_data_size, RTE_CACHE_LINE_SIZE,
4916 if (!ethdev->data->dev_private) {
4918 "failed to allocate private data\n");
4924 ethdev = rte_eth_dev_attach_secondary(name);
4927 "secondary process attach failed, ethdev doesn't exist\n");
4932 ethdev->device = device;
4934 if (ethdev_bus_specific_init) {
4935 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
4938 "ethdev bus specific initialisation failed\n");
4943 retval = ethdev_init(ethdev, init_params);
4945 RTE_ETHDEV_LOG(ERR, "ethdev initialisation failed\n");
4949 rte_eth_dev_probing_finish(ethdev);
4954 rte_eth_dev_release_port(ethdev);
4959 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
4960 ethdev_uninit_t ethdev_uninit)
4964 ethdev = rte_eth_dev_allocated(ethdev->data->name);
4968 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
4970 ret = ethdev_uninit(ethdev);
4974 return rte_eth_dev_release_port(ethdev);
4978 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
4979 int epfd, int op, void *data)
4982 struct rte_eth_dev *dev;
4983 struct rte_intr_handle *intr_handle;
4986 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4987 dev = &rte_eth_devices[port_id];
4989 if (queue_id >= dev->data->nb_rx_queues) {
4990 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4994 if (!dev->intr_handle) {
4995 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4999 intr_handle = dev->intr_handle;
5000 if (!intr_handle->intr_vec) {
5001 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
5005 vec = intr_handle->intr_vec[queue_id];
5006 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
5007 if (rc && rc != -EEXIST) {
5009 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
5010 port_id, queue_id, op, epfd, vec);
5018 rte_eth_dev_rx_intr_enable(uint16_t port_id,
5021 struct rte_eth_dev *dev;
5024 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5025 dev = &rte_eth_devices[port_id];
5027 ret = eth_dev_validate_rx_queue(dev, queue_id);
5031 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
5032 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id));
5036 rte_eth_dev_rx_intr_disable(uint16_t port_id,
5039 struct rte_eth_dev *dev;
5042 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5043 dev = &rte_eth_devices[port_id];
5045 ret = eth_dev_validate_rx_queue(dev, queue_id);
5049 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
5050 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id));
5054 const struct rte_eth_rxtx_callback *
5055 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
5056 rte_rx_callback_fn fn, void *user_param)
5058 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
5059 rte_errno = ENOTSUP;
5062 struct rte_eth_dev *dev;
5064 /* check input parameters */
5065 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
5066 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
5070 dev = &rte_eth_devices[port_id];
5071 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
5075 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
5083 cb->param = user_param;
5085 rte_spinlock_lock(ð_dev_rx_cb_lock);
5086 /* Add the callbacks in fifo order. */
5087 struct rte_eth_rxtx_callback *tail =
5088 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
5091 /* Stores to cb->fn and cb->param should complete before
5092 * cb is visible to data plane.
5095 &rte_eth_devices[port_id].post_rx_burst_cbs[queue_id],
5096 cb, __ATOMIC_RELEASE);
5101 /* Stores to cb->fn and cb->param should complete before
5102 * cb is visible to data plane.
5104 __atomic_store_n(&tail->next, cb, __ATOMIC_RELEASE);
5106 rte_spinlock_unlock(ð_dev_rx_cb_lock);
5111 const struct rte_eth_rxtx_callback *
5112 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
5113 rte_rx_callback_fn fn, void *user_param)
5115 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
5116 rte_errno = ENOTSUP;
5119 /* check input parameters */
5120 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
5121 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
5126 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
5134 cb->param = user_param;
5136 rte_spinlock_lock(ð_dev_rx_cb_lock);
5137 /* Add the callbacks at first position */
5138 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
5139 /* Stores to cb->fn, cb->param and cb->next should complete before
5140 * cb is visible to data plane threads.
5143 &rte_eth_devices[port_id].post_rx_burst_cbs[queue_id],
5144 cb, __ATOMIC_RELEASE);
5145 rte_spinlock_unlock(ð_dev_rx_cb_lock);
5150 const struct rte_eth_rxtx_callback *
5151 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
5152 rte_tx_callback_fn fn, void *user_param)
5154 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
5155 rte_errno = ENOTSUP;
5158 struct rte_eth_dev *dev;
5160 /* check input parameters */
5161 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
5162 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
5167 dev = &rte_eth_devices[port_id];
5168 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
5173 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
5181 cb->param = user_param;
5183 rte_spinlock_lock(ð_dev_tx_cb_lock);
5184 /* Add the callbacks in fifo order. */
5185 struct rte_eth_rxtx_callback *tail =
5186 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
5189 /* Stores to cb->fn and cb->param should complete before
5190 * cb is visible to data plane.
5193 &rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id],
5194 cb, __ATOMIC_RELEASE);
5199 /* Stores to cb->fn and cb->param should complete before
5200 * cb is visible to data plane.
5202 __atomic_store_n(&tail->next, cb, __ATOMIC_RELEASE);
5204 rte_spinlock_unlock(ð_dev_tx_cb_lock);
5210 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
5211 const struct rte_eth_rxtx_callback *user_cb)
5213 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
5216 /* Check input parameters. */
5217 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5218 if (user_cb == NULL ||
5219 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
5222 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
5223 struct rte_eth_rxtx_callback *cb;
5224 struct rte_eth_rxtx_callback **prev_cb;
5227 rte_spinlock_lock(ð_dev_rx_cb_lock);
5228 prev_cb = &dev->post_rx_burst_cbs[queue_id];
5229 for (; *prev_cb != NULL; prev_cb = &cb->next) {
5231 if (cb == user_cb) {
5232 /* Remove the user cb from the callback list. */
5233 __atomic_store_n(prev_cb, cb->next, __ATOMIC_RELAXED);
5238 rte_spinlock_unlock(ð_dev_rx_cb_lock);
5244 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
5245 const struct rte_eth_rxtx_callback *user_cb)
5247 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
5250 /* Check input parameters. */
5251 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5252 if (user_cb == NULL ||
5253 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
5256 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
5258 struct rte_eth_rxtx_callback *cb;
5259 struct rte_eth_rxtx_callback **prev_cb;
5261 rte_spinlock_lock(ð_dev_tx_cb_lock);
5262 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
5263 for (; *prev_cb != NULL; prev_cb = &cb->next) {
5265 if (cb == user_cb) {
5266 /* Remove the user cb from the callback list. */
5267 __atomic_store_n(prev_cb, cb->next, __ATOMIC_RELAXED);
5272 rte_spinlock_unlock(ð_dev_tx_cb_lock);
5278 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
5279 struct rte_eth_rxq_info *qinfo)
5281 struct rte_eth_dev *dev;
5283 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5284 dev = &rte_eth_devices[port_id];
5286 if (queue_id >= dev->data->nb_rx_queues) {
5287 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
5291 if (qinfo == NULL) {
5292 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u Rx queue %u info to NULL\n",
5297 if (dev->data->rx_queues == NULL ||
5298 dev->data->rx_queues[queue_id] == NULL) {
5300 "Rx queue %"PRIu16" of device with port_id=%"
5301 PRIu16" has not been setup\n",
5306 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
5307 RTE_ETHDEV_LOG(INFO,
5308 "Can't get hairpin Rx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
5313 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
5315 memset(qinfo, 0, sizeof(*qinfo));
5316 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
5317 qinfo->queue_state = dev->data->rx_queue_state[queue_id];
5323 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
5324 struct rte_eth_txq_info *qinfo)
5326 struct rte_eth_dev *dev;
5328 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5329 dev = &rte_eth_devices[port_id];
5331 if (queue_id >= dev->data->nb_tx_queues) {
5332 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
5336 if (qinfo == NULL) {
5337 RTE_ETHDEV_LOG(ERR, "Cannot get ethdev port %u Tx queue %u info to NULL\n",
5342 if (dev->data->tx_queues == NULL ||
5343 dev->data->tx_queues[queue_id] == NULL) {
5345 "Tx queue %"PRIu16" of device with port_id=%"
5346 PRIu16" has not been setup\n",
5351 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
5352 RTE_ETHDEV_LOG(INFO,
5353 "Can't get hairpin Tx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
5358 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
5360 memset(qinfo, 0, sizeof(*qinfo));
5361 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
5362 qinfo->queue_state = dev->data->tx_queue_state[queue_id];
5368 rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
5369 struct rte_eth_burst_mode *mode)
5371 struct rte_eth_dev *dev;
5373 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5374 dev = &rte_eth_devices[port_id];
5376 if (queue_id >= dev->data->nb_rx_queues) {
5377 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
5383 "Cannot get ethdev port %u Rx queue %u burst mode to NULL\n",
5388 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_burst_mode_get, -ENOTSUP);
5389 memset(mode, 0, sizeof(*mode));
5390 return eth_err(port_id,
5391 dev->dev_ops->rx_burst_mode_get(dev, queue_id, mode));
5395 rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
5396 struct rte_eth_burst_mode *mode)
5398 struct rte_eth_dev *dev;
5400 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5401 dev = &rte_eth_devices[port_id];
5403 if (queue_id >= dev->data->nb_tx_queues) {
5404 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
5410 "Cannot get ethdev port %u Tx queue %u burst mode to NULL\n",
5415 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_burst_mode_get, -ENOTSUP);
5416 memset(mode, 0, sizeof(*mode));
5417 return eth_err(port_id,
5418 dev->dev_ops->tx_burst_mode_get(dev, queue_id, mode));
5422 rte_eth_get_monitor_addr(uint16_t port_id, uint16_t queue_id,
5423 struct rte_power_monitor_cond *pmc)
5425 struct rte_eth_dev *dev;
5427 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5428 dev = &rte_eth_devices[port_id];
5430 if (queue_id >= dev->data->nb_rx_queues) {
5431 RTE_ETHDEV_LOG(ERR, "Invalid Rx queue_id=%u\n", queue_id);
5437 "Cannot get ethdev port %u Rx queue %u power monitor condition to NULL\n",
5442 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_monitor_addr, -ENOTSUP);
5443 return eth_err(port_id,
5444 dev->dev_ops->get_monitor_addr(dev->data->rx_queues[queue_id], pmc));
5448 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
5449 struct rte_ether_addr *mc_addr_set,
5450 uint32_t nb_mc_addr)
5452 struct rte_eth_dev *dev;
5454 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5455 dev = &rte_eth_devices[port_id];
5457 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
5458 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
5459 mc_addr_set, nb_mc_addr));
5463 rte_eth_timesync_enable(uint16_t port_id)
5465 struct rte_eth_dev *dev;
5467 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5468 dev = &rte_eth_devices[port_id];
5470 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
5471 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
5475 rte_eth_timesync_disable(uint16_t port_id)
5477 struct rte_eth_dev *dev;
5479 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5480 dev = &rte_eth_devices[port_id];
5482 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
5483 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
5487 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
5490 struct rte_eth_dev *dev;
5492 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5493 dev = &rte_eth_devices[port_id];
5495 if (timestamp == NULL) {
5497 "Cannot read ethdev port %u Rx timestamp to NULL\n",
5502 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
5503 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
5504 (dev, timestamp, flags));
5508 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
5509 struct timespec *timestamp)
5511 struct rte_eth_dev *dev;
5513 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5514 dev = &rte_eth_devices[port_id];
5516 if (timestamp == NULL) {
5518 "Cannot read ethdev port %u Tx timestamp to NULL\n",
5523 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
5524 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
5529 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
5531 struct rte_eth_dev *dev;
5533 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5534 dev = &rte_eth_devices[port_id];
5536 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
5537 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev, delta));
5541 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
5543 struct rte_eth_dev *dev;
5545 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5546 dev = &rte_eth_devices[port_id];
5548 if (timestamp == NULL) {
5550 "Cannot read ethdev port %u timesync time to NULL\n",
5555 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
5556 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
5561 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
5563 struct rte_eth_dev *dev;
5565 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5566 dev = &rte_eth_devices[port_id];
5568 if (timestamp == NULL) {
5570 "Cannot write ethdev port %u timesync from NULL time\n",
5575 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
5576 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
5581 rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
5583 struct rte_eth_dev *dev;
5585 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5586 dev = &rte_eth_devices[port_id];
5588 if (clock == NULL) {
5589 RTE_ETHDEV_LOG(ERR, "Cannot read ethdev port %u clock to NULL\n",
5594 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->read_clock, -ENOTSUP);
5595 return eth_err(port_id, (*dev->dev_ops->read_clock)(dev, clock));
5599 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
5601 struct rte_eth_dev *dev;
5603 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5604 dev = &rte_eth_devices[port_id];
5608 "Cannot get ethdev port %u register info to NULL\n",
5613 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
5614 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
5618 rte_eth_dev_get_eeprom_length(uint16_t port_id)
5620 struct rte_eth_dev *dev;
5622 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5623 dev = &rte_eth_devices[port_id];
5625 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
5626 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
5630 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
5632 struct rte_eth_dev *dev;
5634 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5635 dev = &rte_eth_devices[port_id];
5639 "Cannot get ethdev port %u EEPROM info to NULL\n",
5644 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
5645 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
5649 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
5651 struct rte_eth_dev *dev;
5653 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5654 dev = &rte_eth_devices[port_id];
5658 "Cannot set ethdev port %u EEPROM from NULL info\n",
5663 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
5664 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
5668 rte_eth_dev_get_module_info(uint16_t port_id,
5669 struct rte_eth_dev_module_info *modinfo)
5671 struct rte_eth_dev *dev;
5673 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5674 dev = &rte_eth_devices[port_id];
5676 if (modinfo == NULL) {
5678 "Cannot get ethdev port %u EEPROM module info to NULL\n",
5683 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
5684 return (*dev->dev_ops->get_module_info)(dev, modinfo);
5688 rte_eth_dev_get_module_eeprom(uint16_t port_id,
5689 struct rte_dev_eeprom_info *info)
5691 struct rte_eth_dev *dev;
5693 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5694 dev = &rte_eth_devices[port_id];
5698 "Cannot get ethdev port %u module EEPROM info to NULL\n",
5703 if (info->data == NULL) {
5705 "Cannot get ethdev port %u module EEPROM data to NULL\n",
5710 if (info->length == 0) {
5712 "Cannot get ethdev port %u module EEPROM to data with zero size\n",
5717 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
5718 return (*dev->dev_ops->get_module_eeprom)(dev, info);
5722 rte_eth_dev_get_dcb_info(uint16_t port_id,
5723 struct rte_eth_dcb_info *dcb_info)
5725 struct rte_eth_dev *dev;
5727 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5728 dev = &rte_eth_devices[port_id];
5730 if (dcb_info == NULL) {
5732 "Cannot get ethdev port %u DCB info to NULL\n",
5737 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
5739 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
5740 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
5744 eth_dev_adjust_nb_desc(uint16_t *nb_desc,
5745 const struct rte_eth_desc_lim *desc_lim)
5747 if (desc_lim->nb_align != 0)
5748 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
5750 if (desc_lim->nb_max != 0)
5751 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
5753 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
5757 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
5758 uint16_t *nb_rx_desc,
5759 uint16_t *nb_tx_desc)
5761 struct rte_eth_dev_info dev_info;
5764 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5766 ret = rte_eth_dev_info_get(port_id, &dev_info);
5770 if (nb_rx_desc != NULL)
5771 eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
5773 if (nb_tx_desc != NULL)
5774 eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
5780 rte_eth_dev_hairpin_capability_get(uint16_t port_id,
5781 struct rte_eth_hairpin_cap *cap)
5783 struct rte_eth_dev *dev;
5785 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5786 dev = &rte_eth_devices[port_id];
5790 "Cannot get ethdev port %u hairpin capability to NULL\n",
5795 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_cap_get, -ENOTSUP);
5796 memset(cap, 0, sizeof(*cap));
5797 return eth_err(port_id, (*dev->dev_ops->hairpin_cap_get)(dev, cap));
5801 rte_eth_dev_is_rx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5803 if (dev->data->rx_queue_state[queue_id] == RTE_ETH_QUEUE_STATE_HAIRPIN)
5809 rte_eth_dev_is_tx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5811 if (dev->data->tx_queue_state[queue_id] == RTE_ETH_QUEUE_STATE_HAIRPIN)
5817 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
5819 struct rte_eth_dev *dev;
5821 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5822 dev = &rte_eth_devices[port_id];
5826 "Cannot test ethdev port %u mempool operation from NULL pool\n",
5831 if (*dev->dev_ops->pool_ops_supported == NULL)
5832 return 1; /* all pools are supported */
5834 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
5838 * A set of values to describe the possible states of a switch domain.
5840 enum rte_eth_switch_domain_state {
5841 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
5842 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
5846 * Array of switch domains available for allocation. Array is sized to
5847 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
5848 * ethdev ports in a single process.
5850 static struct rte_eth_dev_switch {
5851 enum rte_eth_switch_domain_state state;
5852 } eth_dev_switch_domains[RTE_MAX_ETHPORTS];
5855 rte_eth_switch_domain_alloc(uint16_t *domain_id)
5859 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
5861 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
5862 if (eth_dev_switch_domains[i].state ==
5863 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
5864 eth_dev_switch_domains[i].state =
5865 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
5875 rte_eth_switch_domain_free(uint16_t domain_id)
5877 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
5878 domain_id >= RTE_MAX_ETHPORTS)
5881 if (eth_dev_switch_domains[domain_id].state !=
5882 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
5885 eth_dev_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
5891 eth_dev_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
5894 struct rte_kvargs_pair *pair;
5897 arglist->str = strdup(str_in);
5898 if (arglist->str == NULL)
5901 letter = arglist->str;
5904 pair = &arglist->pairs[0];
5907 case 0: /* Initial */
5910 else if (*letter == '\0')
5917 case 1: /* Parsing key */
5918 if (*letter == '=') {
5920 pair->value = letter + 1;
5922 } else if (*letter == ',' || *letter == '\0')
5927 case 2: /* Parsing value */
5930 else if (*letter == ',') {
5933 pair = &arglist->pairs[arglist->count];
5935 } else if (*letter == '\0') {
5938 pair = &arglist->pairs[arglist->count];
5943 case 3: /* Parsing list */
5946 else if (*letter == '\0')
5955 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
5957 struct rte_kvargs args;
5958 struct rte_kvargs_pair *pair;
5962 memset(eth_da, 0, sizeof(*eth_da));
5964 result = eth_dev_devargs_tokenise(&args, dargs);
5968 for (i = 0; i < args.count; i++) {
5969 pair = &args.pairs[i];
5970 if (strcmp("representor", pair->key) == 0) {
5971 if (eth_da->type != RTE_ETH_REPRESENTOR_NONE) {
5972 RTE_LOG(ERR, EAL, "duplicated representor key: %s\n",
5977 result = rte_eth_devargs_parse_representor_ports(
5978 pair->value, eth_da);
5992 rte_eth_representor_id_get(uint16_t port_id,
5993 enum rte_eth_representor_type type,
5994 int controller, int pf, int representor_port,
5999 struct rte_eth_representor_info *info = NULL;
6002 if (type == RTE_ETH_REPRESENTOR_NONE)
6004 if (repr_id == NULL)
6007 /* Get PMD representor range info. */
6008 ret = rte_eth_representor_info_get(port_id, NULL);
6009 if (ret == -ENOTSUP && type == RTE_ETH_REPRESENTOR_VF &&
6010 controller == -1 && pf == -1) {
6011 /* Direct mapping for legacy VF representor. */
6012 *repr_id = representor_port;
6014 } else if (ret < 0) {
6018 size = sizeof(*info) + n * sizeof(info->ranges[0]);
6019 info = calloc(1, size);
6022 info->nb_ranges_alloc = n;
6023 ret = rte_eth_representor_info_get(port_id, info);
6027 /* Default controller and pf to caller. */
6028 if (controller == -1)
6029 controller = info->controller;
6033 /* Locate representor ID. */
6035 for (i = 0; i < info->nb_ranges; ++i) {
6036 if (info->ranges[i].type != type)
6038 if (info->ranges[i].controller != controller)
6040 if (info->ranges[i].id_end < info->ranges[i].id_base) {
6041 RTE_LOG(WARNING, EAL, "Port %hu invalid representor ID Range %u - %u, entry %d\n",
6042 port_id, info->ranges[i].id_base,
6043 info->ranges[i].id_end, i);
6047 count = info->ranges[i].id_end - info->ranges[i].id_base + 1;
6048 switch (info->ranges[i].type) {
6049 case RTE_ETH_REPRESENTOR_PF:
6050 if (pf < info->ranges[i].pf ||
6051 pf >= info->ranges[i].pf + count)
6053 *repr_id = info->ranges[i].id_base +
6054 (pf - info->ranges[i].pf);
6057 case RTE_ETH_REPRESENTOR_VF:
6058 if (info->ranges[i].pf != pf)
6060 if (representor_port < info->ranges[i].vf ||
6061 representor_port >= info->ranges[i].vf + count)
6063 *repr_id = info->ranges[i].id_base +
6064 (representor_port - info->ranges[i].vf);
6067 case RTE_ETH_REPRESENTOR_SF:
6068 if (info->ranges[i].pf != pf)
6070 if (representor_port < info->ranges[i].sf ||
6071 representor_port >= info->ranges[i].sf + count)
6073 *repr_id = info->ranges[i].id_base +
6074 (representor_port - info->ranges[i].sf);
6087 eth_dev_handle_port_list(const char *cmd __rte_unused,
6088 const char *params __rte_unused,
6089 struct rte_tel_data *d)
6093 rte_tel_data_start_array(d, RTE_TEL_INT_VAL);
6094 RTE_ETH_FOREACH_DEV(port_id)
6095 rte_tel_data_add_array_int(d, port_id);
6100 eth_dev_add_port_queue_stats(struct rte_tel_data *d, uint64_t *q_stats,
6101 const char *stat_name)
6104 struct rte_tel_data *q_data = rte_tel_data_alloc();
6105 rte_tel_data_start_array(q_data, RTE_TEL_U64_VAL);
6106 for (q = 0; q < RTE_ETHDEV_QUEUE_STAT_CNTRS; q++)
6107 rte_tel_data_add_array_u64(q_data, q_stats[q]);
6108 rte_tel_data_add_dict_container(d, stat_name, q_data, 0);
6111 #define ADD_DICT_STAT(stats, s) rte_tel_data_add_dict_u64(d, #s, stats.s)
6114 eth_dev_handle_port_stats(const char *cmd __rte_unused,
6116 struct rte_tel_data *d)
6118 struct rte_eth_stats stats;
6121 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
6124 port_id = atoi(params);
6125 if (!rte_eth_dev_is_valid_port(port_id))
6128 ret = rte_eth_stats_get(port_id, &stats);
6132 rte_tel_data_start_dict(d);
6133 ADD_DICT_STAT(stats, ipackets);
6134 ADD_DICT_STAT(stats, opackets);
6135 ADD_DICT_STAT(stats, ibytes);
6136 ADD_DICT_STAT(stats, obytes);
6137 ADD_DICT_STAT(stats, imissed);
6138 ADD_DICT_STAT(stats, ierrors);
6139 ADD_DICT_STAT(stats, oerrors);
6140 ADD_DICT_STAT(stats, rx_nombuf);
6141 eth_dev_add_port_queue_stats(d, stats.q_ipackets, "q_ipackets");
6142 eth_dev_add_port_queue_stats(d, stats.q_opackets, "q_opackets");
6143 eth_dev_add_port_queue_stats(d, stats.q_ibytes, "q_ibytes");
6144 eth_dev_add_port_queue_stats(d, stats.q_obytes, "q_obytes");
6145 eth_dev_add_port_queue_stats(d, stats.q_errors, "q_errors");
6151 eth_dev_handle_port_xstats(const char *cmd __rte_unused,
6153 struct rte_tel_data *d)
6155 struct rte_eth_xstat *eth_xstats;
6156 struct rte_eth_xstat_name *xstat_names;
6157 int port_id, num_xstats;
6161 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
6164 port_id = strtoul(params, &end_param, 0);
6165 if (*end_param != '\0')
6166 RTE_ETHDEV_LOG(NOTICE,
6167 "Extra parameters passed to ethdev telemetry command, ignoring");
6168 if (!rte_eth_dev_is_valid_port(port_id))
6171 num_xstats = rte_eth_xstats_get(port_id, NULL, 0);
6175 /* use one malloc for both names and stats */
6176 eth_xstats = malloc((sizeof(struct rte_eth_xstat) +
6177 sizeof(struct rte_eth_xstat_name)) * num_xstats);
6178 if (eth_xstats == NULL)
6180 xstat_names = (void *)ð_xstats[num_xstats];
6182 ret = rte_eth_xstats_get_names(port_id, xstat_names, num_xstats);
6183 if (ret < 0 || ret > num_xstats) {
6188 ret = rte_eth_xstats_get(port_id, eth_xstats, num_xstats);
6189 if (ret < 0 || ret > num_xstats) {
6194 rte_tel_data_start_dict(d);
6195 for (i = 0; i < num_xstats; i++)
6196 rte_tel_data_add_dict_u64(d, xstat_names[i].name,
6197 eth_xstats[i].value);
6202 eth_dev_handle_port_link_status(const char *cmd __rte_unused,
6204 struct rte_tel_data *d)
6206 static const char *status_str = "status";
6208 struct rte_eth_link link;
6211 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
6214 port_id = strtoul(params, &end_param, 0);
6215 if (*end_param != '\0')
6216 RTE_ETHDEV_LOG(NOTICE,
6217 "Extra parameters passed to ethdev telemetry command, ignoring");
6218 if (!rte_eth_dev_is_valid_port(port_id))
6221 ret = rte_eth_link_get_nowait(port_id, &link);
6225 rte_tel_data_start_dict(d);
6226 if (!link.link_status) {
6227 rte_tel_data_add_dict_string(d, status_str, "DOWN");
6230 rte_tel_data_add_dict_string(d, status_str, "UP");
6231 rte_tel_data_add_dict_u64(d, "speed", link.link_speed);
6232 rte_tel_data_add_dict_string(d, "duplex",
6233 (link.link_duplex == ETH_LINK_FULL_DUPLEX) ?
6234 "full-duplex" : "half-duplex");
6239 eth_dev_handle_port_info(const char *cmd __rte_unused,
6241 struct rte_tel_data *d)
6243 struct rte_tel_data *rxq_state, *txq_state;
6244 char mac_addr[RTE_ETHER_ADDR_LEN];
6245 struct rte_eth_dev *eth_dev;
6249 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
6252 port_id = strtoul(params, &end_param, 0);
6253 if (*end_param != '\0')
6254 RTE_ETHDEV_LOG(NOTICE,
6255 "Extra parameters passed to ethdev telemetry command, ignoring");
6257 if (!rte_eth_dev_is_valid_port(port_id))
6260 eth_dev = &rte_eth_devices[port_id];
6264 rxq_state = rte_tel_data_alloc();
6268 txq_state = rte_tel_data_alloc();
6272 rte_tel_data_start_dict(d);
6273 rte_tel_data_add_dict_string(d, "name", eth_dev->data->name);
6274 rte_tel_data_add_dict_int(d, "state", eth_dev->state);
6275 rte_tel_data_add_dict_int(d, "nb_rx_queues",
6276 eth_dev->data->nb_rx_queues);
6277 rte_tel_data_add_dict_int(d, "nb_tx_queues",
6278 eth_dev->data->nb_tx_queues);
6279 rte_tel_data_add_dict_int(d, "port_id", eth_dev->data->port_id);
6280 rte_tel_data_add_dict_int(d, "mtu", eth_dev->data->mtu);
6281 rte_tel_data_add_dict_int(d, "rx_mbuf_size_min",
6282 eth_dev->data->min_rx_buf_size);
6283 rte_tel_data_add_dict_int(d, "rx_mbuf_alloc_fail",
6284 eth_dev->data->rx_mbuf_alloc_failed);
6285 snprintf(mac_addr, RTE_ETHER_ADDR_LEN, "%02x:%02x:%02x:%02x:%02x:%02x",
6286 eth_dev->data->mac_addrs->addr_bytes[0],
6287 eth_dev->data->mac_addrs->addr_bytes[1],
6288 eth_dev->data->mac_addrs->addr_bytes[2],
6289 eth_dev->data->mac_addrs->addr_bytes[3],
6290 eth_dev->data->mac_addrs->addr_bytes[4],
6291 eth_dev->data->mac_addrs->addr_bytes[5]);
6292 rte_tel_data_add_dict_string(d, "mac_addr", mac_addr);
6293 rte_tel_data_add_dict_int(d, "promiscuous",
6294 eth_dev->data->promiscuous);
6295 rte_tel_data_add_dict_int(d, "scattered_rx",
6296 eth_dev->data->scattered_rx);
6297 rte_tel_data_add_dict_int(d, "all_multicast",
6298 eth_dev->data->all_multicast);
6299 rte_tel_data_add_dict_int(d, "dev_started", eth_dev->data->dev_started);
6300 rte_tel_data_add_dict_int(d, "lro", eth_dev->data->lro);
6301 rte_tel_data_add_dict_int(d, "dev_configured",
6302 eth_dev->data->dev_configured);
6304 rte_tel_data_start_array(rxq_state, RTE_TEL_INT_VAL);
6305 for (i = 0; i < eth_dev->data->nb_rx_queues; i++)
6306 rte_tel_data_add_array_int(rxq_state,
6307 eth_dev->data->rx_queue_state[i]);
6309 rte_tel_data_start_array(txq_state, RTE_TEL_INT_VAL);
6310 for (i = 0; i < eth_dev->data->nb_tx_queues; i++)
6311 rte_tel_data_add_array_int(txq_state,
6312 eth_dev->data->tx_queue_state[i]);
6314 rte_tel_data_add_dict_container(d, "rxq_state", rxq_state, 0);
6315 rte_tel_data_add_dict_container(d, "txq_state", txq_state, 0);
6316 rte_tel_data_add_dict_int(d, "numa_node", eth_dev->data->numa_node);
6317 rte_tel_data_add_dict_int(d, "dev_flags", eth_dev->data->dev_flags);
6318 rte_tel_data_add_dict_int(d, "rx_offloads",
6319 eth_dev->data->dev_conf.rxmode.offloads);
6320 rte_tel_data_add_dict_int(d, "tx_offloads",
6321 eth_dev->data->dev_conf.txmode.offloads);
6322 rte_tel_data_add_dict_int(d, "ethdev_rss_hf",
6323 eth_dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf);
6329 rte_eth_hairpin_queue_peer_update(uint16_t peer_port, uint16_t peer_queue,
6330 struct rte_hairpin_peer_info *cur_info,
6331 struct rte_hairpin_peer_info *peer_info,
6334 struct rte_eth_dev *dev;
6336 /* Current queue information is not mandatory. */
6337 if (peer_info == NULL)
6340 /* No need to check the validity again. */
6341 dev = &rte_eth_devices[peer_port];
6342 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_queue_peer_update,
6345 return (*dev->dev_ops->hairpin_queue_peer_update)(dev, peer_queue,
6346 cur_info, peer_info, direction);
6350 rte_eth_hairpin_queue_peer_bind(uint16_t cur_port, uint16_t cur_queue,
6351 struct rte_hairpin_peer_info *peer_info,
6354 struct rte_eth_dev *dev;
6356 if (peer_info == NULL)
6359 /* No need to check the validity again. */
6360 dev = &rte_eth_devices[cur_port];
6361 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_queue_peer_bind,
6364 return (*dev->dev_ops->hairpin_queue_peer_bind)(dev, cur_queue,
6365 peer_info, direction);
6369 rte_eth_hairpin_queue_peer_unbind(uint16_t cur_port, uint16_t cur_queue,
6372 struct rte_eth_dev *dev;
6374 /* No need to check the validity again. */
6375 dev = &rte_eth_devices[cur_port];
6376 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_queue_peer_unbind,
6379 return (*dev->dev_ops->hairpin_queue_peer_unbind)(dev, cur_queue,
6384 rte_eth_representor_info_get(uint16_t port_id,
6385 struct rte_eth_representor_info *info)
6387 struct rte_eth_dev *dev;
6389 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
6390 dev = &rte_eth_devices[port_id];
6392 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->representor_info_get, -ENOTSUP);
6393 return eth_err(port_id, (*dev->dev_ops->representor_info_get)(dev, info));
6397 rte_eth_rx_metadata_negotiate(uint16_t port_id, uint64_t *features)
6399 struct rte_eth_dev *dev;
6401 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
6402 dev = &rte_eth_devices[port_id];
6404 if (dev->data->dev_configured != 0) {
6406 "The port (id=%"PRIu16") is already configured\n",
6411 if (features == NULL) {
6412 RTE_ETHDEV_LOG(ERR, "Invalid features (NULL)\n");
6416 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_metadata_negotiate, -ENOTSUP);
6417 return eth_err(port_id,
6418 (*dev->dev_ops->rx_metadata_negotiate)(dev, features));
6421 RTE_LOG_REGISTER_DEFAULT(rte_eth_dev_logtype, INFO);
6423 RTE_INIT(ethdev_init_telemetry)
6425 rte_telemetry_register_cmd("/ethdev/list", eth_dev_handle_port_list,
6426 "Returns list of available ethdev ports. Takes no parameters");
6427 rte_telemetry_register_cmd("/ethdev/stats", eth_dev_handle_port_stats,
6428 "Returns the common stats for a port. Parameters: int port_id");
6429 rte_telemetry_register_cmd("/ethdev/xstats", eth_dev_handle_port_xstats,
6430 "Returns the extended stats for a port. Parameters: int port_id");
6431 rte_telemetry_register_cmd("/ethdev/link_status",
6432 eth_dev_handle_port_link_status,
6433 "Returns the link status for a port. Parameters: int port_id");
6434 rte_telemetry_register_cmd("/ethdev/info", eth_dev_handle_port_info,
6435 "Returns the device info for a port. Parameters: int port_id");