1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2014 Intel Corporation
8 TAILQ_HEAD(rte_acl_list, rte_tailq_entry);
10 static struct rte_tailq_elem rte_acl_tailq = {
13 EAL_REGISTER_TAILQ(rte_acl_tailq)
16 * If the compiler doesn't support AVX2 instructions,
17 * then the dummy one would be used instead for AVX2 classify method.
19 int __attribute__ ((weak))
20 rte_acl_classify_avx2(__rte_unused const struct rte_acl_ctx *ctx,
21 __rte_unused const uint8_t **data,
22 __rte_unused uint32_t *results,
23 __rte_unused uint32_t num,
24 __rte_unused uint32_t categories)
29 int __attribute__ ((weak))
30 rte_acl_classify_sse(__rte_unused const struct rte_acl_ctx *ctx,
31 __rte_unused const uint8_t **data,
32 __rte_unused uint32_t *results,
33 __rte_unused uint32_t num,
34 __rte_unused uint32_t categories)
39 int __attribute__ ((weak))
40 rte_acl_classify_neon(__rte_unused const struct rte_acl_ctx *ctx,
41 __rte_unused const uint8_t **data,
42 __rte_unused uint32_t *results,
43 __rte_unused uint32_t num,
44 __rte_unused uint32_t categories)
49 int __attribute__ ((weak))
50 rte_acl_classify_altivec(__rte_unused const struct rte_acl_ctx *ctx,
51 __rte_unused const uint8_t **data,
52 __rte_unused uint32_t *results,
53 __rte_unused uint32_t num,
54 __rte_unused uint32_t categories)
59 static const rte_acl_classify_t classify_fns[] = {
60 [RTE_ACL_CLASSIFY_DEFAULT] = rte_acl_classify_scalar,
61 [RTE_ACL_CLASSIFY_SCALAR] = rte_acl_classify_scalar,
62 [RTE_ACL_CLASSIFY_SSE] = rte_acl_classify_sse,
63 [RTE_ACL_CLASSIFY_AVX2] = rte_acl_classify_avx2,
64 [RTE_ACL_CLASSIFY_NEON] = rte_acl_classify_neon,
65 [RTE_ACL_CLASSIFY_ALTIVEC] = rte_acl_classify_altivec,
68 /* by default, use always available scalar code path. */
69 static enum rte_acl_classify_alg rte_acl_default_classify =
70 RTE_ACL_CLASSIFY_SCALAR;
73 rte_acl_set_default_classify(enum rte_acl_classify_alg alg)
75 rte_acl_default_classify = alg;
79 rte_acl_set_ctx_classify(struct rte_acl_ctx *ctx, enum rte_acl_classify_alg alg)
81 if (ctx == NULL || (uint32_t)alg >= RTE_DIM(classify_fns))
89 * Select highest available classify method as default one.
90 * Note that CLASSIFY_AVX2 should be set as a default only
91 * if both conditions are met:
92 * at build time compiler supports AVX2 and target cpu supports AVX2.
94 RTE_INIT(rte_acl_init)
96 enum rte_acl_classify_alg alg = RTE_ACL_CLASSIFY_DEFAULT;
98 #if defined(RTE_ARCH_ARM64)
99 alg = RTE_ACL_CLASSIFY_NEON;
100 #elif defined(RTE_ARCH_ARM)
101 if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_NEON))
102 alg = RTE_ACL_CLASSIFY_NEON;
103 #elif defined(RTE_ARCH_PPC_64)
104 alg = RTE_ACL_CLASSIFY_ALTIVEC;
106 #ifdef CC_AVX2_SUPPORT
107 if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2))
108 alg = RTE_ACL_CLASSIFY_AVX2;
109 else if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_SSE4_1))
111 if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_SSE4_1))
113 alg = RTE_ACL_CLASSIFY_SSE;
116 rte_acl_set_default_classify(alg);
120 rte_acl_classify_alg(const struct rte_acl_ctx *ctx, const uint8_t **data,
121 uint32_t *results, uint32_t num, uint32_t categories,
122 enum rte_acl_classify_alg alg)
124 if (categories != 1 &&
125 ((RTE_ACL_RESULTS_MULTIPLIER - 1) & categories) != 0)
128 return classify_fns[alg](ctx, data, results, num, categories);
132 rte_acl_classify(const struct rte_acl_ctx *ctx, const uint8_t **data,
133 uint32_t *results, uint32_t num, uint32_t categories)
135 return rte_acl_classify_alg(ctx, data, results, num, categories,
140 rte_acl_find_existing(const char *name)
142 struct rte_acl_ctx *ctx = NULL;
143 struct rte_acl_list *acl_list;
144 struct rte_tailq_entry *te;
146 acl_list = RTE_TAILQ_CAST(rte_acl_tailq.head, rte_acl_list);
148 rte_rwlock_read_lock(RTE_EAL_TAILQ_RWLOCK);
149 TAILQ_FOREACH(te, acl_list, next) {
150 ctx = (struct rte_acl_ctx *) te->data;
151 if (strncmp(name, ctx->name, sizeof(ctx->name)) == 0)
154 rte_rwlock_read_unlock(RTE_EAL_TAILQ_RWLOCK);
164 rte_acl_free(struct rte_acl_ctx *ctx)
166 struct rte_acl_list *acl_list;
167 struct rte_tailq_entry *te;
172 acl_list = RTE_TAILQ_CAST(rte_acl_tailq.head, rte_acl_list);
174 rte_rwlock_write_lock(RTE_EAL_TAILQ_RWLOCK);
176 /* find our tailq entry */
177 TAILQ_FOREACH(te, acl_list, next) {
178 if (te->data == (void *) ctx)
182 rte_rwlock_write_unlock(RTE_EAL_TAILQ_RWLOCK);
186 TAILQ_REMOVE(acl_list, te, next);
188 rte_rwlock_write_unlock(RTE_EAL_TAILQ_RWLOCK);
196 rte_acl_create(const struct rte_acl_param *param)
199 struct rte_acl_ctx *ctx;
200 struct rte_acl_list *acl_list;
201 struct rte_tailq_entry *te;
202 char name[sizeof(ctx->name)];
204 acl_list = RTE_TAILQ_CAST(rte_acl_tailq.head, rte_acl_list);
206 /* check that input parameters are valid. */
207 if (param == NULL || param->name == NULL) {
212 snprintf(name, sizeof(name), "ACL_%s", param->name);
214 /* calculate amount of memory required for pattern set. */
215 sz = sizeof(*ctx) + param->max_rule_num * param->rule_size;
217 /* get EAL TAILQ lock. */
218 rte_rwlock_write_lock(RTE_EAL_TAILQ_RWLOCK);
220 /* if we already have one with that name */
221 TAILQ_FOREACH(te, acl_list, next) {
222 ctx = (struct rte_acl_ctx *) te->data;
223 if (strncmp(param->name, ctx->name, sizeof(ctx->name)) == 0)
227 /* if ACL with such name doesn't exist, then create a new one. */
230 te = rte_zmalloc("ACL_TAILQ_ENTRY", sizeof(*te), 0);
233 RTE_LOG(ERR, ACL, "Cannot allocate tailq entry!\n");
237 ctx = rte_zmalloc_socket(name, sz, RTE_CACHE_LINE_SIZE, param->socket_id);
241 "allocation of %zu bytes on socket %d for %s failed\n",
242 sz, param->socket_id, name);
246 /* init new allocated context. */
247 ctx->rules = ctx + 1;
248 ctx->max_rules = param->max_rule_num;
249 ctx->rule_sz = param->rule_size;
250 ctx->socket_id = param->socket_id;
251 ctx->alg = rte_acl_default_classify;
252 snprintf(ctx->name, sizeof(ctx->name), "%s", param->name);
254 te->data = (void *) ctx;
256 TAILQ_INSERT_TAIL(acl_list, te, next);
260 rte_rwlock_write_unlock(RTE_EAL_TAILQ_RWLOCK);
265 acl_add_rules(struct rte_acl_ctx *ctx, const void *rules, uint32_t num)
269 if (num + ctx->num_rules > ctx->max_rules)
273 pos += ctx->rule_sz * ctx->num_rules;
274 memcpy(pos, rules, num * ctx->rule_sz);
275 ctx->num_rules += num;
281 acl_check_rule(const struct rte_acl_rule_data *rd)
283 if ((RTE_LEN2MASK(RTE_ACL_MAX_CATEGORIES, typeof(rd->category_mask)) &
284 rd->category_mask) == 0 ||
285 rd->priority > RTE_ACL_MAX_PRIORITY ||
286 rd->priority < RTE_ACL_MIN_PRIORITY)
292 rte_acl_add_rules(struct rte_acl_ctx *ctx, const struct rte_acl_rule *rules,
295 const struct rte_acl_rule *rv;
299 if (ctx == NULL || rules == NULL || 0 == ctx->rule_sz)
302 for (i = 0; i != num; i++) {
303 rv = (const struct rte_acl_rule *)
304 ((uintptr_t)rules + i * ctx->rule_sz);
305 rc = acl_check_rule(&rv->data);
307 RTE_LOG(ERR, ACL, "%s(%s): rule #%u is invalid\n",
308 __func__, ctx->name, i + 1);
313 return acl_add_rules(ctx, rules, num);
318 * Note that RT structures are not affected.
321 rte_acl_reset_rules(struct rte_acl_ctx *ctx)
328 * Reset all rules and destroys RT structures.
331 rte_acl_reset(struct rte_acl_ctx *ctx)
334 rte_acl_reset_rules(ctx);
335 rte_acl_build(ctx, &ctx->config);
340 * Dump ACL context to the stdout.
343 rte_acl_dump(const struct rte_acl_ctx *ctx)
347 printf("acl context <%s>@%p\n", ctx->name, ctx);
348 printf(" socket_id=%"PRId32"\n", ctx->socket_id);
349 printf(" alg=%"PRId32"\n", ctx->alg);
350 printf(" max_rules=%"PRIu32"\n", ctx->max_rules);
351 printf(" rule_size=%"PRIu32"\n", ctx->rule_sz);
352 printf(" num_rules=%"PRIu32"\n", ctx->num_rules);
353 printf(" num_categories=%"PRIu32"\n", ctx->num_categories);
354 printf(" num_tries=%"PRIu32"\n", ctx->num_tries);
358 * Dump all ACL contexts to the stdout.
361 rte_acl_list_dump(void)
363 struct rte_acl_ctx *ctx;
364 struct rte_acl_list *acl_list;
365 struct rte_tailq_entry *te;
367 acl_list = RTE_TAILQ_CAST(rte_acl_tailq.head, rte_acl_list);
369 rte_rwlock_read_lock(RTE_EAL_TAILQ_RWLOCK);
370 TAILQ_FOREACH(te, acl_list, next) {
371 ctx = (struct rte_acl_ctx *) te->data;
374 rte_rwlock_read_unlock(RTE_EAL_TAILQ_RWLOCK);