1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2014 Intel Corporation
5 #include <rte_eal_memconfig.h>
6 #include <rte_string_fns.h>
12 TAILQ_HEAD(rte_acl_list, rte_tailq_entry);
14 static struct rte_tailq_elem rte_acl_tailq = {
17 EAL_REGISTER_TAILQ(rte_acl_tailq)
20 #ifndef CC_AVX2_SUPPORT
22 * If the compiler doesn't support AVX2 instructions,
23 * then the dummy one would be used instead for AVX2 classify method.
26 rte_acl_classify_avx2(__rte_unused const struct rte_acl_ctx *ctx,
27 __rte_unused const uint8_t **data,
28 __rte_unused uint32_t *results,
29 __rte_unused uint32_t num,
30 __rte_unused uint32_t categories)
37 rte_acl_classify_sse(__rte_unused const struct rte_acl_ctx *ctx,
38 __rte_unused const uint8_t **data,
39 __rte_unused uint32_t *results,
40 __rte_unused uint32_t num,
41 __rte_unused uint32_t categories)
48 #ifndef RTE_ARCH_ARM64
50 rte_acl_classify_neon(__rte_unused const struct rte_acl_ctx *ctx,
51 __rte_unused const uint8_t **data,
52 __rte_unused uint32_t *results,
53 __rte_unused uint32_t num,
54 __rte_unused uint32_t categories)
61 #ifndef RTE_ARCH_PPC_64
63 rte_acl_classify_altivec(__rte_unused const struct rte_acl_ctx *ctx,
64 __rte_unused const uint8_t **data,
65 __rte_unused uint32_t *results,
66 __rte_unused uint32_t num,
67 __rte_unused uint32_t categories)
73 static const rte_acl_classify_t classify_fns[] = {
74 [RTE_ACL_CLASSIFY_DEFAULT] = rte_acl_classify_scalar,
75 [RTE_ACL_CLASSIFY_SCALAR] = rte_acl_classify_scalar,
76 [RTE_ACL_CLASSIFY_SSE] = rte_acl_classify_sse,
77 [RTE_ACL_CLASSIFY_AVX2] = rte_acl_classify_avx2,
78 [RTE_ACL_CLASSIFY_NEON] = rte_acl_classify_neon,
79 [RTE_ACL_CLASSIFY_ALTIVEC] = rte_acl_classify_altivec,
82 /* by default, use always available scalar code path. */
83 static enum rte_acl_classify_alg rte_acl_default_classify =
84 RTE_ACL_CLASSIFY_SCALAR;
87 rte_acl_set_default_classify(enum rte_acl_classify_alg alg)
89 rte_acl_default_classify = alg;
93 rte_acl_set_ctx_classify(struct rte_acl_ctx *ctx, enum rte_acl_classify_alg alg)
95 if (ctx == NULL || (uint32_t)alg >= RTE_DIM(classify_fns))
103 * Select highest available classify method as default one.
104 * Note that CLASSIFY_AVX2 should be set as a default only
105 * if both conditions are met:
106 * at build time compiler supports AVX2 and target cpu supports AVX2.
108 RTE_INIT(rte_acl_init)
110 enum rte_acl_classify_alg alg = RTE_ACL_CLASSIFY_DEFAULT;
112 #if defined(RTE_ARCH_ARM64)
113 alg = RTE_ACL_CLASSIFY_NEON;
114 #elif defined(RTE_ARCH_ARM)
115 if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_NEON))
116 alg = RTE_ACL_CLASSIFY_NEON;
117 #elif defined(RTE_ARCH_PPC_64)
118 alg = RTE_ACL_CLASSIFY_ALTIVEC;
120 #ifdef CC_AVX2_SUPPORT
121 if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2))
122 alg = RTE_ACL_CLASSIFY_AVX2;
123 else if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_SSE4_1))
125 if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_SSE4_1))
127 alg = RTE_ACL_CLASSIFY_SSE;
130 rte_acl_set_default_classify(alg);
134 rte_acl_classify_alg(const struct rte_acl_ctx *ctx, const uint8_t **data,
135 uint32_t *results, uint32_t num, uint32_t categories,
136 enum rte_acl_classify_alg alg)
138 if (categories != 1 &&
139 ((RTE_ACL_RESULTS_MULTIPLIER - 1) & categories) != 0)
142 return classify_fns[alg](ctx, data, results, num, categories);
146 rte_acl_classify(const struct rte_acl_ctx *ctx, const uint8_t **data,
147 uint32_t *results, uint32_t num, uint32_t categories)
149 return rte_acl_classify_alg(ctx, data, results, num, categories,
154 rte_acl_find_existing(const char *name)
156 struct rte_acl_ctx *ctx = NULL;
157 struct rte_acl_list *acl_list;
158 struct rte_tailq_entry *te;
160 acl_list = RTE_TAILQ_CAST(rte_acl_tailq.head, rte_acl_list);
162 rte_mcfg_tailq_read_lock();
163 TAILQ_FOREACH(te, acl_list, next) {
164 ctx = (struct rte_acl_ctx *) te->data;
165 if (strncmp(name, ctx->name, sizeof(ctx->name)) == 0)
168 rte_mcfg_tailq_read_unlock();
178 rte_acl_free(struct rte_acl_ctx *ctx)
180 struct rte_acl_list *acl_list;
181 struct rte_tailq_entry *te;
186 acl_list = RTE_TAILQ_CAST(rte_acl_tailq.head, rte_acl_list);
188 rte_mcfg_tailq_write_lock();
190 /* find our tailq entry */
191 TAILQ_FOREACH(te, acl_list, next) {
192 if (te->data == (void *) ctx)
196 rte_mcfg_tailq_write_unlock();
200 TAILQ_REMOVE(acl_list, te, next);
202 rte_mcfg_tailq_write_unlock();
210 rte_acl_create(const struct rte_acl_param *param)
213 struct rte_acl_ctx *ctx;
214 struct rte_acl_list *acl_list;
215 struct rte_tailq_entry *te;
216 char name[sizeof(ctx->name)];
218 acl_list = RTE_TAILQ_CAST(rte_acl_tailq.head, rte_acl_list);
220 /* check that input parameters are valid. */
221 if (param == NULL || param->name == NULL) {
226 snprintf(name, sizeof(name), "ACL_%s", param->name);
228 /* calculate amount of memory required for pattern set. */
229 sz = sizeof(*ctx) + param->max_rule_num * param->rule_size;
231 /* get EAL TAILQ lock. */
232 rte_mcfg_tailq_write_lock();
234 /* if we already have one with that name */
235 TAILQ_FOREACH(te, acl_list, next) {
236 ctx = (struct rte_acl_ctx *) te->data;
237 if (strncmp(param->name, ctx->name, sizeof(ctx->name)) == 0)
241 /* if ACL with such name doesn't exist, then create a new one. */
244 te = rte_zmalloc("ACL_TAILQ_ENTRY", sizeof(*te), 0);
247 RTE_LOG(ERR, ACL, "Cannot allocate tailq entry!\n");
251 ctx = rte_zmalloc_socket(name, sz, RTE_CACHE_LINE_SIZE, param->socket_id);
255 "allocation of %zu bytes on socket %d for %s failed\n",
256 sz, param->socket_id, name);
260 /* init new allocated context. */
261 ctx->rules = ctx + 1;
262 ctx->max_rules = param->max_rule_num;
263 ctx->rule_sz = param->rule_size;
264 ctx->socket_id = param->socket_id;
265 ctx->alg = rte_acl_default_classify;
266 strlcpy(ctx->name, param->name, sizeof(ctx->name));
268 te->data = (void *) ctx;
270 TAILQ_INSERT_TAIL(acl_list, te, next);
274 rte_mcfg_tailq_write_unlock();
279 acl_add_rules(struct rte_acl_ctx *ctx, const void *rules, uint32_t num)
283 if (num + ctx->num_rules > ctx->max_rules)
287 pos += ctx->rule_sz * ctx->num_rules;
288 memcpy(pos, rules, num * ctx->rule_sz);
289 ctx->num_rules += num;
295 acl_check_rule(const struct rte_acl_rule_data *rd)
297 if ((RTE_LEN2MASK(RTE_ACL_MAX_CATEGORIES, typeof(rd->category_mask)) &
298 rd->category_mask) == 0 ||
299 rd->priority > RTE_ACL_MAX_PRIORITY ||
300 rd->priority < RTE_ACL_MIN_PRIORITY)
306 rte_acl_add_rules(struct rte_acl_ctx *ctx, const struct rte_acl_rule *rules,
309 const struct rte_acl_rule *rv;
313 if (ctx == NULL || rules == NULL || 0 == ctx->rule_sz)
316 for (i = 0; i != num; i++) {
317 rv = (const struct rte_acl_rule *)
318 ((uintptr_t)rules + i * ctx->rule_sz);
319 rc = acl_check_rule(&rv->data);
321 RTE_LOG(ERR, ACL, "%s(%s): rule #%u is invalid\n",
322 __func__, ctx->name, i + 1);
327 return acl_add_rules(ctx, rules, num);
332 * Note that RT structures are not affected.
335 rte_acl_reset_rules(struct rte_acl_ctx *ctx)
342 * Reset all rules and destroys RT structures.
345 rte_acl_reset(struct rte_acl_ctx *ctx)
348 rte_acl_reset_rules(ctx);
349 rte_acl_build(ctx, &ctx->config);
354 * Dump ACL context to the stdout.
357 rte_acl_dump(const struct rte_acl_ctx *ctx)
361 printf("acl context <%s>@%p\n", ctx->name, ctx);
362 printf(" socket_id=%"PRId32"\n", ctx->socket_id);
363 printf(" alg=%"PRId32"\n", ctx->alg);
364 printf(" max_rules=%"PRIu32"\n", ctx->max_rules);
365 printf(" rule_size=%"PRIu32"\n", ctx->rule_sz);
366 printf(" num_rules=%"PRIu32"\n", ctx->num_rules);
367 printf(" num_categories=%"PRIu32"\n", ctx->num_categories);
368 printf(" num_tries=%"PRIu32"\n", ctx->num_tries);
372 * Dump all ACL contexts to the stdout.
375 rte_acl_list_dump(void)
377 struct rte_acl_ctx *ctx;
378 struct rte_acl_list *acl_list;
379 struct rte_tailq_entry *te;
381 acl_list = RTE_TAILQ_CAST(rte_acl_tailq.head, rte_acl_list);
383 rte_mcfg_tailq_read_lock();
384 TAILQ_FOREACH(te, acl_list, next) {
385 ctx = (struct rte_acl_ctx *) te->data;
388 rte_mcfg_tailq_read_unlock();