1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2014 Intel Corporation
5 #include <rte_eal_memconfig.h>
6 #include <rte_string_fns.h>
12 TAILQ_HEAD(rte_acl_list, rte_tailq_entry);
14 static struct rte_tailq_elem rte_acl_tailq = {
17 EAL_REGISTER_TAILQ(rte_acl_tailq)
19 #ifndef CC_AVX512_SUPPORT
21 * If the compiler doesn't support AVX512 instructions,
22 * then the dummy one would be used instead for AVX512 classify method.
25 rte_acl_classify_avx512x16(__rte_unused const struct rte_acl_ctx *ctx,
26 __rte_unused const uint8_t **data,
27 __rte_unused uint32_t *results,
28 __rte_unused uint32_t num,
29 __rte_unused uint32_t categories)
35 rte_acl_classify_avx512x32(__rte_unused const struct rte_acl_ctx *ctx,
36 __rte_unused const uint8_t **data,
37 __rte_unused uint32_t *results,
38 __rte_unused uint32_t num,
39 __rte_unused uint32_t categories)
45 #ifndef CC_AVX2_SUPPORT
47 * If the compiler doesn't support AVX2 instructions,
48 * then the dummy one would be used instead for AVX2 classify method.
51 rte_acl_classify_avx2(__rte_unused const struct rte_acl_ctx *ctx,
52 __rte_unused const uint8_t **data,
53 __rte_unused uint32_t *results,
54 __rte_unused uint32_t num,
55 __rte_unused uint32_t categories)
63 rte_acl_classify_sse(__rte_unused const struct rte_acl_ctx *ctx,
64 __rte_unused const uint8_t **data,
65 __rte_unused uint32_t *results,
66 __rte_unused uint32_t num,
67 __rte_unused uint32_t categories)
75 rte_acl_classify_neon(__rte_unused const struct rte_acl_ctx *ctx,
76 __rte_unused const uint8_t **data,
77 __rte_unused uint32_t *results,
78 __rte_unused uint32_t num,
79 __rte_unused uint32_t categories)
85 #ifndef RTE_ARCH_PPC_64
87 rte_acl_classify_altivec(__rte_unused const struct rte_acl_ctx *ctx,
88 __rte_unused const uint8_t **data,
89 __rte_unused uint32_t *results,
90 __rte_unused uint32_t num,
91 __rte_unused uint32_t categories)
97 static const rte_acl_classify_t classify_fns[] = {
98 [RTE_ACL_CLASSIFY_DEFAULT] = rte_acl_classify_scalar,
99 [RTE_ACL_CLASSIFY_SCALAR] = rte_acl_classify_scalar,
100 [RTE_ACL_CLASSIFY_SSE] = rte_acl_classify_sse,
101 [RTE_ACL_CLASSIFY_AVX2] = rte_acl_classify_avx2,
102 [RTE_ACL_CLASSIFY_NEON] = rte_acl_classify_neon,
103 [RTE_ACL_CLASSIFY_ALTIVEC] = rte_acl_classify_altivec,
104 [RTE_ACL_CLASSIFY_AVX512X16] = rte_acl_classify_avx512x16,
105 [RTE_ACL_CLASSIFY_AVX512X32] = rte_acl_classify_avx512x32,
109 * Helper function for acl_check_alg.
110 * Check support for ARM specific classify methods.
113 acl_check_alg_arm(enum rte_acl_classify_alg alg)
115 if (alg == RTE_ACL_CLASSIFY_NEON) {
116 #if defined(RTE_ARCH_ARM64)
118 #elif defined(RTE_ARCH_ARM)
119 if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_NEON))
131 * Helper function for acl_check_alg.
132 * Check support for PPC specific classify methods.
135 acl_check_alg_ppc(enum rte_acl_classify_alg alg)
137 if (alg == RTE_ACL_CLASSIFY_ALTIVEC) {
138 #if defined(RTE_ARCH_PPC_64)
149 * Helper function for acl_check_alg.
150 * Check support for x86 specific classify methods.
153 acl_check_alg_x86(enum rte_acl_classify_alg alg)
155 if (alg == RTE_ACL_CLASSIFY_AVX512X16 ||
156 alg == RTE_ACL_CLASSIFY_AVX512X32) {
157 #ifdef CC_AVX512_SUPPORT
158 if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) &&
159 rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512VL) &&
160 rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512CD) &&
161 rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512BW))
167 if (alg == RTE_ACL_CLASSIFY_AVX2) {
168 #ifdef CC_AVX2_SUPPORT
169 if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2))
175 if (alg == RTE_ACL_CLASSIFY_SSE) {
177 if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_SSE4_1))
187 * Check if input alg is supported by given platform/binary.
188 * Note that both conditions should be met:
189 * - at build time compiler supports ISA used by given methods
190 * - at run time target cpu supports necessary ISA.
193 acl_check_alg(enum rte_acl_classify_alg alg)
196 case RTE_ACL_CLASSIFY_NEON:
197 return acl_check_alg_arm(alg);
198 case RTE_ACL_CLASSIFY_ALTIVEC:
199 return acl_check_alg_ppc(alg);
200 case RTE_ACL_CLASSIFY_AVX512X32:
201 case RTE_ACL_CLASSIFY_AVX512X16:
202 case RTE_ACL_CLASSIFY_AVX2:
203 case RTE_ACL_CLASSIFY_SSE:
204 return acl_check_alg_x86(alg);
205 /* scalar method is supported on all platforms */
206 case RTE_ACL_CLASSIFY_SCALAR:
214 * Get preferred alg for given platform.
216 static enum rte_acl_classify_alg
217 acl_get_best_alg(void)
220 * array of supported methods for each platform.
221 * Note that order is important - from most to less preferable.
223 static const enum rte_acl_classify_alg alg[] = {
224 #if defined(RTE_ARCH_ARM)
225 RTE_ACL_CLASSIFY_NEON,
226 #elif defined(RTE_ARCH_PPC_64)
227 RTE_ACL_CLASSIFY_ALTIVEC,
228 #elif defined(RTE_ARCH_X86)
229 RTE_ACL_CLASSIFY_AVX512X16,
230 RTE_ACL_CLASSIFY_AVX2,
231 RTE_ACL_CLASSIFY_SSE,
233 RTE_ACL_CLASSIFY_SCALAR,
238 /* find best possible alg */
239 for (i = 0; i != RTE_DIM(alg) && acl_check_alg(alg[i]) != 0; i++)
242 /* we always have to find something suitable */
243 RTE_VERIFY(i != RTE_DIM(alg));
248 rte_acl_set_ctx_classify(struct rte_acl_ctx *ctx, enum rte_acl_classify_alg alg)
252 /* formal parameters check */
253 if (ctx == NULL || (uint32_t)alg >= RTE_DIM(classify_fns))
256 /* user asked us to select the *best* one */
257 if (alg == RTE_ACL_CLASSIFY_DEFAULT)
258 alg = acl_get_best_alg();
260 /* check that given alg is supported */
261 rc = acl_check_alg(alg);
270 rte_acl_classify_alg(const struct rte_acl_ctx *ctx, const uint8_t **data,
271 uint32_t *results, uint32_t num, uint32_t categories,
272 enum rte_acl_classify_alg alg)
274 if (categories != 1 &&
275 ((RTE_ACL_RESULTS_MULTIPLIER - 1) & categories) != 0)
278 return classify_fns[alg](ctx, data, results, num, categories);
282 rte_acl_classify(const struct rte_acl_ctx *ctx, const uint8_t **data,
283 uint32_t *results, uint32_t num, uint32_t categories)
285 return rte_acl_classify_alg(ctx, data, results, num, categories,
290 rte_acl_find_existing(const char *name)
292 struct rte_acl_ctx *ctx = NULL;
293 struct rte_acl_list *acl_list;
294 struct rte_tailq_entry *te;
296 acl_list = RTE_TAILQ_CAST(rte_acl_tailq.head, rte_acl_list);
298 rte_mcfg_tailq_read_lock();
299 TAILQ_FOREACH(te, acl_list, next) {
300 ctx = (struct rte_acl_ctx *) te->data;
301 if (strncmp(name, ctx->name, sizeof(ctx->name)) == 0)
304 rte_mcfg_tailq_read_unlock();
314 rte_acl_free(struct rte_acl_ctx *ctx)
316 struct rte_acl_list *acl_list;
317 struct rte_tailq_entry *te;
322 acl_list = RTE_TAILQ_CAST(rte_acl_tailq.head, rte_acl_list);
324 rte_mcfg_tailq_write_lock();
326 /* find our tailq entry */
327 TAILQ_FOREACH(te, acl_list, next) {
328 if (te->data == (void *) ctx)
332 rte_mcfg_tailq_write_unlock();
336 TAILQ_REMOVE(acl_list, te, next);
338 rte_mcfg_tailq_write_unlock();
346 rte_acl_create(const struct rte_acl_param *param)
349 struct rte_acl_ctx *ctx;
350 struct rte_acl_list *acl_list;
351 struct rte_tailq_entry *te;
352 char name[sizeof(ctx->name)];
354 acl_list = RTE_TAILQ_CAST(rte_acl_tailq.head, rte_acl_list);
356 /* check that input parameters are valid. */
357 if (param == NULL || param->name == NULL) {
362 snprintf(name, sizeof(name), "ACL_%s", param->name);
364 /* calculate amount of memory required for pattern set. */
365 sz = sizeof(*ctx) + param->max_rule_num * param->rule_size;
367 /* get EAL TAILQ lock. */
368 rte_mcfg_tailq_write_lock();
370 /* if we already have one with that name */
371 TAILQ_FOREACH(te, acl_list, next) {
372 ctx = (struct rte_acl_ctx *) te->data;
373 if (strncmp(param->name, ctx->name, sizeof(ctx->name)) == 0)
377 /* if ACL with such name doesn't exist, then create a new one. */
380 te = rte_zmalloc("ACL_TAILQ_ENTRY", sizeof(*te), 0);
383 RTE_LOG(ERR, ACL, "Cannot allocate tailq entry!\n");
387 ctx = rte_zmalloc_socket(name, sz, RTE_CACHE_LINE_SIZE, param->socket_id);
391 "allocation of %zu bytes on socket %d for %s failed\n",
392 sz, param->socket_id, name);
396 /* init new allocated context. */
397 ctx->rules = ctx + 1;
398 ctx->max_rules = param->max_rule_num;
399 ctx->rule_sz = param->rule_size;
400 ctx->socket_id = param->socket_id;
401 ctx->alg = acl_get_best_alg();
402 strlcpy(ctx->name, param->name, sizeof(ctx->name));
404 te->data = (void *) ctx;
406 TAILQ_INSERT_TAIL(acl_list, te, next);
410 rte_mcfg_tailq_write_unlock();
415 acl_add_rules(struct rte_acl_ctx *ctx, const void *rules, uint32_t num)
419 if (num + ctx->num_rules > ctx->max_rules)
423 pos += ctx->rule_sz * ctx->num_rules;
424 memcpy(pos, rules, num * ctx->rule_sz);
425 ctx->num_rules += num;
431 acl_check_rule(const struct rte_acl_rule_data *rd)
433 if ((RTE_LEN2MASK(RTE_ACL_MAX_CATEGORIES, typeof(rd->category_mask)) &
434 rd->category_mask) == 0 ||
435 rd->priority > RTE_ACL_MAX_PRIORITY ||
436 rd->priority < RTE_ACL_MIN_PRIORITY)
442 rte_acl_add_rules(struct rte_acl_ctx *ctx, const struct rte_acl_rule *rules,
445 const struct rte_acl_rule *rv;
449 if (ctx == NULL || rules == NULL || 0 == ctx->rule_sz)
452 for (i = 0; i != num; i++) {
453 rv = (const struct rte_acl_rule *)
454 ((uintptr_t)rules + i * ctx->rule_sz);
455 rc = acl_check_rule(&rv->data);
457 RTE_LOG(ERR, ACL, "%s(%s): rule #%u is invalid\n",
458 __func__, ctx->name, i + 1);
463 return acl_add_rules(ctx, rules, num);
468 * Note that RT structures are not affected.
471 rte_acl_reset_rules(struct rte_acl_ctx *ctx)
478 * Reset all rules and destroys RT structures.
481 rte_acl_reset(struct rte_acl_ctx *ctx)
484 rte_acl_reset_rules(ctx);
485 rte_acl_build(ctx, &ctx->config);
490 * Dump ACL context to the stdout.
493 rte_acl_dump(const struct rte_acl_ctx *ctx)
497 printf("acl context <%s>@%p\n", ctx->name, ctx);
498 printf(" socket_id=%"PRId32"\n", ctx->socket_id);
499 printf(" alg=%"PRId32"\n", ctx->alg);
500 printf(" first_load_sz=%"PRIu32"\n", ctx->first_load_sz);
501 printf(" max_rules=%"PRIu32"\n", ctx->max_rules);
502 printf(" rule_size=%"PRIu32"\n", ctx->rule_sz);
503 printf(" num_rules=%"PRIu32"\n", ctx->num_rules);
504 printf(" num_categories=%"PRIu32"\n", ctx->num_categories);
505 printf(" num_tries=%"PRIu32"\n", ctx->num_tries);
509 * Dump all ACL contexts to the stdout.
512 rte_acl_list_dump(void)
514 struct rte_acl_ctx *ctx;
515 struct rte_acl_list *acl_list;
516 struct rte_tailq_entry *te;
518 acl_list = RTE_TAILQ_CAST(rte_acl_tailq.head, rte_acl_list);
520 rte_mcfg_tailq_read_lock();
521 TAILQ_FOREACH(te, acl_list, next) {
522 ctx = (struct rte_acl_ctx *) te->data;
525 rte_mcfg_tailq_read_unlock();