1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2014 Intel Corporation
5 #include <rte_eal_memconfig.h>
6 #include <rte_string_fns.h>
12 TAILQ_HEAD(rte_acl_list, rte_tailq_entry);
14 static struct rte_tailq_elem rte_acl_tailq = {
17 EAL_REGISTER_TAILQ(rte_acl_tailq)
19 #ifndef CC_AVX2_SUPPORT
21 * If the compiler doesn't support AVX2 instructions,
22 * then the dummy one would be used instead for AVX2 classify method.
25 rte_acl_classify_avx2(__rte_unused const struct rte_acl_ctx *ctx,
26 __rte_unused const uint8_t **data,
27 __rte_unused uint32_t *results,
28 __rte_unused uint32_t num,
29 __rte_unused uint32_t categories)
37 rte_acl_classify_sse(__rte_unused const struct rte_acl_ctx *ctx,
38 __rte_unused const uint8_t **data,
39 __rte_unused uint32_t *results,
40 __rte_unused uint32_t num,
41 __rte_unused uint32_t categories)
49 rte_acl_classify_neon(__rte_unused const struct rte_acl_ctx *ctx,
50 __rte_unused const uint8_t **data,
51 __rte_unused uint32_t *results,
52 __rte_unused uint32_t num,
53 __rte_unused uint32_t categories)
59 #ifndef RTE_ARCH_PPC_64
61 rte_acl_classify_altivec(__rte_unused const struct rte_acl_ctx *ctx,
62 __rte_unused const uint8_t **data,
63 __rte_unused uint32_t *results,
64 __rte_unused uint32_t num,
65 __rte_unused uint32_t categories)
71 static const rte_acl_classify_t classify_fns[] = {
72 [RTE_ACL_CLASSIFY_DEFAULT] = rte_acl_classify_scalar,
73 [RTE_ACL_CLASSIFY_SCALAR] = rte_acl_classify_scalar,
74 [RTE_ACL_CLASSIFY_SSE] = rte_acl_classify_sse,
75 [RTE_ACL_CLASSIFY_AVX2] = rte_acl_classify_avx2,
76 [RTE_ACL_CLASSIFY_NEON] = rte_acl_classify_neon,
77 [RTE_ACL_CLASSIFY_ALTIVEC] = rte_acl_classify_altivec,
80 /* by default, use always available scalar code path. */
81 static enum rte_acl_classify_alg rte_acl_default_classify =
82 RTE_ACL_CLASSIFY_SCALAR;
85 rte_acl_set_default_classify(enum rte_acl_classify_alg alg)
87 rte_acl_default_classify = alg;
91 rte_acl_set_ctx_classify(struct rte_acl_ctx *ctx, enum rte_acl_classify_alg alg)
93 if (ctx == NULL || (uint32_t)alg >= RTE_DIM(classify_fns))
101 * Select highest available classify method as default one.
102 * Note that CLASSIFY_AVX2 should be set as a default only
103 * if both conditions are met:
104 * at build time compiler supports AVX2 and target cpu supports AVX2.
106 RTE_INIT(rte_acl_init)
108 enum rte_acl_classify_alg alg = RTE_ACL_CLASSIFY_DEFAULT;
110 #if defined(RTE_ARCH_ARM64)
111 alg = RTE_ACL_CLASSIFY_NEON;
112 #elif defined(RTE_ARCH_ARM)
113 if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_NEON))
114 alg = RTE_ACL_CLASSIFY_NEON;
115 #elif defined(RTE_ARCH_PPC_64)
116 alg = RTE_ACL_CLASSIFY_ALTIVEC;
118 #ifdef CC_AVX2_SUPPORT
119 if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2))
120 alg = RTE_ACL_CLASSIFY_AVX2;
121 else if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_SSE4_1))
123 if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_SSE4_1))
125 alg = RTE_ACL_CLASSIFY_SSE;
128 rte_acl_set_default_classify(alg);
132 rte_acl_classify_alg(const struct rte_acl_ctx *ctx, const uint8_t **data,
133 uint32_t *results, uint32_t num, uint32_t categories,
134 enum rte_acl_classify_alg alg)
136 if (categories != 1 &&
137 ((RTE_ACL_RESULTS_MULTIPLIER - 1) & categories) != 0)
140 return classify_fns[alg](ctx, data, results, num, categories);
144 rte_acl_classify(const struct rte_acl_ctx *ctx, const uint8_t **data,
145 uint32_t *results, uint32_t num, uint32_t categories)
147 return rte_acl_classify_alg(ctx, data, results, num, categories,
152 rte_acl_find_existing(const char *name)
154 struct rte_acl_ctx *ctx = NULL;
155 struct rte_acl_list *acl_list;
156 struct rte_tailq_entry *te;
158 acl_list = RTE_TAILQ_CAST(rte_acl_tailq.head, rte_acl_list);
160 rte_mcfg_tailq_read_lock();
161 TAILQ_FOREACH(te, acl_list, next) {
162 ctx = (struct rte_acl_ctx *) te->data;
163 if (strncmp(name, ctx->name, sizeof(ctx->name)) == 0)
166 rte_mcfg_tailq_read_unlock();
176 rte_acl_free(struct rte_acl_ctx *ctx)
178 struct rte_acl_list *acl_list;
179 struct rte_tailq_entry *te;
184 acl_list = RTE_TAILQ_CAST(rte_acl_tailq.head, rte_acl_list);
186 rte_mcfg_tailq_write_lock();
188 /* find our tailq entry */
189 TAILQ_FOREACH(te, acl_list, next) {
190 if (te->data == (void *) ctx)
194 rte_mcfg_tailq_write_unlock();
198 TAILQ_REMOVE(acl_list, te, next);
200 rte_mcfg_tailq_write_unlock();
208 rte_acl_create(const struct rte_acl_param *param)
211 struct rte_acl_ctx *ctx;
212 struct rte_acl_list *acl_list;
213 struct rte_tailq_entry *te;
214 char name[sizeof(ctx->name)];
216 acl_list = RTE_TAILQ_CAST(rte_acl_tailq.head, rte_acl_list);
218 /* check that input parameters are valid. */
219 if (param == NULL || param->name == NULL) {
224 snprintf(name, sizeof(name), "ACL_%s", param->name);
226 /* calculate amount of memory required for pattern set. */
227 sz = sizeof(*ctx) + param->max_rule_num * param->rule_size;
229 /* get EAL TAILQ lock. */
230 rte_mcfg_tailq_write_lock();
232 /* if we already have one with that name */
233 TAILQ_FOREACH(te, acl_list, next) {
234 ctx = (struct rte_acl_ctx *) te->data;
235 if (strncmp(param->name, ctx->name, sizeof(ctx->name)) == 0)
239 /* if ACL with such name doesn't exist, then create a new one. */
242 te = rte_zmalloc("ACL_TAILQ_ENTRY", sizeof(*te), 0);
245 RTE_LOG(ERR, ACL, "Cannot allocate tailq entry!\n");
249 ctx = rte_zmalloc_socket(name, sz, RTE_CACHE_LINE_SIZE, param->socket_id);
253 "allocation of %zu bytes on socket %d for %s failed\n",
254 sz, param->socket_id, name);
258 /* init new allocated context. */
259 ctx->rules = ctx + 1;
260 ctx->max_rules = param->max_rule_num;
261 ctx->rule_sz = param->rule_size;
262 ctx->socket_id = param->socket_id;
263 ctx->alg = rte_acl_default_classify;
264 strlcpy(ctx->name, param->name, sizeof(ctx->name));
266 te->data = (void *) ctx;
268 TAILQ_INSERT_TAIL(acl_list, te, next);
272 rte_mcfg_tailq_write_unlock();
277 acl_add_rules(struct rte_acl_ctx *ctx, const void *rules, uint32_t num)
281 if (num + ctx->num_rules > ctx->max_rules)
285 pos += ctx->rule_sz * ctx->num_rules;
286 memcpy(pos, rules, num * ctx->rule_sz);
287 ctx->num_rules += num;
293 acl_check_rule(const struct rte_acl_rule_data *rd)
295 if ((RTE_LEN2MASK(RTE_ACL_MAX_CATEGORIES, typeof(rd->category_mask)) &
296 rd->category_mask) == 0 ||
297 rd->priority > RTE_ACL_MAX_PRIORITY ||
298 rd->priority < RTE_ACL_MIN_PRIORITY)
304 rte_acl_add_rules(struct rte_acl_ctx *ctx, const struct rte_acl_rule *rules,
307 const struct rte_acl_rule *rv;
311 if (ctx == NULL || rules == NULL || 0 == ctx->rule_sz)
314 for (i = 0; i != num; i++) {
315 rv = (const struct rte_acl_rule *)
316 ((uintptr_t)rules + i * ctx->rule_sz);
317 rc = acl_check_rule(&rv->data);
319 RTE_LOG(ERR, ACL, "%s(%s): rule #%u is invalid\n",
320 __func__, ctx->name, i + 1);
325 return acl_add_rules(ctx, rules, num);
330 * Note that RT structures are not affected.
333 rte_acl_reset_rules(struct rte_acl_ctx *ctx)
340 * Reset all rules and destroys RT structures.
343 rte_acl_reset(struct rte_acl_ctx *ctx)
346 rte_acl_reset_rules(ctx);
347 rte_acl_build(ctx, &ctx->config);
352 * Dump ACL context to the stdout.
355 rte_acl_dump(const struct rte_acl_ctx *ctx)
359 printf("acl context <%s>@%p\n", ctx->name, ctx);
360 printf(" socket_id=%"PRId32"\n", ctx->socket_id);
361 printf(" alg=%"PRId32"\n", ctx->alg);
362 printf(" max_rules=%"PRIu32"\n", ctx->max_rules);
363 printf(" rule_size=%"PRIu32"\n", ctx->rule_sz);
364 printf(" num_rules=%"PRIu32"\n", ctx->num_rules);
365 printf(" num_categories=%"PRIu32"\n", ctx->num_categories);
366 printf(" num_tries=%"PRIu32"\n", ctx->num_tries);
370 * Dump all ACL contexts to the stdout.
373 rte_acl_list_dump(void)
375 struct rte_acl_ctx *ctx;
376 struct rte_acl_list *acl_list;
377 struct rte_tailq_entry *te;
379 acl_list = RTE_TAILQ_CAST(rte_acl_tailq.head, rte_acl_list);
381 rte_mcfg_tailq_read_lock();
382 TAILQ_FOREACH(te, acl_list, next) {
383 ctx = (struct rte_acl_ctx *) te->data;
386 rte_mcfg_tailq_read_unlock();