1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2014 Intel Corporation
5 #include <rte_string_fns.h>
11 TAILQ_HEAD(rte_acl_list, rte_tailq_entry);
13 static struct rte_tailq_elem rte_acl_tailq = {
16 EAL_REGISTER_TAILQ(rte_acl_tailq)
19 #ifndef CC_AVX2_SUPPORT
21 * If the compiler doesn't support AVX2 instructions,
22 * then the dummy one would be used instead for AVX2 classify method.
25 rte_acl_classify_avx2(__rte_unused const struct rte_acl_ctx *ctx,
26 __rte_unused const uint8_t **data,
27 __rte_unused uint32_t *results,
28 __rte_unused uint32_t num,
29 __rte_unused uint32_t categories)
36 rte_acl_classify_sse(__rte_unused const struct rte_acl_ctx *ctx,
37 __rte_unused const uint8_t **data,
38 __rte_unused uint32_t *results,
39 __rte_unused uint32_t num,
40 __rte_unused uint32_t categories)
47 #ifndef RTE_ARCH_ARM64
49 rte_acl_classify_neon(__rte_unused const struct rte_acl_ctx *ctx,
50 __rte_unused const uint8_t **data,
51 __rte_unused uint32_t *results,
52 __rte_unused uint32_t num,
53 __rte_unused uint32_t categories)
60 #ifndef RTE_ARCH_PPC_64
62 rte_acl_classify_altivec(__rte_unused const struct rte_acl_ctx *ctx,
63 __rte_unused const uint8_t **data,
64 __rte_unused uint32_t *results,
65 __rte_unused uint32_t num,
66 __rte_unused uint32_t categories)
72 static const rte_acl_classify_t classify_fns[] = {
73 [RTE_ACL_CLASSIFY_DEFAULT] = rte_acl_classify_scalar,
74 [RTE_ACL_CLASSIFY_SCALAR] = rte_acl_classify_scalar,
75 [RTE_ACL_CLASSIFY_SSE] = rte_acl_classify_sse,
76 [RTE_ACL_CLASSIFY_AVX2] = rte_acl_classify_avx2,
77 [RTE_ACL_CLASSIFY_NEON] = rte_acl_classify_neon,
78 [RTE_ACL_CLASSIFY_ALTIVEC] = rte_acl_classify_altivec,
81 /* by default, use always available scalar code path. */
82 static enum rte_acl_classify_alg rte_acl_default_classify =
83 RTE_ACL_CLASSIFY_SCALAR;
86 rte_acl_set_default_classify(enum rte_acl_classify_alg alg)
88 rte_acl_default_classify = alg;
92 rte_acl_set_ctx_classify(struct rte_acl_ctx *ctx, enum rte_acl_classify_alg alg)
94 if (ctx == NULL || (uint32_t)alg >= RTE_DIM(classify_fns))
102 * Select highest available classify method as default one.
103 * Note that CLASSIFY_AVX2 should be set as a default only
104 * if both conditions are met:
105 * at build time compiler supports AVX2 and target cpu supports AVX2.
107 RTE_INIT(rte_acl_init)
109 enum rte_acl_classify_alg alg = RTE_ACL_CLASSIFY_DEFAULT;
111 #if defined(RTE_ARCH_ARM64)
112 alg = RTE_ACL_CLASSIFY_NEON;
113 #elif defined(RTE_ARCH_ARM)
114 if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_NEON))
115 alg = RTE_ACL_CLASSIFY_NEON;
116 #elif defined(RTE_ARCH_PPC_64)
117 alg = RTE_ACL_CLASSIFY_ALTIVEC;
119 #ifdef CC_AVX2_SUPPORT
120 if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2))
121 alg = RTE_ACL_CLASSIFY_AVX2;
122 else if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_SSE4_1))
124 if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_SSE4_1))
126 alg = RTE_ACL_CLASSIFY_SSE;
129 rte_acl_set_default_classify(alg);
133 rte_acl_classify_alg(const struct rte_acl_ctx *ctx, const uint8_t **data,
134 uint32_t *results, uint32_t num, uint32_t categories,
135 enum rte_acl_classify_alg alg)
137 if (categories != 1 &&
138 ((RTE_ACL_RESULTS_MULTIPLIER - 1) & categories) != 0)
141 return classify_fns[alg](ctx, data, results, num, categories);
145 rte_acl_classify(const struct rte_acl_ctx *ctx, const uint8_t **data,
146 uint32_t *results, uint32_t num, uint32_t categories)
148 return rte_acl_classify_alg(ctx, data, results, num, categories,
153 rte_acl_find_existing(const char *name)
155 struct rte_acl_ctx *ctx = NULL;
156 struct rte_acl_list *acl_list;
157 struct rte_tailq_entry *te;
159 acl_list = RTE_TAILQ_CAST(rte_acl_tailq.head, rte_acl_list);
161 rte_mcfg_tailq_read_lock();
162 TAILQ_FOREACH(te, acl_list, next) {
163 ctx = (struct rte_acl_ctx *) te->data;
164 if (strncmp(name, ctx->name, sizeof(ctx->name)) == 0)
167 rte_mcfg_tailq_read_unlock();
177 rte_acl_free(struct rte_acl_ctx *ctx)
179 struct rte_acl_list *acl_list;
180 struct rte_tailq_entry *te;
185 acl_list = RTE_TAILQ_CAST(rte_acl_tailq.head, rte_acl_list);
187 rte_mcfg_tailq_write_lock();
189 /* find our tailq entry */
190 TAILQ_FOREACH(te, acl_list, next) {
191 if (te->data == (void *) ctx)
195 rte_mcfg_tailq_write_unlock();
199 TAILQ_REMOVE(acl_list, te, next);
201 rte_mcfg_tailq_write_unlock();
209 rte_acl_create(const struct rte_acl_param *param)
212 struct rte_acl_ctx *ctx;
213 struct rte_acl_list *acl_list;
214 struct rte_tailq_entry *te;
215 char name[sizeof(ctx->name)];
217 acl_list = RTE_TAILQ_CAST(rte_acl_tailq.head, rte_acl_list);
219 /* check that input parameters are valid. */
220 if (param == NULL || param->name == NULL) {
225 snprintf(name, sizeof(name), "ACL_%s", param->name);
227 /* calculate amount of memory required for pattern set. */
228 sz = sizeof(*ctx) + param->max_rule_num * param->rule_size;
230 /* get EAL TAILQ lock. */
231 rte_mcfg_tailq_write_lock();
233 /* if we already have one with that name */
234 TAILQ_FOREACH(te, acl_list, next) {
235 ctx = (struct rte_acl_ctx *) te->data;
236 if (strncmp(param->name, ctx->name, sizeof(ctx->name)) == 0)
240 /* if ACL with such name doesn't exist, then create a new one. */
243 te = rte_zmalloc("ACL_TAILQ_ENTRY", sizeof(*te), 0);
246 RTE_LOG(ERR, ACL, "Cannot allocate tailq entry!\n");
250 ctx = rte_zmalloc_socket(name, sz, RTE_CACHE_LINE_SIZE, param->socket_id);
254 "allocation of %zu bytes on socket %d for %s failed\n",
255 sz, param->socket_id, name);
259 /* init new allocated context. */
260 ctx->rules = ctx + 1;
261 ctx->max_rules = param->max_rule_num;
262 ctx->rule_sz = param->rule_size;
263 ctx->socket_id = param->socket_id;
264 ctx->alg = rte_acl_default_classify;
265 strlcpy(ctx->name, param->name, sizeof(ctx->name));
267 te->data = (void *) ctx;
269 TAILQ_INSERT_TAIL(acl_list, te, next);
273 rte_mcfg_tailq_write_unlock();
278 acl_add_rules(struct rte_acl_ctx *ctx, const void *rules, uint32_t num)
282 if (num + ctx->num_rules > ctx->max_rules)
286 pos += ctx->rule_sz * ctx->num_rules;
287 memcpy(pos, rules, num * ctx->rule_sz);
288 ctx->num_rules += num;
294 acl_check_rule(const struct rte_acl_rule_data *rd)
296 if ((RTE_LEN2MASK(RTE_ACL_MAX_CATEGORIES, typeof(rd->category_mask)) &
297 rd->category_mask) == 0 ||
298 rd->priority > RTE_ACL_MAX_PRIORITY ||
299 rd->priority < RTE_ACL_MIN_PRIORITY)
305 rte_acl_add_rules(struct rte_acl_ctx *ctx, const struct rte_acl_rule *rules,
308 const struct rte_acl_rule *rv;
312 if (ctx == NULL || rules == NULL || 0 == ctx->rule_sz)
315 for (i = 0; i != num; i++) {
316 rv = (const struct rte_acl_rule *)
317 ((uintptr_t)rules + i * ctx->rule_sz);
318 rc = acl_check_rule(&rv->data);
320 RTE_LOG(ERR, ACL, "%s(%s): rule #%u is invalid\n",
321 __func__, ctx->name, i + 1);
326 return acl_add_rules(ctx, rules, num);
331 * Note that RT structures are not affected.
334 rte_acl_reset_rules(struct rte_acl_ctx *ctx)
341 * Reset all rules and destroys RT structures.
344 rte_acl_reset(struct rte_acl_ctx *ctx)
347 rte_acl_reset_rules(ctx);
348 rte_acl_build(ctx, &ctx->config);
353 * Dump ACL context to the stdout.
356 rte_acl_dump(const struct rte_acl_ctx *ctx)
360 printf("acl context <%s>@%p\n", ctx->name, ctx);
361 printf(" socket_id=%"PRId32"\n", ctx->socket_id);
362 printf(" alg=%"PRId32"\n", ctx->alg);
363 printf(" max_rules=%"PRIu32"\n", ctx->max_rules);
364 printf(" rule_size=%"PRIu32"\n", ctx->rule_sz);
365 printf(" num_rules=%"PRIu32"\n", ctx->num_rules);
366 printf(" num_categories=%"PRIu32"\n", ctx->num_categories);
367 printf(" num_tries=%"PRIu32"\n", ctx->num_tries);
371 * Dump all ACL contexts to the stdout.
374 rte_acl_list_dump(void)
376 struct rte_acl_ctx *ctx;
377 struct rte_acl_list *acl_list;
378 struct rte_tailq_entry *te;
380 acl_list = RTE_TAILQ_CAST(rte_acl_tailq.head, rte_acl_list);
382 rte_mcfg_tailq_read_lock();
383 TAILQ_FOREACH(te, acl_list, next) {
384 ctx = (struct rte_acl_ctx *) te->data;
387 rte_mcfg_tailq_read_unlock();