1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2015 RehiveTech. All rights reserved.
5 #ifndef _RTE_BYTEORDER_ARM_H_
6 #define _RTE_BYTEORDER_ARM_H_
8 #ifndef RTE_FORCE_INTRINSICS
9 # error Platform must be built with RTE_FORCE_INTRINSICS
17 #include <rte_common.h>
18 #include "generic/rte_byteorder.h"
20 /* fix missing __builtin_bswap16 for gcc older then 4.8 */
21 #if !(__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8))
23 static inline uint16_t rte_arch_bswap16(uint16_t _x)
27 asm volatile ("rev16 %w0,%w1"
34 #define rte_bswap16(x) ((uint16_t)(__builtin_constant_p(x) ? \
35 rte_constant_bswap16(x) : \
39 /* ARM architecture is bi-endian (both big and little). */
40 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
42 #define rte_cpu_to_le_16(x) (x)
43 #define rte_cpu_to_le_32(x) (x)
44 #define rte_cpu_to_le_64(x) (x)
46 #define rte_cpu_to_be_16(x) rte_bswap16(x)
47 #define rte_cpu_to_be_32(x) rte_bswap32(x)
48 #define rte_cpu_to_be_64(x) rte_bswap64(x)
50 #define rte_le_to_cpu_16(x) (x)
51 #define rte_le_to_cpu_32(x) (x)
52 #define rte_le_to_cpu_64(x) (x)
54 #define rte_be_to_cpu_16(x) rte_bswap16(x)
55 #define rte_be_to_cpu_32(x) rte_bswap32(x)
56 #define rte_be_to_cpu_64(x) rte_bswap64(x)
58 #else /* RTE_BIG_ENDIAN */
60 #define rte_cpu_to_le_16(x) rte_bswap16(x)
61 #define rte_cpu_to_le_32(x) rte_bswap32(x)
62 #define rte_cpu_to_le_64(x) rte_bswap64(x)
64 #define rte_cpu_to_be_16(x) (x)
65 #define rte_cpu_to_be_32(x) (x)
66 #define rte_cpu_to_be_64(x) (x)
68 #define rte_le_to_cpu_16(x) rte_bswap16(x)
69 #define rte_le_to_cpu_32(x) rte_bswap32(x)
70 #define rte_le_to_cpu_64(x) rte_bswap64(x)
72 #define rte_be_to_cpu_16(x) (x)
73 #define rte_be_to_cpu_32(x) (x)
74 #define rte_be_to_cpu_64(x) (x)
81 #endif /* _RTE_BYTEORDER_ARM_H_ */