1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2015 Cavium, Inc
3 * Copyright(c) 2020 Arm Limited
6 #ifndef _RTE_CYCLES_ARM64_H_
7 #define _RTE_CYCLES_ARM64_H_
13 #include "generic/rte_cycles.h"
15 /** Read generic counter frequency */
16 static __rte_always_inline uint64_t
17 __rte_arm64_cntfrq(void)
21 asm volatile("mrs %0, cntfrq_el0" : "=r" (freq));
25 /** Read generic counter */
26 static __rte_always_inline uint64_t
27 __rte_arm64_cntvct(void)
31 asm volatile("mrs %0, cntvct_el0" : "=r" (tsc));
35 static __rte_always_inline uint64_t
36 __rte_arm64_cntvct_precise(void)
38 asm volatile("isb" : : : "memory");
39 return __rte_arm64_cntvct();
43 * Read the time base register.
46 * The time base for this lcore.
48 #ifndef RTE_ARM_EAL_RDTSC_USE_PMU
50 * This call is portable to any ARMv8 architecture, however, typically
51 * cntvct_el0 runs at <= 100MHz and it may be imprecise for some tasks.
53 static inline uint64_t
56 return __rte_arm64_cntvct();
60 * This is an alternative method to enable rte_rdtsc() with high resolution
61 * PMU cycles counter.The cycle counter runs at cpu frequency and this scheme
62 * uses ARMv8 PMU subsystem to get the cycle counter at userspace, However,
63 * access to PMU cycle counter from user space is not enabled by default in
65 * It is possible to enable cycle counter at user space access by configuring
66 * the PMU from the privileged mode (kernel space).
68 * asm volatile("msr pmintenset_el1, %0" : : "r" ((u64)(0 << 31)));
69 * asm volatile("msr pmcntenset_el0, %0" :: "r" BIT(31));
70 * asm volatile("msr pmuserenr_el0, %0" : : "r"(BIT(0) | BIT(2)));
71 * asm volatile("mrs %0, pmcr_el0" : "=r" (val));
72 * val |= (BIT(0) | BIT(2));
74 * asm volatile("msr pmcr_el0, %0" : : "r" (val));
78 /** Read PMU cycle counter */
79 static __rte_always_inline uint64_t
80 __rte_arm64_pmccntr(void)
84 asm volatile("mrs %0, pmccntr_el0" : "=r"(tsc));
88 static inline uint64_t
91 return __rte_arm64_pmccntr();
95 static inline uint64_t
96 rte_rdtsc_precise(void)
98 asm volatile("isb" : : : "memory");
102 static inline uint64_t
103 rte_get_tsc_cycles(void) { return rte_rdtsc(); }
109 #endif /* _RTE_CYCLES_ARM64_H_ */