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41 #include <sys/types.h>
48 #include <sys/queue.h>
50 #include <sys/ioctl.h>
51 #include <sys/pciio.h>
52 #include <dev/pci/pcireg.h>
54 #if defined(RTE_ARCH_X86_64) || defined(RTE_ARCH_I686)
55 #include <sys/types.h>
56 #include <machine/cpufunc.h>
59 #include <rte_interrupts.h>
62 #include <rte_common.h>
63 #include <rte_launch.h>
64 #include <rte_memory.h>
65 #include <rte_memzone.h>
67 #include <rte_eal_memconfig.h>
68 #include <rte_per_lcore.h>
69 #include <rte_lcore.h>
70 #include <rte_malloc.h>
71 #include <rte_string_fns.h>
72 #include <rte_debug.h>
73 #include <rte_devargs.h>
75 #include "eal_filesystem.h"
76 #include "eal_private.h"
80 * PCI probing under linux
82 * This code is used to simulate a PCI probe by parsing information in
83 * sysfs. Moreover, when a registered driver matches a device, the
84 * kernel driver currently using it is unloaded and replaced by
85 * igb_uio module, which is a very minimal userland driver for Intel
86 * network card, only providing access to PCI BAR to applications, and
87 * enabling bus master.
90 /* unbind kernel driver for this device */
92 pci_unbind_kernel_driver(struct rte_pci_device *dev __rte_unused)
94 RTE_LOG(ERR, EAL, "RTE_PCI_DRV_FORCE_UNBIND flag is not implemented "
101 rte_eal_pci_map_device(struct rte_pci_device *dev)
105 /* try mapping the NIC resources */
107 case RTE_KDRV_NIC_UIO:
108 /* map resources for devices that use uio */
109 ret = pci_uio_map_resource(dev);
113 " Not managed by a supported kernel driver, skipped\n");
121 /* Unmap pci device */
123 rte_eal_pci_unmap_device(struct rte_pci_device *dev)
125 /* try unmapping the NIC resources */
127 case RTE_KDRV_NIC_UIO:
128 /* unmap resources for devices that use uio */
129 pci_uio_unmap_resource(dev);
133 " Not managed by a supported kernel driver, skipped\n");
139 pci_uio_free_resource(struct rte_pci_device *dev,
140 struct mapped_pci_resource *uio_res)
144 if (dev->intr_handle.fd) {
145 close(dev->intr_handle.fd);
146 dev->intr_handle.fd = -1;
147 dev->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
152 pci_uio_alloc_resource(struct rte_pci_device *dev,
153 struct mapped_pci_resource **uio_res)
155 char devname[PATH_MAX]; /* contains the /dev/uioX */
156 struct rte_pci_addr *loc;
160 snprintf(devname, sizeof(devname), "/dev/uio@pci:%u:%u:%u",
161 dev->addr.bus, dev->addr.devid, dev->addr.function);
163 if (access(devname, O_RDWR) < 0) {
164 RTE_LOG(WARNING, EAL, " "PCI_PRI_FMT" not managed by UIO driver, "
165 "skipping\n", loc->domain, loc->bus, loc->devid, loc->function);
169 /* save fd if in primary process */
170 dev->intr_handle.fd = open(devname, O_RDWR);
171 if (dev->intr_handle.fd < 0) {
172 RTE_LOG(ERR, EAL, "Cannot open %s: %s\n",
173 devname, strerror(errno));
176 dev->intr_handle.type = RTE_INTR_HANDLE_UIO;
178 /* allocate the mapping details for secondary processes*/
179 *uio_res = rte_zmalloc("UIO_RES", sizeof(**uio_res), 0);
180 if (*uio_res == NULL) {
182 "%s(): cannot store uio mmap details\n", __func__);
186 snprintf((*uio_res)->path, sizeof((*uio_res)->path), "%s", devname);
187 memcpy(&(*uio_res)->pci_addr, &dev->addr, sizeof((*uio_res)->pci_addr));
192 pci_uio_free_resource(dev, *uio_res);
197 pci_uio_map_resource_by_index(struct rte_pci_device *dev, int res_idx,
198 struct mapped_pci_resource *uio_res, int map_idx)
205 struct pci_map *maps;
207 maps = uio_res->maps;
208 devname = uio_res->path;
209 pagesz = sysconf(_SC_PAGESIZE);
211 /* allocate memory to keep path */
212 maps[map_idx].path = rte_malloc(NULL, strlen(devname) + 1, 0);
213 if (maps[map_idx].path == NULL) {
214 RTE_LOG(ERR, EAL, "Cannot allocate memory for path: %s\n",
220 * open resource file, to mmap it
222 fd = open(devname, O_RDWR);
224 RTE_LOG(ERR, EAL, "Cannot open %s: %s\n",
225 devname, strerror(errno));
229 /* if matching map is found, then use it */
230 offset = res_idx * pagesz;
231 mapaddr = pci_map_resource(NULL, fd, (off_t)offset,
232 (size_t)dev->mem_resource[res_idx].len, 0);
234 if (mapaddr == MAP_FAILED)
237 maps[map_idx].phaddr = dev->mem_resource[res_idx].phys_addr;
238 maps[map_idx].size = dev->mem_resource[res_idx].len;
239 maps[map_idx].addr = mapaddr;
240 maps[map_idx].offset = offset;
241 strcpy(maps[map_idx].path, devname);
242 dev->mem_resource[res_idx].addr = mapaddr;
247 rte_free(maps[map_idx].path);
252 pci_scan_one(int dev_pci_fd, struct pci_conf *conf)
254 struct rte_pci_device *dev;
255 struct pci_bar_io bar;
258 dev = malloc(sizeof(*dev));
263 memset(dev, 0, sizeof(*dev));
264 dev->addr.domain = conf->pc_sel.pc_domain;
265 dev->addr.bus = conf->pc_sel.pc_bus;
266 dev->addr.devid = conf->pc_sel.pc_dev;
267 dev->addr.function = conf->pc_sel.pc_func;
270 dev->id.vendor_id = conf->pc_vendor;
273 dev->id.device_id = conf->pc_device;
275 /* get subsystem_vendor id */
276 dev->id.subsystem_vendor_id = conf->pc_subvendor;
278 /* get subsystem_device id */
279 dev->id.subsystem_device_id = conf->pc_subdevice;
281 /* TODO: get max_vfs */
284 /* FreeBSD has no NUMA support (yet) */
287 /* FreeBSD has only one pass through driver */
288 dev->kdrv = RTE_KDRV_NIC_UIO;
290 /* parse resources */
291 switch (conf->pc_hdr & PCIM_HDRTYPE) {
292 case PCIM_HDRTYPE_NORMAL:
293 max = PCIR_MAX_BAR_0;
295 case PCIM_HDRTYPE_BRIDGE:
296 max = PCIR_MAX_BAR_1;
298 case PCIM_HDRTYPE_CARDBUS:
299 max = PCIR_MAX_BAR_2;
305 for (i = 0; i <= max; i++) {
306 bar.pbi_sel = conf->pc_sel;
307 bar.pbi_reg = PCIR_BAR(i);
308 if (ioctl(dev_pci_fd, PCIOCGETBAR, &bar) < 0)
311 dev->mem_resource[i].len = bar.pbi_length;
312 if (PCI_BAR_IO(bar.pbi_base)) {
313 dev->mem_resource[i].addr = (void *)(bar.pbi_base & ~((uint64_t)0xf));
316 dev->mem_resource[i].phys_addr = bar.pbi_base & ~((uint64_t)0xf);
319 /* device is valid, add in list (sorted) */
320 if (TAILQ_EMPTY(&pci_device_list)) {
321 TAILQ_INSERT_TAIL(&pci_device_list, dev, next);
324 struct rte_pci_device *dev2 = NULL;
327 TAILQ_FOREACH(dev2, &pci_device_list, next) {
328 ret = rte_eal_compare_pci_addr(&dev->addr, &dev2->addr);
332 TAILQ_INSERT_BEFORE(dev2, dev, next);
334 } else { /* already registered */
335 dev2->kdrv = dev->kdrv;
336 dev2->max_vfs = dev->max_vfs;
337 memmove(dev2->mem_resource,
339 sizeof(dev->mem_resource));
344 TAILQ_INSERT_TAIL(&pci_device_list, dev, next);
355 * Scan the content of the PCI bus, and add the devices in the devices
356 * list. Call pci_scan_one() for each pci entry found.
359 rte_eal_pci_scan(void)
362 unsigned dev_count = 0;
363 struct pci_conf matches[16];
364 struct pci_conf_io conf_io = {
368 .match_buf_len = sizeof(matches),
369 .matches = &matches[0],
372 fd = open("/dev/pci", O_RDONLY);
374 RTE_LOG(ERR, EAL, "%s(): error opening /dev/pci\n", __func__);
380 if (ioctl(fd, PCIOCGETCONF, &conf_io) < 0) {
381 RTE_LOG(ERR, EAL, "%s(): error with ioctl on /dev/pci: %s\n",
382 __func__, strerror(errno));
386 for (i = 0; i < conf_io.num_matches; i++)
387 if (pci_scan_one(fd, &matches[i]) < 0)
390 dev_count += conf_io.num_matches;
391 } while(conf_io.status == PCI_GETCONF_MORE_DEVS);
395 RTE_LOG(ERR, EAL, "PCI scan found %u devices\n", dev_count);
404 /* Read PCI config space. */
405 int rte_eal_pci_read_config(const struct rte_pci_device *dev,
406 void *buf, size_t len, off_t offset)
411 .pc_domain = dev->addr.domain,
412 .pc_bus = dev->addr.bus,
413 .pc_dev = dev->addr.devid,
414 .pc_func = dev->addr.function,
420 if (len == 3 || len > sizeof(pi.pi_data)) {
421 RTE_LOG(ERR, EAL, "%s(): invalid pci read length\n", __func__);
425 fd = open("/dev/pci", O_RDONLY);
427 RTE_LOG(ERR, EAL, "%s(): error opening /dev/pci\n", __func__);
431 if (ioctl(fd, PCIOCREAD, &pi) < 0)
435 memcpy(buf, &pi.pi_data, len);
444 /* Write PCI config space. */
445 int rte_eal_pci_write_config(const struct rte_pci_device *dev,
446 const void *buf, size_t len, off_t offset)
452 .pc_domain = dev->addr.domain,
453 .pc_bus = dev->addr.bus,
454 .pc_dev = dev->addr.devid,
455 .pc_func = dev->addr.function,
458 .pi_data = *(const uint32_t *)buf,
462 if (len == 3 || len > sizeof(pi.pi_data)) {
463 RTE_LOG(ERR, EAL, "%s(): invalid pci read length\n", __func__);
467 memcpy(&pi.pi_data, buf, len);
469 fd = open("/dev/pci", O_RDONLY);
471 RTE_LOG(ERR, EAL, "%s(): error opening /dev/pci\n", __func__);
475 if (ioctl(fd, PCIOCWRITE, &pi) < 0)
488 rte_eal_pci_ioport_map(struct rte_pci_device *dev, int bar,
489 struct rte_pci_ioport *p)
494 #if defined(RTE_ARCH_X86_64) || defined(RTE_ARCH_I686)
495 case RTE_KDRV_NIC_UIO:
496 if ((uintptr_t) dev->mem_resource[bar].addr <= UINT16_MAX) {
497 p->base = (uintptr_t)dev->mem_resource[bar].addr;
515 pci_uio_ioport_read(struct rte_pci_ioport *p,
516 void *data, size_t len, off_t offset)
518 #if defined(RTE_ARCH_X86_64) || defined(RTE_ARCH_I686)
521 unsigned short reg = p->base + offset;
523 for (d = data; len > 0; d += size, reg += size, len -= size) {
526 *(uint32_t *)d = inl(reg);
527 } else if (len >= 2) {
529 *(uint16_t *)d = inw(reg);
539 RTE_SET_USED(offset);
544 rte_eal_pci_ioport_read(struct rte_pci_ioport *p,
545 void *data, size_t len, off_t offset)
547 switch (p->dev->kdrv) {
548 case RTE_KDRV_NIC_UIO:
549 pci_uio_ioport_read(p, data, len, offset);
557 pci_uio_ioport_write(struct rte_pci_ioport *p,
558 const void *data, size_t len, off_t offset)
560 #if defined(RTE_ARCH_X86_64) || defined(RTE_ARCH_I686)
563 unsigned short reg = p->base + offset;
565 for (s = data; len > 0; s += size, reg += size, len -= size) {
568 outl(*(const uint32_t *)s, reg);
569 } else if (len >= 2) {
571 outw(*(const uint16_t *)s, reg);
581 RTE_SET_USED(offset);
586 rte_eal_pci_ioport_write(struct rte_pci_ioport *p,
587 const void *data, size_t len, off_t offset)
589 switch (p->dev->kdrv) {
590 case RTE_KDRV_NIC_UIO:
591 pci_uio_ioport_write(p, data, len, offset);
599 rte_eal_pci_ioport_unmap(struct rte_pci_ioport *p)
603 switch (p->dev->kdrv) {
604 #if defined(RTE_ARCH_X86_64) || defined(RTE_ARCH_I686)
605 case RTE_KDRV_NIC_UIO:
617 /* Init the PCI EAL subsystem */
619 rte_eal_pci_init(void)
621 TAILQ_INIT(&pci_driver_list);
622 TAILQ_INIT(&pci_device_list);
624 /* for debug purposes, PCI can be disabled */
625 if (internal_config.no_pci)
628 if (rte_eal_pci_scan() < 0) {
629 RTE_LOG(ERR, EAL, "%s(): Cannot scan PCI bus\n", __func__);