4 * Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
41 #include <sys/types.h>
48 #include <sys/queue.h>
50 #include <sys/ioctl.h>
51 #include <sys/pciio.h>
52 #include <dev/pci/pcireg.h>
54 #include <rte_interrupts.h>
57 #include <rte_common.h>
58 #include <rte_launch.h>
59 #include <rte_memory.h>
60 #include <rte_memzone.h>
61 #include <rte_tailq.h>
63 #include <rte_eal_memconfig.h>
64 #include <rte_per_lcore.h>
65 #include <rte_lcore.h>
66 #include <rte_malloc.h>
67 #include <rte_string_fns.h>
68 #include <rte_debug.h>
69 #include <rte_devargs.h>
71 #include "rte_pci_dev_ids.h"
72 #include "eal_filesystem.h"
73 #include "eal_private.h"
77 * PCI probing under linux
79 * This code is used to simulate a PCI probe by parsing information in
80 * sysfs. Moreover, when a registered driver matches a device, the
81 * kernel driver currently using it is unloaded and replaced by
82 * igb_uio module, which is a very minimal userland driver for Intel
83 * network card, only providing access to PCI BAR to applications, and
84 * enabling bus master.
95 * For multi-process we need to reproduce all PCI mappings in secondary
96 * processes, so save them in a tailq.
99 TAILQ_ENTRY(uio_resource) next;
101 struct rte_pci_addr pci_addr;
104 struct uio_map maps[PCI_MAX_RESOURCE];
107 TAILQ_HEAD(uio_res_list, uio_resource);
109 static struct uio_res_list *uio_res_list = NULL;
111 /* unbind kernel driver for this device */
113 pci_unbind_kernel_driver(struct rte_pci_device *dev)
115 RTE_LOG(ERR, EAL, "RTE_PCI_DRV_FORCE_UNBIND flag is not implemented "
120 /* map a particular resource from a file */
122 pci_map_resource(void *requested_addr, const char *devname, off_t offset,
129 * open devname, to mmap it
131 fd = open(devname, O_RDWR);
133 RTE_LOG(ERR, EAL, "Cannot open %s: %s\n",
134 devname, strerror(errno));
138 /* Map the PCI memory resource of device */
139 mapaddr = mmap(requested_addr, size, PROT_READ | PROT_WRITE,
140 MAP_SHARED, fd, offset);
142 if (mapaddr == MAP_FAILED ||
143 (requested_addr != NULL && mapaddr != requested_addr)) {
144 RTE_LOG(ERR, EAL, "%s(): cannot mmap(%s(%d), %p, 0x%lx, 0x%lx):"
145 " %s (%p)\n", __func__, devname, fd, requested_addr,
146 (unsigned long)size, (unsigned long)offset,
147 strerror(errno), mapaddr);
151 RTE_LOG(DEBUG, EAL, " PCI memory mapped at %p\n", mapaddr);
160 #define OFF_MAX ((uint64_t)(off_t)-1)
164 pci_uio_map_secondary(struct rte_pci_device *dev)
167 struct uio_resource *uio_res;
169 TAILQ_FOREACH(uio_res, uio_res_list, next) {
171 /* skip this element if it doesn't match our PCI address */
172 if (memcmp(&uio_res->pci_addr, &dev->addr, sizeof(dev->addr)))
175 for (i = 0; i != uio_res->nb_maps; i++) {
176 if (pci_map_resource(uio_res->maps[i].addr,
178 (off_t)uio_res->maps[i].offset,
179 (size_t)uio_res->maps[i].size)
180 != uio_res->maps[i].addr) {
182 "Cannot mmap device resource\n");
189 RTE_LOG(ERR, EAL, "Cannot find resource for device\n");
193 /* map the PCI resource of a PCI device in virtual memory */
195 pci_uio_map_resource(struct rte_pci_device *dev)
198 char devname[PATH_MAX]; /* contains the /dev/uioX */
203 struct rte_pci_addr *loc = &dev->addr;
204 struct uio_resource *uio_res;
205 struct uio_map *maps;
207 dev->intr_handle.fd = -1;
208 dev->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
210 /* secondary processes - use already recorded details */
211 if (rte_eal_process_type() != RTE_PROC_PRIMARY)
212 return (pci_uio_map_secondary(dev));
214 rte_snprintf(devname, sizeof(devname), "/dev/uio@pci:%u:%u:%u",
215 dev->addr.bus, dev->addr.devid, dev->addr.function);
217 if (access(devname, O_RDWR) < 0) {
218 RTE_LOG(WARNING, EAL, " "PCI_PRI_FMT" not managed by UIO driver, "
219 "skipping\n", loc->domain, loc->bus, loc->devid, loc->function);
223 /* save fd if in primary process */
224 dev->intr_handle.fd = open(devname, O_RDWR);
225 if (dev->intr_handle.fd < 0) {
226 RTE_LOG(ERR, EAL, "Cannot open %s: %s\n",
227 devname, strerror(errno));
230 dev->intr_handle.type = RTE_INTR_HANDLE_UIO;
232 /* allocate the mapping details for secondary processes*/
233 if ((uio_res = rte_zmalloc("UIO_RES", sizeof (*uio_res), 0)) == NULL) {
235 "%s(): cannot store uio mmap details\n", __func__);
239 rte_snprintf(uio_res->path, sizeof(uio_res->path), "%s", devname);
240 memcpy(&uio_res->pci_addr, &dev->addr, sizeof(uio_res->pci_addr));
244 pagesz = sysconf(_SC_PAGESIZE);
246 maps = uio_res->maps;
247 for (i = uio_res->nb_maps = 0; i != PCI_MAX_RESOURCE; i++) {
249 j = uio_res->nb_maps;
251 if ((phaddr = dev->mem_resource[i].phys_addr) == 0)
254 /* if matching map is found, then use it */
256 maps[j].offset = offset;
257 maps[j].phaddr = dev->mem_resource[i].phys_addr;
258 maps[j].size = dev->mem_resource[i].len;
259 if (maps[j].addr != NULL ||
260 (mapaddr = pci_map_resource(NULL, devname, (off_t)offset,
261 (size_t)maps[j].size)
267 maps[j].addr = mapaddr;
269 dev->mem_resource[i].addr = mapaddr;
272 TAILQ_INSERT_TAIL(uio_res_list, uio_res, next);
277 /* parse the "resource" sysfs file */
278 #define IORESOURCE_MEM 0x00000200
280 /* Compare two PCI device addresses. */
282 pci_addr_comparison(struct rte_pci_addr *addr, struct rte_pci_addr *addr2)
284 uint64_t dev_addr = (addr->domain << 24) + (addr->bus << 16) + (addr->devid << 8) + addr->function;
285 uint64_t dev_addr2 = (addr2->domain << 24) + (addr2->bus << 16) + (addr2->devid << 8) + addr2->function;
287 if (dev_addr > dev_addr2)
294 /* Scan one pci sysfs entry, and fill the devices list from it. */
296 pci_scan_one(int dev_pci_fd, struct pci_conf *conf)
298 struct rte_pci_device *dev;
299 struct pci_bar_io bar;
302 dev = malloc(sizeof(*dev));
307 memset(dev, 0, sizeof(*dev));
308 dev->addr.domain = conf->pc_sel.pc_domain;
309 dev->addr.bus = conf->pc_sel.pc_bus;
310 dev->addr.devid = conf->pc_sel.pc_dev;
311 dev->addr.function = conf->pc_sel.pc_func;
314 dev->id.vendor_id = conf->pc_vendor;
317 dev->id.device_id = conf->pc_device;
319 /* get subsystem_vendor id */
320 dev->id.subsystem_vendor_id = conf->pc_subvendor;
322 /* get subsystem_device id */
323 dev->id.subsystem_device_id = conf->pc_subdevice;
325 /* TODO: get max_vfs */
328 /* FreeBSD has no NUMA support (yet) */
331 /* parse resources */
332 switch (conf->pc_hdr & PCIM_HDRTYPE) {
333 case PCIM_HDRTYPE_NORMAL:
334 max = PCIR_MAX_BAR_0;
336 case PCIM_HDRTYPE_BRIDGE:
337 max = PCIR_MAX_BAR_1;
339 case PCIM_HDRTYPE_CARDBUS:
340 max = PCIR_MAX_BAR_2;
346 for (i = 0; i <= max; i++) {
347 bar.pbi_sel = conf->pc_sel;
348 bar.pbi_reg = PCIR_BAR(i);
349 if (ioctl(dev_pci_fd, PCIOCGETBAR, &bar) < 0)
352 dev->mem_resource[i].len = bar.pbi_length;
353 if (PCI_BAR_IO(bar.pbi_base)) {
354 dev->mem_resource[i].addr = (void *)(bar.pbi_base & ~((uint64_t)0xf));
357 dev->mem_resource[i].phys_addr = bar.pbi_base & ~((uint64_t)0xf);
360 /* device is valid, add in list (sorted) */
361 if (TAILQ_EMPTY(&pci_device_list)) {
362 TAILQ_INSERT_TAIL(&pci_device_list, dev, next);
365 struct rte_pci_device *dev2 = NULL;
367 TAILQ_FOREACH(dev2, &pci_device_list, next) {
368 if (pci_addr_comparison(&dev->addr, &dev2->addr))
371 TAILQ_INSERT_BEFORE(dev2, dev, next);
375 TAILQ_INSERT_TAIL(&pci_device_list, dev, next);
386 * Scan the content of the PCI bus, and add the devices in the devices
387 * list. Call pci_scan_one() for each pci entry found.
393 unsigned dev_count = 0;
394 struct pci_conf matches[16];
395 struct pci_conf_io conf_io = {
399 .match_buf_len = sizeof(matches),
400 .matches = &matches[0],
403 fd = open("/dev/pci", O_RDONLY);
405 RTE_LOG(ERR, EAL, "%s(): error opening /dev/pci\n", __func__);
411 if (ioctl(fd, PCIOCGETCONF, &conf_io) < 0) {
412 RTE_LOG(ERR, EAL, "%s(): error with ioctl on /dev/pci: %s\n",
413 __func__, strerror(errno));
417 for (i = 0; i < conf_io.num_matches; i++)
418 if (pci_scan_one(fd, &matches[i]) < 0)
421 dev_count += conf_io.num_matches;
422 } while(conf_io.status == PCI_GETCONF_MORE_DEVS);
426 RTE_LOG(ERR, EAL, "PCI scan found %u devices\n", dev_count);
436 * If vendor/device ID match, call the devinit() function of the
440 rte_eal_pci_probe_one_driver(struct rte_pci_driver *dr, struct rte_pci_device *dev)
442 struct rte_pci_id *id_table;
444 for (id_table = dr->id_table ; id_table->vendor_id != 0; id_table++) {
446 /* check if device's identifiers match the driver's ones */
447 if (id_table->vendor_id != dev->id.vendor_id &&
448 id_table->vendor_id != PCI_ANY_ID)
450 if (id_table->device_id != dev->id.device_id &&
451 id_table->device_id != PCI_ANY_ID)
453 if (id_table->subsystem_vendor_id != dev->id.subsystem_vendor_id &&
454 id_table->subsystem_vendor_id != PCI_ANY_ID)
456 if (id_table->subsystem_device_id != dev->id.subsystem_device_id &&
457 id_table->subsystem_device_id != PCI_ANY_ID)
460 struct rte_pci_addr *loc = &dev->addr;
462 RTE_LOG(DEBUG, EAL, "PCI device "PCI_PRI_FMT" on NUMA socket %i\n",
463 loc->domain, loc->bus, loc->devid, loc->function,
466 RTE_LOG(DEBUG, EAL, " probe driver: %x:%x %s\n", dev->id.vendor_id,
467 dev->id.device_id, dr->name);
469 /* no initialization when blacklisted, return without error */
470 if (dev->devargs != NULL &&
471 dev->devargs->type == RTE_DEVTYPE_BLACKLISTED_PCI) {
473 RTE_LOG(DEBUG, EAL, " Device is blacklisted, not initializing\n");
477 if (dr->drv_flags & RTE_PCI_DRV_NEED_IGB_UIO) {
478 /* map resources for devices that use igb_uio */
479 if (pci_uio_map_resource(dev) < 0)
481 } else if (dr->drv_flags & RTE_PCI_DRV_FORCE_UNBIND &&
482 rte_eal_process_type() == RTE_PROC_PRIMARY) {
483 /* unbind current driver */
484 if (pci_unbind_kernel_driver(dev) < 0)
488 /* reference driver structure */
491 /* call the driver devinit() function */
492 return dr->devinit(dr, dev);
494 /* return positive value if driver is not found */
498 /* Init the PCI EAL subsystem */
500 rte_eal_pci_init(void)
502 TAILQ_INIT(&pci_driver_list);
503 TAILQ_INIT(&pci_device_list);
504 uio_res_list = RTE_TAILQ_RESERVE_BY_IDX(RTE_TAILQ_PCI, uio_res_list);
506 /* for debug purposes, PCI can be disabled */
507 if (internal_config.no_pci)
510 if (pci_scan() < 0) {
511 RTE_LOG(ERR, EAL, "%s(): Cannot scan PCI bus\n", __func__);