1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2014 Intel Corporation.
3 * Copyright(c) 2014 6WIND S.A.
15 #include <sys/types.h>
21 #include <rte_lcore.h>
22 #include <rte_tailq.h>
23 #include <rte_version.h>
24 #include <rte_devargs.h>
25 #include <rte_memcpy.h>
27 #include "eal_internal_cfg.h"
28 #include "eal_options.h"
29 #include "eal_filesystem.h"
30 #include "eal_private.h"
32 #define BITS_PER_HEX 4
33 #define LCORE_OPT_LST 1
34 #define LCORE_OPT_MSK 2
35 #define LCORE_OPT_MAP 3
39 "b:" /* pci-blacklist */
41 "s:" /* service coremask */
45 "S:" /* service corelist */
46 "m:" /* memory size */
47 "n:" /* memory channels */
48 "r:" /* memory ranks */
50 "w:" /* pci-whitelist */
54 eal_long_options[] = {
55 {OPT_BASE_VIRTADDR, 1, NULL, OPT_BASE_VIRTADDR_NUM },
56 {OPT_CREATE_UIO_DEV, 0, NULL, OPT_CREATE_UIO_DEV_NUM },
57 {OPT_FILE_PREFIX, 1, NULL, OPT_FILE_PREFIX_NUM },
58 {OPT_HELP, 0, NULL, OPT_HELP_NUM },
59 {OPT_HUGE_DIR, 1, NULL, OPT_HUGE_DIR_NUM },
60 {OPT_HUGE_UNLINK, 0, NULL, OPT_HUGE_UNLINK_NUM },
61 {OPT_IOVA_MODE, 1, NULL, OPT_IOVA_MODE_NUM },
62 {OPT_LCORES, 1, NULL, OPT_LCORES_NUM },
63 {OPT_LOG_LEVEL, 1, NULL, OPT_LOG_LEVEL_NUM },
64 {OPT_MASTER_LCORE, 1, NULL, OPT_MASTER_LCORE_NUM },
65 {OPT_MBUF_POOL_OPS_NAME, 1, NULL, OPT_MBUF_POOL_OPS_NAME_NUM},
66 {OPT_NO_HPET, 0, NULL, OPT_NO_HPET_NUM },
67 {OPT_NO_HUGE, 0, NULL, OPT_NO_HUGE_NUM },
68 {OPT_NO_PCI, 0, NULL, OPT_NO_PCI_NUM },
69 {OPT_NO_SHCONF, 0, NULL, OPT_NO_SHCONF_NUM },
70 {OPT_IN_MEMORY, 0, NULL, OPT_IN_MEMORY_NUM },
71 {OPT_PCI_BLACKLIST, 1, NULL, OPT_PCI_BLACKLIST_NUM },
72 {OPT_PCI_WHITELIST, 1, NULL, OPT_PCI_WHITELIST_NUM },
73 {OPT_PROC_TYPE, 1, NULL, OPT_PROC_TYPE_NUM },
74 {OPT_SOCKET_MEM, 1, NULL, OPT_SOCKET_MEM_NUM },
75 {OPT_SOCKET_LIMIT, 1, NULL, OPT_SOCKET_LIMIT_NUM },
76 {OPT_SYSLOG, 1, NULL, OPT_SYSLOG_NUM },
77 {OPT_VDEV, 1, NULL, OPT_VDEV_NUM },
78 {OPT_VFIO_INTR, 1, NULL, OPT_VFIO_INTR_NUM },
79 {OPT_VMWARE_TSC_MAP, 0, NULL, OPT_VMWARE_TSC_MAP_NUM },
80 {OPT_LEGACY_MEM, 0, NULL, OPT_LEGACY_MEM_NUM },
81 {OPT_SINGLE_FILE_SEGMENTS, 0, NULL, OPT_SINGLE_FILE_SEGMENTS_NUM},
85 TAILQ_HEAD(shared_driver_list, shared_driver);
87 /* Definition for shared object drivers. */
88 struct shared_driver {
89 TAILQ_ENTRY(shared_driver) next;
95 /* List of external loadable drivers */
96 static struct shared_driver_list solib_list =
97 TAILQ_HEAD_INITIALIZER(solib_list);
99 /* Default path of external loadable drivers */
100 static const char *default_solib_dir = RTE_EAL_PMD_PATH;
103 * Stringified version of solib path used by dpdk-pmdinfo.py
104 * Note: PLEASE DO NOT ALTER THIS without making a corresponding
105 * change to usertools/dpdk-pmdinfo.py
107 static const char dpdk_solib_path[] __attribute__((used)) =
108 "DPDK_PLUGIN_PATH=" RTE_EAL_PMD_PATH;
110 TAILQ_HEAD(device_option_list, device_option);
112 struct device_option {
113 TAILQ_ENTRY(device_option) next;
115 enum rte_devtype type;
119 static struct device_option_list devopt_list =
120 TAILQ_HEAD_INITIALIZER(devopt_list);
122 static int master_lcore_parsed;
123 static int mem_parsed;
124 static int core_parsed;
127 eal_option_device_add(enum rte_devtype type, const char *optarg)
129 struct device_option *devopt;
133 optlen = strlen(optarg) + 1;
134 devopt = calloc(1, sizeof(*devopt) + optlen);
135 if (devopt == NULL) {
136 RTE_LOG(ERR, EAL, "Unable to allocate device option\n");
141 ret = snprintf(devopt->arg, optlen, "%s", optarg);
143 RTE_LOG(ERR, EAL, "Unable to copy device option\n");
147 TAILQ_INSERT_TAIL(&devopt_list, devopt, next);
152 eal_option_device_parse(void)
154 struct device_option *devopt;
158 TAILQ_FOREACH_SAFE(devopt, &devopt_list, next, tmp) {
160 ret = rte_devargs_add(devopt->type, devopt->arg);
162 RTE_LOG(ERR, EAL, "Unable to parse device '%s'\n",
165 TAILQ_REMOVE(&devopt_list, devopt, next);
172 eal_reset_internal_config(struct internal_config *internal_cfg)
176 internal_cfg->memory = 0;
177 internal_cfg->force_nrank = 0;
178 internal_cfg->force_nchannel = 0;
179 internal_cfg->hugefile_prefix = HUGEFILE_PREFIX_DEFAULT;
180 internal_cfg->hugepage_dir = NULL;
181 internal_cfg->force_sockets = 0;
182 /* zero out the NUMA config */
183 for (i = 0; i < RTE_MAX_NUMA_NODES; i++)
184 internal_cfg->socket_mem[i] = 0;
185 internal_cfg->force_socket_limits = 0;
186 /* zero out the NUMA limits config */
187 for (i = 0; i < RTE_MAX_NUMA_NODES; i++)
188 internal_cfg->socket_limit[i] = 0;
189 /* zero out hugedir descriptors */
190 for (i = 0; i < MAX_HUGEPAGE_SIZES; i++) {
191 memset(&internal_cfg->hugepage_info[i], 0,
192 sizeof(internal_cfg->hugepage_info[0]));
193 internal_cfg->hugepage_info[i].lock_descriptor = -1;
195 internal_cfg->base_virtaddr = 0;
197 internal_cfg->syslog_facility = LOG_DAEMON;
199 /* if set to NONE, interrupt mode is determined automatically */
200 internal_cfg->vfio_intr_mode = RTE_INTR_MODE_NONE;
202 #ifdef RTE_LIBEAL_USE_HPET
203 internal_cfg->no_hpet = 0;
205 internal_cfg->no_hpet = 1;
207 internal_cfg->vmware_tsc_map = 0;
208 internal_cfg->create_uio_dev = 0;
209 internal_cfg->iova_mode = RTE_IOVA_DC;
210 internal_cfg->user_mbuf_pool_ops_name = NULL;
211 internal_cfg->init_complete = 0;
215 eal_plugin_add(const char *path)
217 struct shared_driver *solib;
219 solib = malloc(sizeof(*solib));
221 RTE_LOG(ERR, EAL, "malloc(solib) failed\n");
224 memset(solib, 0, sizeof(*solib));
225 strncpy(solib->name, path, PATH_MAX-1);
226 solib->name[PATH_MAX-1] = 0;
227 TAILQ_INSERT_TAIL(&solib_list, solib, next);
233 eal_plugindir_init(const char *path)
236 struct dirent *dent = NULL;
237 char sopath[PATH_MAX];
239 if (path == NULL || *path == '\0')
244 RTE_LOG(ERR, EAL, "failed to open directory %s: %s\n",
245 path, strerror(errno));
249 while ((dent = readdir(d)) != NULL) {
252 snprintf(sopath, PATH_MAX-1, "%s/%s", path, dent->d_name);
253 sopath[PATH_MAX-1] = 0;
255 if (!(stat(sopath, &sb) == 0 && S_ISREG(sb.st_mode)))
258 if (eal_plugin_add(sopath) == -1)
263 /* XXX this ignores failures from readdir() itself */
264 return (dent == NULL) ? 0 : -1;
268 eal_plugins_init(void)
270 struct shared_driver *solib = NULL;
273 if (*default_solib_dir != '\0' && stat(default_solib_dir, &sb) == 0 &&
275 eal_plugin_add(default_solib_dir);
277 TAILQ_FOREACH(solib, &solib_list, next) {
279 if (stat(solib->name, &sb) == 0 && S_ISDIR(sb.st_mode)) {
280 if (eal_plugindir_init(solib->name) == -1) {
282 "Cannot init plugin directory %s\n",
287 RTE_LOG(DEBUG, EAL, "open shared lib %s\n",
289 solib->lib_handle = dlopen(solib->name, RTLD_NOW);
290 if (solib->lib_handle == NULL) {
291 RTE_LOG(ERR, EAL, "%s\n", dlerror());
301 * Parse the coremask given as argument (hexadecimal string) and fill
302 * the global configuration (core role and core count) with the parsed
305 static int xdigit2val(unsigned char c)
319 eal_parse_service_coremask(const char *coremask)
321 struct rte_config *cfg = rte_eal_get_configuration();
323 unsigned int count = 0;
326 uint32_t taken_lcore_count = 0;
328 if (coremask == NULL)
330 /* Remove all blank characters ahead and after .
331 * Remove 0x/0X if exists.
333 while (isblank(*coremask))
335 if (coremask[0] == '0' && ((coremask[1] == 'x')
336 || (coremask[1] == 'X')))
338 i = strlen(coremask);
339 while ((i > 0) && isblank(coremask[i - 1]))
345 for (i = i - 1; i >= 0 && idx < RTE_MAX_LCORE; i--) {
347 if (isxdigit(c) == 0) {
348 /* invalid characters */
352 for (j = 0; j < BITS_PER_HEX && idx < RTE_MAX_LCORE;
354 if ((1 << j) & val) {
355 /* handle master lcore already parsed */
356 uint32_t lcore = idx;
357 if (master_lcore_parsed &&
358 cfg->master_lcore == lcore) {
360 "lcore %u is master lcore, cannot use as service core\n",
365 if (!lcore_config[idx].detected) {
367 "lcore %u unavailable\n", idx);
371 if (cfg->lcore_role[idx] == ROLE_RTE)
374 lcore_config[idx].core_role = ROLE_SERVICE;
381 if (coremask[i] != '0')
384 for (; idx < RTE_MAX_LCORE; idx++)
385 lcore_config[idx].core_index = -1;
390 if (core_parsed && taken_lcore_count != count) {
391 RTE_LOG(WARNING, EAL,
392 "Not all service cores are in the coremask. "
393 "Please ensure -c or -l includes service cores\n");
396 cfg->service_lcore_count = count;
401 eal_service_cores_parsed(void)
404 for (idx = 0; idx < RTE_MAX_LCORE; idx++) {
405 if (lcore_config[idx].core_role == ROLE_SERVICE)
412 eal_parse_coremask(const char *coremask)
414 struct rte_config *cfg = rte_eal_get_configuration();
420 if (eal_service_cores_parsed())
421 RTE_LOG(WARNING, EAL,
422 "Service cores parsed before dataplane cores. "
423 "Please ensure -c is before -s or -S\n");
425 if (coremask == NULL)
427 /* Remove all blank characters ahead and after .
428 * Remove 0x/0X if exists.
430 while (isblank(*coremask))
432 if (coremask[0] == '0' && ((coremask[1] == 'x')
433 || (coremask[1] == 'X')))
435 i = strlen(coremask);
436 while ((i > 0) && isblank(coremask[i - 1]))
441 for (i = i - 1; i >= 0 && idx < RTE_MAX_LCORE; i--) {
443 if (isxdigit(c) == 0) {
444 /* invalid characters */
448 for (j = 0; j < BITS_PER_HEX && idx < RTE_MAX_LCORE; j++, idx++)
450 if ((1 << j) & val) {
451 if (!lcore_config[idx].detected) {
452 RTE_LOG(ERR, EAL, "lcore %u "
453 "unavailable\n", idx);
457 cfg->lcore_role[idx] = ROLE_RTE;
458 lcore_config[idx].core_index = count;
461 cfg->lcore_role[idx] = ROLE_OFF;
462 lcore_config[idx].core_index = -1;
467 if (coremask[i] != '0')
469 for (; idx < RTE_MAX_LCORE; idx++) {
470 cfg->lcore_role[idx] = ROLE_OFF;
471 lcore_config[idx].core_index = -1;
475 /* Update the count of enabled logical cores of the EAL configuration */
476 cfg->lcore_count = count;
481 eal_parse_service_corelist(const char *corelist)
483 struct rte_config *cfg = rte_eal_get_configuration();
488 uint32_t taken_lcore_count = 0;
490 if (corelist == NULL)
493 /* Remove all blank characters ahead and after */
494 while (isblank(*corelist))
496 i = strlen(corelist);
497 while ((i > 0) && isblank(corelist[i - 1]))
500 /* Get list of cores */
503 while (isblank(*corelist))
505 if (*corelist == '\0')
508 idx = strtoul(corelist, &end, 10);
509 if (errno || end == NULL)
511 while (isblank(*end))
515 } else if ((*end == ',') || (*end == '\0')) {
517 if (min == RTE_MAX_LCORE)
519 for (idx = min; idx <= max; idx++) {
520 if (cfg->lcore_role[idx] != ROLE_SERVICE) {
521 /* handle master lcore already parsed */
522 uint32_t lcore = idx;
523 if (cfg->master_lcore == lcore &&
524 master_lcore_parsed) {
526 "Error: lcore %u is master lcore, cannot use as service core\n",
530 if (cfg->lcore_role[idx] == ROLE_RTE)
533 lcore_config[idx].core_role =
542 } while (*end != '\0');
547 if (core_parsed && taken_lcore_count != count) {
548 RTE_LOG(WARNING, EAL,
549 "Not all service cores were in the coremask. "
550 "Please ensure -c or -l includes service cores\n");
557 eal_parse_corelist(const char *corelist)
559 struct rte_config *cfg = rte_eal_get_configuration();
565 if (eal_service_cores_parsed())
566 RTE_LOG(WARNING, EAL,
567 "Service cores parsed before dataplane cores. "
568 "Please ensure -l is before -s or -S\n");
570 if (corelist == NULL)
573 /* Remove all blank characters ahead and after */
574 while (isblank(*corelist))
576 i = strlen(corelist);
577 while ((i > 0) && isblank(corelist[i - 1]))
581 for (idx = 0; idx < RTE_MAX_LCORE; idx++) {
582 cfg->lcore_role[idx] = ROLE_OFF;
583 lcore_config[idx].core_index = -1;
586 /* Get list of cores */
589 while (isblank(*corelist))
591 if (*corelist == '\0')
594 idx = strtoul(corelist, &end, 10);
595 if (errno || end == NULL)
597 while (isblank(*end))
601 } else if ((*end == ',') || (*end == '\0')) {
603 if (min == RTE_MAX_LCORE)
605 for (idx = min; idx <= max; idx++) {
606 if (cfg->lcore_role[idx] != ROLE_RTE) {
607 cfg->lcore_role[idx] = ROLE_RTE;
608 lcore_config[idx].core_index = count;
616 } while (*end != '\0');
621 /* Update the count of enabled logical cores of the EAL configuration */
622 cfg->lcore_count = count;
627 /* Changes the lcore id of the master thread */
629 eal_parse_master_lcore(const char *arg)
632 struct rte_config *cfg = rte_eal_get_configuration();
635 cfg->master_lcore = (uint32_t) strtol(arg, &parsing_end, 0);
636 if (errno || parsing_end[0] != 0)
638 if (cfg->master_lcore >= RTE_MAX_LCORE)
640 master_lcore_parsed = 1;
642 /* ensure master core is not used as service core */
643 if (lcore_config[cfg->master_lcore].core_role == ROLE_SERVICE) {
645 "Error: Master lcore is used as a service core\n");
653 * Parse elem, the elem could be single number/range or '(' ')' group
654 * 1) A single number elem, it's just a simple digit. e.g. 9
655 * 2) A single range elem, two digits with a '-' between. e.g. 2-6
656 * 3) A group elem, combines multiple 1) or 2) with '( )'. e.g (0,2-4,6)
657 * Within group elem, '-' used for a range separator;
658 * ',' used for a single number.
661 eal_parse_set(const char *input, uint16_t set[], unsigned num)
664 const char *str = input;
668 memset(set, 0, num * sizeof(uint16_t));
670 while (isblank(*str))
673 /* only digit or left bracket is qualify for start point */
674 if ((!isdigit(*str) && *str != '(') || *str == '\0')
677 /* process single number or single range of number */
680 idx = strtoul(str, &end, 10);
681 if (errno || end == NULL || idx >= num)
684 while (isblank(*end))
690 /* process single <number>-<number> */
692 while (isblank(*end))
698 idx = strtoul(end, &end, 10);
699 if (errno || end == NULL || idx >= num)
702 while (isblank(*end))
704 if (*end != ',' && *end != '\0')
708 if (*end != ',' && *end != '\0' &&
712 for (idx = RTE_MIN(min, max);
713 idx <= RTE_MAX(min, max); idx++)
720 /* process set within bracket */
722 while (isblank(*str))
730 /* go ahead to the first digit */
731 while (isblank(*str))
736 /* get the digit value */
738 idx = strtoul(str, &end, 10);
739 if (errno || end == NULL || idx >= num)
742 /* go ahead to separator '-',',' and ')' */
743 while (isblank(*end))
746 if (min == RTE_MAX_LCORE)
748 else /* avoid continuous '-' */
750 } else if ((*end == ',') || (*end == ')')) {
752 if (min == RTE_MAX_LCORE)
754 for (idx = RTE_MIN(min, max);
755 idx <= RTE_MAX(min, max); idx++)
763 } while (*end != '\0' && *end != ')');
766 * to avoid failure that tail blank makes end character check fail
767 * in eal_parse_lcores( )
769 while (isblank(*str))
775 /* convert from set array to cpuset bitmap */
777 convert_to_cpuset(rte_cpuset_t *cpusetp,
778 uint16_t *set, unsigned num)
784 for (idx = 0; idx < num; idx++) {
788 if (!lcore_config[idx].detected) {
789 RTE_LOG(ERR, EAL, "core %u "
790 "unavailable\n", idx);
794 CPU_SET(idx, cpusetp);
801 * The format pattern: --lcores='<lcores[@cpus]>[<,lcores[@cpus]>...]'
802 * lcores, cpus could be a single digit/range or a group.
803 * '(' and ')' are necessary if it's a group.
804 * If not supply '@cpus', the value of cpus uses the same as lcores.
805 * e.g. '1,2@(5-7),(3-5)@(0,2),(0,6),7-8' means start 9 EAL thread as below
806 * lcore 0 runs on cpuset 0x41 (cpu 0,6)
807 * lcore 1 runs on cpuset 0x2 (cpu 1)
808 * lcore 2 runs on cpuset 0xe0 (cpu 5,6,7)
809 * lcore 3,4,5 runs on cpuset 0x5 (cpu 0,2)
810 * lcore 6 runs on cpuset 0x41 (cpu 0,6)
811 * lcore 7 runs on cpuset 0x80 (cpu 7)
812 * lcore 8 runs on cpuset 0x100 (cpu 8)
815 eal_parse_lcores(const char *lcores)
817 struct rte_config *cfg = rte_eal_get_configuration();
818 static uint16_t set[RTE_MAX_LCORE];
821 const char *lcore_start = NULL;
822 const char *end = NULL;
831 /* Remove all blank characters ahead and after */
832 while (isblank(*lcores))
837 /* Reset lcore config */
838 for (idx = 0; idx < RTE_MAX_LCORE; idx++) {
839 cfg->lcore_role[idx] = ROLE_OFF;
840 lcore_config[idx].core_index = -1;
841 CPU_ZERO(&lcore_config[idx].cpuset);
844 /* Get list of cores */
846 while (isblank(*lcores))
853 /* record lcore_set start point */
854 lcore_start = lcores;
856 /* go across a complete bracket */
857 if (*lcore_start == '(') {
858 lcores += strcspn(lcores, ")");
859 if (*lcores++ == '\0')
863 /* scan the separator '@', ','(next) or '\0'(finish) */
864 lcores += strcspn(lcores, "@,");
866 if (*lcores == '@') {
867 /* explicit assign cpu_set */
868 offset = eal_parse_set(lcores + 1, set, RTE_DIM(set));
872 /* prepare cpu_set and update the end cursor */
873 if (0 > convert_to_cpuset(&cpuset,
876 end = lcores + 1 + offset;
877 } else { /* ',' or '\0' */
878 /* haven't given cpu_set, current loop done */
881 /* go back to check <number>-<number> */
882 offset = strcspn(lcore_start, "(-");
883 if (offset < (end - lcore_start) &&
884 *(lcore_start + offset) != '(')
888 if (*end != ',' && *end != '\0')
891 /* parse lcore_set from start point */
892 if (0 > eal_parse_set(lcore_start, set, RTE_DIM(set)))
895 /* without '@', by default using lcore_set as cpu_set */
896 if (*lcores != '@' &&
897 0 > convert_to_cpuset(&cpuset, set, RTE_DIM(set)))
900 /* start to update lcore_set */
901 for (idx = 0; idx < RTE_MAX_LCORE; idx++) {
905 if (cfg->lcore_role[idx] != ROLE_RTE) {
906 lcore_config[idx].core_index = count;
907 cfg->lcore_role[idx] = ROLE_RTE;
913 CPU_SET(idx, &cpuset);
915 rte_memcpy(&lcore_config[idx].cpuset, &cpuset,
916 sizeof(rte_cpuset_t));
920 } while (*end != '\0');
925 cfg->lcore_count = count;
934 eal_parse_syslog(const char *facility, struct internal_config *conf)
937 static const struct {
941 { "auth", LOG_AUTH },
942 { "cron", LOG_CRON },
943 { "daemon", LOG_DAEMON },
945 { "kern", LOG_KERN },
947 { "mail", LOG_MAIL },
948 { "news", LOG_NEWS },
949 { "syslog", LOG_SYSLOG },
950 { "user", LOG_USER },
951 { "uucp", LOG_UUCP },
952 { "local0", LOG_LOCAL0 },
953 { "local1", LOG_LOCAL1 },
954 { "local2", LOG_LOCAL2 },
955 { "local3", LOG_LOCAL3 },
956 { "local4", LOG_LOCAL4 },
957 { "local5", LOG_LOCAL5 },
958 { "local6", LOG_LOCAL6 },
959 { "local7", LOG_LOCAL7 },
963 for (i = 0; map[i].name; i++) {
964 if (!strcmp(facility, map[i].name)) {
965 conf->syslog_facility = map[i].value;
973 eal_parse_log_priority(const char *level)
975 static const char * const levels[] = {
976 [RTE_LOG_EMERG] = "emergency",
977 [RTE_LOG_ALERT] = "alert",
978 [RTE_LOG_CRIT] = "critical",
979 [RTE_LOG_ERR] = "error",
980 [RTE_LOG_WARNING] = "warning",
981 [RTE_LOG_NOTICE] = "notice",
982 [RTE_LOG_INFO] = "info",
983 [RTE_LOG_DEBUG] = "debug",
985 size_t len = strlen(level);
993 /* look for named values, skip 0 which is not a valid level */
994 for (i = 1; i < RTE_DIM(levels); i++) {
995 if (strncmp(levels[i], level, len) == 0)
999 /* not a string, maybe it is numeric */
1001 tmp = strtoul(level, &end, 0);
1003 /* check for errors */
1004 if (errno != 0 || end == NULL || *end != '\0' ||
1012 eal_parse_log_level(const char *arg)
1014 const char *pattern = NULL;
1015 const char *regex = NULL;
1023 if ((level = strchr(str, ','))) {
1026 } else if ((level = strchr(str, ':'))) {
1033 priority = eal_parse_log_priority(level);
1035 fprintf(stderr, "invalid log priority: %s\n", level);
1040 if (rte_log_set_level_regexp(regex, priority) < 0) {
1041 fprintf(stderr, "cannot set log level %s,%d\n",
1045 if (rte_log_save_regexp(regex, priority) < 0)
1047 } else if (pattern) {
1048 if (rte_log_set_level_pattern(pattern, priority) < 0) {
1049 fprintf(stderr, "cannot set log level %s:%d\n",
1053 if (rte_log_save_pattern(pattern, priority) < 0)
1056 rte_log_set_global_level(priority);
1067 static enum rte_proc_type_t
1068 eal_parse_proc_type(const char *arg)
1070 if (strncasecmp(arg, "primary", sizeof("primary")) == 0)
1071 return RTE_PROC_PRIMARY;
1072 if (strncasecmp(arg, "secondary", sizeof("secondary")) == 0)
1073 return RTE_PROC_SECONDARY;
1074 if (strncasecmp(arg, "auto", sizeof("auto")) == 0)
1075 return RTE_PROC_AUTO;
1077 return RTE_PROC_INVALID;
1081 eal_parse_iova_mode(const char *name)
1088 if (!strcmp("pa", name))
1090 else if (!strcmp("va", name))
1095 internal_config.iova_mode = mode;
1100 eal_parse_common_option(int opt, const char *optarg,
1101 struct internal_config *conf)
1111 if (eal_option_device_add(RTE_DEVTYPE_BLACKLISTED_PCI,
1121 if (eal_option_device_add(RTE_DEVTYPE_WHITELISTED_PCI,
1129 if (eal_parse_coremask(optarg) < 0) {
1130 RTE_LOG(ERR, EAL, "invalid coremask\n");
1135 RTE_LOG(ERR, EAL, "Option -c is ignored, because (%s) is set!\n",
1136 (core_parsed == LCORE_OPT_LST) ? "-l" :
1137 (core_parsed == LCORE_OPT_MAP) ? "--lcore" :
1142 core_parsed = LCORE_OPT_MSK;
1146 if (eal_parse_corelist(optarg) < 0) {
1147 RTE_LOG(ERR, EAL, "invalid core list\n");
1152 RTE_LOG(ERR, EAL, "Option -l is ignored, because (%s) is set!\n",
1153 (core_parsed == LCORE_OPT_MSK) ? "-c" :
1154 (core_parsed == LCORE_OPT_MAP) ? "--lcore" :
1159 core_parsed = LCORE_OPT_LST;
1161 /* service coremask */
1163 if (eal_parse_service_coremask(optarg) < 0) {
1164 RTE_LOG(ERR, EAL, "invalid service coremask\n");
1168 /* service corelist */
1170 if (eal_parse_service_corelist(optarg) < 0) {
1171 RTE_LOG(ERR, EAL, "invalid service core list\n");
1175 /* size of memory */
1177 conf->memory = atoi(optarg);
1178 conf->memory *= 1024ULL;
1179 conf->memory *= 1024ULL;
1182 /* force number of channels */
1184 conf->force_nchannel = atoi(optarg);
1185 if (conf->force_nchannel == 0) {
1186 RTE_LOG(ERR, EAL, "invalid channel number\n");
1190 /* force number of ranks */
1192 conf->force_nrank = atoi(optarg);
1193 if (conf->force_nrank == 0 ||
1194 conf->force_nrank > 16) {
1195 RTE_LOG(ERR, EAL, "invalid rank number\n");
1199 /* force loading of external driver */
1201 if (eal_plugin_add(optarg) == -1)
1205 /* since message is explicitly requested by user, we
1206 * write message at highest log level so it can always
1208 * even if info or warning messages are disabled */
1209 RTE_LOG(CRIT, EAL, "RTE Version: '%s'\n", rte_version());
1213 case OPT_HUGE_UNLINK_NUM:
1214 conf->hugepage_unlink = 1;
1217 case OPT_NO_HUGE_NUM:
1218 conf->no_hugetlbfs = 1;
1219 /* no-huge is legacy mem */
1220 conf->legacy_mem = 1;
1223 case OPT_NO_PCI_NUM:
1227 case OPT_NO_HPET_NUM:
1231 case OPT_VMWARE_TSC_MAP_NUM:
1232 conf->vmware_tsc_map = 1;
1235 case OPT_NO_SHCONF_NUM:
1236 conf->no_shconf = 1;
1239 case OPT_IN_MEMORY_NUM:
1240 conf->in_memory = 1;
1241 /* in-memory is a superset of noshconf and huge-unlink */
1242 conf->no_shconf = 1;
1243 conf->hugepage_unlink = 1;
1246 case OPT_PROC_TYPE_NUM:
1247 conf->process_type = eal_parse_proc_type(optarg);
1250 case OPT_MASTER_LCORE_NUM:
1251 if (eal_parse_master_lcore(optarg) < 0) {
1252 RTE_LOG(ERR, EAL, "invalid parameter for --"
1253 OPT_MASTER_LCORE "\n");
1259 if (eal_option_device_add(RTE_DEVTYPE_VIRTUAL,
1265 case OPT_SYSLOG_NUM:
1266 if (eal_parse_syslog(optarg, conf) < 0) {
1267 RTE_LOG(ERR, EAL, "invalid parameters for --"
1273 case OPT_LOG_LEVEL_NUM: {
1274 if (eal_parse_log_level(optarg) < 0) {
1276 "invalid parameters for --"
1277 OPT_LOG_LEVEL "\n");
1282 case OPT_LCORES_NUM:
1283 if (eal_parse_lcores(optarg) < 0) {
1284 RTE_LOG(ERR, EAL, "invalid parameter for --"
1290 RTE_LOG(ERR, EAL, "Option --lcore is ignored, because (%s) is set!\n",
1291 (core_parsed == LCORE_OPT_LST) ? "-l" :
1292 (core_parsed == LCORE_OPT_MSK) ? "-c" :
1297 core_parsed = LCORE_OPT_MAP;
1299 case OPT_LEGACY_MEM_NUM:
1300 conf->legacy_mem = 1;
1302 case OPT_SINGLE_FILE_SEGMENTS_NUM:
1303 conf->single_file_segments = 1;
1305 case OPT_IOVA_MODE_NUM:
1306 if (eal_parse_iova_mode(optarg) < 0) {
1307 RTE_LOG(ERR, EAL, "invalid parameters for --"
1308 OPT_IOVA_MODE "\n");
1313 /* don't know what to do, leave this to caller */
1321 RTE_LOG(ERR, EAL, "Options blacklist (-b) and whitelist (-w) "
1322 "cannot be used at the same time\n");
1327 eal_auto_detect_cores(struct rte_config *cfg)
1329 unsigned int lcore_id;
1330 unsigned int removed = 0;
1331 rte_cpuset_t affinity_set;
1332 pthread_t tid = pthread_self();
1334 if (pthread_getaffinity_np(tid, sizeof(rte_cpuset_t),
1336 CPU_ZERO(&affinity_set);
1338 for (lcore_id = 0; lcore_id < RTE_MAX_LCORE; lcore_id++) {
1339 if (cfg->lcore_role[lcore_id] == ROLE_RTE &&
1340 !CPU_ISSET(lcore_id, &affinity_set)) {
1341 cfg->lcore_role[lcore_id] = ROLE_OFF;
1346 cfg->lcore_count -= removed;
1350 eal_adjust_config(struct internal_config *internal_cfg)
1353 struct rte_config *cfg = rte_eal_get_configuration();
1356 eal_auto_detect_cores(cfg);
1358 if (internal_config.process_type == RTE_PROC_AUTO)
1359 internal_config.process_type = eal_proc_type_detect();
1361 /* default master lcore is the first one */
1362 if (!master_lcore_parsed) {
1363 cfg->master_lcore = rte_get_next_lcore(-1, 0, 0);
1364 lcore_config[cfg->master_lcore].core_role = ROLE_RTE;
1367 /* if no memory amounts were requested, this will result in 0 and
1368 * will be overridden later, right after eal_hugepage_info_init() */
1369 for (i = 0; i < RTE_MAX_NUMA_NODES; i++)
1370 internal_cfg->memory += internal_cfg->socket_mem[i];
1376 eal_check_common_options(struct internal_config *internal_cfg)
1378 struct rte_config *cfg = rte_eal_get_configuration();
1380 if (cfg->lcore_role[cfg->master_lcore] != ROLE_RTE) {
1381 RTE_LOG(ERR, EAL, "Master lcore is not enabled for DPDK\n");
1385 if (internal_cfg->process_type == RTE_PROC_INVALID) {
1386 RTE_LOG(ERR, EAL, "Invalid process type specified\n");
1389 if (index(internal_cfg->hugefile_prefix, '%') != NULL) {
1390 RTE_LOG(ERR, EAL, "Invalid char, '%%', in --"OPT_FILE_PREFIX" "
1394 if (mem_parsed && internal_cfg->force_sockets == 1) {
1395 RTE_LOG(ERR, EAL, "Options -m and --"OPT_SOCKET_MEM" cannot "
1396 "be specified at the same time\n");
1399 if (internal_cfg->no_hugetlbfs && internal_cfg->force_sockets == 1) {
1400 RTE_LOG(ERR, EAL, "Option --"OPT_SOCKET_MEM" cannot "
1401 "be specified together with --"OPT_NO_HUGE"\n");
1404 if (internal_cfg->no_hugetlbfs && internal_cfg->hugepage_unlink &&
1405 !internal_cfg->in_memory) {
1406 RTE_LOG(ERR, EAL, "Option --"OPT_HUGE_UNLINK" cannot "
1407 "be specified together with --"OPT_NO_HUGE"\n");
1410 if (internal_config.force_socket_limits && internal_config.legacy_mem) {
1411 RTE_LOG(ERR, EAL, "Option --"OPT_SOCKET_LIMIT
1412 " is only supported in non-legacy memory mode\n");
1414 if (internal_cfg->single_file_segments &&
1415 internal_cfg->hugepage_unlink &&
1416 !internal_cfg->in_memory) {
1417 RTE_LOG(ERR, EAL, "Option --"OPT_SINGLE_FILE_SEGMENTS" is "
1418 "not compatible with --"OPT_HUGE_UNLINK"\n");
1421 if (internal_cfg->legacy_mem &&
1422 internal_cfg->in_memory) {
1423 RTE_LOG(ERR, EAL, "Option --"OPT_LEGACY_MEM" is not compatible "
1424 "with --"OPT_IN_MEMORY"\n");
1432 eal_common_usage(void)
1434 printf("[options]\n\n"
1435 "EAL common options:\n"
1436 " -c COREMASK Hexadecimal bitmask of cores to run on\n"
1437 " -l CORELIST List of cores to run on\n"
1438 " The argument format is <c1>[-c2][,c3[-c4],...]\n"
1439 " where c1, c2, etc are core indexes between 0 and %d\n"
1440 " --"OPT_LCORES" COREMAP Map lcore set to physical cpu set\n"
1441 " The argument format is\n"
1442 " '<lcores[@cpus]>[<,lcores[@cpus]>...]'\n"
1443 " lcores and cpus list are grouped by '(' and ')'\n"
1444 " Within the group, '-' is used for range separator,\n"
1445 " ',' is used for single number separator.\n"
1446 " '( )' can be omitted for single element group,\n"
1447 " '@' can be omitted if cpus and lcores have the same value\n"
1448 " -s SERVICE COREMASK Hexadecimal bitmask of cores to be used as service cores\n"
1449 " --"OPT_MASTER_LCORE" ID Core ID that is used as master\n"
1450 " --"OPT_MBUF_POOL_OPS_NAME" Pool ops name for mbuf to use\n"
1451 " -n CHANNELS Number of memory channels\n"
1452 " -m MB Memory to allocate (see also --"OPT_SOCKET_MEM")\n"
1453 " -r RANKS Force number of memory ranks (don't detect)\n"
1454 " -b, --"OPT_PCI_BLACKLIST" Add a PCI device in black list.\n"
1455 " Prevent EAL from using this PCI device. The argument\n"
1456 " format is <domain:bus:devid.func>.\n"
1457 " -w, --"OPT_PCI_WHITELIST" Add a PCI device in white list.\n"
1458 " Only use the specified PCI devices. The argument format\n"
1459 " is <[domain:]bus:devid.func>. This option can be present\n"
1460 " several times (once per device).\n"
1461 " [NOTE: PCI whitelist cannot be used with -b option]\n"
1462 " --"OPT_VDEV" Add a virtual device.\n"
1463 " The argument format is <driver><id>[,key=val,...]\n"
1464 " (ex: --vdev=net_pcap0,iface=eth2).\n"
1465 " --"OPT_IOVA_MODE" Set IOVA mode. 'pa' for IOVA_PA\n"
1466 " 'va' for IOVA_VA\n"
1467 " -d LIB.so|DIR Add a driver or driver directory\n"
1468 " (can be used multiple times)\n"
1469 " --"OPT_VMWARE_TSC_MAP" Use VMware TSC map instead of native RDTSC\n"
1470 " --"OPT_PROC_TYPE" Type of this process (primary|secondary|auto)\n"
1471 " --"OPT_SYSLOG" Set syslog facility\n"
1472 " --"OPT_LOG_LEVEL"=<int> Set global log level\n"
1473 " --"OPT_LOG_LEVEL"=<type-match>:<int>\n"
1474 " Set specific log level\n"
1475 " -v Display version information on startup\n"
1476 " -h, --help This help\n"
1477 " --"OPT_IN_MEMORY" Operate entirely in memory. This will\n"
1478 " disable secondary process support\n"
1479 "\nEAL options for DEBUG use only:\n"
1480 " --"OPT_HUGE_UNLINK" Unlink hugepage files after init\n"
1481 " --"OPT_NO_HUGE" Use malloc instead of hugetlbfs\n"
1482 " --"OPT_NO_PCI" Disable PCI\n"
1483 " --"OPT_NO_HPET" Disable HPET\n"
1484 " --"OPT_NO_SHCONF" No shared config (mmap'd files)\n"
1485 "\n", RTE_MAX_LCORE);