4 * Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
5 * Copyright(c) 2014 6WIND S.A.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
43 #include <sys/types.h>
49 #include <rte_lcore.h>
50 #include <rte_tailq.h>
51 #include <rte_version.h>
52 #include <rte_devargs.h>
53 #include <rte_memcpy.h>
55 #include "eal_internal_cfg.h"
56 #include "eal_options.h"
57 #include "eal_filesystem.h"
59 #define BITS_PER_HEX 4
63 "b:" /* pci-blacklist */
65 "s:" /* service coremask */
69 "S:" /* service corelist */
70 "m:" /* memory size */
71 "n:" /* memory channels */
72 "r:" /* memory ranks */
74 "w:" /* pci-whitelist */
78 eal_long_options[] = {
79 {OPT_BASE_VIRTADDR, 1, NULL, OPT_BASE_VIRTADDR_NUM },
80 {OPT_CREATE_UIO_DEV, 0, NULL, OPT_CREATE_UIO_DEV_NUM },
81 {OPT_FILE_PREFIX, 1, NULL, OPT_FILE_PREFIX_NUM },
82 {OPT_HELP, 0, NULL, OPT_HELP_NUM },
83 {OPT_HUGE_DIR, 1, NULL, OPT_HUGE_DIR_NUM },
84 {OPT_HUGE_UNLINK, 0, NULL, OPT_HUGE_UNLINK_NUM },
85 {OPT_LCORES, 1, NULL, OPT_LCORES_NUM },
86 {OPT_LOG_LEVEL, 1, NULL, OPT_LOG_LEVEL_NUM },
87 {OPT_MASTER_LCORE, 1, NULL, OPT_MASTER_LCORE_NUM },
88 {OPT_MBUF_POOL_OPS_NAME, 1, NULL, OPT_MBUF_POOL_OPS_NAME_NUM},
89 {OPT_NO_HPET, 0, NULL, OPT_NO_HPET_NUM },
90 {OPT_NO_HUGE, 0, NULL, OPT_NO_HUGE_NUM },
91 {OPT_NO_PCI, 0, NULL, OPT_NO_PCI_NUM },
92 {OPT_NO_SHCONF, 0, NULL, OPT_NO_SHCONF_NUM },
93 {OPT_PCI_BLACKLIST, 1, NULL, OPT_PCI_BLACKLIST_NUM },
94 {OPT_PCI_WHITELIST, 1, NULL, OPT_PCI_WHITELIST_NUM },
95 {OPT_PROC_TYPE, 1, NULL, OPT_PROC_TYPE_NUM },
96 {OPT_SOCKET_MEM, 1, NULL, OPT_SOCKET_MEM_NUM },
97 {OPT_SYSLOG, 1, NULL, OPT_SYSLOG_NUM },
98 {OPT_VDEV, 1, NULL, OPT_VDEV_NUM },
99 {OPT_VFIO_INTR, 1, NULL, OPT_VFIO_INTR_NUM },
100 {OPT_VMWARE_TSC_MAP, 0, NULL, OPT_VMWARE_TSC_MAP_NUM },
104 TAILQ_HEAD(shared_driver_list, shared_driver);
106 /* Definition for shared object drivers. */
107 struct shared_driver {
108 TAILQ_ENTRY(shared_driver) next;
114 /* List of external loadable drivers */
115 static struct shared_driver_list solib_list =
116 TAILQ_HEAD_INITIALIZER(solib_list);
118 /* Default path of external loadable drivers */
119 static const char *default_solib_dir = RTE_EAL_PMD_PATH;
122 * Stringified version of solib path used by dpdk-pmdinfo.py
123 * Note: PLEASE DO NOT ALTER THIS without making a corresponding
124 * change to usertools/dpdk-pmdinfo.py
126 static const char dpdk_solib_path[] __attribute__((used)) =
127 "DPDK_PLUGIN_PATH=" RTE_EAL_PMD_PATH;
129 TAILQ_HEAD(device_option_list, device_option);
131 struct device_option {
132 TAILQ_ENTRY(device_option) next;
134 enum rte_devtype type;
138 static struct device_option_list devopt_list =
139 TAILQ_HEAD_INITIALIZER(devopt_list);
141 static int master_lcore_parsed;
142 static int mem_parsed;
143 static int core_parsed;
146 eal_option_device_add(enum rte_devtype type, const char *optarg)
148 struct device_option *devopt;
152 optlen = strlen(optarg) + 1;
153 devopt = calloc(1, sizeof(*devopt) + optlen);
154 if (devopt == NULL) {
155 RTE_LOG(ERR, EAL, "Unable to allocate device option\n");
160 ret = snprintf(devopt->arg, optlen, "%s", optarg);
162 RTE_LOG(ERR, EAL, "Unable to copy device option\n");
166 TAILQ_INSERT_TAIL(&devopt_list, devopt, next);
171 eal_option_device_parse(void)
173 struct device_option *devopt;
177 TAILQ_FOREACH_SAFE(devopt, &devopt_list, next, tmp) {
179 ret = rte_eal_devargs_add(devopt->type, devopt->arg);
181 RTE_LOG(ERR, EAL, "Unable to parse device '%s'\n",
184 TAILQ_REMOVE(&devopt_list, devopt, next);
191 eal_reset_internal_config(struct internal_config *internal_cfg)
195 internal_cfg->memory = 0;
196 internal_cfg->force_nrank = 0;
197 internal_cfg->force_nchannel = 0;
198 internal_cfg->hugefile_prefix = HUGEFILE_PREFIX_DEFAULT;
199 internal_cfg->hugepage_dir = NULL;
200 internal_cfg->force_sockets = 0;
201 /* zero out the NUMA config */
202 for (i = 0; i < RTE_MAX_NUMA_NODES; i++)
203 internal_cfg->socket_mem[i] = 0;
204 /* zero out hugedir descriptors */
205 for (i = 0; i < MAX_HUGEPAGE_SIZES; i++)
206 internal_cfg->hugepage_info[i].lock_descriptor = -1;
207 internal_cfg->base_virtaddr = 0;
209 internal_cfg->syslog_facility = LOG_DAEMON;
211 /* if set to NONE, interrupt mode is determined automatically */
212 internal_cfg->vfio_intr_mode = RTE_INTR_MODE_NONE;
214 #ifdef RTE_LIBEAL_USE_HPET
215 internal_cfg->no_hpet = 0;
217 internal_cfg->no_hpet = 1;
219 internal_cfg->vmware_tsc_map = 0;
220 internal_cfg->create_uio_dev = 0;
221 internal_cfg->mbuf_pool_ops_name = RTE_MBUF_DEFAULT_MEMPOOL_OPS;
225 eal_plugin_add(const char *path)
227 struct shared_driver *solib;
229 solib = malloc(sizeof(*solib));
231 RTE_LOG(ERR, EAL, "malloc(solib) failed\n");
234 memset(solib, 0, sizeof(*solib));
235 strncpy(solib->name, path, PATH_MAX-1);
236 solib->name[PATH_MAX-1] = 0;
237 TAILQ_INSERT_TAIL(&solib_list, solib, next);
243 eal_plugindir_init(const char *path)
246 struct dirent *dent = NULL;
247 char sopath[PATH_MAX];
249 if (path == NULL || *path == '\0')
254 RTE_LOG(ERR, EAL, "failed to open directory %s: %s\n",
255 path, strerror(errno));
259 while ((dent = readdir(d)) != NULL) {
262 snprintf(sopath, PATH_MAX-1, "%s/%s", path, dent->d_name);
263 sopath[PATH_MAX-1] = 0;
265 if (!(stat(sopath, &sb) == 0 && S_ISREG(sb.st_mode)))
268 if (eal_plugin_add(sopath) == -1)
273 /* XXX this ignores failures from readdir() itself */
274 return (dent == NULL) ? 0 : -1;
278 eal_plugins_init(void)
280 struct shared_driver *solib = NULL;
282 if (*default_solib_dir != '\0')
283 eal_plugin_add(default_solib_dir);
285 TAILQ_FOREACH(solib, &solib_list, next) {
288 if (stat(solib->name, &sb) == 0 && S_ISDIR(sb.st_mode)) {
289 if (eal_plugindir_init(solib->name) == -1) {
291 "Cannot init plugin directory %s\n",
296 RTE_LOG(DEBUG, EAL, "open shared lib %s\n",
298 solib->lib_handle = dlopen(solib->name, RTLD_NOW);
299 if (solib->lib_handle == NULL) {
300 RTE_LOG(ERR, EAL, "%s\n", dlerror());
310 * Parse the coremask given as argument (hexadecimal string) and fill
311 * the global configuration (core role and core count) with the parsed
314 static int xdigit2val(unsigned char c)
328 eal_parse_service_coremask(const char *coremask)
330 struct rte_config *cfg = rte_eal_get_configuration();
332 unsigned int count = 0;
336 if (coremask == NULL)
338 /* Remove all blank characters ahead and after .
339 * Remove 0x/0X if exists.
341 while (isblank(*coremask))
343 if (coremask[0] == '0' && ((coremask[1] == 'x')
344 || (coremask[1] == 'X')))
346 i = strlen(coremask);
347 while ((i > 0) && isblank(coremask[i - 1]))
353 for (i = i - 1; i >= 0 && idx < RTE_MAX_LCORE; i--) {
355 if (isxdigit(c) == 0) {
356 /* invalid characters */
360 for (j = 0; j < BITS_PER_HEX && idx < RTE_MAX_LCORE;
362 if ((1 << j) & val) {
363 /* handle master lcore already parsed */
364 uint32_t lcore = idx;
365 if (master_lcore_parsed &&
366 cfg->master_lcore == lcore) {
368 "Error: lcore %u is master lcore, cannot use as service core\n",
373 if (!lcore_config[idx].detected) {
375 "lcore %u unavailable\n", idx);
378 lcore_config[idx].core_role = ROLE_SERVICE;
385 if (coremask[i] != '0')
388 for (; idx < RTE_MAX_LCORE; idx++)
389 lcore_config[idx].core_index = -1;
394 cfg->service_lcore_count = count;
399 eal_parse_coremask(const char *coremask)
401 struct rte_config *cfg = rte_eal_get_configuration();
407 if (coremask == NULL)
409 /* Remove all blank characters ahead and after .
410 * Remove 0x/0X if exists.
412 while (isblank(*coremask))
414 if (coremask[0] == '0' && ((coremask[1] == 'x')
415 || (coremask[1] == 'X')))
417 i = strlen(coremask);
418 while ((i > 0) && isblank(coremask[i - 1]))
423 for (i = i - 1; i >= 0 && idx < RTE_MAX_LCORE; i--) {
425 if (isxdigit(c) == 0) {
426 /* invalid characters */
430 for (j = 0; j < BITS_PER_HEX && idx < RTE_MAX_LCORE; j++, idx++)
432 if ((1 << j) & val) {
433 if (!lcore_config[idx].detected) {
434 RTE_LOG(ERR, EAL, "lcore %u "
435 "unavailable\n", idx);
438 cfg->lcore_role[idx] = ROLE_RTE;
439 lcore_config[idx].core_index = count;
442 cfg->lcore_role[idx] = ROLE_OFF;
443 lcore_config[idx].core_index = -1;
448 if (coremask[i] != '0')
450 for (; idx < RTE_MAX_LCORE; idx++) {
451 cfg->lcore_role[idx] = ROLE_OFF;
452 lcore_config[idx].core_index = -1;
456 /* Update the count of enabled logical cores of the EAL configuration */
457 cfg->lcore_count = count;
462 eal_parse_service_corelist(const char *corelist)
464 struct rte_config *cfg = rte_eal_get_configuration();
470 if (corelist == NULL)
473 /* Remove all blank characters ahead and after */
474 while (isblank(*corelist))
476 i = strlen(corelist);
477 while ((i > 0) && isblank(corelist[i - 1]))
480 /* Get list of cores */
483 while (isblank(*corelist))
485 if (*corelist == '\0')
488 idx = strtoul(corelist, &end, 10);
489 if (errno || end == NULL)
491 while (isblank(*end))
495 } else if ((*end == ',') || (*end == '\0')) {
497 if (min == RTE_MAX_LCORE)
499 for (idx = min; idx <= max; idx++) {
500 if (cfg->lcore_role[idx] != ROLE_SERVICE) {
501 /* handle master lcore already parsed */
502 uint32_t lcore = idx;
503 if (cfg->master_lcore == lcore &&
504 master_lcore_parsed) {
506 "Error: lcore %u is master lcore, cannot use as service core\n",
510 lcore_config[idx].core_role =
519 } while (*end != '\0');
528 eal_parse_corelist(const char *corelist)
530 struct rte_config *cfg = rte_eal_get_configuration();
536 if (corelist == NULL)
539 /* Remove all blank characters ahead and after */
540 while (isblank(*corelist))
542 i = strlen(corelist);
543 while ((i > 0) && isblank(corelist[i - 1]))
547 for (idx = 0; idx < RTE_MAX_LCORE; idx++) {
548 cfg->lcore_role[idx] = ROLE_OFF;
549 lcore_config[idx].core_index = -1;
552 /* Get list of cores */
555 while (isblank(*corelist))
557 if (*corelist == '\0')
560 idx = strtoul(corelist, &end, 10);
561 if (errno || end == NULL)
563 while (isblank(*end))
567 } else if ((*end == ',') || (*end == '\0')) {
569 if (min == RTE_MAX_LCORE)
571 for (idx = min; idx <= max; idx++) {
572 if (cfg->lcore_role[idx] != ROLE_RTE) {
573 cfg->lcore_role[idx] = ROLE_RTE;
574 lcore_config[idx].core_index = count;
582 } while (*end != '\0');
587 /* Update the count of enabled logical cores of the EAL configuration */
588 cfg->lcore_count = count;
593 /* Changes the lcore id of the master thread */
595 eal_parse_master_lcore(const char *arg)
598 struct rte_config *cfg = rte_eal_get_configuration();
601 cfg->master_lcore = (uint32_t) strtol(arg, &parsing_end, 0);
602 if (errno || parsing_end[0] != 0)
604 if (cfg->master_lcore >= RTE_MAX_LCORE)
606 master_lcore_parsed = 1;
608 /* ensure master core is not used as service core */
609 if (lcore_config[cfg->master_lcore].core_role == ROLE_SERVICE) {
610 RTE_LOG(ERR, EAL, "Error: Master lcore is used as a service core.\n");
618 * Parse elem, the elem could be single number/range or '(' ')' group
619 * 1) A single number elem, it's just a simple digit. e.g. 9
620 * 2) A single range elem, two digits with a '-' between. e.g. 2-6
621 * 3) A group elem, combines multiple 1) or 2) with '( )'. e.g (0,2-4,6)
622 * Within group elem, '-' used for a range separator;
623 * ',' used for a single number.
626 eal_parse_set(const char *input, uint16_t set[], unsigned num)
629 const char *str = input;
633 memset(set, 0, num * sizeof(uint16_t));
635 while (isblank(*str))
638 /* only digit or left bracket is qualify for start point */
639 if ((!isdigit(*str) && *str != '(') || *str == '\0')
642 /* process single number or single range of number */
645 idx = strtoul(str, &end, 10);
646 if (errno || end == NULL || idx >= num)
649 while (isblank(*end))
655 /* process single <number>-<number> */
657 while (isblank(*end))
663 idx = strtoul(end, &end, 10);
664 if (errno || end == NULL || idx >= num)
667 while (isblank(*end))
669 if (*end != ',' && *end != '\0')
673 if (*end != ',' && *end != '\0' &&
677 for (idx = RTE_MIN(min, max);
678 idx <= RTE_MAX(min, max); idx++)
685 /* process set within bracket */
687 while (isblank(*str))
695 /* go ahead to the first digit */
696 while (isblank(*str))
701 /* get the digit value */
703 idx = strtoul(str, &end, 10);
704 if (errno || end == NULL || idx >= num)
707 /* go ahead to separator '-',',' and ')' */
708 while (isblank(*end))
711 if (min == RTE_MAX_LCORE)
713 else /* avoid continuous '-' */
715 } else if ((*end == ',') || (*end == ')')) {
717 if (min == RTE_MAX_LCORE)
719 for (idx = RTE_MIN(min, max);
720 idx <= RTE_MAX(min, max); idx++)
728 } while (*end != '\0' && *end != ')');
731 * to avoid failure that tail blank makes end character check fail
732 * in eal_parse_lcores( )
734 while (isblank(*str))
740 /* convert from set array to cpuset bitmap */
742 convert_to_cpuset(rte_cpuset_t *cpusetp,
743 uint16_t *set, unsigned num)
749 for (idx = 0; idx < num; idx++) {
753 if (!lcore_config[idx].detected) {
754 RTE_LOG(ERR, EAL, "core %u "
755 "unavailable\n", idx);
759 CPU_SET(idx, cpusetp);
766 * The format pattern: --lcores='<lcores[@cpus]>[<,lcores[@cpus]>...]'
767 * lcores, cpus could be a single digit/range or a group.
768 * '(' and ')' are necessary if it's a group.
769 * If not supply '@cpus', the value of cpus uses the same as lcores.
770 * e.g. '1,2@(5-7),(3-5)@(0,2),(0,6),7-8' means start 9 EAL thread as below
771 * lcore 0 runs on cpuset 0x41 (cpu 0,6)
772 * lcore 1 runs on cpuset 0x2 (cpu 1)
773 * lcore 2 runs on cpuset 0xe0 (cpu 5,6,7)
774 * lcore 3,4,5 runs on cpuset 0x5 (cpu 0,2)
775 * lcore 6 runs on cpuset 0x41 (cpu 0,6)
776 * lcore 7 runs on cpuset 0x80 (cpu 7)
777 * lcore 8 runs on cpuset 0x100 (cpu 8)
780 eal_parse_lcores(const char *lcores)
782 struct rte_config *cfg = rte_eal_get_configuration();
783 static uint16_t set[RTE_MAX_LCORE];
786 const char *lcore_start = NULL;
787 const char *end = NULL;
796 /* Remove all blank characters ahead and after */
797 while (isblank(*lcores))
802 /* Reset lcore config */
803 for (idx = 0; idx < RTE_MAX_LCORE; idx++) {
804 cfg->lcore_role[idx] = ROLE_OFF;
805 lcore_config[idx].core_index = -1;
806 CPU_ZERO(&lcore_config[idx].cpuset);
809 /* Get list of cores */
811 while (isblank(*lcores))
818 /* record lcore_set start point */
819 lcore_start = lcores;
821 /* go across a complete bracket */
822 if (*lcore_start == '(') {
823 lcores += strcspn(lcores, ")");
824 if (*lcores++ == '\0')
828 /* scan the separator '@', ','(next) or '\0'(finish) */
829 lcores += strcspn(lcores, "@,");
831 if (*lcores == '@') {
832 /* explicit assign cpu_set */
833 offset = eal_parse_set(lcores + 1, set, RTE_DIM(set));
837 /* prepare cpu_set and update the end cursor */
838 if (0 > convert_to_cpuset(&cpuset,
841 end = lcores + 1 + offset;
842 } else { /* ',' or '\0' */
843 /* haven't given cpu_set, current loop done */
846 /* go back to check <number>-<number> */
847 offset = strcspn(lcore_start, "(-");
848 if (offset < (end - lcore_start) &&
849 *(lcore_start + offset) != '(')
853 if (*end != ',' && *end != '\0')
856 /* parse lcore_set from start point */
857 if (0 > eal_parse_set(lcore_start, set, RTE_DIM(set)))
860 /* without '@', by default using lcore_set as cpu_set */
861 if (*lcores != '@' &&
862 0 > convert_to_cpuset(&cpuset, set, RTE_DIM(set)))
865 /* start to update lcore_set */
866 for (idx = 0; idx < RTE_MAX_LCORE; idx++) {
870 if (cfg->lcore_role[idx] != ROLE_RTE) {
871 lcore_config[idx].core_index = count;
872 cfg->lcore_role[idx] = ROLE_RTE;
878 CPU_SET(idx, &cpuset);
880 rte_memcpy(&lcore_config[idx].cpuset, &cpuset,
881 sizeof(rte_cpuset_t));
885 } while (*end != '\0');
890 cfg->lcore_count = count;
899 eal_parse_syslog(const char *facility, struct internal_config *conf)
906 { "auth", LOG_AUTH },
907 { "cron", LOG_CRON },
908 { "daemon", LOG_DAEMON },
910 { "kern", LOG_KERN },
912 { "mail", LOG_MAIL },
913 { "news", LOG_NEWS },
914 { "syslog", LOG_SYSLOG },
915 { "user", LOG_USER },
916 { "uucp", LOG_UUCP },
917 { "local0", LOG_LOCAL0 },
918 { "local1", LOG_LOCAL1 },
919 { "local2", LOG_LOCAL2 },
920 { "local3", LOG_LOCAL3 },
921 { "local4", LOG_LOCAL4 },
922 { "local5", LOG_LOCAL5 },
923 { "local6", LOG_LOCAL6 },
924 { "local7", LOG_LOCAL7 },
928 for (i = 0; map[i].name; i++) {
929 if (!strcmp(facility, map[i].name)) {
930 conf->syslog_facility = map[i].value;
938 eal_parse_log_level(const char *arg)
940 char *end, *str, *type, *level;
947 if (strchr(str, ',') == NULL) {
951 type = strsep(&str, ",");
952 level = strsep(&str, ",");
956 tmp = strtoul(level, &end, 0);
958 /* check for errors */
959 if ((errno != 0) || (level[0] == '\0') ||
960 end == NULL || (*end != '\0'))
963 /* log_level is a uint32_t */
964 if (tmp >= UINT32_MAX)
968 rte_log_set_global_level(tmp);
969 } else if (rte_log_set_level_regexp(type, tmp) < 0) {
970 printf("cannot set log level %s,%lu\n",
983 static enum rte_proc_type_t
984 eal_parse_proc_type(const char *arg)
986 if (strncasecmp(arg, "primary", sizeof("primary")) == 0)
987 return RTE_PROC_PRIMARY;
988 if (strncasecmp(arg, "secondary", sizeof("secondary")) == 0)
989 return RTE_PROC_SECONDARY;
990 if (strncasecmp(arg, "auto", sizeof("auto")) == 0)
991 return RTE_PROC_AUTO;
993 return RTE_PROC_INVALID;
997 eal_parse_common_option(int opt, const char *optarg,
998 struct internal_config *conf)
1008 if (eal_option_device_add(RTE_DEVTYPE_BLACKLISTED_PCI,
1018 if (eal_option_device_add(RTE_DEVTYPE_WHITELISTED_PCI,
1026 if (eal_parse_coremask(optarg) < 0) {
1027 RTE_LOG(ERR, EAL, "invalid coremask\n");
1034 if (eal_parse_corelist(optarg) < 0) {
1035 RTE_LOG(ERR, EAL, "invalid core list\n");
1040 /* service coremask */
1042 if (eal_parse_service_coremask(optarg) < 0) {
1043 RTE_LOG(ERR, EAL, "invalid service coremask\n");
1047 /* service corelist */
1049 if (eal_parse_service_corelist(optarg) < 0) {
1050 RTE_LOG(ERR, EAL, "invalid service core list\n");
1054 /* size of memory */
1056 conf->memory = atoi(optarg);
1057 conf->memory *= 1024ULL;
1058 conf->memory *= 1024ULL;
1061 /* force number of channels */
1063 conf->force_nchannel = atoi(optarg);
1064 if (conf->force_nchannel == 0) {
1065 RTE_LOG(ERR, EAL, "invalid channel number\n");
1069 /* force number of ranks */
1071 conf->force_nrank = atoi(optarg);
1072 if (conf->force_nrank == 0 ||
1073 conf->force_nrank > 16) {
1074 RTE_LOG(ERR, EAL, "invalid rank number\n");
1078 /* force loading of external driver */
1080 if (eal_plugin_add(optarg) == -1)
1084 /* since message is explicitly requested by user, we
1085 * write message at highest log level so it can always
1087 * even if info or warning messages are disabled */
1088 RTE_LOG(CRIT, EAL, "RTE Version: '%s'\n", rte_version());
1092 case OPT_HUGE_UNLINK_NUM:
1093 conf->hugepage_unlink = 1;
1096 case OPT_NO_HUGE_NUM:
1097 conf->no_hugetlbfs = 1;
1100 case OPT_NO_PCI_NUM:
1104 case OPT_NO_HPET_NUM:
1108 case OPT_VMWARE_TSC_MAP_NUM:
1109 conf->vmware_tsc_map = 1;
1112 case OPT_NO_SHCONF_NUM:
1113 conf->no_shconf = 1;
1116 case OPT_PROC_TYPE_NUM:
1117 conf->process_type = eal_parse_proc_type(optarg);
1120 case OPT_MASTER_LCORE_NUM:
1121 if (eal_parse_master_lcore(optarg) < 0) {
1122 RTE_LOG(ERR, EAL, "invalid parameter for --"
1123 OPT_MASTER_LCORE "\n");
1129 if (eal_option_device_add(RTE_DEVTYPE_VIRTUAL,
1135 case OPT_SYSLOG_NUM:
1136 if (eal_parse_syslog(optarg, conf) < 0) {
1137 RTE_LOG(ERR, EAL, "invalid parameters for --"
1143 case OPT_LOG_LEVEL_NUM: {
1144 if (eal_parse_log_level(optarg) < 0) {
1146 "invalid parameters for --"
1147 OPT_LOG_LEVEL "\n");
1152 case OPT_LCORES_NUM:
1153 if (eal_parse_lcores(optarg) < 0) {
1154 RTE_LOG(ERR, EAL, "invalid parameter for --"
1161 /* don't know what to do, leave this to caller */
1169 RTE_LOG(ERR, EAL, "Options blacklist (-b) and whitelist (-w) "
1170 "cannot be used at the same time\n");
1175 eal_auto_detect_cores(struct rte_config *cfg)
1177 unsigned int lcore_id;
1178 unsigned int removed = 0;
1179 rte_cpuset_t affinity_set;
1180 pthread_t tid = pthread_self();
1182 if (pthread_getaffinity_np(tid, sizeof(rte_cpuset_t),
1184 CPU_ZERO(&affinity_set);
1186 for (lcore_id = 0; lcore_id < RTE_MAX_LCORE; lcore_id++) {
1187 if (cfg->lcore_role[lcore_id] == ROLE_RTE &&
1188 !CPU_ISSET(lcore_id, &affinity_set)) {
1189 cfg->lcore_role[lcore_id] = ROLE_OFF;
1194 cfg->lcore_count -= removed;
1198 eal_adjust_config(struct internal_config *internal_cfg)
1201 struct rte_config *cfg = rte_eal_get_configuration();
1204 eal_auto_detect_cores(cfg);
1206 if (internal_config.process_type == RTE_PROC_AUTO)
1207 internal_config.process_type = eal_proc_type_detect();
1209 /* default master lcore is the first one */
1210 if (!master_lcore_parsed) {
1211 cfg->master_lcore = rte_get_next_lcore(-1, 0, 0);
1212 lcore_config[cfg->master_lcore].core_role = ROLE_RTE;
1215 /* if no memory amounts were requested, this will result in 0 and
1216 * will be overridden later, right after eal_hugepage_info_init() */
1217 for (i = 0; i < RTE_MAX_NUMA_NODES; i++)
1218 internal_cfg->memory += internal_cfg->socket_mem[i];
1224 eal_check_common_options(struct internal_config *internal_cfg)
1226 struct rte_config *cfg = rte_eal_get_configuration();
1228 if (cfg->lcore_role[cfg->master_lcore] != ROLE_RTE) {
1229 RTE_LOG(ERR, EAL, "Master lcore is not enabled for DPDK\n");
1233 if (internal_cfg->process_type == RTE_PROC_INVALID) {
1234 RTE_LOG(ERR, EAL, "Invalid process type specified\n");
1237 if (index(internal_cfg->hugefile_prefix, '%') != NULL) {
1238 RTE_LOG(ERR, EAL, "Invalid char, '%%', in --"OPT_FILE_PREFIX" "
1242 if (mem_parsed && internal_cfg->force_sockets == 1) {
1243 RTE_LOG(ERR, EAL, "Options -m and --"OPT_SOCKET_MEM" cannot "
1244 "be specified at the same time\n");
1247 if (internal_cfg->no_hugetlbfs && internal_cfg->force_sockets == 1) {
1248 RTE_LOG(ERR, EAL, "Option --"OPT_SOCKET_MEM" cannot "
1249 "be specified together with --"OPT_NO_HUGE"\n");
1253 if (internal_cfg->no_hugetlbfs && internal_cfg->hugepage_unlink) {
1254 RTE_LOG(ERR, EAL, "Option --"OPT_HUGE_UNLINK" cannot "
1255 "be specified together with --"OPT_NO_HUGE"\n");
1263 eal_common_usage(void)
1265 printf("[options]\n\n"
1266 "EAL common options:\n"
1267 " -c COREMASK Hexadecimal bitmask of cores to run on\n"
1268 " -l CORELIST List of cores to run on\n"
1269 " The argument format is <c1>[-c2][,c3[-c4],...]\n"
1270 " where c1, c2, etc are core indexes between 0 and %d\n"
1271 " --"OPT_LCORES" COREMAP Map lcore set to physical cpu set\n"
1272 " The argument format is\n"
1273 " '<lcores[@cpus]>[<,lcores[@cpus]>...]'\n"
1274 " lcores and cpus list are grouped by '(' and ')'\n"
1275 " Within the group, '-' is used for range separator,\n"
1276 " ',' is used for single number separator.\n"
1277 " '( )' can be omitted for single element group,\n"
1278 " '@' can be omitted if cpus and lcores have the same value\n"
1279 " -s SERVICE COREMASK Hexadecimal bitmask of cores to be used as service cores\n"
1280 " --"OPT_MASTER_LCORE" ID Core ID that is used as master\n"
1281 " --"OPT_MBUF_POOL_OPS_NAME" Pool ops name for mbuf to use\n"
1282 " -n CHANNELS Number of memory channels\n"
1283 " -m MB Memory to allocate (see also --"OPT_SOCKET_MEM")\n"
1284 " -r RANKS Force number of memory ranks (don't detect)\n"
1285 " -b, --"OPT_PCI_BLACKLIST" Add a PCI device in black list.\n"
1286 " Prevent EAL from using this PCI device. The argument\n"
1287 " format is <domain:bus:devid.func>.\n"
1288 " -w, --"OPT_PCI_WHITELIST" Add a PCI device in white list.\n"
1289 " Only use the specified PCI devices. The argument format\n"
1290 " is <[domain:]bus:devid.func>. This option can be present\n"
1291 " several times (once per device).\n"
1292 " [NOTE: PCI whitelist cannot be used with -b option]\n"
1293 " --"OPT_VDEV" Add a virtual device.\n"
1294 " The argument format is <driver><id>[,key=val,...]\n"
1295 " (ex: --vdev=net_pcap0,iface=eth2).\n"
1296 " -d LIB.so|DIR Add a driver or driver directory\n"
1297 " (can be used multiple times)\n"
1298 " --"OPT_VMWARE_TSC_MAP" Use VMware TSC map instead of native RDTSC\n"
1299 " --"OPT_PROC_TYPE" Type of this process (primary|secondary|auto)\n"
1300 " --"OPT_SYSLOG" Set syslog facility\n"
1301 " --"OPT_LOG_LEVEL"=<int> Set global log level\n"
1302 " --"OPT_LOG_LEVEL"=<type-regexp>,<int>\n"
1303 " Set specific log level\n"
1304 " -v Display version information on startup\n"
1305 " -h, --help This help\n"
1306 "\nEAL options for DEBUG use only:\n"
1307 " --"OPT_HUGE_UNLINK" Unlink hugepage files after init\n"
1308 " --"OPT_NO_HUGE" Use malloc instead of hugetlbfs\n"
1309 " --"OPT_NO_PCI" Disable PCI\n"
1310 " --"OPT_NO_HPET" Disable HPET\n"
1311 " --"OPT_NO_SHCONF" No shared config (mmap'd files)\n"
1312 "\n", RTE_MAX_LCORE);