4 * Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
5 * Copyright(c) 2014 6WIND S.A.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
46 #include <rte_lcore.h>
47 #include <rte_version.h>
48 #include <rte_devargs.h>
49 #include <rte_memcpy.h>
51 #include "eal_internal_cfg.h"
52 #include "eal_options.h"
53 #include "eal_filesystem.h"
55 #define BITS_PER_HEX 4
59 "b:" /* pci-blacklist */
64 "m:" /* memory size */
65 "n:" /* memory channels */
66 "r:" /* memory ranks */
68 "w:" /* pci-whitelist */
72 eal_long_options[] = {
73 {OPT_BASE_VIRTADDR, 1, NULL, OPT_BASE_VIRTADDR_NUM },
74 {OPT_CREATE_UIO_DEV, 0, NULL, OPT_CREATE_UIO_DEV_NUM },
75 {OPT_FILE_PREFIX, 1, NULL, OPT_FILE_PREFIX_NUM },
76 {OPT_HELP, 0, NULL, OPT_HELP_NUM },
77 {OPT_HUGE_DIR, 1, NULL, OPT_HUGE_DIR_NUM },
78 {OPT_HUGE_UNLINK, 0, NULL, OPT_HUGE_UNLINK_NUM },
79 {OPT_LCORES, 1, NULL, OPT_LCORES_NUM },
80 {OPT_LOG_LEVEL, 1, NULL, OPT_LOG_LEVEL_NUM },
81 {OPT_MASTER_LCORE, 1, NULL, OPT_MASTER_LCORE_NUM },
82 {OPT_NO_HPET, 0, NULL, OPT_NO_HPET_NUM },
83 {OPT_NO_HUGE, 0, NULL, OPT_NO_HUGE_NUM },
84 {OPT_NO_PCI, 0, NULL, OPT_NO_PCI_NUM },
85 {OPT_NO_SHCONF, 0, NULL, OPT_NO_SHCONF_NUM },
86 {OPT_PCI_BLACKLIST, 1, NULL, OPT_PCI_BLACKLIST_NUM },
87 {OPT_PCI_WHITELIST, 1, NULL, OPT_PCI_WHITELIST_NUM },
88 {OPT_PROC_TYPE, 1, NULL, OPT_PROC_TYPE_NUM },
89 {OPT_SOCKET_MEM, 1, NULL, OPT_SOCKET_MEM_NUM },
90 {OPT_SYSLOG, 1, NULL, OPT_SYSLOG_NUM },
91 {OPT_VDEV, 1, NULL, OPT_VDEV_NUM },
92 {OPT_VFIO_INTR, 1, NULL, OPT_VFIO_INTR_NUM },
93 {OPT_VMWARE_TSC_MAP, 0, NULL, OPT_VMWARE_TSC_MAP_NUM },
94 {OPT_XEN_DOM0, 0, NULL, OPT_XEN_DOM0_NUM },
98 TAILQ_HEAD(shared_driver_list, shared_driver);
100 /* Definition for shared object drivers. */
101 struct shared_driver {
102 TAILQ_ENTRY(shared_driver) next;
108 /* List of external loadable drivers */
109 static struct shared_driver_list solib_list =
110 TAILQ_HEAD_INITIALIZER(solib_list);
112 static int master_lcore_parsed;
113 static int mem_parsed;
116 eal_reset_internal_config(struct internal_config *internal_cfg)
120 internal_cfg->memory = 0;
121 internal_cfg->force_nrank = 0;
122 internal_cfg->force_nchannel = 0;
123 internal_cfg->hugefile_prefix = HUGEFILE_PREFIX_DEFAULT;
124 internal_cfg->hugepage_dir = NULL;
125 internal_cfg->force_sockets = 0;
126 /* zero out the NUMA config */
127 for (i = 0; i < RTE_MAX_NUMA_NODES; i++)
128 internal_cfg->socket_mem[i] = 0;
129 /* zero out hugedir descriptors */
130 for (i = 0; i < MAX_HUGEPAGE_SIZES; i++)
131 internal_cfg->hugepage_info[i].lock_descriptor = -1;
132 internal_cfg->base_virtaddr = 0;
134 internal_cfg->syslog_facility = LOG_DAEMON;
135 /* default value from build option */
136 internal_cfg->log_level = RTE_LOG_LEVEL;
138 internal_cfg->xen_dom0_support = 0;
140 /* if set to NONE, interrupt mode is determined automatically */
141 internal_cfg->vfio_intr_mode = RTE_INTR_MODE_NONE;
143 #ifdef RTE_LIBEAL_USE_HPET
144 internal_cfg->no_hpet = 0;
146 internal_cfg->no_hpet = 1;
148 internal_cfg->vmware_tsc_map = 0;
149 internal_cfg->create_uio_dev = 0;
153 eal_plugin_add(const char *path)
155 struct shared_driver *solib;
157 solib = malloc(sizeof(*solib));
159 RTE_LOG(ERR, EAL, "malloc(solib) failed\n");
162 memset(solib, 0, sizeof(*solib));
163 strncpy(solib->name, path, PATH_MAX-1);
164 solib->name[PATH_MAX-1] = 0;
165 TAILQ_INSERT_TAIL(&solib_list, solib, next);
171 eal_plugins_init(void)
173 struct shared_driver *solib = NULL;
175 TAILQ_FOREACH(solib, &solib_list, next) {
176 RTE_LOG(DEBUG, EAL, "open shared lib %s\n", solib->name);
177 solib->lib_handle = dlopen(solib->name, RTLD_NOW);
178 if (solib->lib_handle == NULL) {
179 RTE_LOG(ERR, EAL, "%s\n", dlerror());
187 * Parse the coremask given as argument (hexadecimal string) and fill
188 * the global configuration (core role and core count) with the parsed
191 static int xdigit2val(unsigned char c)
205 eal_parse_coremask(const char *coremask)
207 struct rte_config *cfg = rte_eal_get_configuration();
213 if (coremask == NULL)
215 /* Remove all blank characters ahead and after .
216 * Remove 0x/0X if exists.
218 while (isblank(*coremask))
220 if (coremask[0] == '0' && ((coremask[1] == 'x')
221 || (coremask[1] == 'X')))
223 i = strlen(coremask);
224 while ((i > 0) && isblank(coremask[i - 1]))
229 for (i = i - 1; i >= 0 && idx < RTE_MAX_LCORE; i--) {
231 if (isxdigit(c) == 0) {
232 /* invalid characters */
236 for (j = 0; j < BITS_PER_HEX && idx < RTE_MAX_LCORE; j++, idx++)
238 if ((1 << j) & val) {
239 if (!lcore_config[idx].detected) {
240 RTE_LOG(ERR, EAL, "lcore %u "
241 "unavailable\n", idx);
244 cfg->lcore_role[idx] = ROLE_RTE;
245 lcore_config[idx].core_index = count;
248 cfg->lcore_role[idx] = ROLE_OFF;
249 lcore_config[idx].core_index = -1;
254 if (coremask[i] != '0')
256 for (; idx < RTE_MAX_LCORE; idx++) {
257 cfg->lcore_role[idx] = ROLE_OFF;
258 lcore_config[idx].core_index = -1;
262 /* Update the count of enabled logical cores of the EAL configuration */
263 cfg->lcore_count = count;
268 eal_parse_corelist(const char *corelist)
270 struct rte_config *cfg = rte_eal_get_configuration();
276 if (corelist == NULL)
279 /* Remove all blank characters ahead and after */
280 while (isblank(*corelist))
282 i = strlen(corelist);
283 while ((i > 0) && isblank(corelist[i - 1]))
287 for (idx = 0; idx < RTE_MAX_LCORE; idx++) {
288 cfg->lcore_role[idx] = ROLE_OFF;
289 lcore_config[idx].core_index = -1;
292 /* Get list of cores */
295 while (isblank(*corelist))
297 if (*corelist == '\0')
300 idx = strtoul(corelist, &end, 10);
301 if (errno || end == NULL)
303 while (isblank(*end))
307 } else if ((*end == ',') || (*end == '\0')) {
309 if (min == RTE_MAX_LCORE)
311 for (idx = min; idx <= max; idx++) {
312 if (cfg->lcore_role[idx] != ROLE_RTE) {
313 cfg->lcore_role[idx] = ROLE_RTE;
314 lcore_config[idx].core_index = count;
322 } while (*end != '\0');
327 /* Update the count of enabled logical cores of the EAL configuration */
328 cfg->lcore_count = count;
333 /* Changes the lcore id of the master thread */
335 eal_parse_master_lcore(const char *arg)
338 struct rte_config *cfg = rte_eal_get_configuration();
341 cfg->master_lcore = (uint32_t) strtol(arg, &parsing_end, 0);
342 if (errno || parsing_end[0] != 0)
344 if (cfg->master_lcore >= RTE_MAX_LCORE)
346 master_lcore_parsed = 1;
351 * Parse elem, the elem could be single number/range or '(' ')' group
352 * 1) A single number elem, it's just a simple digit. e.g. 9
353 * 2) A single range elem, two digits with a '-' between. e.g. 2-6
354 * 3) A group elem, combines multiple 1) or 2) with '( )'. e.g (0,2-4,6)
355 * Within group elem, '-' used for a range separator;
356 * ',' used for a single number.
359 eal_parse_set(const char *input, uint16_t set[], unsigned num)
362 const char *str = input;
366 memset(set, 0, num * sizeof(uint16_t));
368 while (isblank(*str))
371 /* only digit or left bracket is qualify for start point */
372 if ((!isdigit(*str) && *str != '(') || *str == '\0')
375 /* process single number or single range of number */
378 idx = strtoul(str, &end, 10);
379 if (errno || end == NULL || idx >= num)
382 while (isblank(*end))
388 /* process single <number>-<number> */
390 while (isblank(*end))
396 idx = strtoul(end, &end, 10);
397 if (errno || end == NULL || idx >= num)
400 while (isblank(*end))
402 if (*end != ',' && *end != '\0')
406 if (*end != ',' && *end != '\0' &&
410 for (idx = RTE_MIN(min, max);
411 idx <= RTE_MAX(min, max); idx++)
418 /* process set within bracket */
420 while (isblank(*str))
428 /* go ahead to the first digit */
429 while (isblank(*str))
434 /* get the digit value */
436 idx = strtoul(str, &end, 10);
437 if (errno || end == NULL || idx >= num)
440 /* go ahead to separator '-',',' and ')' */
441 while (isblank(*end))
444 if (min == RTE_MAX_LCORE)
446 else /* avoid continuous '-' */
448 } else if ((*end == ',') || (*end == ')')) {
450 if (min == RTE_MAX_LCORE)
452 for (idx = RTE_MIN(min, max);
453 idx <= RTE_MAX(min, max); idx++)
461 } while (*end != '\0' && *end != ')');
466 /* convert from set array to cpuset bitmap */
468 convert_to_cpuset(rte_cpuset_t *cpusetp,
469 uint16_t *set, unsigned num)
475 for (idx = 0; idx < num; idx++) {
479 if (!lcore_config[idx].detected) {
480 RTE_LOG(ERR, EAL, "core %u "
481 "unavailable\n", idx);
485 CPU_SET(idx, cpusetp);
492 * The format pattern: --lcores='<lcores[@cpus]>[<,lcores[@cpus]>...]'
493 * lcores, cpus could be a single digit/range or a group.
494 * '(' and ')' are necessary if it's a group.
495 * If not supply '@cpus', the value of cpus uses the same as lcores.
496 * e.g. '1,2@(5-7),(3-5)@(0,2),(0,6),7-8' means start 9 EAL thread as below
497 * lcore 0 runs on cpuset 0x41 (cpu 0,6)
498 * lcore 1 runs on cpuset 0x2 (cpu 1)
499 * lcore 2 runs on cpuset 0xe0 (cpu 5,6,7)
500 * lcore 3,4,5 runs on cpuset 0x5 (cpu 0,2)
501 * lcore 6 runs on cpuset 0x41 (cpu 0,6)
502 * lcore 7 runs on cpuset 0x80 (cpu 7)
503 * lcore 8 runs on cpuset 0x100 (cpu 8)
506 eal_parse_lcores(const char *lcores)
508 struct rte_config *cfg = rte_eal_get_configuration();
509 static uint16_t set[RTE_MAX_LCORE];
513 const char *lcore_start = NULL;
514 const char *end = NULL;
523 /* Remove all blank characters ahead and after */
524 while (isblank(*lcores))
527 while ((i > 0) && isblank(lcores[i - 1]))
532 /* Reset lcore config */
533 for (idx = 0; idx < RTE_MAX_LCORE; idx++) {
534 cfg->lcore_role[idx] = ROLE_OFF;
535 lcore_config[idx].core_index = -1;
536 CPU_ZERO(&lcore_config[idx].cpuset);
539 /* Get list of cores */
541 while (isblank(*lcores))
546 /* record lcore_set start point */
547 lcore_start = lcores;
549 /* go across a complete bracket */
550 if (*lcore_start == '(') {
551 lcores += strcspn(lcores, ")");
552 if (*lcores++ == '\0')
556 /* scan the separator '@', ','(next) or '\0'(finish) */
557 lcores += strcspn(lcores, "@,");
559 if (*lcores == '@') {
560 /* explicit assign cpu_set */
561 offset = eal_parse_set(lcores + 1, set, RTE_DIM(set));
565 /* prepare cpu_set and update the end cursor */
566 if (0 > convert_to_cpuset(&cpuset,
569 end = lcores + 1 + offset;
570 } else { /* ',' or '\0' */
571 /* haven't given cpu_set, current loop done */
574 /* go back to check <number>-<number> */
575 offset = strcspn(lcore_start, "(-");
576 if (offset < (end - lcore_start) &&
577 *(lcore_start + offset) != '(')
581 if (*end != ',' && *end != '\0')
584 /* parse lcore_set from start point */
585 if (0 > eal_parse_set(lcore_start, set, RTE_DIM(set)))
588 /* without '@', by default using lcore_set as cpu_set */
589 if (*lcores != '@' &&
590 0 > convert_to_cpuset(&cpuset, set, RTE_DIM(set)))
593 /* start to update lcore_set */
594 for (idx = 0; idx < RTE_MAX_LCORE; idx++) {
598 if (cfg->lcore_role[idx] != ROLE_RTE) {
599 lcore_config[idx].core_index = count;
600 cfg->lcore_role[idx] = ROLE_RTE;
606 CPU_SET(idx, &cpuset);
608 rte_memcpy(&lcore_config[idx].cpuset, &cpuset,
609 sizeof(rte_cpuset_t));
613 } while (*end != '\0');
618 cfg->lcore_count = count;
627 eal_parse_syslog(const char *facility, struct internal_config *conf)
634 { "auth", LOG_AUTH },
635 { "cron", LOG_CRON },
636 { "daemon", LOG_DAEMON },
638 { "kern", LOG_KERN },
640 { "mail", LOG_MAIL },
641 { "news", LOG_NEWS },
642 { "syslog", LOG_SYSLOG },
643 { "user", LOG_USER },
644 { "uucp", LOG_UUCP },
645 { "local0", LOG_LOCAL0 },
646 { "local1", LOG_LOCAL1 },
647 { "local2", LOG_LOCAL2 },
648 { "local3", LOG_LOCAL3 },
649 { "local4", LOG_LOCAL4 },
650 { "local5", LOG_LOCAL5 },
651 { "local6", LOG_LOCAL6 },
652 { "local7", LOG_LOCAL7 },
656 for (i = 0; map[i].name; i++) {
657 if (!strcmp(facility, map[i].name)) {
658 conf->syslog_facility = map[i].value;
666 eal_parse_log_level(const char *level, uint32_t *log_level)
672 tmp = strtoul(level, &end, 0);
674 /* check for errors */
675 if ((errno != 0) || (level[0] == '\0') ||
676 end == NULL || (*end != '\0'))
679 /* log_level is a uint32_t */
680 if (tmp >= UINT32_MAX)
687 static enum rte_proc_type_t
688 eal_parse_proc_type(const char *arg)
690 if (strncasecmp(arg, "primary", sizeof("primary")) == 0)
691 return RTE_PROC_PRIMARY;
692 if (strncasecmp(arg, "secondary", sizeof("secondary")) == 0)
693 return RTE_PROC_SECONDARY;
694 if (strncasecmp(arg, "auto", sizeof("auto")) == 0)
695 return RTE_PROC_AUTO;
697 return RTE_PROC_INVALID;
701 eal_parse_common_option(int opt, const char *optarg,
702 struct internal_config *conf)
707 if (rte_eal_devargs_add(RTE_DEVTYPE_BLACKLISTED_PCI,
714 if (rte_eal_devargs_add(RTE_DEVTYPE_WHITELISTED_PCI,
721 if (eal_parse_coremask(optarg) < 0) {
722 RTE_LOG(ERR, EAL, "invalid coremask\n");
728 if (eal_parse_corelist(optarg) < 0) {
729 RTE_LOG(ERR, EAL, "invalid core list\n");
735 conf->memory = atoi(optarg);
736 conf->memory *= 1024ULL;
737 conf->memory *= 1024ULL;
740 /* force number of channels */
742 conf->force_nchannel = atoi(optarg);
743 if (conf->force_nchannel == 0 ||
744 conf->force_nchannel > 4) {
745 RTE_LOG(ERR, EAL, "invalid channel number\n");
749 /* force number of ranks */
751 conf->force_nrank = atoi(optarg);
752 if (conf->force_nrank == 0 ||
753 conf->force_nrank > 16) {
754 RTE_LOG(ERR, EAL, "invalid rank number\n");
758 /* force loading of external driver */
760 if (eal_plugin_add(optarg) == -1)
764 /* since message is explicitly requested by user, we
765 * write message at highest log level so it can always
767 * even if info or warning messages are disabled */
768 RTE_LOG(CRIT, EAL, "RTE Version: '%s'\n", rte_version());
772 case OPT_HUGE_UNLINK_NUM:
773 conf->hugepage_unlink = 1;
776 case OPT_NO_HUGE_NUM:
777 conf->no_hugetlbfs = 1;
784 case OPT_NO_HPET_NUM:
788 case OPT_VMWARE_TSC_MAP_NUM:
789 conf->vmware_tsc_map = 1;
792 case OPT_NO_SHCONF_NUM:
796 case OPT_PROC_TYPE_NUM:
797 conf->process_type = eal_parse_proc_type(optarg);
800 case OPT_MASTER_LCORE_NUM:
801 if (eal_parse_master_lcore(optarg) < 0) {
802 RTE_LOG(ERR, EAL, "invalid parameter for --"
803 OPT_MASTER_LCORE "\n");
809 if (rte_eal_devargs_add(RTE_DEVTYPE_VIRTUAL,
816 if (eal_parse_syslog(optarg, conf) < 0) {
817 RTE_LOG(ERR, EAL, "invalid parameters for --"
823 case OPT_LOG_LEVEL_NUM: {
826 if (eal_parse_log_level(optarg, &log) < 0) {
828 "invalid parameters for --"
832 conf->log_level = log;
836 if (eal_parse_lcores(optarg) < 0) {
837 RTE_LOG(ERR, EAL, "invalid parameter for --"
843 /* don't know what to do, leave this to caller */
853 eal_adjust_config(struct internal_config *internal_cfg)
856 struct rte_config *cfg = rte_eal_get_configuration();
858 if (internal_config.process_type == RTE_PROC_AUTO)
859 internal_config.process_type = eal_proc_type_detect();
861 /* default master lcore is the first one */
862 if (!master_lcore_parsed)
863 cfg->master_lcore = rte_get_next_lcore(-1, 0, 0);
865 /* if no memory amounts were requested, this will result in 0 and
866 * will be overridden later, right after eal_hugepage_info_init() */
867 for (i = 0; i < RTE_MAX_NUMA_NODES; i++)
868 internal_cfg->memory += internal_cfg->socket_mem[i];
874 eal_check_common_options(struct internal_config *internal_cfg)
876 struct rte_config *cfg = rte_eal_get_configuration();
878 if (cfg->lcore_role[cfg->master_lcore] != ROLE_RTE) {
879 RTE_LOG(ERR, EAL, "Master lcore is not enabled for DPDK\n");
883 if (internal_cfg->process_type == RTE_PROC_INVALID) {
884 RTE_LOG(ERR, EAL, "Invalid process type specified\n");
887 if (index(internal_cfg->hugefile_prefix, '%') != NULL) {
888 RTE_LOG(ERR, EAL, "Invalid char, '%%', in --"OPT_FILE_PREFIX" "
892 if (mem_parsed && internal_cfg->force_sockets == 1) {
893 RTE_LOG(ERR, EAL, "Options -m and --"OPT_SOCKET_MEM" cannot "
894 "be specified at the same time\n");
897 if (internal_cfg->no_hugetlbfs && internal_cfg->force_sockets == 1) {
898 RTE_LOG(ERR, EAL, "Option --"OPT_SOCKET_MEM" cannot "
899 "be specified together with --"OPT_NO_HUGE"\n");
903 if (internal_cfg->no_hugetlbfs && internal_cfg->hugepage_unlink) {
904 RTE_LOG(ERR, EAL, "Option --"OPT_HUGE_UNLINK" cannot "
905 "be specified together with --"OPT_NO_HUGE"\n");
909 if (rte_eal_devargs_type_count(RTE_DEVTYPE_WHITELISTED_PCI) != 0 &&
910 rte_eal_devargs_type_count(RTE_DEVTYPE_BLACKLISTED_PCI) != 0) {
911 RTE_LOG(ERR, EAL, "Options blacklist (-b) and whitelist (-w) "
912 "cannot be used at the same time\n");
920 eal_common_usage(void)
922 printf("[options]\n\n"
923 "EAL common options:\n"
924 " -c COREMASK Hexadecimal bitmask of cores to run on\n"
925 " -l CORELIST List of cores to run on\n"
926 " The argument format is <c1>[-c2][,c3[-c4],...]\n"
927 " where c1, c2, etc are core indexes between 0 and %d\n"
928 " --"OPT_LCORES" COREMAP Map lcore set to physical cpu set\n"
929 " The argument format is\n"
930 " '<lcores[@cpus]>[<,lcores[@cpus]>...]'\n"
931 " lcores and cpus list are grouped by '(' and ')'\n"
932 " Within the group, '-' is used for range separator,\n"
933 " ',' is used for single number separator.\n"
934 " '( )' can be omitted for single element group,\n"
935 " '@' can be omitted if cpus and lcores have the same value\n"
936 " --"OPT_MASTER_LCORE" ID Core ID that is used as master\n"
937 " -n CHANNELS Number of memory channels\n"
938 " -m MB Memory to allocate (see also --"OPT_SOCKET_MEM")\n"
939 " -r RANKS Force number of memory ranks (don't detect)\n"
940 " -b, --"OPT_PCI_BLACKLIST" Add a PCI device in black list.\n"
941 " Prevent EAL from using this PCI device. The argument\n"
942 " format is <domain:bus:devid.func>.\n"
943 " -w, --"OPT_PCI_WHITELIST" Add a PCI device in white list.\n"
944 " Only use the specified PCI devices. The argument format\n"
945 " is <[domain:]bus:devid.func>. This option can be present\n"
946 " several times (once per device).\n"
947 " [NOTE: PCI whitelist cannot be used with -b option]\n"
948 " --"OPT_VDEV" Add a virtual device.\n"
949 " The argument format is <driver><id>[,key=val,...]\n"
950 " (ex: --vdev=eth_pcap0,iface=eth2).\n"
951 " -d LIB.so Add driver (can be used multiple times)\n"
952 " --"OPT_VMWARE_TSC_MAP" Use VMware TSC map instead of native RDTSC\n"
953 " --"OPT_PROC_TYPE" Type of this process (primary|secondary|auto)\n"
954 " --"OPT_SYSLOG" Set syslog facility\n"
955 " --"OPT_LOG_LEVEL" Set default log level\n"
956 " -v Display version information on startup\n"
957 " -h, --help This help\n"
958 "\nEAL options for DEBUG use only:\n"
959 " --"OPT_HUGE_UNLINK" Unlink hugepage files after init\n"
960 " --"OPT_NO_HUGE" Use malloc instead of hugetlbfs\n"
961 " --"OPT_NO_PCI" Disable PCI\n"
962 " --"OPT_NO_HPET" Disable HPET\n"
963 " --"OPT_NO_SHCONF" No shared config (mmap'd files)\n"
964 "\n", RTE_MAX_LCORE);