1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2015 RehiveTech. All rights reserved.
5 #ifndef _RTE_ATOMIC_ARM32_H_
6 #define _RTE_ATOMIC_ARM32_H_
8 #ifndef RTE_FORCE_INTRINSICS
9 # error Platform must be built with CONFIG_RTE_FORCE_INTRINSICS
16 #include "generic/rte_atomic.h"
19 * General memory barrier.
21 * Guarantees that the LOAD and STORE operations generated before the
22 * barrier occur before the LOAD and STORE operations generated after.
24 #define rte_mb() __sync_synchronize()
27 * Write memory barrier.
29 * Guarantees that the STORE operations generated before the barrier
30 * occur before the STORE operations generated after.
32 #define rte_wmb() do { asm volatile ("dmb st" : : : "memory"); } while (0)
35 * Read memory barrier.
37 * Guarantees that the LOAD operations generated before the barrier
38 * occur before the LOAD operations generated after.
40 #define rte_rmb() __sync_synchronize()
42 #define rte_smp_mb() rte_mb()
44 #define rte_smp_wmb() rte_wmb()
46 #define rte_smp_rmb() rte_rmb()
48 #define rte_io_mb() rte_mb()
50 #define rte_io_wmb() rte_wmb()
52 #define rte_io_rmb() rte_rmb()
54 #define rte_cio_wmb() rte_wmb()
56 #define rte_cio_rmb() rte_rmb()
62 #endif /* _RTE_ATOMIC_ARM32_H_ */