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33 #ifndef _RTE_CPUFLAGS_ARM32_H_
34 #define _RTE_CPUFLAGS_ARM32_H_
46 #include "generic/rte_cpuflags.h"
57 #define AT_PLATFORM 15
60 /* software based registers */
68 * Enumeration of all CPU features supported
75 RTE_CPUFLAG_FAST_MULT,
100 RTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */
103 static const struct feature_entry cpu_feature_table[] = {
104 FEAT_DEF(SWP, 0x00000001, 0, REG_HWCAP, 0)
105 FEAT_DEF(HALF, 0x00000001, 0, REG_HWCAP, 1)
106 FEAT_DEF(THUMB, 0x00000001, 0, REG_HWCAP, 2)
107 FEAT_DEF(A26BIT, 0x00000001, 0, REG_HWCAP, 3)
108 FEAT_DEF(FAST_MULT, 0x00000001, 0, REG_HWCAP, 4)
109 FEAT_DEF(FPA, 0x00000001, 0, REG_HWCAP, 5)
110 FEAT_DEF(VFP, 0x00000001, 0, REG_HWCAP, 6)
111 FEAT_DEF(EDSP, 0x00000001, 0, REG_HWCAP, 7)
112 FEAT_DEF(JAVA, 0x00000001, 0, REG_HWCAP, 8)
113 FEAT_DEF(IWMMXT, 0x00000001, 0, REG_HWCAP, 9)
114 FEAT_DEF(CRUNCH, 0x00000001, 0, REG_HWCAP, 10)
115 FEAT_DEF(THUMBEE, 0x00000001, 0, REG_HWCAP, 11)
116 FEAT_DEF(NEON, 0x00000001, 0, REG_HWCAP, 12)
117 FEAT_DEF(VFPv3, 0x00000001, 0, REG_HWCAP, 13)
118 FEAT_DEF(VFPv3D16, 0x00000001, 0, REG_HWCAP, 14)
119 FEAT_DEF(TLS, 0x00000001, 0, REG_HWCAP, 15)
120 FEAT_DEF(VFPv4, 0x00000001, 0, REG_HWCAP, 16)
121 FEAT_DEF(IDIVA, 0x00000001, 0, REG_HWCAP, 17)
122 FEAT_DEF(IDIVT, 0x00000001, 0, REG_HWCAP, 18)
123 FEAT_DEF(VFPD32, 0x00000001, 0, REG_HWCAP, 19)
124 FEAT_DEF(LPAE, 0x00000001, 0, REG_HWCAP, 20)
125 FEAT_DEF(EVTSTRM, 0x00000001, 0, REG_HWCAP, 21)
126 FEAT_DEF(AES, 0x00000001, 0, REG_HWCAP2, 0)
127 FEAT_DEF(PMULL, 0x00000001, 0, REG_HWCAP2, 1)
128 FEAT_DEF(SHA1, 0x00000001, 0, REG_HWCAP2, 2)
129 FEAT_DEF(SHA2, 0x00000001, 0, REG_HWCAP2, 3)
130 FEAT_DEF(CRC32, 0x00000001, 0, REG_HWCAP2, 4)
131 FEAT_DEF(V7L, 0x00000001, 0, REG_PLATFORM, 0)
135 * Read AUXV software register and get cpu features for ARM
138 rte_cpu_get_features(__attribute__((unused)) uint32_t leaf,
139 __attribute__((unused)) uint32_t subleaf, cpuid_registers_t out)
144 auxv_fd = open("/proc/self/auxv", O_RDONLY);
146 while (read(auxv_fd, &auxv,
147 sizeof(Elf32_auxv_t)) == sizeof(Elf32_auxv_t)) {
148 if (auxv.a_type == AT_HWCAP)
149 out[REG_HWCAP] = auxv.a_un.a_val;
150 else if (auxv.a_type == AT_HWCAP2)
151 out[REG_HWCAP2] = auxv.a_un.a_val;
152 else if (auxv.a_type == AT_PLATFORM) {
153 if (!strcmp((const char *)auxv.a_un.a_val, "v7l"))
154 out[REG_PLATFORM] = 0x0001;
160 * Checks if a particular flag is available on current machine.
163 rte_cpu_get_flag_enabled(enum rte_cpu_flag_t feature)
165 const struct feature_entry *feat;
166 cpuid_registers_t regs = {0};
168 if (feature >= RTE_CPUFLAG_NUMFLAGS)
169 /* Flag does not match anything in the feature tables */
172 feat = &cpu_feature_table[feature];
175 /* This entry in the table wasn't filled out! */
178 /* get the cpuid leaf containing the desired feature */
179 rte_cpu_get_features(feat->leaf, feat->subleaf, regs);
181 /* check if the feature is enabled */
182 return (regs[feat->reg] >> feat->bit) & 1;
189 #endif /* _RTE_CPUFLAGS_ARM32_H_ */