1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2014 Intel Corporation
5 #ifndef _RTE_ATOMIC_X86_H_
6 #define _RTE_ATOMIC_X86_H_
13 #include <rte_common.h>
14 #include <rte_config.h>
15 #include <emmintrin.h>
16 #include "generic/rte_atomic.h"
18 #if RTE_MAX_LCORE == 1
19 #define MPLOCKED /**< No need to insert MP lock prefix. */
21 #define MPLOCKED "lock ; " /**< Insert MP lock prefix. */
24 #define rte_mb() _mm_mfence()
26 #define rte_wmb() _mm_sfence()
28 #define rte_rmb() _mm_lfence()
30 #define rte_smp_mb() rte_mb()
32 #define rte_smp_wmb() rte_compiler_barrier()
34 #define rte_smp_rmb() rte_compiler_barrier()
36 #define rte_io_mb() rte_mb()
38 #define rte_io_wmb() rte_compiler_barrier()
40 #define rte_io_rmb() rte_compiler_barrier()
42 /*------------------------- 16 bit atomic operations -------------------------*/
44 #ifndef RTE_FORCE_INTRINSICS
46 rte_atomic16_cmpset(volatile uint16_t *dst, uint16_t exp, uint16_t src)
52 "cmpxchgw %[src], %[dst];"
54 : [res] "=a" (res), /* output */
56 : [src] "r" (src), /* input */
59 : "memory"); /* no-clobber list */
63 static inline int rte_atomic16_test_and_set(rte_atomic16_t *v)
65 return rte_atomic16_cmpset((volatile uint16_t *)&v->cnt, 0, 1);
69 rte_atomic16_inc(rte_atomic16_t *v)
74 : [cnt] "=m" (v->cnt) /* output */
75 : "m" (v->cnt) /* input */
80 rte_atomic16_dec(rte_atomic16_t *v)
85 : [cnt] "=m" (v->cnt) /* output */
86 : "m" (v->cnt) /* input */
90 static inline int rte_atomic16_inc_and_test(rte_atomic16_t *v)
98 : [cnt] "+m" (v->cnt), /* output */
104 static inline int rte_atomic16_dec_and_test(rte_atomic16_t *v)
108 asm volatile(MPLOCKED
111 : [cnt] "+m" (v->cnt), /* output */
117 /*------------------------- 32 bit atomic operations -------------------------*/
120 rte_atomic32_cmpset(volatile uint32_t *dst, uint32_t exp, uint32_t src)
126 "cmpxchgl %[src], %[dst];"
128 : [res] "=a" (res), /* output */
130 : [src] "r" (src), /* input */
133 : "memory"); /* no-clobber list */
137 static inline int rte_atomic32_test_and_set(rte_atomic32_t *v)
139 return rte_atomic32_cmpset((volatile uint32_t *)&v->cnt, 0, 1);
143 rte_atomic32_inc(rte_atomic32_t *v)
148 : [cnt] "=m" (v->cnt) /* output */
149 : "m" (v->cnt) /* input */
154 rte_atomic32_dec(rte_atomic32_t *v)
159 : [cnt] "=m" (v->cnt) /* output */
160 : "m" (v->cnt) /* input */
164 static inline int rte_atomic32_inc_and_test(rte_atomic32_t *v)
172 : [cnt] "+m" (v->cnt), /* output */
178 static inline int rte_atomic32_dec_and_test(rte_atomic32_t *v)
182 asm volatile(MPLOCKED
185 : [cnt] "+m" (v->cnt), /* output */
193 #include "rte_atomic_32.h"
195 #include "rte_atomic_64.h"
202 #endif /* _RTE_ATOMIC_X86_H_ */