1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2014 Intel Corporation
5 #ifndef _RTE_ATOMIC_X86_H_
6 #define _RTE_ATOMIC_X86_H_
13 #include <rte_common.h>
14 #include <emmintrin.h>
15 #include "generic/rte_atomic.h"
17 #if RTE_MAX_LCORE == 1
18 #define MPLOCKED /**< No need to insert MP lock prefix. */
20 #define MPLOCKED "lock ; " /**< Insert MP lock prefix. */
23 #define rte_mb() _mm_mfence()
25 #define rte_wmb() _mm_sfence()
27 #define rte_rmb() _mm_lfence()
29 #define rte_smp_mb() rte_mb()
31 #define rte_smp_wmb() rte_compiler_barrier()
33 #define rte_smp_rmb() rte_compiler_barrier()
35 #define rte_io_mb() rte_mb()
37 #define rte_io_wmb() rte_compiler_barrier()
39 #define rte_io_rmb() rte_compiler_barrier()
41 /*------------------------- 16 bit atomic operations -------------------------*/
43 #ifndef RTE_FORCE_INTRINSICS
45 rte_atomic16_cmpset(volatile uint16_t *dst, uint16_t exp, uint16_t src)
51 "cmpxchgw %[src], %[dst];"
53 : [res] "=a" (res), /* output */
55 : [src] "r" (src), /* input */
58 : "memory"); /* no-clobber list */
62 static inline int rte_atomic16_test_and_set(rte_atomic16_t *v)
64 return rte_atomic16_cmpset((volatile uint16_t *)&v->cnt, 0, 1);
68 rte_atomic16_inc(rte_atomic16_t *v)
73 : [cnt] "=m" (v->cnt) /* output */
74 : "m" (v->cnt) /* input */
79 rte_atomic16_dec(rte_atomic16_t *v)
84 : [cnt] "=m" (v->cnt) /* output */
85 : "m" (v->cnt) /* input */
89 static inline int rte_atomic16_inc_and_test(rte_atomic16_t *v)
97 : [cnt] "+m" (v->cnt), /* output */
103 static inline int rte_atomic16_dec_and_test(rte_atomic16_t *v)
107 asm volatile(MPLOCKED
110 : [cnt] "+m" (v->cnt), /* output */
116 /*------------------------- 32 bit atomic operations -------------------------*/
119 rte_atomic32_cmpset(volatile uint32_t *dst, uint32_t exp, uint32_t src)
125 "cmpxchgl %[src], %[dst];"
127 : [res] "=a" (res), /* output */
129 : [src] "r" (src), /* input */
132 : "memory"); /* no-clobber list */
136 static inline int rte_atomic32_test_and_set(rte_atomic32_t *v)
138 return rte_atomic32_cmpset((volatile uint32_t *)&v->cnt, 0, 1);
142 rte_atomic32_inc(rte_atomic32_t *v)
147 : [cnt] "=m" (v->cnt) /* output */
148 : "m" (v->cnt) /* input */
153 rte_atomic32_dec(rte_atomic32_t *v)
158 : [cnt] "=m" (v->cnt) /* output */
159 : "m" (v->cnt) /* input */
163 static inline int rte_atomic32_inc_and_test(rte_atomic32_t *v)
171 : [cnt] "+m" (v->cnt), /* output */
177 static inline int rte_atomic32_dec_and_test(rte_atomic32_t *v)
181 asm volatile(MPLOCKED
184 : [cnt] "+m" (v->cnt), /* output */
192 #include "rte_atomic_32.h"
194 #include "rte_atomic_64.h"
201 #endif /* _RTE_ATOMIC_X86_H_ */