4 * Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 * Inspired from FreeBSD src/sys/i386/include/atomic.h
36 * Copyright (c) 1998 Doug Rabson
37 * All rights reserved.
40 #ifndef _RTE_ATOMIC_X86_H_
41 #error do not include this file directly, use <rte_atomic.h> instead
44 #ifndef _RTE_ATOMIC_I686_H_
45 #define _RTE_ATOMIC_I686_H_
48 #include <rte_common.h>
49 #include <rte_atomic.h>
51 /*------------------------- 64 bit atomic operations -------------------------*/
53 #ifndef RTE_FORCE_INTRINSICS
55 rte_atomic64_cmpset(volatile uint64_t *dst, uint64_t exp, uint64_t src)
75 : [res] "=a" (res) /* result in eax */
76 : [dst] "S" (dst), /* esi */
77 "b" (_src.l32), /* ebx */
78 "c" (_src.h32), /* ecx */
79 "a" (_exp.l32), /* eax */
80 "d" (_exp.h32) /* edx */
81 : "memory" ); /* no-clobber list */
84 "xchgl %%ebx, %%edi;\n"
88 "xchgl %%ebx, %%edi;\n"
89 : [res] "=a" (res) /* result in eax */
90 : [dst] "S" (dst), /* esi */
91 "D" (_src.l32), /* ebx */
92 "c" (_src.h32), /* ecx */
93 "a" (_exp.l32), /* eax */
94 "d" (_exp.h32) /* edx */
95 : "memory" ); /* no-clobber list */
101 static inline uint64_t
102 rte_atomic64_exchange(volatile uint64_t *dest, uint64_t val)
108 } while (rte_atomic64_cmpset(dest, old, val) == 0);
114 rte_atomic64_init(rte_atomic64_t *v)
119 while (success == 0) {
121 success = rte_atomic64_cmpset((volatile uint64_t *)&v->cnt,
126 static inline int64_t
127 rte_atomic64_read(rte_atomic64_t *v)
132 while (success == 0) {
134 /* replace the value by itself */
135 success = rte_atomic64_cmpset((volatile uint64_t *)&v->cnt,
142 rte_atomic64_set(rte_atomic64_t *v, int64_t new_value)
147 while (success == 0) {
149 success = rte_atomic64_cmpset((volatile uint64_t *)&v->cnt,
155 rte_atomic64_add(rte_atomic64_t *v, int64_t inc)
160 while (success == 0) {
162 success = rte_atomic64_cmpset((volatile uint64_t *)&v->cnt,
168 rte_atomic64_sub(rte_atomic64_t *v, int64_t dec)
173 while (success == 0) {
175 success = rte_atomic64_cmpset((volatile uint64_t *)&v->cnt,
181 rte_atomic64_inc(rte_atomic64_t *v)
183 rte_atomic64_add(v, 1);
187 rte_atomic64_dec(rte_atomic64_t *v)
189 rte_atomic64_sub(v, 1);
192 static inline int64_t
193 rte_atomic64_add_return(rte_atomic64_t *v, int64_t inc)
198 while (success == 0) {
200 success = rte_atomic64_cmpset((volatile uint64_t *)&v->cnt,
207 static inline int64_t
208 rte_atomic64_sub_return(rte_atomic64_t *v, int64_t dec)
213 while (success == 0) {
215 success = rte_atomic64_cmpset((volatile uint64_t *)&v->cnt,
222 static inline int rte_atomic64_inc_and_test(rte_atomic64_t *v)
224 return rte_atomic64_add_return(v, 1) == 0;
227 static inline int rte_atomic64_dec_and_test(rte_atomic64_t *v)
229 return rte_atomic64_sub_return(v, 1) == 0;
232 static inline int rte_atomic64_test_and_set(rte_atomic64_t *v)
234 return rte_atomic64_cmpset((volatile uint64_t *)&v->cnt, 0, 1);
237 static inline void rte_atomic64_clear(rte_atomic64_t *v)
239 rte_atomic64_set(v, 0);
243 #endif /* _RTE_ATOMIC_I686_H_ */