5 * Copyright (c) 2012,2013 Intel Corporation
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that: (1) source code distributions
10 * retain the above copyright notice and this paragraph in its entirety, (2)
11 * distributions including binary code include the above copyright notice and
12 * this paragraph in its entirety in the documentation or other materials
13 * provided with the distribution
15 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR IMPLIED
16 * WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF
17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
20 /* Official RTM intrinsics interface matching gcc/icc, but works
21 on older gcc compatible compilers and binutils. */
29 #define RTE_XBEGIN_STARTED (~0u)
30 #define RTE_XABORT_EXPLICIT (1 << 0)
31 #define RTE_XABORT_RETRY (1 << 1)
32 #define RTE_XABORT_CONFLICT (1 << 2)
33 #define RTE_XABORT_CAPACITY (1 << 3)
34 #define RTE_XABORT_DEBUG (1 << 4)
35 #define RTE_XABORT_NESTED (1 << 5)
36 #define RTE_XABORT_CODE(x) (((x) >> 24) & 0xff)
38 static __attribute__((__always_inline__)) inline
39 unsigned int rte_xbegin(void)
41 unsigned int ret = RTE_XBEGIN_STARTED;
43 asm volatile(".byte 0xc7,0xf8 ; .long 0" : "+a" (ret) :: "memory");
47 static __attribute__((__always_inline__)) inline
50 asm volatile(".byte 0x0f,0x01,0xd5" ::: "memory");
53 /* not an inline function to workaround a clang bug with -O0 */
54 #define rte_xabort(status) do { \
55 asm volatile(".byte 0xc6,0xf8,%P0" :: "i" (status) : "memory"); \
58 static __attribute__((__always_inline__)) inline
63 asm volatile(".byte 0x0f,0x01,0xd6 ; setnz %0" :
64 "=r" (out) :: "memory");
72 #endif /* _RTE_RTM_H_ */