4 * Copyright(c) 2010-2013 Intel Corporation. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 #ifndef _RTE_MEMORY_H_
36 #define _RTE_MEMORY_H_
41 * Memory-related RTE API.
52 RTE_PGSIZE_4K = 1 << 12,
53 RTE_PGSIZE_2M = RTE_PGSIZE_4K << 9,
54 RTE_PGSIZE_1G = RTE_PGSIZE_2M <<9
57 #define SOCKET_ID_ANY -1 /**< Any NUMA socket. */
58 #define CACHE_LINE_SIZE 64 /**< Cache line size. */
59 #define CACHE_LINE_MASK (CACHE_LINE_SIZE-1) /**< Cache line mask. */
61 #define CACHE_LINE_ROUNDUP(size) \
62 (CACHE_LINE_SIZE * ((size + CACHE_LINE_SIZE - 1) / CACHE_LINE_SIZE))
63 /**< Return the first cache-aligned value greater or equal to size. */
66 * Force alignment to cache line.
68 #define __rte_cache_aligned __attribute__((__aligned__(CACHE_LINE_SIZE)))
70 typedef uint64_t phys_addr_t; /**< Physical address definition. */
73 * Physical memory segment descriptor.
76 phys_addr_t phys_addr; /**< Start physical address. */
78 void *addr; /**< Start virtual address. */
79 uint64_t addr_64; /**< Makes sure addr is always 64 bits */
81 size_t len; /**< Length of the segment. */
82 size_t hugepage_sz; /**< The pagesize of underlying memory */
83 int32_t socket_id; /**< NUMA socket ID. */
84 uint32_t nchannel; /**< Number of channels. */
85 uint32_t nrank; /**< Number of ranks. */
86 } __attribute__((__packed__));
90 * Get the layout of the available physical memory.
92 * It can be useful for an application to have the full physical
93 * memory layout to decide the size of a memory zone to reserve. This
94 * table is stored in rte_config (see rte_eal_get_configuration()).
97 * - On success, return a pointer to a read-only table of struct
98 * rte_physmem_desc elements, containing the layout of all
99 * addressable physical memory. The last element of the table
100 * contains a NULL address.
101 * - On error, return NULL. This should not happen since it is a fatal
102 * error that will probably cause the entire system to panic.
104 const struct rte_memseg *rte_eal_get_physmem_layout(void);
107 * Dump the physical memory layout to the console.
109 void rte_dump_physmem_layout(void);
112 * Get the total amount of available physical memory.
115 * The total amount of available physical memory in bytes.
117 uint64_t rte_eal_get_physmem_size(void);
120 * Get the number of memory channels.
123 * The number of memory channels on the system. The value is 0 if unknown
124 * or not the same on all devices.
126 unsigned rte_memory_get_nchannel(void);
129 * Get the number of memory ranks.
132 * The number of memory ranks on the system. The value is 0 if unknown or
133 * not the same on all devices.
135 unsigned rte_memory_get_nrank(void);
141 #endif /* _RTE_MEMORY_H_ */