4 * Copyright(c) 2010-2012 Intel Corporation. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
38 * This file contains a list of the PCI device IDs recognised by DPDK, which
39 * can be used to fill out an array of structures describing the devices.
41 * Currently two families of devices are recognised: those supported by the
42 * IGB driver, and those supported by the IXGBE driver. The inclusion of these
43 * in an array built using this file depends on the definition of
44 * RTE_LIBRTE_IGB_PMD and RTE_LIBRTE_IXGBE_PMD at the time when this file is
47 * In order to populate an array, the user of this file must define this macro:
48 * RTE_PCI_DEV_ID_DECL(vendorID, deviceID). For example:
56 * struct device devices[] = {
57 * #define RTE_PCI_DEV_ID_DECL(vendorID, deviceID) {vend, dev},
58 * #include <rte_pci_dev_ids.h>
62 * Note that this file can be included multiple times within the same file.
65 #ifndef RTE_PCI_DEV_ID_DECL
66 #error "You must define RTE_PCI_DEV_ID_DECL before including rte_pci_dev_ids.h"
69 #ifndef PCI_VENDOR_ID_INTEL
70 /** Vendor ID used by Intel devices */
71 #define PCI_VENDOR_ID_INTEL 0x8086
74 /******************** Physical IGB devices from e1000_hw.h ********************/
75 #ifdef RTE_LIBRTE_IGB_PMD
77 #define E1000_DEV_ID_82576 0x10C9
78 #define E1000_DEV_ID_82576_FIBER 0x10E6
79 #define E1000_DEV_ID_82576_SERDES 0x10E7
80 #define E1000_DEV_ID_82576_QUAD_COPPER 0x10E8
81 #define E1000_DEV_ID_82576_QUAD_COPPER_ET2 0x1526
82 #define E1000_DEV_ID_82576_NS 0x150A
83 #define E1000_DEV_ID_82576_NS_SERDES 0x1518
84 #define E1000_DEV_ID_82576_SERDES_QUAD 0x150D
85 #define E1000_DEV_ID_82575EB_COPPER 0x10A7
86 #define E1000_DEV_ID_82575EB_FIBER_SERDES 0x10A9
87 #define E1000_DEV_ID_82575GB_QUAD_COPPER 0x10D6
88 #define E1000_DEV_ID_82580_COPPER 0x150E
89 #define E1000_DEV_ID_82580_FIBER 0x150F
90 #define E1000_DEV_ID_82580_SERDES 0x1510
91 #define E1000_DEV_ID_82580_SGMII 0x1511
92 #define E1000_DEV_ID_82580_COPPER_DUAL 0x1516
93 #define E1000_DEV_ID_82580_QUAD_FIBER 0x1527
94 #define E1000_DEV_ID_I350_COPPER 0x1521
95 #define E1000_DEV_ID_I350_FIBER 0x1522
96 #define E1000_DEV_ID_I350_SERDES 0x1523
97 #define E1000_DEV_ID_I350_SGMII 0x1524
98 #define E1000_DEV_ID_I350_DA4 0x1546
99 #define E1000_DEV_ID_DH89XXCC_SGMII 0x0438
100 #define E1000_DEV_ID_DH89XXCC_SERDES 0x043A
101 #define E1000_DEV_ID_DH89XXCC_BACKPLANE 0x043C
102 #define E1000_DEV_ID_DH89XXCC_SFP 0x0440
104 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576)
105 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_FIBER)
106 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_SERDES)
107 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_QUAD_COPPER)
108 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2)
109 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_NS)
110 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_NS_SERDES)
111 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_SERDES_QUAD)
113 /* This device is the on-board NIC on some development boards. */
114 #ifdef RTE_PCI_DEV_USE_82575EB_COPPER
115 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82575EB_COPPER)
118 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES)
119 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER)
121 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_COPPER)
122 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_FIBER)
123 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_SERDES)
124 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_SGMII)
125 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_COPPER_DUAL)
126 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_QUAD_FIBER)
128 /* This device is the on-board NIC on some development boards. */
129 #ifndef RTE_PCI_DEV_NO_USE_I350_COPPER
130 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_COPPER)
133 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_FIBER)
134 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_SERDES)
135 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_SGMII)
136 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_DA4)
137 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_DH89XXCC_SGMII)
138 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_DH89XXCC_SERDES)
139 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE)
140 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_DH89XXCC_SFP)
142 #endif /* RTE_LIBRTE_IGB_PMD */
145 /****************** Physical IXGBE devices from ixgbe_type.h ******************/
146 #ifdef RTE_LIBRTE_IXGBE_PMD
148 #define IXGBE_DEV_ID_82598 0x10B6
149 #define IXGBE_DEV_ID_82598_BX 0x1508
150 #define IXGBE_DEV_ID_82598AF_DUAL_PORT 0x10C6
151 #define IXGBE_DEV_ID_82598AF_SINGLE_PORT 0x10C7
152 #define IXGBE_DEV_ID_82598AT 0x10C8
153 #define IXGBE_DEV_ID_82598AT2 0x150B
154 #define IXGBE_DEV_ID_82598EB_SFP_LOM 0x10DB
155 #define IXGBE_DEV_ID_82598EB_CX4 0x10DD
156 #define IXGBE_DEV_ID_82598_CX4_DUAL_PORT 0x10EC
157 #define IXGBE_DEV_ID_82598_DA_DUAL_PORT 0x10F1
158 #define IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM 0x10E1
159 #define IXGBE_DEV_ID_82598EB_XF_LR 0x10F4
160 #define IXGBE_DEV_ID_82599_KX4 0x10F7
161 #define IXGBE_DEV_ID_82599_KX4_MEZZ 0x1514
162 #define IXGBE_DEV_ID_82599_KR 0x1517
163 #define IXGBE_DEV_ID_82599_COMBO_BACKPLANE 0x10F8
164 #define IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ 0x000C
165 #define IXGBE_DEV_ID_82599_CX4 0x10F9
166 #define IXGBE_DEV_ID_82599_SFP 0x10FB
167 #define IXGBE_SUBDEV_ID_82599_SFP 0x11A9
168 #define IXGBE_DEV_ID_82599_BACKPLANE_FCOE 0x152A
169 #define IXGBE_DEV_ID_82599_SFP_FCOE 0x1529
170 #define IXGBE_DEV_ID_82599_SFP_EM 0x1507
171 #define IXGBE_DEV_ID_82599EN_SFP 0x1557
172 #define IXGBE_DEV_ID_82599_XAUI_LOM 0x10FC
173 #define IXGBE_DEV_ID_82599_T3_LOM 0x151C
174 #define IXGBE_DEV_ID_X540T 0x1528
176 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598)
177 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598_BX)
178 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT)
179 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT)
180 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598AT)
181 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598AT2)
182 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM)
183 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598EB_CX4)
184 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT)
185 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT)
186 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM)
187 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598EB_XF_LR)
188 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_KX4)
189 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ)
190 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_KR)
191 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE)
192 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
193 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_CX4)
194 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP)
195 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_SUBDEV_ID_82599_SFP)
196 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE)
197 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP_FCOE)
198 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP_EM)
199 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599EN_SFP)
200 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_XAUI_LOM)
201 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_T3_LOM)
202 RTE_PCI_DEV_ID_DECL(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X540T)
204 #endif /* RTE_LIBRTE_IXGBE_PMD */