1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2014 Intel Corporation.
3 * Copyright(c) 2012-2013 6WIND S.A.
14 #include <sys/queue.h>
18 #include <rte_common.h>
20 #include <rte_cycles.h>
21 #include <rte_lcore.h>
22 #include <rte_memory.h>
24 #include <rte_debug.h>
26 #include "eal_private.h"
27 #include "eal_internal_cfg.h"
29 enum timer_source eal_timer_source = EAL_TIMER_HPET;
31 #ifdef RTE_LIBEAL_USE_HPET
33 #define DEV_HPET "/dev/hpet"
35 /* Maximum number of counters. */
36 #define HPET_TIMER_NUM 3
38 /* General capabilities register */
39 #define CLK_PERIOD_SHIFT 32 /* Clock period shift. */
40 #define CLK_PERIOD_MASK 0xffffffff00000000ULL /* Clock period mask. */
43 * HPET timer registers. From the Intel IA-PC HPET (High Precision Event
44 * Timers) Specification.
46 struct eal_hpet_regs {
47 /* Memory-mapped, software visible registers */
48 uint64_t capabilities; /**< RO General Capabilities Register. */
49 uint64_t reserved0; /**< Reserved for future use. */
50 uint64_t config; /**< RW General Configuration Register. */
51 uint64_t reserved1; /**< Reserved for future use. */
52 uint64_t isr; /**< RW Clear General Interrupt Status. */
53 uint64_t reserved2[25]; /**< Reserved for future use. */
55 uint64_t counter; /**< RW Main Counter Value Register. */
57 uint32_t counter_l; /**< RW Main Counter Low. */
58 uint32_t counter_h; /**< RW Main Counter High. */
61 uint64_t reserved3; /**< Reserved for future use. */
63 uint64_t config; /**< RW Timer Config and Capability Reg. */
64 uint64_t comp; /**< RW Timer Comparator Value Register. */
65 uint64_t fsb; /**< RW FSB Interrupt Route Register. */
66 uint64_t reserved4; /**< Reserved for future use. */
67 } timers[HPET_TIMER_NUM]; /**< Set of HPET timers. */
70 /* Mmap'd hpet registers */
71 static volatile struct eal_hpet_regs *eal_hpet = NULL;
73 /* Period at which the HPET counter increments in
74 * femtoseconds (10^-15 seconds). */
75 static uint32_t eal_hpet_resolution_fs = 0;
77 /* Frequency of the HPET counter in Hz */
78 static uint64_t eal_hpet_resolution_hz = 0;
80 /* Incremented 4 times during one 32bits hpet full count */
81 static uint32_t eal_hpet_msb;
83 static pthread_t msb_inc_thread_id;
86 * This function runs on a specific thread to update a global variable
87 * containing used to process MSB of the HPET (unfortunately, we need
88 * this because hpet is 32 bits by default under linux).
91 hpet_msb_inc(__attribute__((unused)) void *arg)
96 t = (eal_hpet->counter_l >> 30);
97 if (t != (eal_hpet_msb & 3))
105 rte_get_hpet_hz(void)
107 if(internal_config.no_hpet)
108 rte_panic("Error, HPET called, but no HPET present\n");
110 return eal_hpet_resolution_hz;
114 rte_get_hpet_cycles(void)
119 if(internal_config.no_hpet)
120 rte_panic("Error, HPET called, but no HPET present\n");
122 t = eal_hpet->counter_l;
124 ret = (msb + 2 - (t >> 30)) / 4;
132 #ifdef RTE_LIBEAL_USE_HPET
134 * Open and mmap /dev/hpet (high precision event timer) that will
135 * provide our time reference.
138 rte_eal_hpet_init(int make_default)
142 if (internal_config.no_hpet) {
143 RTE_LOG(NOTICE, EAL, "HPET is disabled\n");
147 fd = open(DEV_HPET, O_RDONLY);
149 RTE_LOG(ERR, EAL, "ERROR: Cannot open "DEV_HPET": %s!\n",
151 internal_config.no_hpet = 1;
154 eal_hpet = mmap(NULL, 1024, PROT_READ, MAP_SHARED, fd, 0);
155 if (eal_hpet == MAP_FAILED) {
156 RTE_LOG(ERR, EAL, "ERROR: Cannot mmap "DEV_HPET"!\n"
157 "Please enable CONFIG_HPET_MMAP in your kernel configuration "
158 "to allow HPET support.\n"
159 "To run without using HPET, set CONFIG_RTE_LIBEAL_USE_HPET=n "
160 "in your build configuration or use '--no-hpet' EAL flag.\n");
162 internal_config.no_hpet = 1;
167 eal_hpet_resolution_fs = (uint32_t)((eal_hpet->capabilities &
171 eal_hpet_resolution_hz = (1000ULL*1000ULL*1000ULL*1000ULL*1000ULL) /
172 (uint64_t)eal_hpet_resolution_fs;
174 RTE_LOG(INFO, EAL, "HPET frequency is ~%"PRIu64" kHz\n",
175 eal_hpet_resolution_hz/1000);
177 eal_hpet_msb = (eal_hpet->counter_l >> 30);
179 /* create a thread that will increment a global variable for
180 * msb (hpet is 32 bits by default under linux) */
181 ret = rte_ctrl_thread_create(&msb_inc_thread_id, "hpet-msb-inc", NULL,
184 RTE_LOG(ERR, EAL, "ERROR: Cannot create HPET timer thread!\n");
185 internal_config.no_hpet = 1;
190 eal_timer_source = EAL_TIMER_HPET;
196 check_tsc_flags(void)
201 stream = fopen("/proc/cpuinfo", "r");
203 RTE_LOG(WARNING, EAL, "WARNING: Unable to open /proc/cpuinfo\n");
207 while (fgets(line, sizeof line, stream)) {
211 if (strncmp(line, "flags", 5) != 0)
214 constant_tsc = strstr(line, "constant_tsc");
215 nonstop_tsc = strstr(line, "nonstop_tsc");
216 if (!constant_tsc || !nonstop_tsc)
217 RTE_LOG(WARNING, EAL,
218 "WARNING: cpu flags "
221 "-> using unreliable clock cycles !\n",
222 constant_tsc ? "yes":"no",
223 nonstop_tsc ? "yes":"no");
233 #ifdef CLOCK_MONOTONIC_RAW
234 #define NS_PER_SEC 1E9
235 #define CYC_PER_10MHZ 1E7
237 struct timespec sleeptime = {.tv_nsec = NS_PER_SEC / 10 }; /* 1/10 second */
239 struct timespec t_start, t_end;
242 if (clock_gettime(CLOCK_MONOTONIC_RAW, &t_start) == 0) {
243 uint64_t ns, end, start = rte_rdtsc();
244 nanosleep(&sleeptime,NULL);
245 clock_gettime(CLOCK_MONOTONIC_RAW, &t_end);
247 ns = ((t_end.tv_sec - t_start.tv_sec) * NS_PER_SEC);
248 ns += (t_end.tv_nsec - t_start.tv_nsec);
250 double secs = (double)ns/NS_PER_SEC;
251 tsc_hz = (uint64_t)((end - start)/secs);
252 /* Round up to 10Mhz. 1E7 ~ 10Mhz */
253 return RTE_ALIGN_MUL_NEAR(tsc_hz, CYC_PER_10MHZ);
260 rte_eal_timer_init(void)
263 eal_timer_source = EAL_TIMER_TSC;