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36 #include <linux/pci_regs.h>
37 #include <sys/eventfd.h>
38 #include <sys/socket.h>
39 #include <sys/ioctl.h>
43 #include <rte_tailq.h>
44 #include <rte_eal_memconfig.h>
45 #include <rte_malloc.h>
47 #include "eal_filesystem.h"
48 #include "eal_pci_init.h"
53 * PCI probing under linux (VFIO version)
55 * This code tries to determine if the PCI device is bound to VFIO driver,
56 * and initialize it (map BARs, set up interrupts) if that's the case.
58 * This file is only compiled if CONFIG_RTE_EAL_VFIO is set to "y".
63 #define VFIO_DIR "/dev/vfio"
64 #define VFIO_CONTAINER_PATH "/dev/vfio/vfio"
65 #define VFIO_GROUP_FMT "/dev/vfio/%u"
66 #define VFIO_GET_REGION_ADDR(x) ((uint64_t) x << 40ULL)
68 /* per-process VFIO config */
69 static struct vfio_config vfio_cfg;
71 /* get PCI BAR number where MSI-X interrupts are */
73 pci_vfio_get_msix_bar(int fd, int *msix_bar)
77 uint8_t cap_id, cap_offset;
79 /* read PCI capability pointer from config space */
80 ret = pread64(fd, ®, sizeof(reg),
81 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
83 if (ret != sizeof(reg)) {
84 RTE_LOG(ERR, EAL, "Cannot read capability pointer from PCI "
89 /* we need first byte */
90 cap_offset = reg & 0xFF;
94 /* read PCI capability ID */
95 ret = pread64(fd, ®, sizeof(reg),
96 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
98 if (ret != sizeof(reg)) {
99 RTE_LOG(ERR, EAL, "Cannot read capability ID from PCI "
104 /* we need first byte */
107 /* if we haven't reached MSI-X, check next capability */
108 if (cap_id != PCI_CAP_ID_MSIX) {
109 ret = pread64(fd, ®, sizeof(reg),
110 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
112 if (ret != sizeof(reg)) {
113 RTE_LOG(ERR, EAL, "Cannot read capability pointer from PCI "
118 /* we need second byte */
119 cap_offset = (reg & 0xFF00) >> 8;
123 /* else, read table offset */
125 /* table offset resides in the next 4 bytes */
126 ret = pread64(fd, ®, sizeof(reg),
127 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
129 if (ret != sizeof(reg)) {
130 RTE_LOG(ERR, EAL, "Cannot read table offset from PCI config "
135 *msix_bar = reg & RTE_PCI_MSIX_TABLE_BIR;
143 /* set PCI bus mastering */
145 pci_vfio_set_bus_master(int dev_fd)
150 ret = pread64(dev_fd, ®, sizeof(reg),
151 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
153 if (ret != sizeof(reg)) {
154 RTE_LOG(ERR, EAL, "Cannot read command from PCI config space!\n");
158 /* set the master bit */
159 reg |= PCI_COMMAND_MASTER;
161 ret = pwrite64(dev_fd, ®, sizeof(reg),
162 VFIO_GET_REGION_ADDR(VFIO_PCI_CONFIG_REGION_INDEX) +
165 if (ret != sizeof(reg)) {
166 RTE_LOG(ERR, EAL, "Cannot write command to PCI config space!\n");
173 /* set up DMA mappings */
175 pci_vfio_setup_dma_maps(int vfio_container_fd)
177 const struct rte_memseg *ms = rte_eal_get_physmem_layout();
180 ret = ioctl(vfio_container_fd, VFIO_SET_IOMMU,
183 RTE_LOG(ERR, EAL, " cannot set IOMMU type!\n");
187 /* map all DPDK segments for DMA. use 1:1 PA to IOVA mapping */
188 for (i = 0; i < RTE_MAX_MEMSEG; i++) {
189 struct vfio_iommu_type1_dma_map dma_map;
191 if (ms[i].addr == NULL)
194 memset(&dma_map, 0, sizeof(dma_map));
195 dma_map.argsz = sizeof(struct vfio_iommu_type1_dma_map);
196 dma_map.vaddr = ms[i].addr_64;
197 dma_map.size = ms[i].len;
198 dma_map.iova = ms[i].phys_addr;
199 dma_map.flags = VFIO_DMA_MAP_FLAG_READ | VFIO_DMA_MAP_FLAG_WRITE;
201 ret = ioctl(vfio_container_fd, VFIO_IOMMU_MAP_DMA, &dma_map);
204 RTE_LOG(ERR, EAL, " cannot set up DMA remapping!\n");
212 /* set up interrupt support (but not enable interrupts) */
214 pci_vfio_setup_interrupts(struct rte_pci_device *dev, int vfio_dev_fd)
216 int i, ret, intr_idx;
218 /* default to invalid index */
219 intr_idx = VFIO_PCI_NUM_IRQS;
221 /* get interrupt type from internal config (MSI-X by default, can be
222 * overriden from the command line
224 switch (internal_config.vfio_intr_mode) {
225 case RTE_INTR_MODE_MSIX:
226 intr_idx = VFIO_PCI_MSIX_IRQ_INDEX;
228 case RTE_INTR_MODE_MSI:
229 intr_idx = VFIO_PCI_MSI_IRQ_INDEX;
231 case RTE_INTR_MODE_LEGACY:
232 intr_idx = VFIO_PCI_INTX_IRQ_INDEX;
234 /* don't do anything if we want to automatically determine interrupt type */
235 case RTE_INTR_MODE_NONE:
238 RTE_LOG(ERR, EAL, " unknown default interrupt type!\n");
242 /* start from MSI-X interrupt type */
243 for (i = VFIO_PCI_MSIX_IRQ_INDEX; i >= 0; i--) {
244 struct vfio_irq_info irq = { .argsz = sizeof(irq) };
247 /* skip interrupt modes we don't want */
248 if (internal_config.vfio_intr_mode != RTE_INTR_MODE_NONE &&
254 ret = ioctl(vfio_dev_fd, VFIO_DEVICE_GET_IRQ_INFO, &irq);
256 RTE_LOG(ERR, EAL, " cannot get IRQ info!\n");
260 /* if this vector cannot be used with eventfd, fail if we explicitly
261 * specified interrupt type, otherwise continue */
262 if ((irq.flags & VFIO_IRQ_INFO_EVENTFD) == 0) {
263 if (internal_config.vfio_intr_mode != RTE_INTR_MODE_NONE) {
265 " interrupt vector does not support eventfd!\n");
271 /* set up an eventfd for interrupts */
274 RTE_LOG(ERR, EAL, " cannot set up eventfd!\n");
278 dev->intr_handle.fd = fd;
279 dev->intr_handle.vfio_dev_fd = vfio_dev_fd;
282 case VFIO_PCI_MSIX_IRQ_INDEX:
283 internal_config.vfio_intr_mode = RTE_INTR_MODE_MSIX;
284 dev->intr_handle.type = RTE_INTR_HANDLE_VFIO_MSIX;
286 case VFIO_PCI_MSI_IRQ_INDEX:
287 internal_config.vfio_intr_mode = RTE_INTR_MODE_MSI;
288 dev->intr_handle.type = RTE_INTR_HANDLE_VFIO_MSI;
290 case VFIO_PCI_INTX_IRQ_INDEX:
291 internal_config.vfio_intr_mode = RTE_INTR_MODE_LEGACY;
292 dev->intr_handle.type = RTE_INTR_HANDLE_VFIO_LEGACY;
295 RTE_LOG(ERR, EAL, " unknown interrupt type!\n");
302 /* if we're here, we haven't found a suitable interrupt vector */
306 /* open container fd or get an existing one */
308 pci_vfio_get_container_fd(void)
310 int ret, vfio_container_fd;
312 /* if we're in a primary process, try to open the container */
313 if (internal_config.process_type == RTE_PROC_PRIMARY) {
314 vfio_container_fd = open(VFIO_CONTAINER_PATH, O_RDWR);
315 if (vfio_container_fd < 0) {
316 RTE_LOG(ERR, EAL, " cannot open VFIO container!\n");
320 /* check VFIO API version */
321 ret = ioctl(vfio_container_fd, VFIO_GET_API_VERSION);
322 if (ret != VFIO_API_VERSION) {
323 RTE_LOG(ERR, EAL, " unknown VFIO API version!\n");
324 close(vfio_container_fd);
328 /* check if we support IOMMU type 1 */
329 ret = ioctl(vfio_container_fd, VFIO_CHECK_EXTENSION, VFIO_TYPE1_IOMMU);
331 RTE_LOG(ERR, EAL, " unknown IOMMU driver!\n");
332 close(vfio_container_fd);
336 return vfio_container_fd;
342 /* open group fd or get an existing one */
344 pci_vfio_get_group_fd(int iommu_group_no)
348 char filename[PATH_MAX];
350 /* check if we already have the group descriptor open */
351 for (i = 0; i < vfio_cfg.vfio_group_idx; i++)
352 if (vfio_cfg.vfio_groups[i].group_no == iommu_group_no)
353 return vfio_cfg.vfio_groups[i].fd;
355 /* if primary, try to open the group */
356 if (internal_config.process_type == RTE_PROC_PRIMARY) {
357 rte_snprintf(filename, sizeof(filename),
358 VFIO_GROUP_FMT, iommu_group_no);
359 vfio_group_fd = open(filename, O_RDWR);
360 if (vfio_group_fd < 0) {
361 /* if file not found, it's not an error */
362 if (errno != ENOENT) {
363 RTE_LOG(ERR, EAL, "Cannot open %s: %s\n", filename,
370 /* if the fd is valid, create a new group for it */
371 if (vfio_cfg.vfio_group_idx == VFIO_MAX_GROUPS) {
372 RTE_LOG(ERR, EAL, "Maximum number of VFIO groups reached!\n");
375 vfio_cfg.vfio_groups[vfio_cfg.vfio_group_idx].group_no = iommu_group_no;
376 vfio_cfg.vfio_groups[vfio_cfg.vfio_group_idx].fd = vfio_group_fd;
377 return vfio_group_fd;
382 /* parse IOMMU group number for a PCI device
383 * returns -1 for errors, 0 for non-existent group */
385 pci_vfio_get_group_no(const char *pci_addr)
387 char linkname[PATH_MAX];
388 char filename[PATH_MAX];
389 char *tok[16], *group_tok, *end;
390 int ret, iommu_group_no;
392 memset(linkname, 0, sizeof(linkname));
393 memset(filename, 0, sizeof(filename));
395 /* try to find out IOMMU group for this device */
396 rte_snprintf(linkname, sizeof(linkname),
397 SYSFS_PCI_DEVICES "/%s/iommu_group", pci_addr);
399 ret = readlink(linkname, filename, sizeof(filename));
401 /* if the link doesn't exist, no VFIO for us */
405 ret = rte_strsplit(filename, sizeof(filename),
406 tok, RTE_DIM(tok), '/');
409 RTE_LOG(ERR, EAL, " %s cannot get IOMMU group\n", pci_addr);
413 /* IOMMU group is always the last token */
415 group_tok = tok[ret - 1];
417 iommu_group_no = strtol(group_tok, &end, 10);
418 if ((end != group_tok && *end != '\0') || errno != 0) {
419 RTE_LOG(ERR, EAL, " %s error parsing IOMMU number!\n", pci_addr);
423 return iommu_group_no;
427 clear_current_group(void)
429 vfio_cfg.vfio_groups[vfio_cfg.vfio_group_idx].group_no = 0;
430 vfio_cfg.vfio_groups[vfio_cfg.vfio_group_idx].fd = -1;
435 * map the PCI resources of a PCI device in virtual memory (VFIO version).
436 * primary and secondary processes follow almost exactly the same path
439 pci_vfio_map_resource(struct rte_pci_device *dev)
441 struct vfio_group_status group_status = {
442 .argsz = sizeof(group_status)
444 struct vfio_device_info device_info = { .argsz = sizeof(device_info) };
445 int vfio_group_fd, vfio_dev_fd;
447 char pci_addr[PATH_MAX] = {0};
448 struct rte_pci_addr *loc = &dev->addr;
449 int i, ret, msix_bar;
450 struct mapped_pci_resource *vfio_res = NULL;
451 struct pci_map *maps;
453 dev->intr_handle.fd = -1;
454 dev->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
456 /* store PCI address string */
457 rte_snprintf(pci_addr, sizeof(pci_addr), PCI_PRI_FMT,
458 loc->domain, loc->bus, loc->devid, loc->function);
460 /* get container fd (needs to be done only once per initialization) */
461 if (vfio_cfg.vfio_container_fd == -1) {
462 int vfio_container_fd = pci_vfio_get_container_fd();
463 if (vfio_container_fd < 0) {
464 RTE_LOG(ERR, EAL, " %s cannot open VFIO container!\n", pci_addr);
468 vfio_cfg.vfio_container_fd = vfio_container_fd;
471 /* get group number */
472 iommu_group_no = pci_vfio_get_group_no(pci_addr);
474 /* if 0, group doesn't exist */
475 if (iommu_group_no == 0) {
476 RTE_LOG(WARNING, EAL, " %s not managed by VFIO driver, skipping\n",
480 /* if negative, something failed */
481 else if (iommu_group_no < 0)
484 /* get the actual group fd */
485 vfio_group_fd = pci_vfio_get_group_fd(iommu_group_no);
486 if (vfio_group_fd < 0)
490 vfio_cfg.vfio_groups[vfio_cfg.vfio_group_idx].group_no = iommu_group_no;
491 vfio_cfg.vfio_groups[vfio_cfg.vfio_group_idx].fd = vfio_group_fd;
493 /* if group_fd == 0, that means the device isn't managed by VFIO */
494 if (vfio_group_fd == 0) {
495 RTE_LOG(WARNING, EAL, " %s not managed by VFIO driver, skipping\n",
497 /* we store 0 as group fd to distinguish between existing but
498 * unbound VFIO groups, and groups that don't exist at all.
500 vfio_cfg.vfio_group_idx++;
505 * at this point, we know at least one port on this device is bound to VFIO,
506 * so we can proceed to try and set this particular port up
509 /* check if the group is viable */
510 ret = ioctl(vfio_group_fd, VFIO_GROUP_GET_STATUS, &group_status);
512 RTE_LOG(ERR, EAL, " %s cannot get group status!\n", pci_addr);
513 close(vfio_group_fd);
514 clear_current_group();
516 } else if (!(group_status.flags & VFIO_GROUP_FLAGS_VIABLE)) {
517 RTE_LOG(ERR, EAL, " %s VFIO group is not viable!\n", pci_addr);
518 close(vfio_group_fd);
519 clear_current_group();
524 * at this point, we know that this group is viable (meaning, all devices
525 * are either bound to VFIO or not bound to anything)
528 /* check if group does not have a container yet */
529 if (!(group_status.flags & VFIO_GROUP_FLAGS_CONTAINER_SET)) {
531 /* add group to a container */
532 ret = ioctl(vfio_group_fd, VFIO_GROUP_SET_CONTAINER,
533 &vfio_cfg.vfio_container_fd);
535 RTE_LOG(ERR, EAL, " %s cannot add VFIO group to container!\n",
537 close(vfio_group_fd);
538 clear_current_group();
542 * at this point we know that this group has been successfully
543 * initialized, so we increment vfio_group_idx to indicate that we can
546 vfio_cfg.vfio_group_idx++;
550 * set up DMA mappings for container
552 * needs to be done only once, only when at least one group is assigned to
553 * a container and only in primary process
555 if (internal_config.process_type == RTE_PROC_PRIMARY &&
556 vfio_cfg.vfio_container_has_dma == 0) {
557 ret = pci_vfio_setup_dma_maps(vfio_cfg.vfio_container_fd);
559 RTE_LOG(ERR, EAL, " %s DMA remapping failed!\n", pci_addr);
562 vfio_cfg.vfio_container_has_dma = 1;
565 /* get a file descriptor for the device */
566 vfio_dev_fd = ioctl(vfio_group_fd, VFIO_GROUP_GET_DEVICE_FD, pci_addr);
567 if (vfio_dev_fd < 0) {
568 /* if we cannot get a device fd, this simply means that this
569 * particular port is not bound to VFIO
571 RTE_LOG(WARNING, EAL, " %s not managed by VFIO driver, skipping\n",
576 /* test and setup the device */
577 ret = ioctl(vfio_dev_fd, VFIO_DEVICE_GET_INFO, &device_info);
579 RTE_LOG(ERR, EAL, " %s cannot get device info!\n", pci_addr);
584 /* get MSI-X BAR, if any (we have to know where it is because we can't
585 * mmap it when using VFIO) */
587 ret = pci_vfio_get_msix_bar(vfio_dev_fd, &msix_bar);
589 RTE_LOG(ERR, EAL, " %s cannot get MSI-X BAR number!\n", pci_addr);
594 /* if we're in a primary process, allocate vfio_res and get region info */
595 if (internal_config.process_type == RTE_PROC_PRIMARY) {
596 vfio_res = rte_zmalloc("VFIO_RES", sizeof(*vfio_res), 0);
597 if (vfio_res == NULL) {
599 "%s(): cannot store uio mmap details\n", __func__);
603 memcpy(&vfio_res->pci_addr, &dev->addr, sizeof(vfio_res->pci_addr));
605 /* get number of registers (up to BAR5) */
606 vfio_res->nb_maps = RTE_MIN((int) device_info.num_regions,
607 VFIO_PCI_BAR5_REGION_INDEX + 1);
611 maps = vfio_res->maps;
613 for (i = 0; i < (int) vfio_res->nb_maps; i++) {
614 struct vfio_region_info reg = { .argsz = sizeof(reg) };
619 ret = ioctl(vfio_dev_fd, VFIO_DEVICE_GET_REGION_INFO, ®);
622 RTE_LOG(ERR, EAL, " %s cannot get device region info!\n",
625 if (internal_config.process_type == RTE_PROC_PRIMARY)
630 /* skip non-mmapable BARs */
631 if ((reg.flags & VFIO_REGION_INFO_FLAG_MMAP) == 0)
638 bar_addr = pci_map_resource(maps[i].addr, vfio_dev_fd, reg.offset,
641 if (bar_addr == NULL) {
642 RTE_LOG(ERR, EAL, " %s mapping BAR%i failed: %s\n", pci_addr, i,
645 if (internal_config.process_type == RTE_PROC_PRIMARY)
650 maps[i].addr = bar_addr;
651 maps[i].offset = reg.offset;
652 maps[i].size = reg.size;
653 dev->mem_resource[i].addr = bar_addr;
656 /* if secondary process, do not set up interrupts */
657 if (internal_config.process_type == RTE_PROC_PRIMARY) {
658 if (pci_vfio_setup_interrupts(dev, vfio_dev_fd) != 0) {
659 RTE_LOG(ERR, EAL, " %s error setting up interrupts!\n", pci_addr);
665 /* set bus mastering for the device */
666 if (pci_vfio_set_bus_master(vfio_dev_fd)) {
667 RTE_LOG(ERR, EAL, " %s cannot set up bus mastering!\n", pci_addr);
673 /* Reset the device */
674 ioctl(vfio_dev_fd, VFIO_DEVICE_RESET);
677 if (internal_config.process_type == RTE_PROC_PRIMARY)
678 TAILQ_INSERT_TAIL(pci_res_list, vfio_res, next);
684 pci_vfio_enable(void)
686 /* initialize group list */
689 for (i = 0; i < VFIO_MAX_GROUPS; i++) {
690 vfio_cfg.vfio_groups[i].fd = -1;
691 vfio_cfg.vfio_groups[i].group_no = -1;
693 vfio_cfg.vfio_container_fd = -1;
695 /* check if we have VFIO driver enabled */
696 if (access(VFIO_DIR, F_OK) == 0)
697 vfio_cfg.vfio_enabled = 1;
699 RTE_LOG(INFO, EAL, "VFIO driver not loaded or wrong permissions\n");
705 pci_vfio_is_enabled(void)
707 return vfio_cfg.vfio_enabled;